drivers/gpu/drm/i915/display/intel_fbc.h

   1 /* SPDX-License-Identifier: MIT */
   2 /*
   3  * Copyright © 2019 Intel Corporation
   4  */
   5
   6 #ifndef __INTEL_FBC_H__
   7 #define __INTEL_FBC_H__
   8
   9 #include <linux/types.h>
  10
  11 enum fb_op_origin;
  12 struct drm_i915_private;
  13 struct intel_atomic_state;
  14 struct intel_crtc;
  15 struct intel_crtc_state;
  16 struct intel_fbc;
  17 struct intel_plane;
  18 struct intel_plane_state;
  19
  20 enum intel_fbc_id {
  21         INTEL_FBC_A,
  22         INTEL_FBC_B,
  23         INTEL_FBC_C,
  24         INTEL_FBC_D,
  25
  26         I915_MAX_FBCS,
  27 };
  28
  29 int intel_fbc_atomic_check(struct intel_atomic_state *state);
  30 bool intel_fbc_pre_update(struct intel_atomic_state *state,
  31                           struct intel_crtc *crtc);
  32 void intel_fbc_post_update(struct intel_atomic_state *state,
  33                            struct intel_crtc *crtc);
  34 void intel_fbc_init(struct drm_i915_private *dev_priv);
  35 void intel_fbc_cleanup(struct drm_i915_private *dev_priv);
  36 void intel_fbc_sanitize(struct drm_i915_private *dev_priv);
  37 void intel_fbc_update(struct intel_atomic_state *state,
  38                       struct intel_crtc *crtc);
  39 void intel_fbc_disable(struct intel_crtc *crtc);
  40 void intel_fbc_invalidate(struct drm_i915_private *dev_priv,
  41                           unsigned int frontbuffer_bits,
  42                           enum fb_op_origin origin);
  43 void intel_fbc_flush(struct drm_i915_private *dev_priv,
  44                      unsigned int frontbuffer_bits, enum fb_op_origin origin);
  45 void intel_fbc_add_plane(struct intel_fbc *fbc, struct intel_plane *plane);
  46 void intel_fbc_handle_fifo_underrun_irq(struct drm_i915_private *i915);
  47 void intel_fbc_reset_underrun(struct drm_i915_private *i915);
  48 void intel_fbc_crtc_debugfs_add(struct intel_crtc *crtc);
  49 void intel_fbc_debugfs_register(struct drm_i915_private *i915);
  50
  51 #endif /* __INTEL_FBC_H__ */