drivers/gpu/drm/i915/display/intel_dp.h

   1 /* SPDX-License-Identifier: MIT */
   2 /*
   3  * Copyright © 2019 Intel Corporation
   4  */
   5
   6 #ifndef __INTEL_DP_H__
   7 #define __INTEL_DP_H__
   8
   9 #include <linux/types.h>
  10
  11 enum intel_output_format;
  12 enum pipe;
  13 enum port;
  14 struct drm_connector_state;
  15 struct drm_encoder;
  16 struct drm_i915_private;
  17 struct drm_modeset_acquire_ctx;
  18 struct drm_dp_vsc_sdp;
  19 struct intel_atomic_state;
  20 struct intel_connector;
  21 struct intel_crtc_state;
  22 struct intel_digital_port;
  23 struct intel_dp;
  24 struct intel_encoder;
  25
  26 struct link_config_limits {
  27         int min_rate, max_rate;
  28         int min_lane_count, max_lane_count;
  29         struct {
  30                 /* Uncompressed DSC input or link output bpp in 1 bpp units */
  31                 int min_bpp, max_bpp;
  32         } pipe;
  33         struct {
  34                 /* Compressed or uncompressed link output bpp in 1/16 bpp units */
  35                 int min_bpp_x16, max_bpp_x16;
  36         } link;
  37 };
  38
  39 void intel_edp_fixup_vbt_bpp(struct intel_encoder *encoder, int pipe_bpp);
  40 void intel_dp_adjust_compliance_config(struct intel_dp *intel_dp,
  41                                        struct intel_crtc_state *pipe_config,
  42                                        struct link_config_limits *limits);
  43 bool intel_dp_limited_color_range(const struct intel_crtc_state *crtc_state,
  44                                   const struct drm_connector_state *conn_state);
  45 int intel_dp_min_bpp(enum intel_output_format output_format);
  46 bool intel_dp_init_connector(struct intel_digital_port *dig_port,
  47                              struct intel_connector *intel_connector);
  48 void intel_dp_set_link_params(struct intel_dp *intel_dp,
  49                               int link_rate, int lane_count);
  50 int intel_dp_get_link_train_fallback_values(struct intel_dp *intel_dp,
  51                                             int link_rate, u8 lane_count);
  52 int intel_dp_get_active_pipes(struct intel_dp *intel_dp,
  53                               struct drm_modeset_acquire_ctx *ctx,
  54                               u8 *pipe_mask);
  55 int intel_dp_retrain_link(struct intel_encoder *encoder,
  56                           struct drm_modeset_acquire_ctx *ctx);
  57 void intel_dp_set_power(struct intel_dp *intel_dp, u8 mode);
  58 void intel_dp_configure_protocol_converter(struct intel_dp *intel_dp,
  59                                            const struct intel_crtc_state *crtc_state);
  60 void intel_dp_sink_set_decompression_state(struct intel_dp *intel_dp,
  61                                            const struct intel_crtc_state *crtc_state,
  62                                            bool enable);
  63 void intel_dp_encoder_suspend(struct intel_encoder *intel_encoder);
  64 void intel_dp_encoder_shutdown(struct intel_encoder *intel_encoder);
  65 void intel_dp_encoder_flush_work(struct drm_encoder *encoder);
  66 int intel_dp_compute_config(struct intel_encoder *encoder,
  67                             struct intel_crtc_state *pipe_config,
  68                             struct drm_connector_state *conn_state);
  69 int intel_dp_dsc_compute_config(struct intel_dp *intel_dp,
  70                                 struct intel_crtc_state *pipe_config,
  71                                 struct drm_connector_state *conn_state,
  72                                 struct link_config_limits *limits,
  73                                 int timeslots,
  74                                 bool recompute_pipe_bpp);
  75 void intel_dp_audio_compute_config(struct intel_encoder *encoder,
  76                                    struct intel_crtc_state *pipe_config,
  77                                    struct drm_connector_state *conn_state);
  78 bool intel_dp_has_hdmi_sink(struct intel_dp *intel_dp);
  79 bool intel_dp_is_edp(struct intel_dp *intel_dp);
  80 bool intel_dp_is_uhbr(const struct intel_crtc_state *crtc_state);
  81 bool intel_dp_is_port_edp(struct drm_i915_private *dev_priv, enum port port);
  82 enum irqreturn intel_dp_hpd_pulse(struct intel_digital_port *dig_port,
  83                                   bool long_hpd);
  84 void intel_edp_backlight_on(const struct intel_crtc_state *crtc_state,
  85                             const struct drm_connector_state *conn_state);
  86 void intel_edp_backlight_off(const struct drm_connector_state *conn_state);
  87 void intel_edp_fixup_vbt_bpp(struct intel_encoder *encoder, int pipe_bpp);
  88 void intel_dp_mst_suspend(struct drm_i915_private *dev_priv);
  89 void intel_dp_mst_resume(struct drm_i915_private *dev_priv);
  90 int intel_dp_max_link_rate(struct intel_dp *intel_dp);
  91 int intel_dp_max_lane_count(struct intel_dp *intel_dp);
  92 int intel_dp_rate_select(struct intel_dp *intel_dp, int rate);
  93
  94 void intel_dp_compute_rate(struct intel_dp *intel_dp, int port_clock,
  95                            u8 *link_bw, u8 *rate_select);
  96 bool intel_dp_source_supports_tps3(struct drm_i915_private *i915);
  97 bool intel_dp_source_supports_tps4(struct drm_i915_private *i915);
  98
  99 bool intel_dp_get_colorimetry_status(struct intel_dp *intel_dp);
 100 int intel_dp_link_required(int pixel_clock, int bpp);
 101 int intel_dp_max_data_rate(int max_link_rate, int max_lanes);
 102 bool intel_dp_can_bigjoiner(struct intel_dp *intel_dp);
 103 bool intel_dp_needs_vsc_sdp(const struct intel_crtc_state *crtc_state,
 104                             const struct drm_connector_state *conn_state);
 105 void intel_dp_compute_psr_vsc_sdp(struct intel_dp *intel_dp,
 106                                   const struct intel_crtc_state *crtc_state,
 107                                   const struct drm_connector_state *conn_state,
 108                                   struct drm_dp_vsc_sdp *vsc);
 109 void intel_write_dp_vsc_sdp(struct intel_encoder *encoder,
 110                             const struct intel_crtc_state *crtc_state,
 111                             const struct drm_dp_vsc_sdp *vsc);
 112 void intel_dp_set_infoframes(struct intel_encoder *encoder, bool enable,
 113                              const struct intel_crtc_state *crtc_state,
 114                              const struct drm_connector_state *conn_state);
 115 void intel_read_dp_sdp(struct intel_encoder *encoder,
 116                        struct intel_crtc_state *crtc_state,
 117                        unsigned int type);
 118 bool intel_digital_port_connected(struct intel_encoder *encoder);
 119 int intel_dp_dsc_compute_max_bpp(const struct intel_connector *connector,
 120                                  u8 dsc_max_bpc);
 121 u16 intel_dp_dsc_get_max_compressed_bpp(struct drm_i915_private *i915,
 122                                         u32 link_clock, u32 lane_count,
 123                                         u32 mode_clock, u32 mode_hdisplay,
 124                                         bool bigjoiner,
 125                                         enum intel_output_format output_format,
 126                                         u32 pipe_bpp,
 127                                         u32 timeslots);
 128 u8 intel_dp_dsc_get_slice_count(const struct intel_connector *connector,
 129                                 int mode_clock, int mode_hdisplay,
 130                                 bool bigjoiner);
 131 bool intel_dp_need_bigjoiner(struct intel_dp *intel_dp,
 132                              int hdisplay, int clock);
 133
 134 static inline unsigned int intel_dp_unused_lane_mask(int lane_count)
 135 {
 136         return ~((1 << lane_count) - 1) & 0xf;
 137 }
 138
 139 u32 intel_dp_mode_to_fec_clock(u32 mode_clock);
 140 u32 intel_dp_dsc_nearest_valid_bpp(struct drm_i915_private *i915, u32 bpp, u32 pipe_bpp);
 141
 142 void intel_ddi_update_pipe(struct intel_atomic_state *state,
 143                            struct intel_encoder *encoder,
 144                            const struct intel_crtc_state *crtc_state,
 145                            const struct drm_connector_state *conn_state);
 146
 147 bool intel_dp_initial_fastset_check(struct intel_encoder *encoder,
 148                                     struct intel_crtc_state *crtc_state);
 149 void intel_dp_sync_state(struct intel_encoder *encoder,
 150                          const struct intel_crtc_state *crtc_state);
 151
 152 void intel_dp_check_frl_training(struct intel_dp *intel_dp);
 153 void intel_dp_pcon_dsc_configure(struct intel_dp *intel_dp,
 154                                  const struct intel_crtc_state *crtc_state);
 155 void intel_dp_phy_test(struct intel_encoder *encoder);
 156
 157 void intel_dp_wait_source_oui(struct intel_dp *intel_dp);
 158 int intel_dp_output_bpp(enum intel_output_format output_format, int bpp);
 159
 160 bool
 161 intel_dp_compute_config_link_bpp_limits(struct intel_dp *intel_dp,
 162                                         const struct intel_crtc_state *crtc_state,
 163                                         bool dsc,
 164                                         struct link_config_limits *limits);
 165
 166 void intel_dp_get_dsc_sink_cap(u8 dpcd_rev, struct intel_connector *connector);
 167
 168 #endif /* __INTEL_DP_H__ */