drivers/gpu/drm/amd/display/dc/bios/command_table_helper2.c

   1 /*
   2  * Copyright 2012-15 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: AMD
  23  *
  24  */
  25
  26 #include "dm_services.h"
  27
  28 #include "ObjectID.h"
  29 #include "atomfirmware.h"
  30
  31 #include "include/bios_parser_types.h"
  32
  33 #include "command_table_helper2.h"
  34
  35 bool dal_bios_parser_init_cmd_tbl_helper2(
  36         const struct command_table_helper **h,
  37         enum dce_version dce)
  38 {
  39         switch (dce) {
  40 #if defined(CONFIG_DRM_AMD_DC_SI)
  41         case DCE_VERSION_6_0:
  42         case DCE_VERSION_6_1:
  43         case DCE_VERSION_6_4:
  44                 *h = dal_cmd_tbl_helper_dce60_get_table();
  45                 return true;
  46 #endif
  47
  48         case DCE_VERSION_8_0:
  49         case DCE_VERSION_8_1:
  50         case DCE_VERSION_8_3:
  51                 *h = dal_cmd_tbl_helper_dce80_get_table();
  52                 return true;
  53
  54         case DCE_VERSION_10_0:
  55                 *h = dal_cmd_tbl_helper_dce110_get_table();
  56                 return true;
  57
  58         case DCE_VERSION_11_0:
  59                 *h = dal_cmd_tbl_helper_dce110_get_table();
  60                 return true;
  61
  62         case DCE_VERSION_11_2:
  63         case DCE_VERSION_11_22:
  64         case DCE_VERSION_12_0:
  65         case DCE_VERSION_12_1:
  66                 *h = dal_cmd_tbl_helper_dce112_get_table2();
  67                 return true;
  68         case DCN_VERSION_1_0:
  69         case DCN_VERSION_1_01:
  70         case DCN_VERSION_2_0:
  71         case DCN_VERSION_2_1:
  72         case DCN_VERSION_2_01:
  73         case DCN_VERSION_3_0:
  74         case DCN_VERSION_3_01:
  75         case DCN_VERSION_3_02:
  76         case DCN_VERSION_3_03:
  77         case DCN_VERSION_3_1:
  78         case DCN_VERSION_3_14:
  79         case DCN_VERSION_3_15:
  80         case DCN_VERSION_3_16:
  81         case DCN_VERSION_3_2:
  82         case DCN_VERSION_3_21:
  83         case DCN_VERSION_3_5:
  84                 *h = dal_cmd_tbl_helper_dce112_get_table2();
  85                 return true;
  86
  87         default:
  88                 /* Unsupported DCE */
  89                 BREAK_TO_DEBUGGER();
  90                 return false;
  91         }
  92 }
  93
  94 /* real implementations */
  95
  96 bool dal_cmd_table_helper_controller_id_to_atom2(
  97         enum controller_id id,
  98         uint8_t *atom_id)
  99 {
 100         if (atom_id == NULL) {
 101                 BREAK_TO_DEBUGGER();
 102                 return false;
 103         }
 104
 105         switch (id) {
 106         case CONTROLLER_ID_D0:
 107                 *atom_id = ATOM_CRTC1;
 108                 return true;
 109         case CONTROLLER_ID_D1:
 110                 *atom_id = ATOM_CRTC2;
 111                 return true;
 112         case CONTROLLER_ID_D2:
 113                 *atom_id = ATOM_CRTC3;
 114                 return true;
 115         case CONTROLLER_ID_D3:
 116                 *atom_id = ATOM_CRTC4;
 117                 return true;
 118         case CONTROLLER_ID_D4:
 119                 *atom_id = ATOM_CRTC5;
 120                 return true;
 121         case CONTROLLER_ID_D5:
 122                 *atom_id = ATOM_CRTC6;
 123                 return true;
 124         /* TODO :case CONTROLLER_ID_UNDERLAY0:
 125                 *atom_id = ATOM_UNDERLAY_PIPE0;
 126                 return true;
 127         */
 128         case CONTROLLER_ID_UNDEFINED:
 129                 *atom_id = ATOM_CRTC_INVALID;
 130                 return true;
 131         default:
 132                 /* Wrong controller id */
 133                 BREAK_TO_DEBUGGER();
 134                 return false;
 135         }
 136 }
 137
 138 /**
 139  * dal_cmd_table_helper_transmitter_bp_to_atom2 - Translate the Transmitter to the
 140  *                                     corresponding ATOM BIOS value
 141  *  @t: transmitter
 142  *  returns: digitalTransmitter
 143  *    // =00: Digital Transmitter1 ( UNIPHY linkAB )
 144  *    // =01: Digital Transmitter2 ( UNIPHY linkCD )
 145  *    // =02: Digital Transmitter3 ( UNIPHY linkEF )
 146  */
 147 uint8_t dal_cmd_table_helper_transmitter_bp_to_atom2(
 148         enum transmitter t)
 149 {
 150         switch (t) {
 151         case TRANSMITTER_UNIPHY_A:
 152         case TRANSMITTER_UNIPHY_B:
 153         case TRANSMITTER_TRAVIS_LCD:
 154                 return 0;
 155         case TRANSMITTER_UNIPHY_C:
 156         case TRANSMITTER_UNIPHY_D:
 157                 return 1;
 158         case TRANSMITTER_UNIPHY_E:
 159         case TRANSMITTER_UNIPHY_F:
 160                 return 2;
 161         default:
 162                 /* Invalid Transmitter Type! */
 163                 BREAK_TO_DEBUGGER();
 164                 return 0;
 165         }
 166 }
 167
 168 uint32_t dal_cmd_table_helper_encoder_mode_bp_to_atom2(
 169         enum signal_type s,
 170         bool enable_dp_audio)
 171 {
 172         switch (s) {
 173         case SIGNAL_TYPE_DVI_SINGLE_LINK:
 174         case SIGNAL_TYPE_DVI_DUAL_LINK:
 175                 return ATOM_ENCODER_MODE_DVI;
 176         case SIGNAL_TYPE_HDMI_TYPE_A:
 177                 return ATOM_ENCODER_MODE_HDMI;
 178         case SIGNAL_TYPE_LVDS:
 179                 return ATOM_ENCODER_MODE_LVDS;
 180         case SIGNAL_TYPE_EDP:
 181         case SIGNAL_TYPE_DISPLAY_PORT_MST:
 182         case SIGNAL_TYPE_DISPLAY_PORT:
 183         case SIGNAL_TYPE_VIRTUAL:
 184                 if (enable_dp_audio)
 185                         return ATOM_ENCODER_MODE_DP_AUDIO;
 186                 else
 187                         return ATOM_ENCODER_MODE_DP;
 188         case SIGNAL_TYPE_RGB:
 189                 return ATOM_ENCODER_MODE_CRT;
 190         default:
 191                 return ATOM_ENCODER_MODE_CRT;
 192         }
 193 }
 194
 195 bool dal_cmd_table_helper_clock_source_id_to_ref_clk_src2(
 196         enum clock_source_id id,
 197         uint32_t *ref_clk_src_id)
 198 {
 199         if (ref_clk_src_id == NULL) {
 200                 BREAK_TO_DEBUGGER();
 201                 return false;
 202         }
 203
 204         switch (id) {
 205         case CLOCK_SOURCE_ID_PLL1:
 206                 *ref_clk_src_id = ENCODER_REFCLK_SRC_P1PLL;
 207                 return true;
 208         case CLOCK_SOURCE_ID_PLL2:
 209                 *ref_clk_src_id = ENCODER_REFCLK_SRC_P2PLL;
 210                 return true;
 211         /*TODO:case CLOCK_SOURCE_ID_DCPLL:
 212                 *ref_clk_src_id = ENCODER_REFCLK_SRC_DCPLL;
 213                 return true;
 214         */
 215         case CLOCK_SOURCE_ID_EXTERNAL:
 216                 *ref_clk_src_id = ENCODER_REFCLK_SRC_EXTCLK;
 217                 return true;
 218         case CLOCK_SOURCE_ID_UNDEFINED:
 219                 *ref_clk_src_id = ENCODER_REFCLK_SRC_INVALID;
 220                 return true;
 221         default:
 222                 /* Unsupported clock source id */
 223                 BREAK_TO_DEBUGGER();
 224                 return false;
 225         }
 226 }
 227
 228 uint8_t dal_cmd_table_helper_encoder_id_to_atom2(
 229         enum encoder_id id)
 230 {
 231         switch (id) {
 232         case ENCODER_ID_INTERNAL_LVDS:
 233                 return ENCODER_OBJECT_ID_INTERNAL_LVDS;
 234         case ENCODER_ID_INTERNAL_TMDS1:
 235                 return ENCODER_OBJECT_ID_INTERNAL_TMDS1;
 236         case ENCODER_ID_INTERNAL_TMDS2:
 237                 return ENCODER_OBJECT_ID_INTERNAL_TMDS2;
 238         case ENCODER_ID_INTERNAL_DAC1:
 239                 return ENCODER_OBJECT_ID_INTERNAL_DAC1;
 240         case ENCODER_ID_INTERNAL_DAC2:
 241                 return ENCODER_OBJECT_ID_INTERNAL_DAC2;
 242         case ENCODER_ID_INTERNAL_LVTM1:
 243                 return ENCODER_OBJECT_ID_INTERNAL_LVTM1;
 244         case ENCODER_ID_INTERNAL_HDMI:
 245                 return ENCODER_OBJECT_ID_HDMI_INTERNAL;
 246         case ENCODER_ID_EXTERNAL_TRAVIS:
 247                 return ENCODER_OBJECT_ID_TRAVIS;
 248         case ENCODER_ID_EXTERNAL_NUTMEG:
 249                 return ENCODER_OBJECT_ID_NUTMEG;
 250         case ENCODER_ID_INTERNAL_KLDSCP_TMDS1:
 251                 return ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1;
 252         case ENCODER_ID_INTERNAL_KLDSCP_DAC1:
 253                 return ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1;
 254         case ENCODER_ID_INTERNAL_KLDSCP_DAC2:
 255                 return ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2;
 256         case ENCODER_ID_EXTERNAL_MVPU_FPGA:
 257                 return ENCODER_OBJECT_ID_MVPU_FPGA;
 258         case ENCODER_ID_INTERNAL_DDI:
 259                 return ENCODER_OBJECT_ID_INTERNAL_DDI;
 260         case ENCODER_ID_INTERNAL_UNIPHY:
 261                 return ENCODER_OBJECT_ID_INTERNAL_UNIPHY;
 262         case ENCODER_ID_INTERNAL_KLDSCP_LVTMA:
 263                 return ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA;
 264         case ENCODER_ID_INTERNAL_UNIPHY1:
 265                 return ENCODER_OBJECT_ID_INTERNAL_UNIPHY1;
 266         case ENCODER_ID_INTERNAL_UNIPHY2:
 267                 return ENCODER_OBJECT_ID_INTERNAL_UNIPHY2;
 268         case ENCODER_ID_INTERNAL_UNIPHY3:
 269                 return ENCODER_OBJECT_ID_INTERNAL_UNIPHY3;
 270         case ENCODER_ID_INTERNAL_WIRELESS:
 271                 return ENCODER_OBJECT_ID_INTERNAL_VCE;
 272         case ENCODER_ID_INTERNAL_VIRTUAL:
 273                 return ENCODER_OBJECT_ID_NONE;
 274         case ENCODER_ID_UNKNOWN:
 275                 return ENCODER_OBJECT_ID_NONE;
 276         default:
 277                 /* Invalid encoder id */
 278                 BREAK_TO_DEBUGGER();
 279                 return ENCODER_OBJECT_ID_NONE;
 280         }
 281 }