drivers/acpi/pci_root.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  *  pci_root.c - ACPI PCI Root Bridge Driver ($Revision: 40 $)
   4  *
   5  *  Copyright (C) 2001, 2002 Andy Grover <[email protected]>
   6  *  Copyright (C) 2001, 2002 Paul Diefenbaugh <[email protected]>
   7  */
   8
   9 #define pr_fmt(fmt) "ACPI: " fmt
  10
  11 #include <linux/kernel.h>
  12 #include <linux/module.h>
  13 #include <linux/init.h>
  14 #include <linux/types.h>
  15 #include <linux/mutex.h>
  16 #include <linux/pm.h>
  17 #include <linux/pm_runtime.h>
  18 #include <linux/pci.h>
  19 #include <linux/pci-acpi.h>
  20 #include <linux/dmar.h>
  21 #include <linux/acpi.h>
  22 #include <linux/slab.h>
  23 #include <linux/dmi.h>
  24 #include <linux/platform_data/x86/apple.h>
  25 #include <acpi/apei.h>  /* for acpi_hest_init() */
  26
  27 #include "internal.h"
  28
  29 #define ACPI_PCI_ROOT_CLASS             "pci_bridge"
  30 #define ACPI_PCI_ROOT_DEVICE_NAME       "PCI Root Bridge"
  31 static int acpi_pci_root_add(struct acpi_device *device,
  32                              const struct acpi_device_id *not_used);
  33 static void acpi_pci_root_remove(struct acpi_device *device);
  34
  35 static int acpi_pci_root_scan_dependent(struct acpi_device *adev)
  36 {
  37         acpiphp_check_host_bridge(adev);
  38         return 0;
  39 }
  40
  41 #define ACPI_PCIE_REQ_SUPPORT (OSC_PCI_EXT_CONFIG_SUPPORT \
  42                                 | OSC_PCI_ASPM_SUPPORT \
  43                                 | OSC_PCI_CLOCK_PM_SUPPORT \
  44                                 | OSC_PCI_MSI_SUPPORT)
  45
  46 static const struct acpi_device_id root_device_ids[] = {
  47         {"PNP0A03", 0},
  48         {"", 0},
  49 };
  50
  51 static struct acpi_scan_handler pci_root_handler = {
  52         .ids = root_device_ids,
  53         .attach = acpi_pci_root_add,
  54         .detach = acpi_pci_root_remove,
  55         .hotplug = {
  56                 .enabled = true,
  57                 .scan_dependent = acpi_pci_root_scan_dependent,
  58         },
  59 };
  60
  61 /**
  62  * acpi_is_root_bridge - determine whether an ACPI CA node is a PCI root bridge
  63  * @handle:  the ACPI CA node in question.
  64  *
  65  * Note: we could make this API take a struct acpi_device * instead, but
  66  * for now, it's more convenient to operate on an acpi_handle.
  67  */
  68 int acpi_is_root_bridge(acpi_handle handle)
  69 {
  70         int ret;
  71         struct acpi_device *device;
  72
  73         ret = acpi_bus_get_device(handle, &device);
  74         if (ret)
  75                 return 0;
  76
  77         ret = acpi_match_device_ids(device, root_device_ids);
  78         if (ret)
  79                 return 0;
  80         else
  81                 return 1;
  82 }
  83 EXPORT_SYMBOL_GPL(acpi_is_root_bridge);
  84
  85 static acpi_status
  86 get_root_bridge_busnr_callback(struct acpi_resource *resource, void *data)
  87 {
  88         struct resource *res = data;
  89         struct acpi_resource_address64 address;
  90         acpi_status status;
  91
  92         status = acpi_resource_to_address64(resource, &address);
  93         if (ACPI_FAILURE(status))
  94                 return AE_OK;
  95
  96         if ((address.address.address_length > 0) &&
  97             (address.resource_type == ACPI_BUS_NUMBER_RANGE)) {
  98                 res->start = address.address.minimum;
  99                 res->end = address.address.minimum + address.address.address_length - 1;
 100         }
 101
 102         return AE_OK;
 103 }
 104
 105 static acpi_status try_get_root_bridge_busnr(acpi_handle handle,
 106                                              struct resource *res)
 107 {
 108         acpi_status status;
 109
 110         res->start = -1;
 111         status =
 112             acpi_walk_resources(handle, METHOD_NAME__CRS,
 113                                 get_root_bridge_busnr_callback, res);
 114         if (ACPI_FAILURE(status))
 115                 return status;
 116         if (res->start == -1)
 117                 return AE_ERROR;
 118         return AE_OK;
 119 }
 120
 121 struct pci_osc_bit_struct {
 122         u32 bit;
 123         char *desc;
 124 };
 125
 126 static struct pci_osc_bit_struct pci_osc_support_bit[] = {
 127         { OSC_PCI_EXT_CONFIG_SUPPORT, "ExtendedConfig" },
 128         { OSC_PCI_ASPM_SUPPORT, "ASPM" },
 129         { OSC_PCI_CLOCK_PM_SUPPORT, "ClockPM" },
 130         { OSC_PCI_SEGMENT_GROUPS_SUPPORT, "Segments" },
 131         { OSC_PCI_MSI_SUPPORT, "MSI" },
 132         { OSC_PCI_EDR_SUPPORT, "EDR" },
 133         { OSC_PCI_HPX_TYPE_3_SUPPORT, "HPX-Type3" },
 134 };
 135
 136 static struct pci_osc_bit_struct pci_osc_control_bit[] = {
 137         { OSC_PCI_EXPRESS_NATIVE_HP_CONTROL, "PCIeHotplug" },
 138         { OSC_PCI_SHPC_NATIVE_HP_CONTROL, "SHPCHotplug" },
 139         { OSC_PCI_EXPRESS_PME_CONTROL, "PME" },
 140         { OSC_PCI_EXPRESS_AER_CONTROL, "AER" },
 141         { OSC_PCI_EXPRESS_CAPABILITY_CONTROL, "PCIeCapability" },
 142         { OSC_PCI_EXPRESS_LTR_CONTROL, "LTR" },
 143         { OSC_PCI_EXPRESS_DPC_CONTROL, "DPC" },
 144 };
 145
 146 static void decode_osc_bits(struct acpi_pci_root *root, char *msg, u32 word,
 147                             struct pci_osc_bit_struct *table, int size)
 148 {
 149         char buf[80];
 150         int i, len = 0;
 151         struct pci_osc_bit_struct *entry;
 152
 153         buf[0] = '\0';
 154         for (i = 0, entry = table; i < size; i++, entry++)
 155                 if (word & entry->bit)
 156                         len += scnprintf(buf + len, sizeof(buf) - len, "%s%s",
 157                                         len ? " " : "", entry->desc);
 158
 159         dev_info(&root->device->dev, "_OSC: %s [%s]\n", msg, buf);
 160 }
 161
 162 static void decode_osc_support(struct acpi_pci_root *root, char *msg, u32 word)
 163 {
 164         decode_osc_bits(root, msg, word, pci_osc_support_bit,
 165                         ARRAY_SIZE(pci_osc_support_bit));
 166 }
 167
 168 static void decode_osc_control(struct acpi_pci_root *root, char *msg, u32 word)
 169 {
 170         decode_osc_bits(root, msg, word, pci_osc_control_bit,
 171                         ARRAY_SIZE(pci_osc_control_bit));
 172 }
 173
 174 static u8 pci_osc_uuid_str[] = "33DB4D5B-1FF7-401C-9657-7441C03DD766";
 175
 176 static acpi_status acpi_pci_run_osc(acpi_handle handle,
 177                                     const u32 *capbuf, u32 *retval)
 178 {
 179         struct acpi_osc_context context = {
 180                 .uuid_str = pci_osc_uuid_str,
 181                 .rev = 1,
 182                 .cap.length = 12,
 183                 .cap.pointer = (void *)capbuf,
 184         };
 185         acpi_status status;
 186
 187         status = acpi_run_osc(handle, &context);
 188         if (ACPI_SUCCESS(status)) {
 189                 *retval = *((u32 *)(context.ret.pointer + 8));
 190                 kfree(context.ret.pointer);
 191         }
 192         return status;
 193 }
 194
 195 static acpi_status acpi_pci_query_osc(struct acpi_pci_root *root,
 196                                         u32 support,
 197                                         u32 *control)
 198 {
 199         acpi_status status;
 200         u32 result, capbuf[3];
 201
 202         support &= OSC_PCI_SUPPORT_MASKS;
 203         support |= root->osc_support_set;
 204
 205         capbuf[OSC_QUERY_DWORD] = OSC_QUERY_ENABLE;
 206         capbuf[OSC_SUPPORT_DWORD] = support;
 207         if (control) {
 208                 *control &= OSC_PCI_CONTROL_MASKS;
 209                 capbuf[OSC_CONTROL_DWORD] = *control | root->osc_control_set;
 210         } else {
 211                 /* Run _OSC query only with existing controls. */
 212                 capbuf[OSC_CONTROL_DWORD] = root->osc_control_set;
 213         }
 214
 215         status = acpi_pci_run_osc(root->device->handle, capbuf, &result);
 216         if (ACPI_SUCCESS(status)) {
 217                 root->osc_support_set = support;
 218                 if (control)
 219                         *control = result;
 220         }
 221         return status;
 222 }
 223
 224 static acpi_status acpi_pci_osc_support(struct acpi_pci_root *root, u32 flags)
 225 {
 226         return acpi_pci_query_osc(root, flags, NULL);
 227 }
 228
 229 struct acpi_pci_root *acpi_pci_find_root(acpi_handle handle)
 230 {
 231         struct acpi_pci_root *root;
 232         struct acpi_device *device;
 233
 234         if (acpi_bus_get_device(handle, &device) ||
 235             acpi_match_device_ids(device, root_device_ids))
 236                 return NULL;
 237
 238         root = acpi_driver_data(device);
 239
 240         return root;
 241 }
 242 EXPORT_SYMBOL_GPL(acpi_pci_find_root);
 243
 244 struct acpi_handle_node {
 245         struct list_head node;
 246         acpi_handle handle;
 247 };
 248
 249 /**
 250  * acpi_get_pci_dev - convert ACPI CA handle to struct pci_dev
 251  * @handle: the handle in question
 252  *
 253  * Given an ACPI CA handle, the desired PCI device is located in the
 254  * list of PCI devices.
 255  *
 256  * If the device is found, its reference count is increased and this
 257  * function returns a pointer to its data structure.  The caller must
 258  * decrement the reference count by calling pci_dev_put().
 259  * If no device is found, %NULL is returned.
 260  */
 261 struct pci_dev *acpi_get_pci_dev(acpi_handle handle)
 262 {
 263         int dev, fn;
 264         unsigned long long adr;
 265         acpi_status status;
 266         acpi_handle phandle;
 267         struct pci_bus *pbus;
 268         struct pci_dev *pdev = NULL;
 269         struct acpi_handle_node *node, *tmp;
 270         struct acpi_pci_root *root;
 271         LIST_HEAD(device_list);
 272
 273         /*
 274          * Walk up the ACPI CA namespace until we reach a PCI root bridge.
 275          */
 276         phandle = handle;
 277         while (!acpi_is_root_bridge(phandle)) {
 278                 node = kzalloc(sizeof(struct acpi_handle_node), GFP_KERNEL);
 279                 if (!node)
 280                         goto out;
 281
 282                 INIT_LIST_HEAD(&node->node);
 283                 node->handle = phandle;
 284                 list_add(&node->node, &device_list);
 285
 286                 status = acpi_get_parent(phandle, &phandle);
 287                 if (ACPI_FAILURE(status))
 288                         goto out;
 289         }
 290
 291         root = acpi_pci_find_root(phandle);
 292         if (!root)
 293                 goto out;
 294
 295         pbus = root->bus;
 296
 297         /*
 298          * Now, walk back down the PCI device tree until we return to our
 299          * original handle. Assumes that everything between the PCI root
 300          * bridge and the device we're looking for must be a P2P bridge.
 301          */
 302         list_for_each_entry(node, &device_list, node) {
 303                 acpi_handle hnd = node->handle;
 304                 status = acpi_evaluate_integer(hnd, "_ADR", NULL, &adr);
 305                 if (ACPI_FAILURE(status))
 306                         goto out;
 307                 dev = (adr >> 16) & 0xffff;
 308                 fn  = adr & 0xffff;
 309
 310                 pdev = pci_get_slot(pbus, PCI_DEVFN(dev, fn));
 311                 if (!pdev || hnd == handle)
 312                         break;
 313
 314                 pbus = pdev->subordinate;
 315                 pci_dev_put(pdev);
 316
 317                 /*
 318                  * This function may be called for a non-PCI device that has a
 319                  * PCI parent (eg. a disk under a PCI SATA controller).  In that
 320                  * case pdev->subordinate will be NULL for the parent.
 321                  */
 322                 if (!pbus) {
 323                         dev_dbg(&pdev->dev, "Not a PCI-to-PCI bridge\n");
 324                         pdev = NULL;
 325                         break;
 326                 }
 327         }
 328 out:
 329         list_for_each_entry_safe(node, tmp, &device_list, node)
 330                 kfree(node);
 331
 332         return pdev;
 333 }
 334 EXPORT_SYMBOL_GPL(acpi_get_pci_dev);
 335
 336 /**
 337  * acpi_pci_osc_control_set - Request control of PCI root _OSC features.
 338  * @handle: ACPI handle of a PCI root bridge (or PCIe Root Complex).
 339  * @mask: Mask of _OSC bits to request control of, place to store control mask.
 340  * @req: Mask of _OSC bits the control of is essential to the caller.
 341  *
 342  * Run _OSC query for @mask and if that is successful, compare the returned
 343  * mask of control bits with @req.  If all of the @req bits are set in the
 344  * returned mask, run _OSC request for it.
 345  *
 346  * The variable at the @mask address may be modified regardless of whether or
 347  * not the function returns success.  On success it will contain the mask of
 348  * _OSC bits the BIOS has granted control of, but its contents are meaningless
 349  * on failure.
 350  **/
 351 static acpi_status acpi_pci_osc_control_set(acpi_handle handle, u32 *mask, u32 req)
 352 {
 353         struct acpi_pci_root *root;
 354         acpi_status status;
 355         u32 ctrl, capbuf[3];
 356
 357         if (!mask)
 358                 return AE_BAD_PARAMETER;
 359
 360         ctrl = *mask & OSC_PCI_CONTROL_MASKS;
 361         if ((ctrl & req) != req)
 362                 return AE_TYPE;
 363
 364         root = acpi_pci_find_root(handle);
 365         if (!root)
 366                 return AE_NOT_EXIST;
 367
 368         *mask = ctrl | root->osc_control_set;
 369         /* No need to evaluate _OSC if the control was already granted. */
 370         if ((root->osc_control_set & ctrl) == ctrl)
 371                 return AE_OK;
 372
 373         /* Need to check the available controls bits before requesting them. */
 374         while (*mask) {
 375                 status = acpi_pci_query_osc(root, root->osc_support_set, mask);
 376                 if (ACPI_FAILURE(status))
 377                         return status;
 378                 if (ctrl == *mask)
 379                         break;
 380                 decode_osc_control(root, "platform does not support",
 381                                    ctrl & ~(*mask));
 382                 ctrl = *mask;
 383         }
 384
 385         if ((ctrl & req) != req) {
 386                 decode_osc_control(root, "not requesting control; platform does not support",
 387                                    req & ~(ctrl));
 388                 return AE_SUPPORT;
 389         }
 390
 391         capbuf[OSC_QUERY_DWORD] = 0;
 392         capbuf[OSC_SUPPORT_DWORD] = root->osc_support_set;
 393         capbuf[OSC_CONTROL_DWORD] = ctrl;
 394         status = acpi_pci_run_osc(handle, capbuf, mask);
 395         if (ACPI_FAILURE(status))
 396                 return status;
 397
 398         root->osc_control_set = *mask;
 399         return AE_OK;
 400 }
 401
 402 static void negotiate_os_control(struct acpi_pci_root *root, int *no_aspm,
 403                                  bool is_pcie)
 404 {
 405         u32 support, control, requested;
 406         acpi_status status;
 407         struct acpi_device *device = root->device;
 408         acpi_handle handle = device->handle;
 409
 410         /*
 411          * Apple always return failure on _OSC calls when _OSI("Darwin") has
 412          * been called successfully. We know the feature set supported by the
 413          * platform, so avoid calling _OSC at all
 414          */
 415         if (x86_apple_machine) {
 416                 root->osc_control_set = ~OSC_PCI_EXPRESS_PME_CONTROL;
 417                 decode_osc_control(root, "OS assumes control of",
 418                                    root->osc_control_set);
 419                 return;
 420         }
 421
 422         /*
 423          * All supported architectures that use ACPI have support for
 424          * PCI domains, so we indicate this in _OSC support capabilities.
 425          */
 426         support = OSC_PCI_SEGMENT_GROUPS_SUPPORT;
 427         support |= OSC_PCI_HPX_TYPE_3_SUPPORT;
 428         if (pci_ext_cfg_avail())
 429                 support |= OSC_PCI_EXT_CONFIG_SUPPORT;
 430         if (pcie_aspm_support_enabled())
 431                 support |= OSC_PCI_ASPM_SUPPORT | OSC_PCI_CLOCK_PM_SUPPORT;
 432         if (pci_msi_enabled())
 433                 support |= OSC_PCI_MSI_SUPPORT;
 434         if (IS_ENABLED(CONFIG_PCIE_EDR))
 435                 support |= OSC_PCI_EDR_SUPPORT;
 436
 437         decode_osc_support(root, "OS supports", support);
 438         status = acpi_pci_osc_support(root, support);
 439         if (ACPI_FAILURE(status)) {
 440                 *no_aspm = 1;
 441
 442                 /* _OSC is optional for PCI host bridges */
 443                 if ((status == AE_NOT_FOUND) && !is_pcie)
 444                         return;
 445
 446                 dev_info(&device->dev, "_OSC: platform retains control of PCIe features (%s)\n",
 447                          acpi_format_exception(status));
 448                 return;
 449         }
 450
 451         if (pcie_ports_disabled) {
 452                 dev_info(&device->dev, "PCIe port services disabled; not requesting _OSC control\n");
 453                 return;
 454         }
 455
 456         if ((support & ACPI_PCIE_REQ_SUPPORT) != ACPI_PCIE_REQ_SUPPORT) {
 457                 decode_osc_support(root, "not requesting OS control; OS requires",
 458                                    ACPI_PCIE_REQ_SUPPORT);
 459                 return;
 460         }
 461
 462         control = OSC_PCI_EXPRESS_CAPABILITY_CONTROL
 463                 | OSC_PCI_EXPRESS_PME_CONTROL;
 464
 465         if (IS_ENABLED(CONFIG_PCIEASPM))
 466                 control |= OSC_PCI_EXPRESS_LTR_CONTROL;
 467
 468         if (IS_ENABLED(CONFIG_HOTPLUG_PCI_PCIE))
 469                 control |= OSC_PCI_EXPRESS_NATIVE_HP_CONTROL;
 470
 471         if (IS_ENABLED(CONFIG_HOTPLUG_PCI_SHPC))
 472                 control |= OSC_PCI_SHPC_NATIVE_HP_CONTROL;
 473
 474         if (pci_aer_available())
 475                 control |= OSC_PCI_EXPRESS_AER_CONTROL;
 476
 477         /*
 478          * Per the Downstream Port Containment Related Enhancements ECN to
 479          * the PCI Firmware Spec, r3.2, sec 4.5.1, table 4-5,
 480          * OSC_PCI_EXPRESS_DPC_CONTROL indicates the OS supports both DPC
 481          * and EDR.
 482          */
 483         if (IS_ENABLED(CONFIG_PCIE_DPC) && IS_ENABLED(CONFIG_PCIE_EDR))
 484                 control |= OSC_PCI_EXPRESS_DPC_CONTROL;
 485
 486         requested = control;
 487         status = acpi_pci_osc_control_set(handle, &control,
 488                                           OSC_PCI_EXPRESS_CAPABILITY_CONTROL);
 489         if (ACPI_SUCCESS(status)) {
 490                 decode_osc_control(root, "OS now controls", control);
 491                 if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_ASPM) {
 492                         /*
 493                          * We have ASPM control, but the FADT indicates that
 494                          * it's unsupported. Leave existing configuration
 495                          * intact and prevent the OS from touching it.
 496                          */
 497                         dev_info(&device->dev, "FADT indicates ASPM is unsupported, using BIOS configuration\n");
 498                         *no_aspm = 1;
 499                 }
 500         } else {
 501                 decode_osc_control(root, "OS requested", requested);
 502                 decode_osc_control(root, "platform willing to grant", control);
 503                 dev_info(&device->dev, "_OSC: platform retains control of PCIe features (%s)\n",
 504                         acpi_format_exception(status));
 505
 506                 /*
 507                  * We want to disable ASPM here, but aspm_disabled
 508                  * needs to remain in its state from boot so that we
 509                  * properly handle PCIe 1.1 devices.  So we set this
 510                  * flag here, to defer the action until after the ACPI
 511                  * root scan.
 512                  */
 513                 *no_aspm = 1;
 514         }
 515 }
 516
 517 static int acpi_pci_root_add(struct acpi_device *device,
 518                              const struct acpi_device_id *not_used)
 519 {
 520         unsigned long long segment, bus;
 521         acpi_status status;
 522         int result;
 523         struct acpi_pci_root *root;
 524         acpi_handle handle = device->handle;
 525         int no_aspm = 0;
 526         bool hotadd = system_state == SYSTEM_RUNNING;
 527         bool is_pcie;
 528
 529         root = kzalloc(sizeof(struct acpi_pci_root), GFP_KERNEL);
 530         if (!root)
 531                 return -ENOMEM;
 532
 533         segment = 0;
 534         status = acpi_evaluate_integer(handle, METHOD_NAME__SEG, NULL,
 535                                        &segment);
 536         if (ACPI_FAILURE(status) && status != AE_NOT_FOUND) {
 537                 dev_err(&device->dev,  "can't evaluate _SEG\n");
 538                 result = -ENODEV;
 539                 goto end;
 540         }
 541
 542         /* Check _CRS first, then _BBN.  If no _BBN, default to zero. */
 543         root->secondary.flags = IORESOURCE_BUS;
 544         status = try_get_root_bridge_busnr(handle, &root->secondary);
 545         if (ACPI_FAILURE(status)) {
 546                 /*
 547                  * We need both the start and end of the downstream bus range
 548                  * to interpret _CBA (MMCONFIG base address), so it really is
 549                  * supposed to be in _CRS.  If we don't find it there, all we
 550                  * can do is assume [_BBN-0xFF] or [0-0xFF].
 551                  */
 552                 root->secondary.end = 0xFF;
 553                 dev_warn(&device->dev,
 554                          FW_BUG "no secondary bus range in _CRS\n");
 555                 status = acpi_evaluate_integer(handle, METHOD_NAME__BBN,
 556                                                NULL, &bus);
 557                 if (ACPI_SUCCESS(status))
 558                         root->secondary.start = bus;
 559                 else if (status == AE_NOT_FOUND)
 560                         root->secondary.start = 0;
 561                 else {
 562                         dev_err(&device->dev, "can't evaluate _BBN\n");
 563                         result = -ENODEV;
 564                         goto end;
 565                 }
 566         }
 567
 568         root->device = device;
 569         root->segment = segment & 0xFFFF;
 570         strcpy(acpi_device_name(device), ACPI_PCI_ROOT_DEVICE_NAME);
 571         strcpy(acpi_device_class(device), ACPI_PCI_ROOT_CLASS);
 572         device->driver_data = root;
 573
 574         if (hotadd && dmar_device_add(handle)) {
 575                 result = -ENXIO;
 576                 goto end;
 577         }
 578
 579         pr_info("%s [%s] (domain %04x %pR)\n",
 580                acpi_device_name(device), acpi_device_bid(device),
 581                root->segment, &root->secondary);
 582
 583         root->mcfg_addr = acpi_pci_root_get_mcfg_addr(handle);
 584
 585         is_pcie = strcmp(acpi_device_hid(device), "PNP0A08") == 0;
 586         negotiate_os_control(root, &no_aspm, is_pcie);
 587
 588         /*
 589          * TBD: Need PCI interface for enumeration/configuration of roots.
 590          */
 591
 592         /*
 593          * Scan the Root Bridge
 594          * --------------------
 595          * Must do this prior to any attempt to bind the root device, as the
 596          * PCI namespace does not get created until this call is made (and
 597          * thus the root bridge's pci_dev does not exist).
 598          */
 599         root->bus = pci_acpi_scan_root(root);
 600         if (!root->bus) {
 601                 dev_err(&device->dev,
 602                         "Bus %04x:%02x not present in PCI namespace\n",
 603                         root->segment, (unsigned int)root->secondary.start);
 604                 device->driver_data = NULL;
 605                 result = -ENODEV;
 606                 goto remove_dmar;
 607         }
 608
 609         if (no_aspm)
 610                 pcie_no_aspm();
 611
 612         pci_acpi_add_bus_pm_notifier(device);
 613         device_set_wakeup_capable(root->bus->bridge, device->wakeup.flags.valid);
 614
 615         if (hotadd) {
 616                 pcibios_resource_survey_bus(root->bus);
 617                 pci_assign_unassigned_root_bus_resources(root->bus);
 618                 /*
 619                  * This is only called for the hotadd case. For the boot-time
 620                  * case, we need to wait until after PCI initialization in
 621                  * order to deal with IOAPICs mapped in on a PCI BAR.
 622                  *
 623                  * This is currently x86-specific, because acpi_ioapic_add()
 624                  * is an empty function without CONFIG_ACPI_HOTPLUG_IOAPIC.
 625                  * And CONFIG_ACPI_HOTPLUG_IOAPIC depends on CONFIG_X86_IO_APIC
 626                  * (see drivers/acpi/Kconfig).
 627                  */
 628                 acpi_ioapic_add(root->device->handle);
 629         }
 630
 631         pci_lock_rescan_remove();
 632         pci_bus_add_devices(root->bus);
 633         pci_unlock_rescan_remove();
 634         return 1;
 635
 636 remove_dmar:
 637         if (hotadd)
 638                 dmar_device_remove(handle);
 639 end:
 640         kfree(root);
 641         return result;
 642 }
 643
 644 static void acpi_pci_root_remove(struct acpi_device *device)
 645 {
 646         struct acpi_pci_root *root = acpi_driver_data(device);
 647
 648         pci_lock_rescan_remove();
 649
 650         pci_stop_root_bus(root->bus);
 651
 652         pci_ioapic_remove(root);
 653         device_set_wakeup_capable(root->bus->bridge, false);
 654         pci_acpi_remove_bus_pm_notifier(device);
 655
 656         pci_remove_root_bus(root->bus);
 657         WARN_ON(acpi_ioapic_remove(root));
 658
 659         dmar_device_remove(device->handle);
 660
 661         pci_unlock_rescan_remove();
 662
 663         kfree(root);
 664 }
 665
 666 /*
 667  * Following code to support acpi_pci_root_create() is copied from
 668  * arch/x86/pci/acpi.c and modified so it could be reused by x86, IA64
 669  * and ARM64.
 670  */
 671 static void acpi_pci_root_validate_resources(struct device *dev,
 672                                              struct list_head *resources,
 673                                              unsigned long type)
 674 {
 675         LIST_HEAD(list);
 676         struct resource *res1, *res2, *root = NULL;
 677         struct resource_entry *tmp, *entry, *entry2;
 678
 679         BUG_ON((type & (IORESOURCE_MEM | IORESOURCE_IO)) == 0);
 680         root = (type & IORESOURCE_MEM) ? &iomem_resource : &ioport_resource;
 681
 682         list_splice_init(resources, &list);
 683         resource_list_for_each_entry_safe(entry, tmp, &list) {
 684                 bool free = false;
 685                 resource_size_t end;
 686
 687                 res1 = entry->res;
 688                 if (!(res1->flags & type))
 689                         goto next;
 690
 691                 /* Exclude non-addressable range or non-addressable portion */
 692                 end = min(res1->end, root->end);
 693                 if (end <= res1->start) {
 694                         dev_info(dev, "host bridge window %pR (ignored, not CPU addressable)\n",
 695                                  res1);
 696                         free = true;
 697                         goto next;
 698                 } else if (res1->end != end) {
 699                         dev_info(dev, "host bridge window %pR ([%#llx-%#llx] ignored, not CPU addressable)\n",
 700                                  res1, (unsigned long long)end + 1,
 701                                  (unsigned long long)res1->end);
 702                         res1->end = end;
 703                 }
 704
 705                 resource_list_for_each_entry(entry2, resources) {
 706                         res2 = entry2->res;
 707                         if (!(res2->flags & type))
 708                                 continue;
 709
 710                         /*
 711                          * I don't like throwing away windows because then
 712                          * our resources no longer match the ACPI _CRS, but
 713                          * the kernel resource tree doesn't allow overlaps.
 714                          */
 715                         if (resource_union(res1, res2, res2)) {
 716                                 dev_info(dev, "host bridge window expanded to %pR; %pR ignored\n",
 717                                          res2, res1);
 718                                 free = true;
 719                                 goto next;
 720                         }
 721                 }
 722
 723 next:
 724                 resource_list_del(entry);
 725                 if (free)
 726                         resource_list_free_entry(entry);
 727                 else
 728                         resource_list_add_tail(entry, resources);
 729         }
 730 }
 731
 732 static void acpi_pci_root_remap_iospace(struct fwnode_handle *fwnode,
 733                         struct resource_entry *entry)
 734 {
 735 #ifdef PCI_IOBASE
 736         struct resource *res = entry->res;
 737         resource_size_t cpu_addr = res->start;
 738         resource_size_t pci_addr = cpu_addr - entry->offset;
 739         resource_size_t length = resource_size(res);
 740         unsigned long port;
 741
 742         if (pci_register_io_range(fwnode, cpu_addr, length))
 743                 goto err;
 744
 745         port = pci_address_to_pio(cpu_addr);
 746         if (port == (unsigned long)-1)
 747                 goto err;
 748
 749         res->start = port;
 750         res->end = port + length - 1;
 751         entry->offset = port - pci_addr;
 752
 753         if (pci_remap_iospace(res, cpu_addr) < 0)
 754                 goto err;
 755
 756         pr_info("Remapped I/O %pa to %pR\n", &cpu_addr, res);
 757         return;
 758 err:
 759         res->flags |= IORESOURCE_DISABLED;
 760 #endif
 761 }
 762
 763 int acpi_pci_probe_root_resources(struct acpi_pci_root_info *info)
 764 {
 765         int ret;
 766         struct list_head *list = &info->resources;
 767         struct acpi_device *device = info->bridge;
 768         struct resource_entry *entry, *tmp;
 769         unsigned long flags;
 770
 771         flags = IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT;
 772         ret = acpi_dev_get_resources(device, list,
 773                                      acpi_dev_filter_resource_type_cb,
 774                                      (void *)flags);
 775         if (ret < 0)
 776                 dev_warn(&device->dev,
 777                          "failed to parse _CRS method, error code %d\n", ret);
 778         else if (ret == 0)
 779                 dev_dbg(&device->dev,
 780                         "no IO and memory resources present in _CRS\n");
 781         else {
 782                 resource_list_for_each_entry_safe(entry, tmp, list) {
 783                         if (entry->res->flags & IORESOURCE_IO)
 784                                 acpi_pci_root_remap_iospace(&device->fwnode,
 785                                                 entry);
 786
 787                         if (entry->res->flags & IORESOURCE_DISABLED)
 788                                 resource_list_destroy_entry(entry);
 789                         else
 790                                 entry->res->name = info->name;
 791                 }
 792                 acpi_pci_root_validate_resources(&device->dev, list,
 793                                                  IORESOURCE_MEM);
 794                 acpi_pci_root_validate_resources(&device->dev, list,
 795                                                  IORESOURCE_IO);
 796         }
 797
 798         return ret;
 799 }
 800
 801 static void pci_acpi_root_add_resources(struct acpi_pci_root_info *info)
 802 {
 803         struct resource_entry *entry, *tmp;
 804         struct resource *res, *conflict, *root = NULL;
 805
 806         resource_list_for_each_entry_safe(entry, tmp, &info->resources) {
 807                 res = entry->res;
 808                 if (res->flags & IORESOURCE_MEM)
 809                         root = &iomem_resource;
 810                 else if (res->flags & IORESOURCE_IO)
 811                         root = &ioport_resource;
 812                 else
 813                         continue;
 814
 815                 /*
 816                  * Some legacy x86 host bridge drivers use iomem_resource and
 817                  * ioport_resource as default resource pool, skip it.
 818                  */
 819                 if (res == root)
 820                         continue;
 821
 822                 conflict = insert_resource_conflict(root, res);
 823                 if (conflict) {
 824                         dev_info(&info->bridge->dev,
 825                                  "ignoring host bridge window %pR (conflicts with %s %pR)\n",
 826                                  res, conflict->name, conflict);
 827                         resource_list_destroy_entry(entry);
 828                 }
 829         }
 830 }
 831
 832 static void __acpi_pci_root_release_info(struct acpi_pci_root_info *info)
 833 {
 834         struct resource *res;
 835         struct resource_entry *entry, *tmp;
 836
 837         if (!info)
 838                 return;
 839
 840         resource_list_for_each_entry_safe(entry, tmp, &info->resources) {
 841                 res = entry->res;
 842                 if (res->parent &&
 843                     (res->flags & (IORESOURCE_MEM | IORESOURCE_IO)))
 844                         release_resource(res);
 845                 resource_list_destroy_entry(entry);
 846         }
 847
 848         info->ops->release_info(info);
 849 }
 850
 851 static void acpi_pci_root_release_info(struct pci_host_bridge *bridge)
 852 {
 853         struct resource *res;
 854         struct resource_entry *entry;
 855
 856         resource_list_for_each_entry(entry, &bridge->windows) {
 857                 res = entry->res;
 858                 if (res->flags & IORESOURCE_IO)
 859                         pci_unmap_iospace(res);
 860                 if (res->parent &&
 861                     (res->flags & (IORESOURCE_MEM | IORESOURCE_IO)))
 862                         release_resource(res);
 863         }
 864         __acpi_pci_root_release_info(bridge->release_data);
 865 }
 866
 867 struct pci_bus *acpi_pci_root_create(struct acpi_pci_root *root,
 868                                      struct acpi_pci_root_ops *ops,
 869                                      struct acpi_pci_root_info *info,
 870                                      void *sysdata)
 871 {
 872         int ret, busnum = root->secondary.start;
 873         struct acpi_device *device = root->device;
 874         int node = acpi_get_node(device->handle);
 875         struct pci_bus *bus;
 876         struct pci_host_bridge *host_bridge;
 877         union acpi_object *obj;
 878
 879         info->root = root;
 880         info->bridge = device;
 881         info->ops = ops;
 882         INIT_LIST_HEAD(&info->resources);
 883         snprintf(info->name, sizeof(info->name), "PCI Bus %04x:%02x",
 884                  root->segment, busnum);
 885
 886         if (ops->init_info && ops->init_info(info))
 887                 goto out_release_info;
 888         if (ops->prepare_resources)
 889                 ret = ops->prepare_resources(info);
 890         else
 891                 ret = acpi_pci_probe_root_resources(info);
 892         if (ret < 0)
 893                 goto out_release_info;
 894
 895         pci_acpi_root_add_resources(info);
 896         pci_add_resource(&info->resources, &root->secondary);
 897         bus = pci_create_root_bus(NULL, busnum, ops->pci_ops,
 898                                   sysdata, &info->resources);
 899         if (!bus)
 900                 goto out_release_info;
 901
 902         host_bridge = to_pci_host_bridge(bus->bridge);
 903         if (!(root->osc_control_set & OSC_PCI_EXPRESS_NATIVE_HP_CONTROL))
 904                 host_bridge->native_pcie_hotplug = 0;
 905         if (!(root->osc_control_set & OSC_PCI_SHPC_NATIVE_HP_CONTROL))
 906                 host_bridge->native_shpc_hotplug = 0;
 907         if (!(root->osc_control_set & OSC_PCI_EXPRESS_AER_CONTROL))
 908                 host_bridge->native_aer = 0;
 909         if (!(root->osc_control_set & OSC_PCI_EXPRESS_PME_CONTROL))
 910                 host_bridge->native_pme = 0;
 911         if (!(root->osc_control_set & OSC_PCI_EXPRESS_LTR_CONTROL))
 912                 host_bridge->native_ltr = 0;
 913         if (!(root->osc_control_set & OSC_PCI_EXPRESS_DPC_CONTROL))
 914                 host_bridge->native_dpc = 0;
 915
 916         /*
 917          * Evaluate the "PCI Boot Configuration" _DSM Function.  If it
 918          * exists and returns 0, we must preserve any PCI resource
 919          * assignments made by firmware for this host bridge.
 920          */
 921         obj = acpi_evaluate_dsm(ACPI_HANDLE(bus->bridge), &pci_acpi_dsm_guid, 1,
 922                                 DSM_PCI_PRESERVE_BOOT_CONFIG, NULL);
 923         if (obj && obj->type == ACPI_TYPE_INTEGER && obj->integer.value == 0)
 924                 host_bridge->preserve_config = 1;
 925         ACPI_FREE(obj);
 926
 927         pci_scan_child_bus(bus);
 928         pci_set_host_bridge_release(host_bridge, acpi_pci_root_release_info,
 929                                     info);
 930         if (node != NUMA_NO_NODE)
 931                 dev_printk(KERN_DEBUG, &bus->dev, "on NUMA node %d\n", node);
 932         return bus;
 933
 934 out_release_info:
 935         __acpi_pci_root_release_info(info);
 936         return NULL;
 937 }
 938
 939 void __init acpi_pci_root_init(void)
 940 {
 941         acpi_hest_init();
 942         if (acpi_pci_disabled)
 943                 return;
 944
 945         pci_acpi_crs_quirks();
 946         acpi_scan_add_handler_with_hotplug(&pci_root_handler, "pci_root");
 947 }