drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c

   1 /*
   2  * Copyright 2008 Advanced Micro Devices, Inc.
   3  * Copyright 2008 Red Hat Inc.
   4  * Copyright 2009 Jerome Glisse.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22  * OTHER DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors: Dave Airlie
  25  *          Alex Deucher
  26  *          Jerome Glisse
  27  */
  28 #include <linux/ktime.h>
  29 #include <linux/pagemap.h>
  30 #include <drm/drmP.h>
  31 #include <drm/amdgpu_drm.h>
  32 #include "amdgpu.h"
  33
  34 void amdgpu_gem_object_free(struct drm_gem_object *gobj)
  35 {
  36         struct amdgpu_bo *robj = gem_to_amdgpu_bo(gobj);
  37
  38         if (robj) {
  39                 if (robj->gem_base.import_attach)
  40                         drm_prime_gem_destroy(&robj->gem_base, robj->tbo.sg);
  41                 amdgpu_mn_unregister(robj);
  42                 amdgpu_bo_unref(&robj);
  43         }
  44 }
  45
  46 int amdgpu_gem_object_create(struct amdgpu_device *adev, unsigned long size,
  47                                 int alignment, u32 initial_domain,
  48                                 u64 flags, bool kernel,
  49                                 struct drm_gem_object **obj)
  50 {
  51         struct amdgpu_bo *robj;
  52         int r;
  53
  54         *obj = NULL;
  55         /* At least align on page size */
  56         if (alignment < PAGE_SIZE) {
  57                 alignment = PAGE_SIZE;
  58         }
  59
  60 retry:
  61         r = amdgpu_bo_create(adev, size, alignment, kernel, initial_domain,
  62                              flags, NULL, NULL, &robj);
  63         if (r) {
  64                 if (r != -ERESTARTSYS) {
  65                         if (initial_domain == AMDGPU_GEM_DOMAIN_VRAM) {
  66                                 initial_domain |= AMDGPU_GEM_DOMAIN_GTT;
  67                                 goto retry;
  68                         }
  69                         DRM_ERROR("Failed to allocate GEM object (%ld, %d, %u, %d)\n",
  70                                   size, initial_domain, alignment, r);
  71                 }
  72                 return r;
  73         }
  74         *obj = &robj->gem_base;
  75
  76         return 0;
  77 }
  78
  79 void amdgpu_gem_force_release(struct amdgpu_device *adev)
  80 {
  81         struct drm_device *ddev = adev->ddev;
  82         struct drm_file *file;
  83
  84         mutex_lock(&ddev->filelist_mutex);
  85
  86         list_for_each_entry(file, &ddev->filelist, lhead) {
  87                 struct drm_gem_object *gobj;
  88                 int handle;
  89
  90                 WARN_ONCE(1, "Still active user space clients!\n");
  91                 spin_lock(&file->table_lock);
  92                 idr_for_each_entry(&file->object_idr, gobj, handle) {
  93                         WARN_ONCE(1, "And also active allocations!\n");
  94                         drm_gem_object_unreference_unlocked(gobj);
  95                 }
  96                 idr_destroy(&file->object_idr);
  97                 spin_unlock(&file->table_lock);
  98         }
  99
 100         mutex_unlock(&ddev->filelist_mutex);
 101 }
 102
 103 /*
 104  * Call from drm_gem_handle_create which appear in both new and open ioctl
 105  * case.
 106  */
 107 int amdgpu_gem_object_open(struct drm_gem_object *obj,
 108                            struct drm_file *file_priv)
 109 {
 110         struct amdgpu_bo *abo = gem_to_amdgpu_bo(obj);
 111         struct amdgpu_device *adev = amdgpu_ttm_adev(abo->tbo.bdev);
 112         struct amdgpu_fpriv *fpriv = file_priv->driver_priv;
 113         struct amdgpu_vm *vm = &fpriv->vm;
 114         struct amdgpu_bo_va *bo_va;
 115         int r;
 116         r = amdgpu_bo_reserve(abo, false);
 117         if (r)
 118                 return r;
 119
 120         bo_va = amdgpu_vm_bo_find(vm, abo);
 121         if (!bo_va) {
 122                 bo_va = amdgpu_vm_bo_add(adev, vm, abo);
 123         } else {
 124                 ++bo_va->ref_count;
 125         }
 126         amdgpu_bo_unreserve(abo);
 127         return 0;
 128 }
 129
 130 static int amdgpu_gem_vm_check(void *param, struct amdgpu_bo *bo)
 131 {
 132         /* if anything is swapped out don't swap it in here,
 133            just abort and wait for the next CS */
 134         if (!amdgpu_bo_gpu_accessible(bo))
 135                 return -ERESTARTSYS;
 136
 137         if (bo->shadow && !amdgpu_bo_gpu_accessible(bo->shadow))
 138                 return -ERESTARTSYS;
 139
 140         return 0;
 141 }
 142
 143 static bool amdgpu_gem_vm_ready(struct amdgpu_device *adev,
 144                                 struct amdgpu_vm *vm,
 145                                 struct list_head *list)
 146 {
 147         struct ttm_validate_buffer *entry;
 148
 149         list_for_each_entry(entry, list, head) {
 150                 struct amdgpu_bo *bo =
 151                         container_of(entry->bo, struct amdgpu_bo, tbo);
 152                 if (amdgpu_gem_vm_check(NULL, bo))
 153                         return false;
 154         }
 155
 156         return !amdgpu_vm_validate_pt_bos(adev, vm, amdgpu_gem_vm_check, NULL);
 157 }
 158
 159 void amdgpu_gem_object_close(struct drm_gem_object *obj,
 160                              struct drm_file *file_priv)
 161 {
 162         struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
 163         struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
 164         struct amdgpu_fpriv *fpriv = file_priv->driver_priv;
 165         struct amdgpu_vm *vm = &fpriv->vm;
 166
 167         struct amdgpu_bo_list_entry vm_pd;
 168         struct list_head list;
 169         struct ttm_validate_buffer tv;
 170         struct ww_acquire_ctx ticket;
 171         struct amdgpu_bo_va *bo_va;
 172         int r;
 173
 174         INIT_LIST_HEAD(&list);
 175
 176         tv.bo = &bo->tbo;
 177         tv.shared = true;
 178         list_add(&tv.head, &list);
 179
 180         amdgpu_vm_get_pd_bo(vm, &list, &vm_pd);
 181
 182         r = ttm_eu_reserve_buffers(&ticket, &list, false, NULL);
 183         if (r) {
 184                 dev_err(adev->dev, "leaking bo va because "
 185                         "we fail to reserve bo (%d)\n", r);
 186                 return;
 187         }
 188         bo_va = amdgpu_vm_bo_find(vm, bo);
 189         if (bo_va && --bo_va->ref_count == 0) {
 190                 amdgpu_vm_bo_rmv(adev, bo_va);
 191
 192                 if (amdgpu_gem_vm_ready(adev, vm, &list)) {
 193                         struct dma_fence *fence = NULL;
 194
 195                         r = amdgpu_vm_clear_freed(adev, vm, &fence);
 196                         if (unlikely(r)) {
 197                                 dev_err(adev->dev, "failed to clear page "
 198                                         "tables on GEM object close (%d)\n", r);
 199                         }
 200
 201                         if (fence) {
 202                                 amdgpu_bo_fence(bo, fence, true);
 203                                 dma_fence_put(fence);
 204                         }
 205                 }
 206         }
 207         ttm_eu_backoff_reservation(&ticket, &list);
 208 }
 209
 210 /*
 211  * GEM ioctls.
 212  */
 213 int amdgpu_gem_create_ioctl(struct drm_device *dev, void *data,
 214                             struct drm_file *filp)
 215 {
 216         struct amdgpu_device *adev = dev->dev_private;
 217         union drm_amdgpu_gem_create *args = data;
 218         uint64_t size = args->in.bo_size;
 219         struct drm_gem_object *gobj;
 220         uint32_t handle;
 221         bool kernel = false;
 222         int r;
 223
 224         /* reject invalid gem flags */
 225         if (args->in.domain_flags & ~(AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED |
 226                                       AMDGPU_GEM_CREATE_NO_CPU_ACCESS |
 227                                       AMDGPU_GEM_CREATE_CPU_GTT_USWC |
 228                                       AMDGPU_GEM_CREATE_VRAM_CLEARED|
 229                                       AMDGPU_GEM_CREATE_SHADOW |
 230                                       AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS))
 231                 return -EINVAL;
 232
 233         /* reject invalid gem domains */
 234         if (args->in.domains & ~(AMDGPU_GEM_DOMAIN_CPU |
 235                                  AMDGPU_GEM_DOMAIN_GTT |
 236                                  AMDGPU_GEM_DOMAIN_VRAM |
 237                                  AMDGPU_GEM_DOMAIN_GDS |
 238                                  AMDGPU_GEM_DOMAIN_GWS |
 239                                  AMDGPU_GEM_DOMAIN_OA))
 240                 return -EINVAL;
 241
 242         /* create a gem object to contain this object in */
 243         if (args->in.domains & (AMDGPU_GEM_DOMAIN_GDS |
 244             AMDGPU_GEM_DOMAIN_GWS | AMDGPU_GEM_DOMAIN_OA)) {
 245                 kernel = true;
 246                 if (args->in.domains == AMDGPU_GEM_DOMAIN_GDS)
 247                         size = size << AMDGPU_GDS_SHIFT;
 248                 else if (args->in.domains == AMDGPU_GEM_DOMAIN_GWS)
 249                         size = size << AMDGPU_GWS_SHIFT;
 250                 else if (args->in.domains == AMDGPU_GEM_DOMAIN_OA)
 251                         size = size << AMDGPU_OA_SHIFT;
 252                 else
 253                         return -EINVAL;
 254         }
 255         size = roundup(size, PAGE_SIZE);
 256
 257         r = amdgpu_gem_object_create(adev, size, args->in.alignment,
 258                                      (u32)(0xffffffff & args->in.domains),
 259                                      args->in.domain_flags,
 260                                      kernel, &gobj);
 261         if (r)
 262                 return r;
 263
 264         r = drm_gem_handle_create(filp, gobj, &handle);
 265         /* drop reference from allocate - handle holds it now */
 266         drm_gem_object_unreference_unlocked(gobj);
 267         if (r)
 268                 return r;
 269
 270         memset(args, 0, sizeof(*args));
 271         args->out.handle = handle;
 272         return 0;
 273 }
 274
 275 int amdgpu_gem_userptr_ioctl(struct drm_device *dev, void *data,
 276                              struct drm_file *filp)
 277 {
 278         struct amdgpu_device *adev = dev->dev_private;
 279         struct drm_amdgpu_gem_userptr *args = data;
 280         struct drm_gem_object *gobj;
 281         struct amdgpu_bo *bo;
 282         uint32_t handle;
 283         int r;
 284
 285         if (offset_in_page(args->addr | args->size))
 286                 return -EINVAL;
 287
 288         /* reject unknown flag values */
 289         if (args->flags & ~(AMDGPU_GEM_USERPTR_READONLY |
 290             AMDGPU_GEM_USERPTR_ANONONLY | AMDGPU_GEM_USERPTR_VALIDATE |
 291             AMDGPU_GEM_USERPTR_REGISTER))
 292                 return -EINVAL;
 293
 294         if (!(args->flags & AMDGPU_GEM_USERPTR_READONLY) &&
 295              !(args->flags & AMDGPU_GEM_USERPTR_REGISTER)) {
 296
 297                 /* if we want to write to it we must install a MMU notifier */
 298                 return -EACCES;
 299         }
 300
 301         /* create a gem object to contain this object in */
 302         r = amdgpu_gem_object_create(adev, args->size, 0,
 303                                      AMDGPU_GEM_DOMAIN_CPU, 0,
 304                                      0, &gobj);
 305         if (r)
 306                 return r;
 307
 308         bo = gem_to_amdgpu_bo(gobj);
 309         bo->prefered_domains = AMDGPU_GEM_DOMAIN_GTT;
 310         bo->allowed_domains = AMDGPU_GEM_DOMAIN_GTT;
 311         r = amdgpu_ttm_tt_set_userptr(bo->tbo.ttm, args->addr, args->flags);
 312         if (r)
 313                 goto release_object;
 314
 315         if (args->flags & AMDGPU_GEM_USERPTR_REGISTER) {
 316                 r = amdgpu_mn_register(bo, args->addr);
 317                 if (r)
 318                         goto release_object;
 319         }
 320
 321         if (args->flags & AMDGPU_GEM_USERPTR_VALIDATE) {
 322                 down_read(&current->mm->mmap_sem);
 323
 324                 r = amdgpu_ttm_tt_get_user_pages(bo->tbo.ttm,
 325                                                  bo->tbo.ttm->pages);
 326                 if (r)
 327                         goto unlock_mmap_sem;
 328
 329                 r = amdgpu_bo_reserve(bo, true);
 330                 if (r)
 331                         goto free_pages;
 332
 333                 amdgpu_ttm_placement_from_domain(bo, AMDGPU_GEM_DOMAIN_GTT);
 334                 r = ttm_bo_validate(&bo->tbo, &bo->placement, true, false);
 335                 amdgpu_bo_unreserve(bo);
 336                 if (r)
 337                         goto free_pages;
 338
 339                 up_read(&current->mm->mmap_sem);
 340         }
 341
 342         r = drm_gem_handle_create(filp, gobj, &handle);
 343         /* drop reference from allocate - handle holds it now */
 344         drm_gem_object_unreference_unlocked(gobj);
 345         if (r)
 346                 return r;
 347
 348         args->handle = handle;
 349         return 0;
 350
 351 free_pages:
 352         release_pages(bo->tbo.ttm->pages, bo->tbo.ttm->num_pages, false);
 353
 354 unlock_mmap_sem:
 355         up_read(&current->mm->mmap_sem);
 356
 357 release_object:
 358         drm_gem_object_unreference_unlocked(gobj);
 359
 360         return r;
 361 }
 362
 363 int amdgpu_mode_dumb_mmap(struct drm_file *filp,
 364                           struct drm_device *dev,
 365                           uint32_t handle, uint64_t *offset_p)
 366 {
 367         struct drm_gem_object *gobj;
 368         struct amdgpu_bo *robj;
 369
 370         gobj = drm_gem_object_lookup(filp, handle);
 371         if (gobj == NULL) {
 372                 return -ENOENT;
 373         }
 374         robj = gem_to_amdgpu_bo(gobj);
 375         if (amdgpu_ttm_tt_get_usermm(robj->tbo.ttm) ||
 376             (robj->flags & AMDGPU_GEM_CREATE_NO_CPU_ACCESS)) {
 377                 drm_gem_object_unreference_unlocked(gobj);
 378                 return -EPERM;
 379         }
 380         *offset_p = amdgpu_bo_mmap_offset(robj);
 381         drm_gem_object_unreference_unlocked(gobj);
 382         return 0;
 383 }
 384
 385 int amdgpu_gem_mmap_ioctl(struct drm_device *dev, void *data,
 386                           struct drm_file *filp)
 387 {
 388         union drm_amdgpu_gem_mmap *args = data;
 389         uint32_t handle = args->in.handle;
 390         memset(args, 0, sizeof(*args));
 391         return amdgpu_mode_dumb_mmap(filp, dev, handle, &args->out.addr_ptr);
 392 }
 393
 394 /**
 395  * amdgpu_gem_timeout - calculate jiffies timeout from absolute value
 396  *
 397  * @timeout_ns: timeout in ns
 398  *
 399  * Calculate the timeout in jiffies from an absolute timeout in ns.
 400  */
 401 unsigned long amdgpu_gem_timeout(uint64_t timeout_ns)
 402 {
 403         unsigned long timeout_jiffies;
 404         ktime_t timeout;
 405
 406         /* clamp timeout if it's to large */
 407         if (((int64_t)timeout_ns) < 0)
 408                 return MAX_SCHEDULE_TIMEOUT;
 409
 410         timeout = ktime_sub(ns_to_ktime(timeout_ns), ktime_get());
 411         if (ktime_to_ns(timeout) < 0)
 412                 return 0;
 413
 414         timeout_jiffies = nsecs_to_jiffies(ktime_to_ns(timeout));
 415         /*  clamp timeout to avoid unsigned-> signed overflow */
 416         if (timeout_jiffies > MAX_SCHEDULE_TIMEOUT )
 417                 return MAX_SCHEDULE_TIMEOUT - 1;
 418
 419         return timeout_jiffies;
 420 }
 421
 422 int amdgpu_gem_wait_idle_ioctl(struct drm_device *dev, void *data,
 423                               struct drm_file *filp)
 424 {
 425         union drm_amdgpu_gem_wait_idle *args = data;
 426         struct drm_gem_object *gobj;
 427         struct amdgpu_bo *robj;
 428         uint32_t handle = args->in.handle;
 429         unsigned long timeout = amdgpu_gem_timeout(args->in.timeout);
 430         int r = 0;
 431         long ret;
 432
 433         gobj = drm_gem_object_lookup(filp, handle);
 434         if (gobj == NULL) {
 435                 return -ENOENT;
 436         }
 437         robj = gem_to_amdgpu_bo(gobj);
 438         ret = reservation_object_wait_timeout_rcu(robj->tbo.resv, true, true,
 439                                                   timeout);
 440
 441         /* ret == 0 means not signaled,
 442          * ret > 0 means signaled
 443          * ret < 0 means interrupted before timeout
 444          */
 445         if (ret >= 0) {
 446                 memset(args, 0, sizeof(*args));
 447                 args->out.status = (ret == 0);
 448         } else
 449                 r = ret;
 450
 451         drm_gem_object_unreference_unlocked(gobj);
 452         return r;
 453 }
 454
 455 int amdgpu_gem_metadata_ioctl(struct drm_device *dev, void *data,
 456                                 struct drm_file *filp)
 457 {
 458         struct drm_amdgpu_gem_metadata *args = data;
 459         struct drm_gem_object *gobj;
 460         struct amdgpu_bo *robj;
 461         int r = -1;
 462
 463         DRM_DEBUG("%d \n", args->handle);
 464         gobj = drm_gem_object_lookup(filp, args->handle);
 465         if (gobj == NULL)
 466                 return -ENOENT;
 467         robj = gem_to_amdgpu_bo(gobj);
 468
 469         r = amdgpu_bo_reserve(robj, false);
 470         if (unlikely(r != 0))
 471                 goto out;
 472
 473         if (args->op == AMDGPU_GEM_METADATA_OP_GET_METADATA) {
 474                 amdgpu_bo_get_tiling_flags(robj, &args->data.tiling_info);
 475                 r = amdgpu_bo_get_metadata(robj, args->data.data,
 476                                            sizeof(args->data.data),
 477                                            &args->data.data_size_bytes,
 478                                            &args->data.flags);
 479         } else if (args->op == AMDGPU_GEM_METADATA_OP_SET_METADATA) {
 480                 if (args->data.data_size_bytes > sizeof(args->data.data)) {
 481                         r = -EINVAL;
 482                         goto unreserve;
 483                 }
 484                 r = amdgpu_bo_set_tiling_flags(robj, args->data.tiling_info);
 485                 if (!r)
 486                         r = amdgpu_bo_set_metadata(robj, args->data.data,
 487                                                    args->data.data_size_bytes,
 488                                                    args->data.flags);
 489         }
 490
 491 unreserve:
 492         amdgpu_bo_unreserve(robj);
 493 out:
 494         drm_gem_object_unreference_unlocked(gobj);
 495         return r;
 496 }
 497
 498 /**
 499  * amdgpu_gem_va_update_vm -update the bo_va in its VM
 500  *
 501  * @adev: amdgpu_device pointer
 502  * @vm: vm to update
 503  * @bo_va: bo_va to update
 504  * @list: validation list
 505  * @operation: map, unmap or clear
 506  *
 507  * Update the bo_va directly after setting its address. Errors are not
 508  * vital here, so they are not reported back to userspace.
 509  */
 510 static void amdgpu_gem_va_update_vm(struct amdgpu_device *adev,
 511                                     struct amdgpu_vm *vm,
 512                                     struct amdgpu_bo_va *bo_va,
 513                                     struct list_head *list,
 514                                     uint32_t operation)
 515 {
 516         int r = -ERESTARTSYS;
 517
 518         if (!amdgpu_gem_vm_ready(adev, vm, list))
 519                 goto error;
 520
 521         r = amdgpu_vm_update_directories(adev, vm);
 522         if (r)
 523                 goto error;
 524
 525         r = amdgpu_vm_clear_freed(adev, vm, NULL);
 526         if (r)
 527                 goto error;
 528
 529         if (operation == AMDGPU_VA_OP_MAP ||
 530             operation == AMDGPU_VA_OP_REPLACE)
 531                 r = amdgpu_vm_bo_update(adev, bo_va, false);
 532
 533 error:
 534         if (r && r != -ERESTARTSYS)
 535                 DRM_ERROR("Couldn't update BO_VA (%d)\n", r);
 536 }
 537
 538 int amdgpu_gem_va_ioctl(struct drm_device *dev, void *data,
 539                           struct drm_file *filp)
 540 {
 541         const uint32_t valid_flags = AMDGPU_VM_DELAY_UPDATE |
 542                 AMDGPU_VM_PAGE_READABLE | AMDGPU_VM_PAGE_WRITEABLE |
 543                 AMDGPU_VM_PAGE_EXECUTABLE | AMDGPU_VM_MTYPE_MASK;
 544         const uint32_t prt_flags = AMDGPU_VM_DELAY_UPDATE |
 545                 AMDGPU_VM_PAGE_PRT;
 546
 547         struct drm_amdgpu_gem_va *args = data;
 548         struct drm_gem_object *gobj;
 549         struct amdgpu_device *adev = dev->dev_private;
 550         struct amdgpu_fpriv *fpriv = filp->driver_priv;
 551         struct amdgpu_bo *abo;
 552         struct amdgpu_bo_va *bo_va;
 553         struct amdgpu_bo_list_entry vm_pd;
 554         struct ttm_validate_buffer tv;
 555         struct ww_acquire_ctx ticket;
 556         struct list_head list;
 557         uint64_t va_flags;
 558         int r = 0;
 559
 560         if (args->va_address < AMDGPU_VA_RESERVED_SIZE) {
 561                 dev_err(&dev->pdev->dev,
 562                         "va_address 0x%lX is in reserved area 0x%X\n",
 563                         (unsigned long)args->va_address,
 564                         AMDGPU_VA_RESERVED_SIZE);
 565                 return -EINVAL;
 566         }
 567
 568         if ((args->flags & ~valid_flags) && (args->flags & ~prt_flags)) {
 569                 dev_err(&dev->pdev->dev, "invalid flags combination 0x%08X\n",
 570                         args->flags);
 571                 return -EINVAL;
 572         }
 573
 574         switch (args->operation) {
 575         case AMDGPU_VA_OP_MAP:
 576         case AMDGPU_VA_OP_UNMAP:
 577         case AMDGPU_VA_OP_CLEAR:
 578         case AMDGPU_VA_OP_REPLACE:
 579                 break;
 580         default:
 581                 dev_err(&dev->pdev->dev, "unsupported operation %d\n",
 582                         args->operation);
 583                 return -EINVAL;
 584         }
 585         if ((args->operation == AMDGPU_VA_OP_MAP) ||
 586             (args->operation == AMDGPU_VA_OP_REPLACE)) {
 587                 if (amdgpu_kms_vram_lost(adev, fpriv))
 588                         return -ENODEV;
 589         }
 590
 591         INIT_LIST_HEAD(&list);
 592         if ((args->operation != AMDGPU_VA_OP_CLEAR) &&
 593             !(args->flags & AMDGPU_VM_PAGE_PRT)) {
 594                 gobj = drm_gem_object_lookup(filp, args->handle);
 595                 if (gobj == NULL)
 596                         return -ENOENT;
 597                 abo = gem_to_amdgpu_bo(gobj);
 598                 tv.bo = &abo->tbo;
 599                 tv.shared = false;
 600                 list_add(&tv.head, &list);
 601         } else {
 602                 gobj = NULL;
 603                 abo = NULL;
 604         }
 605
 606         amdgpu_vm_get_pd_bo(&fpriv->vm, &list, &vm_pd);
 607
 608         r = ttm_eu_reserve_buffers(&ticket, &list, true, NULL);
 609         if (r)
 610                 goto error_unref;
 611
 612         if (abo) {
 613                 bo_va = amdgpu_vm_bo_find(&fpriv->vm, abo);
 614                 if (!bo_va) {
 615                         r = -ENOENT;
 616                         goto error_backoff;
 617                 }
 618         } else if (args->operation != AMDGPU_VA_OP_CLEAR) {
 619                 bo_va = fpriv->prt_va;
 620         } else {
 621                 bo_va = NULL;
 622         }
 623
 624         switch (args->operation) {
 625         case AMDGPU_VA_OP_MAP:
 626                 r = amdgpu_vm_alloc_pts(adev, bo_va->vm, args->va_address,
 627                                         args->map_size);
 628                 if (r)
 629                         goto error_backoff;
 630
 631                 va_flags = amdgpu_vm_get_pte_flags(adev, args->flags);
 632                 r = amdgpu_vm_bo_map(adev, bo_va, args->va_address,
 633                                      args->offset_in_bo, args->map_size,
 634                                      va_flags);
 635                 break;
 636         case AMDGPU_VA_OP_UNMAP:
 637                 r = amdgpu_vm_bo_unmap(adev, bo_va, args->va_address);
 638                 break;
 639
 640         case AMDGPU_VA_OP_CLEAR:
 641                 r = amdgpu_vm_bo_clear_mappings(adev, &fpriv->vm,
 642                                                 args->va_address,
 643                                                 args->map_size);
 644                 break;
 645         case AMDGPU_VA_OP_REPLACE:
 646                 r = amdgpu_vm_alloc_pts(adev, bo_va->vm, args->va_address,
 647                                         args->map_size);
 648                 if (r)
 649                         goto error_backoff;
 650
 651                 va_flags = amdgpu_vm_get_pte_flags(adev, args->flags);
 652                 r = amdgpu_vm_bo_replace_map(adev, bo_va, args->va_address,
 653                                              args->offset_in_bo, args->map_size,
 654                                              va_flags);
 655                 break;
 656         default:
 657                 break;
 658         }
 659         if (!r && !(args->flags & AMDGPU_VM_DELAY_UPDATE) && !amdgpu_vm_debug)
 660                 amdgpu_gem_va_update_vm(adev, &fpriv->vm, bo_va, &list,
 661                                         args->operation);
 662
 663 error_backoff:
 664         ttm_eu_backoff_reservation(&ticket, &list);
 665
 666 error_unref:
 667         drm_gem_object_unreference_unlocked(gobj);
 668         return r;
 669 }
 670
 671 int amdgpu_gem_op_ioctl(struct drm_device *dev, void *data,
 672                         struct drm_file *filp)
 673 {
 674         struct drm_amdgpu_gem_op *args = data;
 675         struct drm_gem_object *gobj;
 676         struct amdgpu_bo *robj;
 677         int r;
 678
 679         gobj = drm_gem_object_lookup(filp, args->handle);
 680         if (gobj == NULL) {
 681                 return -ENOENT;
 682         }
 683         robj = gem_to_amdgpu_bo(gobj);
 684
 685         r = amdgpu_bo_reserve(robj, false);
 686         if (unlikely(r))
 687                 goto out;
 688
 689         switch (args->op) {
 690         case AMDGPU_GEM_OP_GET_GEM_CREATE_INFO: {
 691                 struct drm_amdgpu_gem_create_in info;
 692                 void __user *out = u64_to_user_ptr(args->value);
 693
 694                 info.bo_size = robj->gem_base.size;
 695                 info.alignment = robj->tbo.mem.page_alignment << PAGE_SHIFT;
 696                 info.domains = robj->prefered_domains;
 697                 info.domain_flags = robj->flags;
 698                 amdgpu_bo_unreserve(robj);
 699                 if (copy_to_user(out, &info, sizeof(info)))
 700                         r = -EFAULT;
 701                 break;
 702         }
 703         case AMDGPU_GEM_OP_SET_PLACEMENT:
 704                 if (robj->prime_shared_count && (args->value & AMDGPU_GEM_DOMAIN_VRAM)) {
 705                         r = -EINVAL;
 706                         amdgpu_bo_unreserve(robj);
 707                         break;
 708                 }
 709                 if (amdgpu_ttm_tt_get_usermm(robj->tbo.ttm)) {
 710                         r = -EPERM;
 711                         amdgpu_bo_unreserve(robj);
 712                         break;
 713                 }
 714                 robj->prefered_domains = args->value & (AMDGPU_GEM_DOMAIN_VRAM |
 715                                                         AMDGPU_GEM_DOMAIN_GTT |
 716                                                         AMDGPU_GEM_DOMAIN_CPU);
 717                 robj->allowed_domains = robj->prefered_domains;
 718                 if (robj->allowed_domains == AMDGPU_GEM_DOMAIN_VRAM)
 719                         robj->allowed_domains |= AMDGPU_GEM_DOMAIN_GTT;
 720
 721                 amdgpu_bo_unreserve(robj);
 722                 break;
 723         default:
 724                 amdgpu_bo_unreserve(robj);
 725                 r = -EINVAL;
 726         }
 727
 728 out:
 729         drm_gem_object_unreference_unlocked(gobj);
 730         return r;
 731 }
 732
 733 int amdgpu_mode_dumb_create(struct drm_file *file_priv,
 734                             struct drm_device *dev,
 735                             struct drm_mode_create_dumb *args)
 736 {
 737         struct amdgpu_device *adev = dev->dev_private;
 738         struct drm_gem_object *gobj;
 739         uint32_t handle;
 740         int r;
 741
 742         args->pitch = amdgpu_align_pitch(adev, args->width,
 743                                          DIV_ROUND_UP(args->bpp, 8), 0);
 744         args->size = (u64)args->pitch * args->height;
 745         args->size = ALIGN(args->size, PAGE_SIZE);
 746
 747         r = amdgpu_gem_object_create(adev, args->size, 0,
 748                                      AMDGPU_GEM_DOMAIN_VRAM,
 749                                      AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED,
 750                                      ttm_bo_type_device,
 751                                      &gobj);
 752         if (r)
 753                 return -ENOMEM;
 754
 755         r = drm_gem_handle_create(file_priv, gobj, &handle);
 756         /* drop reference from allocate - handle holds it now */
 757         drm_gem_object_unreference_unlocked(gobj);
 758         if (r) {
 759                 return r;
 760         }
 761         args->handle = handle;
 762         return 0;
 763 }
 764
 765 #if defined(CONFIG_DEBUG_FS)
 766 static int amdgpu_debugfs_gem_bo_info(int id, void *ptr, void *data)
 767 {
 768         struct drm_gem_object *gobj = ptr;
 769         struct amdgpu_bo *bo = gem_to_amdgpu_bo(gobj);
 770         struct seq_file *m = data;
 771
 772         unsigned domain;
 773         const char *placement;
 774         unsigned pin_count;
 775         uint64_t offset;
 776
 777         domain = amdgpu_mem_type_to_domain(bo->tbo.mem.mem_type);
 778         switch (domain) {
 779         case AMDGPU_GEM_DOMAIN_VRAM:
 780                 placement = "VRAM";
 781                 break;
 782         case AMDGPU_GEM_DOMAIN_GTT:
 783                 placement = " GTT";
 784                 break;
 785         case AMDGPU_GEM_DOMAIN_CPU:
 786         default:
 787                 placement = " CPU";
 788                 break;
 789         }
 790         seq_printf(m, "\t0x%08x: %12ld byte %s",
 791                    id, amdgpu_bo_size(bo), placement);
 792
 793         offset = ACCESS_ONCE(bo->tbo.mem.start);
 794         if (offset != AMDGPU_BO_INVALID_OFFSET)
 795                 seq_printf(m, " @ 0x%010Lx", offset);
 796
 797         pin_count = ACCESS_ONCE(bo->pin_count);
 798         if (pin_count)
 799                 seq_printf(m, " pin count %d", pin_count);
 800         seq_printf(m, "\n");
 801
 802         return 0;
 803 }
 804
 805 static int amdgpu_debugfs_gem_info(struct seq_file *m, void *data)
 806 {
 807         struct drm_info_node *node = (struct drm_info_node *)m->private;
 808         struct drm_device *dev = node->minor->dev;
 809         struct drm_file *file;
 810         int r;
 811
 812         r = mutex_lock_interruptible(&dev->filelist_mutex);
 813         if (r)
 814                 return r;
 815
 816         list_for_each_entry(file, &dev->filelist, lhead) {
 817                 struct task_struct *task;
 818
 819                 /*
 820                  * Although we have a valid reference on file->pid, that does
 821                  * not guarantee that the task_struct who called get_pid() is
 822                  * still alive (e.g. get_pid(current) => fork() => exit()).
 823                  * Therefore, we need to protect this ->comm access using RCU.
 824                  */
 825                 rcu_read_lock();
 826                 task = pid_task(file->pid, PIDTYPE_PID);
 827                 seq_printf(m, "pid %8d command %s:\n", pid_nr(file->pid),
 828                            task ? task->comm : "<unknown>");
 829                 rcu_read_unlock();
 830
 831                 spin_lock(&file->table_lock);
 832                 idr_for_each(&file->object_idr, amdgpu_debugfs_gem_bo_info, m);
 833                 spin_unlock(&file->table_lock);
 834         }
 835
 836         mutex_unlock(&dev->filelist_mutex);
 837         return 0;
 838 }
 839
 840 static const struct drm_info_list amdgpu_debugfs_gem_list[] = {
 841         {"amdgpu_gem_info", &amdgpu_debugfs_gem_info, 0, NULL},
 842 };
 843 #endif
 844
 845 int amdgpu_gem_debugfs_init(struct amdgpu_device *adev)
 846 {
 847 #if defined(CONFIG_DEBUG_FS)
 848         return amdgpu_debugfs_add_files(adev, amdgpu_debugfs_gem_list, 1);
 849 #endif
 850         return 0;
 851 }