drivers/soc/litex/litex_soc_ctrl.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * LiteX SoC Controller Driver
   4  *
   5  * Copyright (C) 2020 Antmicro <www.antmicro.com>
   6  *
   7  */
   8
   9 #include <linux/litex.h>
  10 #include <linux/device.h>
  11 #include <linux/errno.h>
  12 #include <linux/of.h>
  13 #include <linux/platform_device.h>
  14 #include <linux/printk.h>
  15 #include <linux/module.h>
  16 #include <linux/io.h>
  17 #include <linux/reboot.h>
  18
  19 /* reset register located at the base address */
  20 #define RESET_REG_OFF           0x00
  21 #define RESET_REG_VALUE         0x00000001
  22
  23 #define SCRATCH_REG_OFF         0x04
  24 #define SCRATCH_REG_VALUE       0x12345678
  25 #define SCRATCH_TEST_VALUE      0xdeadbeef
  26
  27 /*
  28  * Check LiteX CSR read/write access
  29  *
  30  * This function reads and writes a scratch register in order to verify if CSR
  31  * access works.
  32  *
  33  * In case any problems are detected, the driver should panic.
  34  *
  35  * Access to the LiteX CSR is, by design, done in CPU native endianness.
  36  * The driver should not dynamically configure access functions when
  37  * the endianness mismatch is detected. Such situation indicates problems in
  38  * the soft SoC design and should be solved at the LiteX generator level,
  39  * not in the software.
  40  */
  41 static int litex_check_csr_access(void __iomem *reg_addr)
  42 {
  43         unsigned long reg;
  44
  45         reg = litex_read32(reg_addr + SCRATCH_REG_OFF);
  46
  47         if (reg != SCRATCH_REG_VALUE) {
  48                 panic("Scratch register read error - the system is probably broken! Expected: 0x%x but got: 0x%lx",
  49                         SCRATCH_REG_VALUE, reg);
  50                 return -EINVAL;
  51         }
  52
  53         litex_write32(reg_addr + SCRATCH_REG_OFF, SCRATCH_TEST_VALUE);
  54         reg = litex_read32(reg_addr + SCRATCH_REG_OFF);
  55
  56         if (reg != SCRATCH_TEST_VALUE) {
  57                 panic("Scratch register write error - the system is probably broken! Expected: 0x%x but got: 0x%lx",
  58                         SCRATCH_TEST_VALUE, reg);
  59                 return -EINVAL;
  60         }
  61
  62         /* restore original value of the SCRATCH register */
  63         litex_write32(reg_addr + SCRATCH_REG_OFF, SCRATCH_REG_VALUE);
  64
  65         pr_info("LiteX SoC Controller driver initialized: subreg:%d, align:%d",
  66                 LITEX_SUBREG_SIZE, LITEX_SUBREG_ALIGN);
  67
  68         return 0;
  69 }
  70
  71 struct litex_soc_ctrl_device {
  72         void __iomem *base;
  73         struct notifier_block reset_nb;
  74 };
  75
  76 static int litex_reset_handler(struct notifier_block *this, unsigned long mode,
  77                                void *cmd)
  78 {
  79         struct litex_soc_ctrl_device *soc_ctrl_dev =
  80                 container_of(this, struct litex_soc_ctrl_device, reset_nb);
  81
  82         litex_write32(soc_ctrl_dev->base + RESET_REG_OFF, RESET_REG_VALUE);
  83         return NOTIFY_DONE;
  84 }
  85
  86 #ifdef CONFIG_OF
  87 static const struct of_device_id litex_soc_ctrl_of_match[] = {
  88         {.compatible = "litex,soc-controller"},
  89         {},
  90 };
  91 MODULE_DEVICE_TABLE(of, litex_soc_ctrl_of_match);
  92 #endif /* CONFIG_OF */
  93
  94 static int litex_soc_ctrl_probe(struct platform_device *pdev)
  95 {
  96         struct litex_soc_ctrl_device *soc_ctrl_dev;
  97         int error;
  98
  99         soc_ctrl_dev = devm_kzalloc(&pdev->dev, sizeof(*soc_ctrl_dev), GFP_KERNEL);
 100         if (!soc_ctrl_dev)
 101                 return -ENOMEM;
 102
 103         soc_ctrl_dev->base = devm_platform_ioremap_resource(pdev, 0);
 104         if (IS_ERR(soc_ctrl_dev->base))
 105                 return PTR_ERR(soc_ctrl_dev->base);
 106
 107         error = litex_check_csr_access(soc_ctrl_dev->base);
 108         if (error)
 109                 return error;
 110
 111         platform_set_drvdata(pdev, soc_ctrl_dev);
 112
 113         soc_ctrl_dev->reset_nb.notifier_call = litex_reset_handler;
 114         soc_ctrl_dev->reset_nb.priority = 128;
 115         error = register_restart_handler(&soc_ctrl_dev->reset_nb);
 116         if (error) {
 117                 dev_warn(&pdev->dev, "cannot register restart handler: %d\n",
 118                          error);
 119         }
 120
 121         return 0;
 122 }
 123
 124 static int litex_soc_ctrl_remove(struct platform_device *pdev)
 125 {
 126         struct litex_soc_ctrl_device *soc_ctrl_dev = platform_get_drvdata(pdev);
 127
 128         unregister_restart_handler(&soc_ctrl_dev->reset_nb);
 129         return 0;
 130 }
 131
 132 static struct platform_driver litex_soc_ctrl_driver = {
 133         .driver = {
 134                 .name = "litex-soc-controller",
 135                 .of_match_table = of_match_ptr(litex_soc_ctrl_of_match)
 136         },
 137         .probe = litex_soc_ctrl_probe,
 138         .remove = litex_soc_ctrl_remove,
 139 };
 140
 141 module_platform_driver(litex_soc_ctrl_driver);
 142 MODULE_DESCRIPTION("LiteX SoC Controller driver");
 143 MODULE_AUTHOR("Antmicro <www.antmicro.com>");
 144 MODULE_LICENSE("GPL v2");