1 // SPDX-License-Identifier: GPL-2.0
3 #include <linux/bits.h>
4 #include <linux/delay.h>
6 #include <linux/kernel.h>
7 #include <linux/ktime.h>
8 #include <linux/module.h>
9 #include <linux/mutex.h>
10 #include <linux/platform_device.h>
11 #include <linux/regmap.h>
13 #include <linux/iio/buffer.h>
14 #include <linux/iio/iio.h>
15 #include <linux/iio/trigger_consumer.h>
16 #include <linux/iio/triggered_buffer.h>
18 #include <asm/unaligned.h>
20 #define MT6360_REG_PMUCHGCTRL3 0x313
21 #define MT6360_REG_PMUADCCFG 0x356
22 #define MT6360_REG_PMUADCIDLET 0x358
23 #define MT6360_REG_PMUADCRPT1 0x35A
25 /* PMUCHGCTRL3 0x313 */
26 #define MT6360_AICR_MASK GENMASK(7, 2)
27 #define MT6360_AICR_SHFT 2
28 #define MT6360_AICR_400MA 0x6
30 #define MT6360_ADCEN_MASK BIT(15)
31 /* PMUADCRPT1 0x35A */
32 #define MT6360_PREFERCH_MASK GENMASK(7, 4)
33 #define MT6360_PREFERCH_SHFT 4
34 #define MT6360_RPTCH_MASK GENMASK(3, 0)
35 #define MT6360_NO_PREFER 15
38 #define ADC_WAIT_TIME_MS 25
39 #define ADC_CONV_TIMEOUT_MS 100
40 #define ADC_LOOP_TIME_US 2000
43 MT6360_CHAN_USBID = 0,
57 struct mt6360_adc_data {
59 struct regmap *regmap;
60 /* Due to only one set of ADC control, this lock is used to prevent the race condition */
61 struct mutex adc_lock;
62 ktime_t last_off_timestamps[MT6360_CHAN_MAX];
65 static int mt6360_adc_read_channel(struct mt6360_adc_data *mad, int channel, int *val)
69 ktime_t predict_end_t, timeout;
70 unsigned int pre_wait_time;
73 mutex_lock(&mad->adc_lock);
75 /* Select the preferred ADC channel */
76 ret = regmap_update_bits(mad->regmap, MT6360_REG_PMUADCRPT1, MT6360_PREFERCH_MASK,
77 channel << MT6360_PREFERCH_SHFT);
81 adc_enable = cpu_to_be16(MT6360_ADCEN_MASK | BIT(channel));
82 ret = regmap_raw_write(mad->regmap, MT6360_REG_PMUADCCFG, &adc_enable, sizeof(adc_enable));
86 predict_end_t = ktime_add_ms(mad->last_off_timestamps[channel], 2 * ADC_WAIT_TIME_MS);
88 if (ktime_after(ktime_get(), predict_end_t))
89 pre_wait_time = ADC_WAIT_TIME_MS;
91 pre_wait_time = 3 * ADC_WAIT_TIME_MS;
93 if (msleep_interruptible(pre_wait_time)) {
98 timeout = ktime_add_ms(ktime_get(), ADC_CONV_TIMEOUT_MS);
100 ret = regmap_raw_read(mad->regmap, MT6360_REG_PMUADCRPT1, rpt, sizeof(rpt));
105 * There are two functions, ZCV and TypeC OTP, running ADC VBAT and TS in
106 * background, and ADC samples are taken on a fixed frequency no matter read the
107 * previous one or not.
108 * To avoid conflict, We set minimum time threshold after enable ADC and
109 * check report channel is the same.
110 * The worst case is run the same ADC twice and background function is also running,
111 * ADC conversion sequence is desire channel before start ADC, background ADC,
112 * desire channel after start ADC.
113 * So the minimum correct data is three times of typical conversion time.
115 if ((rpt[0] & MT6360_RPTCH_MASK) == channel)
118 if (ktime_compare(ktime_get(), timeout) > 0) {
123 usleep_range(ADC_LOOP_TIME_US / 2, ADC_LOOP_TIME_US);
126 *val = rpt[1] << 8 | rpt[2];
130 /* Only keep ADC enable */
131 adc_enable = cpu_to_be16(MT6360_ADCEN_MASK);
132 regmap_raw_write(mad->regmap, MT6360_REG_PMUADCCFG, &adc_enable, sizeof(adc_enable));
133 mad->last_off_timestamps[channel] = ktime_get();
134 /* Config prefer channel to NO_PREFER */
135 regmap_update_bits(mad->regmap, MT6360_REG_PMUADCRPT1, MT6360_PREFERCH_MASK,
136 MT6360_NO_PREFER << MT6360_PREFERCH_SHFT);
138 mutex_unlock(&mad->adc_lock);
143 static int mt6360_adc_read_scale(struct mt6360_adc_data *mad, int channel, int *val, int *val2)
149 case MT6360_CHAN_USBID:
150 case MT6360_CHAN_VSYS:
151 case MT6360_CHAN_VBAT:
152 case MT6360_CHAN_CHG_VDDP:
153 case MT6360_CHAN_VREF_TS:
157 case MT6360_CHAN_VBUSDIV5:
160 case MT6360_CHAN_VBUSDIV2:
161 case MT6360_CHAN_IBUS:
162 case MT6360_CHAN_IBAT:
165 if (channel == MT6360_CHAN_IBUS) {
166 /* IBUS will be affected by input current limit for the different Ron */
167 /* Check whether the config is <400mA or not */
168 ret = regmap_read(mad->regmap, MT6360_REG_PMUCHGCTRL3, ®val);
172 regval = (regval & MT6360_AICR_MASK) >> MT6360_AICR_SHFT;
173 if (regval < MT6360_AICR_400MA)
178 case MT6360_CHAN_TEMP_JC:
181 return IIO_VAL_FRACTIONAL;
187 static int mt6360_adc_read_offset(struct mt6360_adc_data *mad, int channel, int *val)
189 *val = (channel == MT6360_CHAN_TEMP_JC) ? -80 : 0;
193 static int mt6360_adc_read_raw(struct iio_dev *iio_dev, const struct iio_chan_spec *chan,
194 int *val, int *val2, long mask)
196 struct mt6360_adc_data *mad = iio_priv(iio_dev);
199 case IIO_CHAN_INFO_RAW:
200 return mt6360_adc_read_channel(mad, chan->channel, val);
201 case IIO_CHAN_INFO_SCALE:
202 return mt6360_adc_read_scale(mad, chan->channel, val, val2);
203 case IIO_CHAN_INFO_OFFSET:
204 return mt6360_adc_read_offset(mad, chan->channel, val);
210 static const char *mt6360_channel_labels[MT6360_CHAN_MAX] = {
211 "usbid", "vbusdiv5", "vbusdiv2", "vsys", "vbat", "ibus", "ibat", "chg_vddp",
212 "temp_jc", "vref_ts", "ts",
215 static int mt6360_adc_read_label(struct iio_dev *iio_dev, const struct iio_chan_spec *chan,
218 return snprintf(label, PAGE_SIZE, "%s\n", mt6360_channel_labels[chan->channel]);
221 static const struct iio_info mt6360_adc_iio_info = {
222 .read_raw = mt6360_adc_read_raw,
223 .read_label = mt6360_adc_read_label,
226 #define MT6360_ADC_CHAN(_idx, _type) { \
228 .channel = MT6360_CHAN_##_idx, \
229 .scan_index = MT6360_CHAN_##_idx, \
230 .datasheet_name = #_idx, \
235 .endianness = IIO_CPU, \
238 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
239 BIT(IIO_CHAN_INFO_SCALE) | \
240 BIT(IIO_CHAN_INFO_OFFSET), \
243 static const struct iio_chan_spec mt6360_adc_channels[] = {
244 MT6360_ADC_CHAN(USBID, IIO_VOLTAGE),
245 MT6360_ADC_CHAN(VBUSDIV5, IIO_VOLTAGE),
246 MT6360_ADC_CHAN(VBUSDIV2, IIO_VOLTAGE),
247 MT6360_ADC_CHAN(VSYS, IIO_VOLTAGE),
248 MT6360_ADC_CHAN(VBAT, IIO_VOLTAGE),
249 MT6360_ADC_CHAN(IBUS, IIO_CURRENT),
250 MT6360_ADC_CHAN(IBAT, IIO_CURRENT),
251 MT6360_ADC_CHAN(CHG_VDDP, IIO_VOLTAGE),
252 MT6360_ADC_CHAN(TEMP_JC, IIO_TEMP),
253 MT6360_ADC_CHAN(VREF_TS, IIO_VOLTAGE),
254 MT6360_ADC_CHAN(TS, IIO_VOLTAGE),
255 IIO_CHAN_SOFT_TIMESTAMP(MT6360_CHAN_MAX),
258 static irqreturn_t mt6360_adc_trigger_handler(int irq, void *p)
260 struct iio_poll_func *pf = p;
261 struct iio_dev *indio_dev = pf->indio_dev;
262 struct mt6360_adc_data *mad = iio_priv(indio_dev);
264 u16 values[MT6360_CHAN_MAX];
267 int i = 0, bit, val, ret;
269 memset(&data, 0, sizeof(data));
270 for_each_set_bit(bit, indio_dev->active_scan_mask, indio_dev->masklength) {
271 ret = mt6360_adc_read_channel(mad, bit, &val);
273 dev_warn(&indio_dev->dev, "Failed to get channel %d conversion val\n", bit);
277 data.values[i++] = val;
279 iio_push_to_buffers_with_timestamp(indio_dev, &data, iio_get_time_ns(indio_dev));
281 iio_trigger_notify_done(indio_dev->trig);
286 static inline int mt6360_adc_reset(struct mt6360_adc_data *info)
289 ktime_t all_off_time;
292 /* Clear ADC idle wait time to 0 */
293 ret = regmap_write(info->regmap, MT6360_REG_PMUADCIDLET, 0);
297 /* Only keep ADC enable, but keep all channels off */
298 adc_enable = cpu_to_be16(MT6360_ADCEN_MASK);
299 ret = regmap_raw_write(info->regmap, MT6360_REG_PMUADCCFG, &adc_enable, sizeof(adc_enable));
303 /* Reset all channel off time to the current one */
304 all_off_time = ktime_get();
305 for (i = 0; i < MT6360_CHAN_MAX; i++)
306 info->last_off_timestamps[i] = all_off_time;
311 static int mt6360_adc_probe(struct platform_device *pdev)
313 struct mt6360_adc_data *mad;
314 struct regmap *regmap;
315 struct iio_dev *indio_dev;
318 regmap = dev_get_regmap(pdev->dev.parent, NULL);
320 dev_err(&pdev->dev, "Failed to get parent regmap\n");
324 indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*mad));
328 mad = iio_priv(indio_dev);
329 mad->dev = &pdev->dev;
330 mad->regmap = regmap;
331 mutex_init(&mad->adc_lock);
333 ret = mt6360_adc_reset(mad);
335 dev_err(&pdev->dev, "Failed to reset adc\n");
339 indio_dev->name = dev_name(&pdev->dev);
340 indio_dev->dev.parent = &pdev->dev;
341 indio_dev->info = &mt6360_adc_iio_info;
342 indio_dev->modes = INDIO_DIRECT_MODE;
343 indio_dev->channels = mt6360_adc_channels;
344 indio_dev->num_channels = ARRAY_SIZE(mt6360_adc_channels);
346 ret = devm_iio_triggered_buffer_setup(&pdev->dev, indio_dev, NULL,
347 mt6360_adc_trigger_handler, NULL);
349 dev_err(&pdev->dev, "Failed to allocate iio trigger buffer\n");
353 return devm_iio_device_register(&pdev->dev, indio_dev);
356 static const struct of_device_id __maybe_unused mt6360_adc_of_id[] = {
357 { .compatible = "mediatek,mt6360-adc", },
360 MODULE_DEVICE_TABLE(of, mt6360_adc_of_id);
362 static struct platform_driver mt6360_adc_driver = {
364 .name = "mt6360-adc",
365 .of_match_table = mt6360_adc_of_id,
367 .probe = mt6360_adc_probe,
369 module_platform_driver(mt6360_adc_driver);
372 MODULE_DESCRIPTION("MT6360 ADC Driver");
373 MODULE_LICENSE("GPL v2");