arch/x86/kvm/x86.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Kernel-based Virtual Machine driver for Linux
   4  *
   5  * derived from drivers/kvm/kvm_main.c
   6  *
   7  * Copyright (C) 2006 Qumranet, Inc.
   8  * Copyright (C) 2008 Qumranet, Inc.
   9  * Copyright IBM Corporation, 2008
  10  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  11  *
  12  * Authors:
  13  *   Avi Kivity   <[email protected]>
  14  *   Yaniv Kamay  <[email protected]>
  15  *   Amit Shah    <[email protected]>
  16  *   Ben-Ami Yassour <[email protected]>
  17  */
  18
  19 #include <linux/kvm_host.h>
  20 #include "irq.h"
  21 #include "ioapic.h"
  22 #include "mmu.h"
  23 #include "i8254.h"
  24 #include "tss.h"
  25 #include "kvm_cache_regs.h"
  26 #include "kvm_emulate.h"
  27 #include "x86.h"
  28 #include "cpuid.h"
  29 #include "pmu.h"
  30 #include "hyperv.h"
  31 #include "lapic.h"
  32 #include "xen.h"
  33
  34 #include <linux/clocksource.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/kvm.h>
  37 #include <linux/fs.h>
  38 #include <linux/vmalloc.h>
  39 #include <linux/export.h>
  40 #include <linux/moduleparam.h>
  41 #include <linux/mman.h>
  42 #include <linux/highmem.h>
  43 #include <linux/iommu.h>
  44 #include <linux/intel-iommu.h>
  45 #include <linux/cpufreq.h>
  46 #include <linux/user-return-notifier.h>
  47 #include <linux/srcu.h>
  48 #include <linux/slab.h>
  49 #include <linux/perf_event.h>
  50 #include <linux/uaccess.h>
  51 #include <linux/hash.h>
  52 #include <linux/pci.h>
  53 #include <linux/timekeeper_internal.h>
  54 #include <linux/pvclock_gtod.h>
  55 #include <linux/kvm_irqfd.h>
  56 #include <linux/irqbypass.h>
  57 #include <linux/sched/stat.h>
  58 #include <linux/sched/isolation.h>
  59 #include <linux/mem_encrypt.h>
  60 #include <linux/entry-kvm.h>
  61 #include <linux/suspend.h>
  62
  63 #include <trace/events/kvm.h>
  64
  65 #include <asm/debugreg.h>
  66 #include <asm/msr.h>
  67 #include <asm/desc.h>
  68 #include <asm/mce.h>
  69 #include <asm/pkru.h>
  70 #include <linux/kernel_stat.h>
  71 #include <asm/fpu/internal.h> /* Ugh! */
  72 #include <asm/pvclock.h>
  73 #include <asm/div64.h>
  74 #include <asm/irq_remapping.h>
  75 #include <asm/mshyperv.h>
  76 #include <asm/hypervisor.h>
  77 #include <asm/tlbflush.h>
  78 #include <asm/intel_pt.h>
  79 #include <asm/emulate_prefix.h>
  80 #include <asm/sgx.h>
  81 #include <clocksource/hyperv_timer.h>
  82
  83 #define CREATE_TRACE_POINTS
  84 #include "trace.h"
  85
  86 #define MAX_IO_MSRS 256
  87 #define KVM_MAX_MCE_BANKS 32
  88 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  89 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  90
  91 #define emul_to_vcpu(ctxt) \
  92         ((struct kvm_vcpu *)(ctxt)->vcpu)
  93
  94 /* EFER defaults:
  95  * - enable syscall per default because its emulated by KVM
  96  * - enable LME and LMA per default on 64 bit KVM
  97  */
  98 #ifdef CONFIG_X86_64
  99 static
 100 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
 101 #else
 102 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
 103 #endif
 104
 105 static u64 __read_mostly cr4_reserved_bits = CR4_RESERVED_BITS;
 106
 107 #define KVM_EXIT_HYPERCALL_VALID_MASK (1 << KVM_HC_MAP_GPA_RANGE)
 108
 109 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
 110                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
 111
 112 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
 113 static void process_nmi(struct kvm_vcpu *vcpu);
 114 static void process_smi(struct kvm_vcpu *vcpu);
 115 static void enter_smm(struct kvm_vcpu *vcpu);
 116 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 117 static void store_regs(struct kvm_vcpu *vcpu);
 118 static int sync_regs(struct kvm_vcpu *vcpu);
 119
 120 static int __set_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2);
 121 static void __get_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2);
 122
 123 struct kvm_x86_ops kvm_x86_ops __read_mostly;
 124 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 125
 126 #define KVM_X86_OP(func)                                             \
 127         DEFINE_STATIC_CALL_NULL(kvm_x86_##func,                      \
 128                                 *(((struct kvm_x86_ops *)0)->func));
 129 #define KVM_X86_OP_NULL KVM_X86_OP
 130 #include <asm/kvm-x86-ops.h>
 131 EXPORT_STATIC_CALL_GPL(kvm_x86_get_cs_db_l_bits);
 132 EXPORT_STATIC_CALL_GPL(kvm_x86_cache_reg);
 133 EXPORT_STATIC_CALL_GPL(kvm_x86_tlb_flush_current);
 134
 135 static bool __read_mostly ignore_msrs = 0;
 136 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 137
 138 bool __read_mostly report_ignored_msrs = true;
 139 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
 140 EXPORT_SYMBOL_GPL(report_ignored_msrs);
 141
 142 unsigned int min_timer_period_us = 200;
 143 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 144
 145 static bool __read_mostly kvmclock_periodic_sync = true;
 146 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 147
 148 bool __read_mostly kvm_has_tsc_control;
 149 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 150 u32  __read_mostly kvm_max_guest_tsc_khz;
 151 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 152 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 153 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 154 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 155 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 156 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 157 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 158 bool __read_mostly kvm_has_bus_lock_exit;
 159 EXPORT_SYMBOL_GPL(kvm_has_bus_lock_exit);
 160
 161 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 162 static u32 __read_mostly tsc_tolerance_ppm = 250;
 163 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 164
 165 /*
 166  * lapic timer advance (tscdeadline mode only) in nanoseconds.  '-1' enables
 167  * adaptive tuning starting from default advancement of 1000ns.  '0' disables
 168  * advancement entirely.  Any other value is used as-is and disables adaptive
 169  * tuning, i.e. allows privileged userspace to set an exact advancement time.
 170  */
 171 static int __read_mostly lapic_timer_advance_ns = -1;
 172 module_param(lapic_timer_advance_ns, int, S_IRUGO | S_IWUSR);
 173
 174 static bool __read_mostly vector_hashing = true;
 175 module_param(vector_hashing, bool, S_IRUGO);
 176
 177 bool __read_mostly enable_vmware_backdoor = false;
 178 module_param(enable_vmware_backdoor, bool, S_IRUGO);
 179 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
 180
 181 static bool __read_mostly force_emulation_prefix = false;
 182 module_param(force_emulation_prefix, bool, S_IRUGO);
 183
 184 int __read_mostly pi_inject_timer = -1;
 185 module_param(pi_inject_timer, bint, S_IRUGO | S_IWUSR);
 186
 187 /*
 188  * Restoring the host value for MSRs that are only consumed when running in
 189  * usermode, e.g. SYSCALL MSRs and TSC_AUX, can be deferred until the CPU
 190  * returns to userspace, i.e. the kernel can run with the guest's value.
 191  */
 192 #define KVM_MAX_NR_USER_RETURN_MSRS 16
 193
 194 struct kvm_user_return_msrs {
 195         struct user_return_notifier urn;
 196         bool registered;
 197         struct kvm_user_return_msr_values {
 198                 u64 host;
 199                 u64 curr;
 200         } values[KVM_MAX_NR_USER_RETURN_MSRS];
 201 };
 202
 203 u32 __read_mostly kvm_nr_uret_msrs;
 204 EXPORT_SYMBOL_GPL(kvm_nr_uret_msrs);
 205 static u32 __read_mostly kvm_uret_msrs_list[KVM_MAX_NR_USER_RETURN_MSRS];
 206 static struct kvm_user_return_msrs __percpu *user_return_msrs;
 207
 208 #define KVM_SUPPORTED_XCR0     (XFEATURE_MASK_FP | XFEATURE_MASK_SSE \
 209                                 | XFEATURE_MASK_YMM | XFEATURE_MASK_BNDREGS \
 210                                 | XFEATURE_MASK_BNDCSR | XFEATURE_MASK_AVX512 \
 211                                 | XFEATURE_MASK_PKRU)
 212
 213 u64 __read_mostly host_efer;
 214 EXPORT_SYMBOL_GPL(host_efer);
 215
 216 bool __read_mostly allow_smaller_maxphyaddr = 0;
 217 EXPORT_SYMBOL_GPL(allow_smaller_maxphyaddr);
 218
 219 bool __read_mostly enable_apicv = true;
 220 EXPORT_SYMBOL_GPL(enable_apicv);
 221
 222 u64 __read_mostly host_xss;
 223 EXPORT_SYMBOL_GPL(host_xss);
 224 u64 __read_mostly supported_xss;
 225 EXPORT_SYMBOL_GPL(supported_xss);
 226
 227 const struct _kvm_stats_desc kvm_vm_stats_desc[] = {
 228         KVM_GENERIC_VM_STATS(),
 229         STATS_DESC_COUNTER(VM, mmu_shadow_zapped),
 230         STATS_DESC_COUNTER(VM, mmu_pte_write),
 231         STATS_DESC_COUNTER(VM, mmu_pde_zapped),
 232         STATS_DESC_COUNTER(VM, mmu_flooded),
 233         STATS_DESC_COUNTER(VM, mmu_recycled),
 234         STATS_DESC_COUNTER(VM, mmu_cache_miss),
 235         STATS_DESC_ICOUNTER(VM, mmu_unsync),
 236         STATS_DESC_ICOUNTER(VM, pages_4k),
 237         STATS_DESC_ICOUNTER(VM, pages_2m),
 238         STATS_DESC_ICOUNTER(VM, pages_1g),
 239         STATS_DESC_ICOUNTER(VM, nx_lpage_splits),
 240         STATS_DESC_PCOUNTER(VM, max_mmu_rmap_size),
 241         STATS_DESC_PCOUNTER(VM, max_mmu_page_hash_collisions)
 242 };
 243
 244 const struct kvm_stats_header kvm_vm_stats_header = {
 245         .name_size = KVM_STATS_NAME_SIZE,
 246         .num_desc = ARRAY_SIZE(kvm_vm_stats_desc),
 247         .id_offset = sizeof(struct kvm_stats_header),
 248         .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE,
 249         .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE +
 250                        sizeof(kvm_vm_stats_desc),
 251 };
 252
 253 const struct _kvm_stats_desc kvm_vcpu_stats_desc[] = {
 254         KVM_GENERIC_VCPU_STATS(),
 255         STATS_DESC_COUNTER(VCPU, pf_fixed),
 256         STATS_DESC_COUNTER(VCPU, pf_guest),
 257         STATS_DESC_COUNTER(VCPU, tlb_flush),
 258         STATS_DESC_COUNTER(VCPU, invlpg),
 259         STATS_DESC_COUNTER(VCPU, exits),
 260         STATS_DESC_COUNTER(VCPU, io_exits),
 261         STATS_DESC_COUNTER(VCPU, mmio_exits),
 262         STATS_DESC_COUNTER(VCPU, signal_exits),
 263         STATS_DESC_COUNTER(VCPU, irq_window_exits),
 264         STATS_DESC_COUNTER(VCPU, nmi_window_exits),
 265         STATS_DESC_COUNTER(VCPU, l1d_flush),
 266         STATS_DESC_COUNTER(VCPU, halt_exits),
 267         STATS_DESC_COUNTER(VCPU, request_irq_exits),
 268         STATS_DESC_COUNTER(VCPU, irq_exits),
 269         STATS_DESC_COUNTER(VCPU, host_state_reload),
 270         STATS_DESC_COUNTER(VCPU, fpu_reload),
 271         STATS_DESC_COUNTER(VCPU, insn_emulation),
 272         STATS_DESC_COUNTER(VCPU, insn_emulation_fail),
 273         STATS_DESC_COUNTER(VCPU, hypercalls),
 274         STATS_DESC_COUNTER(VCPU, irq_injections),
 275         STATS_DESC_COUNTER(VCPU, nmi_injections),
 276         STATS_DESC_COUNTER(VCPU, req_event),
 277         STATS_DESC_COUNTER(VCPU, nested_run),
 278         STATS_DESC_COUNTER(VCPU, directed_yield_attempted),
 279         STATS_DESC_COUNTER(VCPU, directed_yield_successful),
 280         STATS_DESC_ICOUNTER(VCPU, guest_mode)
 281 };
 282
 283 const struct kvm_stats_header kvm_vcpu_stats_header = {
 284         .name_size = KVM_STATS_NAME_SIZE,
 285         .num_desc = ARRAY_SIZE(kvm_vcpu_stats_desc),
 286         .id_offset = sizeof(struct kvm_stats_header),
 287         .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE,
 288         .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE +
 289                        sizeof(kvm_vcpu_stats_desc),
 290 };
 291
 292 u64 __read_mostly host_xcr0;
 293 u64 __read_mostly supported_xcr0;
 294 EXPORT_SYMBOL_GPL(supported_xcr0);
 295
 296 static struct kmem_cache *x86_fpu_cache;
 297
 298 static struct kmem_cache *x86_emulator_cache;
 299
 300 /*
 301  * When called, it means the previous get/set msr reached an invalid msr.
 302  * Return true if we want to ignore/silent this failed msr access.
 303  */
 304 static bool kvm_msr_ignored_check(u32 msr, u64 data, bool write)
 305 {
 306         const char *op = write ? "wrmsr" : "rdmsr";
 307
 308         if (ignore_msrs) {
 309                 if (report_ignored_msrs)
 310                         kvm_pr_unimpl("ignored %s: 0x%x data 0x%llx\n",
 311                                       op, msr, data);
 312                 /* Mask the error */
 313                 return true;
 314         } else {
 315                 kvm_debug_ratelimited("unhandled %s: 0x%x data 0x%llx\n",
 316                                       op, msr, data);
 317                 return false;
 318         }
 319 }
 320
 321 static struct kmem_cache *kvm_alloc_emulator_cache(void)
 322 {
 323         unsigned int useroffset = offsetof(struct x86_emulate_ctxt, src);
 324         unsigned int size = sizeof(struct x86_emulate_ctxt);
 325
 326         return kmem_cache_create_usercopy("x86_emulator", size,
 327                                           __alignof__(struct x86_emulate_ctxt),
 328                                           SLAB_ACCOUNT, useroffset,
 329                                           size - useroffset, NULL);
 330 }
 331
 332 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 333
 334 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 335 {
 336         int i;
 337         for (i = 0; i < ASYNC_PF_PER_VCPU; i++)
 338                 vcpu->arch.apf.gfns[i] = ~0;
 339 }
 340
 341 static void kvm_on_user_return(struct user_return_notifier *urn)
 342 {
 343         unsigned slot;
 344         struct kvm_user_return_msrs *msrs
 345                 = container_of(urn, struct kvm_user_return_msrs, urn);
 346         struct kvm_user_return_msr_values *values;
 347         unsigned long flags;
 348
 349         /*
 350          * Disabling irqs at this point since the following code could be
 351          * interrupted and executed through kvm_arch_hardware_disable()
 352          */
 353         local_irq_save(flags);
 354         if (msrs->registered) {
 355                 msrs->registered = false;
 356                 user_return_notifier_unregister(urn);
 357         }
 358         local_irq_restore(flags);
 359         for (slot = 0; slot < kvm_nr_uret_msrs; ++slot) {
 360                 values = &msrs->values[slot];
 361                 if (values->host != values->curr) {
 362                         wrmsrl(kvm_uret_msrs_list[slot], values->host);
 363                         values->curr = values->host;
 364                 }
 365         }
 366 }
 367
 368 static int kvm_probe_user_return_msr(u32 msr)
 369 {
 370         u64 val;
 371         int ret;
 372
 373         preempt_disable();
 374         ret = rdmsrl_safe(msr, &val);
 375         if (ret)
 376                 goto out;
 377         ret = wrmsrl_safe(msr, val);
 378 out:
 379         preempt_enable();
 380         return ret;
 381 }
 382
 383 int kvm_add_user_return_msr(u32 msr)
 384 {
 385         BUG_ON(kvm_nr_uret_msrs >= KVM_MAX_NR_USER_RETURN_MSRS);
 386
 387         if (kvm_probe_user_return_msr(msr))
 388                 return -1;
 389
 390         kvm_uret_msrs_list[kvm_nr_uret_msrs] = msr;
 391         return kvm_nr_uret_msrs++;
 392 }
 393 EXPORT_SYMBOL_GPL(kvm_add_user_return_msr);
 394
 395 int kvm_find_user_return_msr(u32 msr)
 396 {
 397         int i;
 398
 399         for (i = 0; i < kvm_nr_uret_msrs; ++i) {
 400                 if (kvm_uret_msrs_list[i] == msr)
 401                         return i;
 402         }
 403         return -1;
 404 }
 405 EXPORT_SYMBOL_GPL(kvm_find_user_return_msr);
 406
 407 static void kvm_user_return_msr_cpu_online(void)
 408 {
 409         unsigned int cpu = smp_processor_id();
 410         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 411         u64 value;
 412         int i;
 413
 414         for (i = 0; i < kvm_nr_uret_msrs; ++i) {
 415                 rdmsrl_safe(kvm_uret_msrs_list[i], &value);
 416                 msrs->values[i].host = value;
 417                 msrs->values[i].curr = value;
 418         }
 419 }
 420
 421 int kvm_set_user_return_msr(unsigned slot, u64 value, u64 mask)
 422 {
 423         unsigned int cpu = smp_processor_id();
 424         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 425         int err;
 426
 427         value = (value & mask) | (msrs->values[slot].host & ~mask);
 428         if (value == msrs->values[slot].curr)
 429                 return 0;
 430         err = wrmsrl_safe(kvm_uret_msrs_list[slot], value);
 431         if (err)
 432                 return 1;
 433
 434         msrs->values[slot].curr = value;
 435         if (!msrs->registered) {
 436                 msrs->urn.on_user_return = kvm_on_user_return;
 437                 user_return_notifier_register(&msrs->urn);
 438                 msrs->registered = true;
 439         }
 440         return 0;
 441 }
 442 EXPORT_SYMBOL_GPL(kvm_set_user_return_msr);
 443
 444 static void drop_user_return_notifiers(void)
 445 {
 446         unsigned int cpu = smp_processor_id();
 447         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 448
 449         if (msrs->registered)
 450                 kvm_on_user_return(&msrs->urn);
 451 }
 452
 453 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 454 {
 455         return vcpu->arch.apic_base;
 456 }
 457 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 458
 459 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)
 460 {
 461         return kvm_apic_mode(kvm_get_apic_base(vcpu));
 462 }
 463 EXPORT_SYMBOL_GPL(kvm_get_apic_mode);
 464
 465 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 466 {
 467         enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
 468         enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
 469         u64 reserved_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu) | 0x2ff |
 470                 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
 471
 472         if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
 473                 return 1;
 474         if (!msr_info->host_initiated) {
 475                 if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
 476                         return 1;
 477                 if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
 478                         return 1;
 479         }
 480
 481         kvm_lapic_set_base(vcpu, msr_info->data);
 482         kvm_recalculate_apic_map(vcpu->kvm);
 483         return 0;
 484 }
 485 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 486
 487 /*
 488  * Handle a fault on a hardware virtualization (VMX or SVM) instruction.
 489  *
 490  * Hardware virtualization extension instructions may fault if a reboot turns
 491  * off virtualization while processes are running.  Usually after catching the
 492  * fault we just panic; during reboot instead the instruction is ignored.
 493  */
 494 noinstr void kvm_spurious_fault(void)
 495 {
 496         /* Fault while not rebooting.  We want the trace. */
 497         BUG_ON(!kvm_rebooting);
 498 }
 499 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 500
 501 #define EXCPT_BENIGN            0
 502 #define EXCPT_CONTRIBUTORY      1
 503 #define EXCPT_PF                2
 504
 505 static int exception_class(int vector)
 506 {
 507         switch (vector) {
 508         case PF_VECTOR:
 509                 return EXCPT_PF;
 510         case DE_VECTOR:
 511         case TS_VECTOR:
 512         case NP_VECTOR:
 513         case SS_VECTOR:
 514         case GP_VECTOR:
 515                 return EXCPT_CONTRIBUTORY;
 516         default:
 517                 break;
 518         }
 519         return EXCPT_BENIGN;
 520 }
 521
 522 #define EXCPT_FAULT             0
 523 #define EXCPT_TRAP              1
 524 #define EXCPT_ABORT             2
 525 #define EXCPT_INTERRUPT         3
 526
 527 static int exception_type(int vector)
 528 {
 529         unsigned int mask;
 530
 531         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 532                 return EXCPT_INTERRUPT;
 533
 534         mask = 1 << vector;
 535
 536         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 537         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 538                 return EXCPT_TRAP;
 539
 540         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 541                 return EXCPT_ABORT;
 542
 543         /* Reserved exceptions will result in fault */
 544         return EXCPT_FAULT;
 545 }
 546
 547 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu)
 548 {
 549         unsigned nr = vcpu->arch.exception.nr;
 550         bool has_payload = vcpu->arch.exception.has_payload;
 551         unsigned long payload = vcpu->arch.exception.payload;
 552
 553         if (!has_payload)
 554                 return;
 555
 556         switch (nr) {
 557         case DB_VECTOR:
 558                 /*
 559                  * "Certain debug exceptions may clear bit 0-3.  The
 560                  * remaining contents of the DR6 register are never
 561                  * cleared by the processor".
 562                  */
 563                 vcpu->arch.dr6 &= ~DR_TRAP_BITS;
 564                 /*
 565                  * In order to reflect the #DB exception payload in guest
 566                  * dr6, three components need to be considered: active low
 567                  * bit, FIXED_1 bits and active high bits (e.g. DR6_BD,
 568                  * DR6_BS and DR6_BT)
 569                  * DR6_ACTIVE_LOW contains the FIXED_1 and active low bits.
 570                  * In the target guest dr6:
 571                  * FIXED_1 bits should always be set.
 572                  * Active low bits should be cleared if 1-setting in payload.
 573                  * Active high bits should be set if 1-setting in payload.
 574                  *
 575                  * Note, the payload is compatible with the pending debug
 576                  * exceptions/exit qualification under VMX, that active_low bits
 577                  * are active high in payload.
 578                  * So they need to be flipped for DR6.
 579                  */
 580                 vcpu->arch.dr6 |= DR6_ACTIVE_LOW;
 581                 vcpu->arch.dr6 |= payload;
 582                 vcpu->arch.dr6 ^= payload & DR6_ACTIVE_LOW;
 583
 584                 /*
 585                  * The #DB payload is defined as compatible with the 'pending
 586                  * debug exceptions' field under VMX, not DR6. While bit 12 is
 587                  * defined in the 'pending debug exceptions' field (enabled
 588                  * breakpoint), it is reserved and must be zero in DR6.
 589                  */
 590                 vcpu->arch.dr6 &= ~BIT(12);
 591                 break;
 592         case PF_VECTOR:
 593                 vcpu->arch.cr2 = payload;
 594                 break;
 595         }
 596
 597         vcpu->arch.exception.has_payload = false;
 598         vcpu->arch.exception.payload = 0;
 599 }
 600 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload);
 601
 602 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 603                 unsigned nr, bool has_error, u32 error_code,
 604                 bool has_payload, unsigned long payload, bool reinject)
 605 {
 606         u32 prev_nr;
 607         int class1, class2;
 608
 609         kvm_make_request(KVM_REQ_EVENT, vcpu);
 610
 611         if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
 612         queue:
 613                 if (reinject) {
 614                         /*
 615                          * On vmentry, vcpu->arch.exception.pending is only
 616                          * true if an event injection was blocked by
 617                          * nested_run_pending.  In that case, however,
 618                          * vcpu_enter_guest requests an immediate exit,
 619                          * and the guest shouldn't proceed far enough to
 620                          * need reinjection.
 621                          */
 622                         WARN_ON_ONCE(vcpu->arch.exception.pending);
 623                         vcpu->arch.exception.injected = true;
 624                         if (WARN_ON_ONCE(has_payload)) {
 625                                 /*
 626                                  * A reinjected event has already
 627                                  * delivered its payload.
 628                                  */
 629                                 has_payload = false;
 630                                 payload = 0;
 631                         }
 632                 } else {
 633                         vcpu->arch.exception.pending = true;
 634                         vcpu->arch.exception.injected = false;
 635                 }
 636                 vcpu->arch.exception.has_error_code = has_error;
 637                 vcpu->arch.exception.nr = nr;
 638                 vcpu->arch.exception.error_code = error_code;
 639                 vcpu->arch.exception.has_payload = has_payload;
 640                 vcpu->arch.exception.payload = payload;
 641                 if (!is_guest_mode(vcpu))
 642                         kvm_deliver_exception_payload(vcpu);
 643                 return;
 644         }
 645
 646         /* to check exception */
 647         prev_nr = vcpu->arch.exception.nr;
 648         if (prev_nr == DF_VECTOR) {
 649                 /* triple fault -> shutdown */
 650                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 651                 return;
 652         }
 653         class1 = exception_class(prev_nr);
 654         class2 = exception_class(nr);
 655         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 656                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 657                 /*
 658                  * Generate double fault per SDM Table 5-5.  Set
 659                  * exception.pending = true so that the double fault
 660                  * can trigger a nested vmexit.
 661                  */
 662                 vcpu->arch.exception.pending = true;
 663                 vcpu->arch.exception.injected = false;
 664                 vcpu->arch.exception.has_error_code = true;
 665                 vcpu->arch.exception.nr = DF_VECTOR;
 666                 vcpu->arch.exception.error_code = 0;
 667                 vcpu->arch.exception.has_payload = false;
 668                 vcpu->arch.exception.payload = 0;
 669         } else
 670                 /* replace previous exception with a new one in a hope
 671                    that instruction re-execution will regenerate lost
 672                    exception */
 673                 goto queue;
 674 }
 675
 676 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 677 {
 678         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, false);
 679 }
 680 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 681
 682 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 683 {
 684         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, true);
 685 }
 686 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 687
 688 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr,
 689                            unsigned long payload)
 690 {
 691         kvm_multiple_exception(vcpu, nr, false, 0, true, payload, false);
 692 }
 693 EXPORT_SYMBOL_GPL(kvm_queue_exception_p);
 694
 695 static void kvm_queue_exception_e_p(struct kvm_vcpu *vcpu, unsigned nr,
 696                                     u32 error_code, unsigned long payload)
 697 {
 698         kvm_multiple_exception(vcpu, nr, true, error_code,
 699                                true, payload, false);
 700 }
 701
 702 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 703 {
 704         if (err)
 705                 kvm_inject_gp(vcpu, 0);
 706         else
 707                 return kvm_skip_emulated_instruction(vcpu);
 708
 709         return 1;
 710 }
 711 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 712
 713 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 714 {
 715         ++vcpu->stat.pf_guest;
 716         vcpu->arch.exception.nested_apf =
 717                 is_guest_mode(vcpu) && fault->async_page_fault;
 718         if (vcpu->arch.exception.nested_apf) {
 719                 vcpu->arch.apf.nested_apf_token = fault->address;
 720                 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 721         } else {
 722                 kvm_queue_exception_e_p(vcpu, PF_VECTOR, fault->error_code,
 723                                         fault->address);
 724         }
 725 }
 726 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 727
 728 bool kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu,
 729                                     struct x86_exception *fault)
 730 {
 731         struct kvm_mmu *fault_mmu;
 732         WARN_ON_ONCE(fault->vector != PF_VECTOR);
 733
 734         fault_mmu = fault->nested_page_fault ? vcpu->arch.mmu :
 735                                                vcpu->arch.walk_mmu;
 736
 737         /*
 738          * Invalidate the TLB entry for the faulting address, if it exists,
 739          * else the access will fault indefinitely (and to emulate hardware).
 740          */
 741         if ((fault->error_code & PFERR_PRESENT_MASK) &&
 742             !(fault->error_code & PFERR_RSVD_MASK))
 743                 kvm_mmu_invalidate_gva(vcpu, fault_mmu, fault->address,
 744                                        fault_mmu->root_hpa);
 745
 746         fault_mmu->inject_page_fault(vcpu, fault);
 747         return fault->nested_page_fault;
 748 }
 749 EXPORT_SYMBOL_GPL(kvm_inject_emulated_page_fault);
 750
 751 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 752 {
 753         atomic_inc(&vcpu->arch.nmi_queued);
 754         kvm_make_request(KVM_REQ_NMI, vcpu);
 755 }
 756 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 757
 758 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 759 {
 760         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, false);
 761 }
 762 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 763
 764 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 765 {
 766         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, true);
 767 }
 768 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 769
 770 /*
 771  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 772  * a #GP and return false.
 773  */
 774 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 775 {
 776         if (static_call(kvm_x86_get_cpl)(vcpu) <= required_cpl)
 777                 return true;
 778         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 779         return false;
 780 }
 781 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 782
 783 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 784 {
 785         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 786                 return true;
 787
 788         kvm_queue_exception(vcpu, UD_VECTOR);
 789         return false;
 790 }
 791 EXPORT_SYMBOL_GPL(kvm_require_dr);
 792
 793 static inline u64 pdptr_rsvd_bits(struct kvm_vcpu *vcpu)
 794 {
 795         return vcpu->arch.reserved_gpa_bits | rsvd_bits(5, 8) | rsvd_bits(1, 2);
 796 }
 797
 798 /*
 799  * Load the pae pdptrs.  Return 1 if they are all valid, 0 otherwise.
 800  */
 801 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 802 {
 803         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 804         gpa_t real_gpa;
 805         int i;
 806         int ret;
 807         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 808
 809         /*
 810          * If the MMU is nested, CR3 holds an L2 GPA and needs to be translated
 811          * to an L1 GPA.
 812          */
 813         real_gpa = mmu->translate_gpa(vcpu, gfn_to_gpa(pdpt_gfn),
 814                                       PFERR_USER_MASK | PFERR_WRITE_MASK, NULL);
 815         if (real_gpa == UNMAPPED_GVA)
 816                 return 0;
 817
 818         /* Note the offset, PDPTRs are 32 byte aligned when using PAE paging. */
 819         ret = kvm_vcpu_read_guest_page(vcpu, gpa_to_gfn(real_gpa), pdpte,
 820                                        cr3 & GENMASK(11, 5), sizeof(pdpte));
 821         if (ret < 0)
 822                 return 0;
 823
 824         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 825                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 826                     (pdpte[i] & pdptr_rsvd_bits(vcpu))) {
 827                         return 0;
 828                 }
 829         }
 830
 831         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 832         kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
 833         vcpu->arch.pdptrs_from_userspace = false;
 834
 835         return 1;
 836 }
 837 EXPORT_SYMBOL_GPL(load_pdptrs);
 838
 839 void kvm_post_set_cr0(struct kvm_vcpu *vcpu, unsigned long old_cr0, unsigned long cr0)
 840 {
 841         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 842                 kvm_clear_async_pf_completion_queue(vcpu);
 843                 kvm_async_pf_hash_reset(vcpu);
 844         }
 845
 846         if ((cr0 ^ old_cr0) & KVM_MMU_CR0_ROLE_BITS)
 847                 kvm_mmu_reset_context(vcpu);
 848
 849         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 850             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 851             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 852                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 853 }
 854 EXPORT_SYMBOL_GPL(kvm_post_set_cr0);
 855
 856 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 857 {
 858         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 859         unsigned long pdptr_bits = X86_CR0_CD | X86_CR0_NW | X86_CR0_PG;
 860
 861         cr0 |= X86_CR0_ET;
 862
 863 #ifdef CONFIG_X86_64
 864         if (cr0 & 0xffffffff00000000UL)
 865                 return 1;
 866 #endif
 867
 868         cr0 &= ~CR0_RESERVED_BITS;
 869
 870         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 871                 return 1;
 872
 873         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 874                 return 1;
 875
 876 #ifdef CONFIG_X86_64
 877         if ((vcpu->arch.efer & EFER_LME) && !is_paging(vcpu) &&
 878             (cr0 & X86_CR0_PG)) {
 879                 int cs_db, cs_l;
 880
 881                 if (!is_pae(vcpu))
 882                         return 1;
 883                 static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
 884                 if (cs_l)
 885                         return 1;
 886         }
 887 #endif
 888         if (!(vcpu->arch.efer & EFER_LME) && (cr0 & X86_CR0_PG) &&
 889             is_pae(vcpu) && ((cr0 ^ old_cr0) & pdptr_bits) &&
 890             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu)))
 891                 return 1;
 892
 893         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 894                 return 1;
 895
 896         static_call(kvm_x86_set_cr0)(vcpu, cr0);
 897
 898         kvm_post_set_cr0(vcpu, old_cr0, cr0);
 899
 900         return 0;
 901 }
 902 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 903
 904 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 905 {
 906         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 907 }
 908 EXPORT_SYMBOL_GPL(kvm_lmsw);
 909
 910 void kvm_load_guest_xsave_state(struct kvm_vcpu *vcpu)
 911 {
 912         if (vcpu->arch.guest_state_protected)
 913                 return;
 914
 915         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 916
 917                 if (vcpu->arch.xcr0 != host_xcr0)
 918                         xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 919
 920                 if (vcpu->arch.xsaves_enabled &&
 921                     vcpu->arch.ia32_xss != host_xss)
 922                         wrmsrl(MSR_IA32_XSS, vcpu->arch.ia32_xss);
 923         }
 924
 925         if (static_cpu_has(X86_FEATURE_PKU) &&
 926             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 927              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU)) &&
 928             vcpu->arch.pkru != vcpu->arch.host_pkru)
 929                 write_pkru(vcpu->arch.pkru);
 930 }
 931 EXPORT_SYMBOL_GPL(kvm_load_guest_xsave_state);
 932
 933 void kvm_load_host_xsave_state(struct kvm_vcpu *vcpu)
 934 {
 935         if (vcpu->arch.guest_state_protected)
 936                 return;
 937
 938         if (static_cpu_has(X86_FEATURE_PKU) &&
 939             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 940              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU))) {
 941                 vcpu->arch.pkru = rdpkru();
 942                 if (vcpu->arch.pkru != vcpu->arch.host_pkru)
 943                         write_pkru(vcpu->arch.host_pkru);
 944         }
 945
 946         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 947
 948                 if (vcpu->arch.xcr0 != host_xcr0)
 949                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 950
 951                 if (vcpu->arch.xsaves_enabled &&
 952                     vcpu->arch.ia32_xss != host_xss)
 953                         wrmsrl(MSR_IA32_XSS, host_xss);
 954         }
 955
 956 }
 957 EXPORT_SYMBOL_GPL(kvm_load_host_xsave_state);
 958
 959 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 960 {
 961         u64 xcr0 = xcr;
 962         u64 old_xcr0 = vcpu->arch.xcr0;
 963         u64 valid_bits;
 964
 965         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 966         if (index != XCR_XFEATURE_ENABLED_MASK)
 967                 return 1;
 968         if (!(xcr0 & XFEATURE_MASK_FP))
 969                 return 1;
 970         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 971                 return 1;
 972
 973         /*
 974          * Do not allow the guest to set bits that we do not support
 975          * saving.  However, xcr0 bit 0 is always set, even if the
 976          * emulated CPU does not support XSAVE (see kvm_vcpu_reset()).
 977          */
 978         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 979         if (xcr0 & ~valid_bits)
 980                 return 1;
 981
 982         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 983             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 984                 return 1;
 985
 986         if (xcr0 & XFEATURE_MASK_AVX512) {
 987                 if (!(xcr0 & XFEATURE_MASK_YMM))
 988                         return 1;
 989                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
 990                         return 1;
 991         }
 992         vcpu->arch.xcr0 = xcr0;
 993
 994         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
 995                 kvm_update_cpuid_runtime(vcpu);
 996         return 0;
 997 }
 998
 999 int kvm_emulate_xsetbv(struct kvm_vcpu *vcpu)
1000 {
1001         if (static_call(kvm_x86_get_cpl)(vcpu) != 0 ||
1002             __kvm_set_xcr(vcpu, kvm_rcx_read(vcpu), kvm_read_edx_eax(vcpu))) {
1003                 kvm_inject_gp(vcpu, 0);
1004                 return 1;
1005         }
1006
1007         return kvm_skip_emulated_instruction(vcpu);
1008 }
1009 EXPORT_SYMBOL_GPL(kvm_emulate_xsetbv);
1010
1011 bool kvm_is_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1012 {
1013         if (cr4 & cr4_reserved_bits)
1014                 return false;
1015
1016         if (cr4 & vcpu->arch.cr4_guest_rsvd_bits)
1017                 return false;
1018
1019         return static_call(kvm_x86_is_valid_cr4)(vcpu, cr4);
1020 }
1021 EXPORT_SYMBOL_GPL(kvm_is_valid_cr4);
1022
1023 void kvm_post_set_cr4(struct kvm_vcpu *vcpu, unsigned long old_cr4, unsigned long cr4)
1024 {
1025         /*
1026          * If any role bit is changed, the MMU needs to be reset.
1027          *
1028          * If CR4.PCIDE is changed 1 -> 0, the guest TLB must be flushed.
1029          * If CR4.PCIDE is changed 0 -> 1, there is no need to flush the TLB
1030          * according to the SDM; however, stale prev_roots could be reused
1031          * incorrectly in the future after a MOV to CR3 with NOFLUSH=1, so we
1032          * free them all.  KVM_REQ_MMU_RELOAD is fit for the both cases; it
1033          * is slow, but changing CR4.PCIDE is a rare case.
1034          *
1035          * If CR4.PGE is changed, the guest TLB must be flushed.
1036          *
1037          * Note: resetting MMU is a superset of KVM_REQ_MMU_RELOAD and
1038          * KVM_REQ_MMU_RELOAD is a superset of KVM_REQ_TLB_FLUSH_GUEST, hence
1039          * the usage of "else if".
1040          */
1041         if ((cr4 ^ old_cr4) & KVM_MMU_CR4_ROLE_BITS)
1042                 kvm_mmu_reset_context(vcpu);
1043         else if ((cr4 ^ old_cr4) & X86_CR4_PCIDE)
1044                 kvm_make_request(KVM_REQ_MMU_RELOAD, vcpu);
1045         else if ((cr4 ^ old_cr4) & X86_CR4_PGE)
1046                 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
1047 }
1048 EXPORT_SYMBOL_GPL(kvm_post_set_cr4);
1049
1050 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1051 {
1052         unsigned long old_cr4 = kvm_read_cr4(vcpu);
1053         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
1054                                    X86_CR4_SMEP;
1055
1056         if (!kvm_is_valid_cr4(vcpu, cr4))
1057                 return 1;
1058
1059         if (is_long_mode(vcpu)) {
1060                 if (!(cr4 & X86_CR4_PAE))
1061                         return 1;
1062                 if ((cr4 ^ old_cr4) & X86_CR4_LA57)
1063                         return 1;
1064         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
1065                    && ((cr4 ^ old_cr4) & pdptr_bits)
1066                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
1067                                    kvm_read_cr3(vcpu)))
1068                 return 1;
1069
1070         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
1071                 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
1072                         return 1;
1073
1074                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
1075                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
1076                         return 1;
1077         }
1078
1079         static_call(kvm_x86_set_cr4)(vcpu, cr4);
1080
1081         kvm_post_set_cr4(vcpu, old_cr4, cr4);
1082
1083         return 0;
1084 }
1085 EXPORT_SYMBOL_GPL(kvm_set_cr4);
1086
1087 static void kvm_invalidate_pcid(struct kvm_vcpu *vcpu, unsigned long pcid)
1088 {
1089         struct kvm_mmu *mmu = vcpu->arch.mmu;
1090         unsigned long roots_to_free = 0;
1091         int i;
1092
1093         /*
1094          * MOV CR3 and INVPCID are usually not intercepted when using TDP, but
1095          * this is reachable when running EPT=1 and unrestricted_guest=0,  and
1096          * also via the emulator.  KVM's TDP page tables are not in the scope of
1097          * the invalidation, but the guest's TLB entries need to be flushed as
1098          * the CPU may have cached entries in its TLB for the target PCID.
1099          */
1100         if (unlikely(tdp_enabled)) {
1101                 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
1102                 return;
1103         }
1104
1105         /*
1106          * If neither the current CR3 nor any of the prev_roots use the given
1107          * PCID, then nothing needs to be done here because a resync will
1108          * happen anyway before switching to any other CR3.
1109          */
1110         if (kvm_get_active_pcid(vcpu) == pcid) {
1111                 kvm_make_request(KVM_REQ_MMU_SYNC, vcpu);
1112                 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
1113         }
1114
1115         /*
1116          * If PCID is disabled, there is no need to free prev_roots even if the
1117          * PCIDs for them are also 0, because MOV to CR3 always flushes the TLB
1118          * with PCIDE=0.
1119          */
1120         if (!kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
1121                 return;
1122
1123         for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
1124                 if (kvm_get_pcid(vcpu, mmu->prev_roots[i].pgd) == pcid)
1125                         roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i);
1126
1127         kvm_mmu_free_roots(vcpu, mmu, roots_to_free);
1128 }
1129
1130 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
1131 {
1132         bool skip_tlb_flush = false;
1133         unsigned long pcid = 0;
1134 #ifdef CONFIG_X86_64
1135         bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
1136
1137         if (pcid_enabled) {
1138                 skip_tlb_flush = cr3 & X86_CR3_PCID_NOFLUSH;
1139                 cr3 &= ~X86_CR3_PCID_NOFLUSH;
1140                 pcid = cr3 & X86_CR3_PCID_MASK;
1141         }
1142 #endif
1143
1144         /* PDPTRs are always reloaded for PAE paging. */
1145         if (cr3 == kvm_read_cr3(vcpu) && !is_pae_paging(vcpu))
1146                 goto handle_tlb_flush;
1147
1148         /*
1149          * Do not condition the GPA check on long mode, this helper is used to
1150          * stuff CR3, e.g. for RSM emulation, and there is no guarantee that
1151          * the current vCPU mode is accurate.
1152          */
1153         if (kvm_vcpu_is_illegal_gpa(vcpu, cr3))
1154                 return 1;
1155
1156         if (is_pae_paging(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
1157                 return 1;
1158
1159         if (cr3 != kvm_read_cr3(vcpu))
1160                 kvm_mmu_new_pgd(vcpu, cr3);
1161
1162         vcpu->arch.cr3 = cr3;
1163         kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
1164
1165 handle_tlb_flush:
1166         /*
1167          * A load of CR3 that flushes the TLB flushes only the current PCID,
1168          * even if PCID is disabled, in which case PCID=0 is flushed.  It's a
1169          * moot point in the end because _disabling_ PCID will flush all PCIDs,
1170          * and it's impossible to use a non-zero PCID when PCID is disabled,
1171          * i.e. only PCID=0 can be relevant.
1172          */
1173         if (!skip_tlb_flush)
1174                 kvm_invalidate_pcid(vcpu, pcid);
1175
1176         return 0;
1177 }
1178 EXPORT_SYMBOL_GPL(kvm_set_cr3);
1179
1180 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
1181 {
1182         if (cr8 & CR8_RESERVED_BITS)
1183                 return 1;
1184         if (lapic_in_kernel(vcpu))
1185                 kvm_lapic_set_tpr(vcpu, cr8);
1186         else
1187                 vcpu->arch.cr8 = cr8;
1188         return 0;
1189 }
1190 EXPORT_SYMBOL_GPL(kvm_set_cr8);
1191
1192 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
1193 {
1194         if (lapic_in_kernel(vcpu))
1195                 return kvm_lapic_get_cr8(vcpu);
1196         else
1197                 return vcpu->arch.cr8;
1198 }
1199 EXPORT_SYMBOL_GPL(kvm_get_cr8);
1200
1201 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
1202 {
1203         int i;
1204
1205         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
1206                 for (i = 0; i < KVM_NR_DB_REGS; i++)
1207                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
1208         }
1209 }
1210
1211 void kvm_update_dr7(struct kvm_vcpu *vcpu)
1212 {
1213         unsigned long dr7;
1214
1215         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1216                 dr7 = vcpu->arch.guest_debug_dr7;
1217         else
1218                 dr7 = vcpu->arch.dr7;
1219         static_call(kvm_x86_set_dr7)(vcpu, dr7);
1220         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
1221         if (dr7 & DR7_BP_EN_MASK)
1222                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
1223 }
1224 EXPORT_SYMBOL_GPL(kvm_update_dr7);
1225
1226 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
1227 {
1228         u64 fixed = DR6_FIXED_1;
1229
1230         if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
1231                 fixed |= DR6_RTM;
1232
1233         if (!guest_cpuid_has(vcpu, X86_FEATURE_BUS_LOCK_DETECT))
1234                 fixed |= DR6_BUS_LOCK;
1235         return fixed;
1236 }
1237
1238 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1239 {
1240         size_t size = ARRAY_SIZE(vcpu->arch.db);
1241
1242         switch (dr) {
1243         case 0 ... 3:
1244                 vcpu->arch.db[array_index_nospec(dr, size)] = val;
1245                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1246                         vcpu->arch.eff_db[dr] = val;
1247                 break;
1248         case 4:
1249         case 6:
1250                 if (!kvm_dr6_valid(val))
1251                         return 1; /* #GP */
1252                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
1253                 break;
1254         case 5:
1255         default: /* 7 */
1256                 if (!kvm_dr7_valid(val))
1257                         return 1; /* #GP */
1258                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
1259                 kvm_update_dr7(vcpu);
1260                 break;
1261         }
1262
1263         return 0;
1264 }
1265 EXPORT_SYMBOL_GPL(kvm_set_dr);
1266
1267 void kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
1268 {
1269         size_t size = ARRAY_SIZE(vcpu->arch.db);
1270
1271         switch (dr) {
1272         case 0 ... 3:
1273                 *val = vcpu->arch.db[array_index_nospec(dr, size)];
1274                 break;
1275         case 4:
1276         case 6:
1277                 *val = vcpu->arch.dr6;
1278                 break;
1279         case 5:
1280         default: /* 7 */
1281                 *val = vcpu->arch.dr7;
1282                 break;
1283         }
1284 }
1285 EXPORT_SYMBOL_GPL(kvm_get_dr);
1286
1287 int kvm_emulate_rdpmc(struct kvm_vcpu *vcpu)
1288 {
1289         u32 ecx = kvm_rcx_read(vcpu);
1290         u64 data;
1291
1292         if (kvm_pmu_rdpmc(vcpu, ecx, &data)) {
1293                 kvm_inject_gp(vcpu, 0);
1294                 return 1;
1295         }
1296
1297         kvm_rax_write(vcpu, (u32)data);
1298         kvm_rdx_write(vcpu, data >> 32);
1299         return kvm_skip_emulated_instruction(vcpu);
1300 }
1301 EXPORT_SYMBOL_GPL(kvm_emulate_rdpmc);
1302
1303 /*
1304  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1305  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1306  *
1307  * The three MSR lists(msrs_to_save, emulated_msrs, msr_based_features)
1308  * extract the supported MSRs from the related const lists.
1309  * msrs_to_save is selected from the msrs_to_save_all to reflect the
1310  * capabilities of the host cpu. This capabilities test skips MSRs that are
1311  * kvm-specific. Those are put in emulated_msrs_all; filtering of emulated_msrs
1312  * may depend on host virtualization features rather than host cpu features.
1313  */
1314
1315 static const u32 msrs_to_save_all[] = {
1316         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1317         MSR_STAR,
1318 #ifdef CONFIG_X86_64
1319         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1320 #endif
1321         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1322         MSR_IA32_FEAT_CTL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1323         MSR_IA32_SPEC_CTRL,
1324         MSR_IA32_RTIT_CTL, MSR_IA32_RTIT_STATUS, MSR_IA32_RTIT_CR3_MATCH,
1325         MSR_IA32_RTIT_OUTPUT_BASE, MSR_IA32_RTIT_OUTPUT_MASK,
1326         MSR_IA32_RTIT_ADDR0_A, MSR_IA32_RTIT_ADDR0_B,
1327         MSR_IA32_RTIT_ADDR1_A, MSR_IA32_RTIT_ADDR1_B,
1328         MSR_IA32_RTIT_ADDR2_A, MSR_IA32_RTIT_ADDR2_B,
1329         MSR_IA32_RTIT_ADDR3_A, MSR_IA32_RTIT_ADDR3_B,
1330         MSR_IA32_UMWAIT_CONTROL,
1331
1332         MSR_ARCH_PERFMON_FIXED_CTR0, MSR_ARCH_PERFMON_FIXED_CTR1,
1333         MSR_ARCH_PERFMON_FIXED_CTR0 + 2, MSR_ARCH_PERFMON_FIXED_CTR0 + 3,
1334         MSR_CORE_PERF_FIXED_CTR_CTRL, MSR_CORE_PERF_GLOBAL_STATUS,
1335         MSR_CORE_PERF_GLOBAL_CTRL, MSR_CORE_PERF_GLOBAL_OVF_CTRL,
1336         MSR_ARCH_PERFMON_PERFCTR0, MSR_ARCH_PERFMON_PERFCTR1,
1337         MSR_ARCH_PERFMON_PERFCTR0 + 2, MSR_ARCH_PERFMON_PERFCTR0 + 3,
1338         MSR_ARCH_PERFMON_PERFCTR0 + 4, MSR_ARCH_PERFMON_PERFCTR0 + 5,
1339         MSR_ARCH_PERFMON_PERFCTR0 + 6, MSR_ARCH_PERFMON_PERFCTR0 + 7,
1340         MSR_ARCH_PERFMON_PERFCTR0 + 8, MSR_ARCH_PERFMON_PERFCTR0 + 9,
1341         MSR_ARCH_PERFMON_PERFCTR0 + 10, MSR_ARCH_PERFMON_PERFCTR0 + 11,
1342         MSR_ARCH_PERFMON_PERFCTR0 + 12, MSR_ARCH_PERFMON_PERFCTR0 + 13,
1343         MSR_ARCH_PERFMON_PERFCTR0 + 14, MSR_ARCH_PERFMON_PERFCTR0 + 15,
1344         MSR_ARCH_PERFMON_PERFCTR0 + 16, MSR_ARCH_PERFMON_PERFCTR0 + 17,
1345         MSR_ARCH_PERFMON_EVENTSEL0, MSR_ARCH_PERFMON_EVENTSEL1,
1346         MSR_ARCH_PERFMON_EVENTSEL0 + 2, MSR_ARCH_PERFMON_EVENTSEL0 + 3,
1347         MSR_ARCH_PERFMON_EVENTSEL0 + 4, MSR_ARCH_PERFMON_EVENTSEL0 + 5,
1348         MSR_ARCH_PERFMON_EVENTSEL0 + 6, MSR_ARCH_PERFMON_EVENTSEL0 + 7,
1349         MSR_ARCH_PERFMON_EVENTSEL0 + 8, MSR_ARCH_PERFMON_EVENTSEL0 + 9,
1350         MSR_ARCH_PERFMON_EVENTSEL0 + 10, MSR_ARCH_PERFMON_EVENTSEL0 + 11,
1351         MSR_ARCH_PERFMON_EVENTSEL0 + 12, MSR_ARCH_PERFMON_EVENTSEL0 + 13,
1352         MSR_ARCH_PERFMON_EVENTSEL0 + 14, MSR_ARCH_PERFMON_EVENTSEL0 + 15,
1353         MSR_ARCH_PERFMON_EVENTSEL0 + 16, MSR_ARCH_PERFMON_EVENTSEL0 + 17,
1354
1355         MSR_K7_EVNTSEL0, MSR_K7_EVNTSEL1, MSR_K7_EVNTSEL2, MSR_K7_EVNTSEL3,
1356         MSR_K7_PERFCTR0, MSR_K7_PERFCTR1, MSR_K7_PERFCTR2, MSR_K7_PERFCTR3,
1357         MSR_F15H_PERF_CTL0, MSR_F15H_PERF_CTL1, MSR_F15H_PERF_CTL2,
1358         MSR_F15H_PERF_CTL3, MSR_F15H_PERF_CTL4, MSR_F15H_PERF_CTL5,
1359         MSR_F15H_PERF_CTR0, MSR_F15H_PERF_CTR1, MSR_F15H_PERF_CTR2,
1360         MSR_F15H_PERF_CTR3, MSR_F15H_PERF_CTR4, MSR_F15H_PERF_CTR5,
1361 };
1362
1363 static u32 msrs_to_save[ARRAY_SIZE(msrs_to_save_all)];
1364 static unsigned num_msrs_to_save;
1365
1366 static const u32 emulated_msrs_all[] = {
1367         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1368         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1369         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1370         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1371         HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1372         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1373         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1374         HV_X64_MSR_RESET,
1375         HV_X64_MSR_VP_INDEX,
1376         HV_X64_MSR_VP_RUNTIME,
1377         HV_X64_MSR_SCONTROL,
1378         HV_X64_MSR_STIMER0_CONFIG,
1379         HV_X64_MSR_VP_ASSIST_PAGE,
1380         HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1381         HV_X64_MSR_TSC_EMULATION_STATUS,
1382         HV_X64_MSR_SYNDBG_OPTIONS,
1383         HV_X64_MSR_SYNDBG_CONTROL, HV_X64_MSR_SYNDBG_STATUS,
1384         HV_X64_MSR_SYNDBG_SEND_BUFFER, HV_X64_MSR_SYNDBG_RECV_BUFFER,
1385         HV_X64_MSR_SYNDBG_PENDING_BUFFER,
1386
1387         MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1388         MSR_KVM_PV_EOI_EN, MSR_KVM_ASYNC_PF_INT, MSR_KVM_ASYNC_PF_ACK,
1389
1390         MSR_IA32_TSC_ADJUST,
1391         MSR_IA32_TSC_DEADLINE,
1392         MSR_IA32_ARCH_CAPABILITIES,
1393         MSR_IA32_PERF_CAPABILITIES,
1394         MSR_IA32_MISC_ENABLE,
1395         MSR_IA32_MCG_STATUS,
1396         MSR_IA32_MCG_CTL,
1397         MSR_IA32_MCG_EXT_CTL,
1398         MSR_IA32_SMBASE,
1399         MSR_SMI_COUNT,
1400         MSR_PLATFORM_INFO,
1401         MSR_MISC_FEATURES_ENABLES,
1402         MSR_AMD64_VIRT_SPEC_CTRL,
1403         MSR_AMD64_TSC_RATIO,
1404         MSR_IA32_POWER_CTL,
1405         MSR_IA32_UCODE_REV,
1406
1407         /*
1408          * The following list leaves out MSRs whose values are determined
1409          * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1410          * We always support the "true" VMX control MSRs, even if the host
1411          * processor does not, so I am putting these registers here rather
1412          * than in msrs_to_save_all.
1413          */
1414         MSR_IA32_VMX_BASIC,
1415         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1416         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1417         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1418         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1419         MSR_IA32_VMX_MISC,
1420         MSR_IA32_VMX_CR0_FIXED0,
1421         MSR_IA32_VMX_CR4_FIXED0,
1422         MSR_IA32_VMX_VMCS_ENUM,
1423         MSR_IA32_VMX_PROCBASED_CTLS2,
1424         MSR_IA32_VMX_EPT_VPID_CAP,
1425         MSR_IA32_VMX_VMFUNC,
1426
1427         MSR_K7_HWCR,
1428         MSR_KVM_POLL_CONTROL,
1429 };
1430
1431 static u32 emulated_msrs[ARRAY_SIZE(emulated_msrs_all)];
1432 static unsigned num_emulated_msrs;
1433
1434 /*
1435  * List of msr numbers which are used to expose MSR-based features that
1436  * can be used by a hypervisor to validate requested CPU features.
1437  */
1438 static const u32 msr_based_features_all[] = {
1439         MSR_IA32_VMX_BASIC,
1440         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1441         MSR_IA32_VMX_PINBASED_CTLS,
1442         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1443         MSR_IA32_VMX_PROCBASED_CTLS,
1444         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1445         MSR_IA32_VMX_EXIT_CTLS,
1446         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1447         MSR_IA32_VMX_ENTRY_CTLS,
1448         MSR_IA32_VMX_MISC,
1449         MSR_IA32_VMX_CR0_FIXED0,
1450         MSR_IA32_VMX_CR0_FIXED1,
1451         MSR_IA32_VMX_CR4_FIXED0,
1452         MSR_IA32_VMX_CR4_FIXED1,
1453         MSR_IA32_VMX_VMCS_ENUM,
1454         MSR_IA32_VMX_PROCBASED_CTLS2,
1455         MSR_IA32_VMX_EPT_VPID_CAP,
1456         MSR_IA32_VMX_VMFUNC,
1457
1458         MSR_F10H_DECFG,
1459         MSR_IA32_UCODE_REV,
1460         MSR_IA32_ARCH_CAPABILITIES,
1461         MSR_IA32_PERF_CAPABILITIES,
1462 };
1463
1464 static u32 msr_based_features[ARRAY_SIZE(msr_based_features_all)];
1465 static unsigned int num_msr_based_features;
1466
1467 static u64 kvm_get_arch_capabilities(void)
1468 {
1469         u64 data = 0;
1470
1471         if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES))
1472                 rdmsrl(MSR_IA32_ARCH_CAPABILITIES, data);
1473
1474         /*
1475          * If nx_huge_pages is enabled, KVM's shadow paging will ensure that
1476          * the nested hypervisor runs with NX huge pages.  If it is not,
1477          * L1 is anyway vulnerable to ITLB_MULTIHIT exploits from other
1478          * L1 guests, so it need not worry about its own (L2) guests.
1479          */
1480         data |= ARCH_CAP_PSCHANGE_MC_NO;
1481
1482         /*
1483          * If we're doing cache flushes (either "always" or "cond")
1484          * we will do one whenever the guest does a vmlaunch/vmresume.
1485          * If an outer hypervisor is doing the cache flush for us
1486          * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1487          * capability to the guest too, and if EPT is disabled we're not
1488          * vulnerable.  Overall, only VMENTER_L1D_FLUSH_NEVER will
1489          * require a nested hypervisor to do a flush of its own.
1490          */
1491         if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
1492                 data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;
1493
1494         if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN))
1495                 data |= ARCH_CAP_RDCL_NO;
1496         if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))
1497                 data |= ARCH_CAP_SSB_NO;
1498         if (!boot_cpu_has_bug(X86_BUG_MDS))
1499                 data |= ARCH_CAP_MDS_NO;
1500
1501         if (!boot_cpu_has(X86_FEATURE_RTM)) {
1502                 /*
1503                  * If RTM=0 because the kernel has disabled TSX, the host might
1504                  * have TAA_NO or TSX_CTRL.  Clear TAA_NO (the guest sees RTM=0
1505                  * and therefore knows that there cannot be TAA) but keep
1506                  * TSX_CTRL: some buggy userspaces leave it set on tsx=on hosts,
1507                  * and we want to allow migrating those guests to tsx=off hosts.
1508                  */
1509                 data &= ~ARCH_CAP_TAA_NO;
1510         } else if (!boot_cpu_has_bug(X86_BUG_TAA)) {
1511                 data |= ARCH_CAP_TAA_NO;
1512         } else {
1513                 /*
1514                  * Nothing to do here; we emulate TSX_CTRL if present on the
1515                  * host so the guest can choose between disabling TSX or
1516                  * using VERW to clear CPU buffers.
1517                  */
1518         }
1519
1520         return data;
1521 }
1522
1523 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1524 {
1525         switch (msr->index) {
1526         case MSR_IA32_ARCH_CAPABILITIES:
1527                 msr->data = kvm_get_arch_capabilities();
1528                 break;
1529         case MSR_IA32_UCODE_REV:
1530                 rdmsrl_safe(msr->index, &msr->data);
1531                 break;
1532         default:
1533                 return static_call(kvm_x86_get_msr_feature)(msr);
1534         }
1535         return 0;
1536 }
1537
1538 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1539 {
1540         struct kvm_msr_entry msr;
1541         int r;
1542
1543         msr.index = index;
1544         r = kvm_get_msr_feature(&msr);
1545
1546         if (r == KVM_MSR_RET_INVALID) {
1547                 /* Unconditionally clear the output for simplicity */
1548                 *data = 0;
1549                 if (kvm_msr_ignored_check(index, 0, false))
1550                         r = 0;
1551         }
1552
1553         if (r)
1554                 return r;
1555
1556         *data = msr.data;
1557
1558         return 0;
1559 }
1560
1561 static bool __kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1562 {
1563         if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1564                 return false;
1565
1566         if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1567                 return false;
1568
1569         if (efer & (EFER_LME | EFER_LMA) &&
1570             !guest_cpuid_has(vcpu, X86_FEATURE_LM))
1571                 return false;
1572
1573         if (efer & EFER_NX && !guest_cpuid_has(vcpu, X86_FEATURE_NX))
1574                 return false;
1575
1576         return true;
1577
1578 }
1579 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1580 {
1581         if (efer & efer_reserved_bits)
1582                 return false;
1583
1584         return __kvm_valid_efer(vcpu, efer);
1585 }
1586 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1587
1588 static int set_efer(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1589 {
1590         u64 old_efer = vcpu->arch.efer;
1591         u64 efer = msr_info->data;
1592         int r;
1593
1594         if (efer & efer_reserved_bits)
1595                 return 1;
1596
1597         if (!msr_info->host_initiated) {
1598                 if (!__kvm_valid_efer(vcpu, efer))
1599                         return 1;
1600
1601                 if (is_paging(vcpu) &&
1602                     (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1603                         return 1;
1604         }
1605
1606         efer &= ~EFER_LMA;
1607         efer |= vcpu->arch.efer & EFER_LMA;
1608
1609         r = static_call(kvm_x86_set_efer)(vcpu, efer);
1610         if (r) {
1611                 WARN_ON(r > 0);
1612                 return r;
1613         }
1614
1615         /* Update reserved bits */
1616         if ((efer ^ old_efer) & EFER_NX)
1617                 kvm_mmu_reset_context(vcpu);
1618
1619         return 0;
1620 }
1621
1622 void kvm_enable_efer_bits(u64 mask)
1623 {
1624        efer_reserved_bits &= ~mask;
1625 }
1626 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1627
1628 bool kvm_msr_allowed(struct kvm_vcpu *vcpu, u32 index, u32 type)
1629 {
1630         struct kvm_x86_msr_filter *msr_filter;
1631         struct msr_bitmap_range *ranges;
1632         struct kvm *kvm = vcpu->kvm;
1633         bool allowed;
1634         int idx;
1635         u32 i;
1636
1637         /* x2APIC MSRs do not support filtering. */
1638         if (index >= 0x800 && index <= 0x8ff)
1639                 return true;
1640
1641         idx = srcu_read_lock(&kvm->srcu);
1642
1643         msr_filter = srcu_dereference(kvm->arch.msr_filter, &kvm->srcu);
1644         if (!msr_filter) {
1645                 allowed = true;
1646                 goto out;
1647         }
1648
1649         allowed = msr_filter->default_allow;
1650         ranges = msr_filter->ranges;
1651
1652         for (i = 0; i < msr_filter->count; i++) {
1653                 u32 start = ranges[i].base;
1654                 u32 end = start + ranges[i].nmsrs;
1655                 u32 flags = ranges[i].flags;
1656                 unsigned long *bitmap = ranges[i].bitmap;
1657
1658                 if ((index >= start) && (index < end) && (flags & type)) {
1659                         allowed = !!test_bit(index - start, bitmap);
1660                         break;
1661                 }
1662         }
1663
1664 out:
1665         srcu_read_unlock(&kvm->srcu, idx);
1666
1667         return allowed;
1668 }
1669 EXPORT_SYMBOL_GPL(kvm_msr_allowed);
1670
1671 /*
1672  * Write @data into the MSR specified by @index.  Select MSR specific fault
1673  * checks are bypassed if @host_initiated is %true.
1674  * Returns 0 on success, non-0 otherwise.
1675  * Assumes vcpu_load() was already called.
1676  */
1677 static int __kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data,
1678                          bool host_initiated)
1679 {
1680         struct msr_data msr;
1681
1682         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_WRITE))
1683                 return KVM_MSR_RET_FILTERED;
1684
1685         switch (index) {
1686         case MSR_FS_BASE:
1687         case MSR_GS_BASE:
1688         case MSR_KERNEL_GS_BASE:
1689         case MSR_CSTAR:
1690         case MSR_LSTAR:
1691                 if (is_noncanonical_address(data, vcpu))
1692                         return 1;
1693                 break;
1694         case MSR_IA32_SYSENTER_EIP:
1695         case MSR_IA32_SYSENTER_ESP:
1696                 /*
1697                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1698                  * non-canonical address is written on Intel but not on
1699                  * AMD (which ignores the top 32-bits, because it does
1700                  * not implement 64-bit SYSENTER).
1701                  *
1702                  * 64-bit code should hence be able to write a non-canonical
1703                  * value on AMD.  Making the address canonical ensures that
1704                  * vmentry does not fail on Intel after writing a non-canonical
1705                  * value, and that something deterministic happens if the guest
1706                  * invokes 64-bit SYSENTER.
1707                  */
1708                 data = get_canonical(data, vcpu_virt_addr_bits(vcpu));
1709                 break;
1710         case MSR_TSC_AUX:
1711                 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX))
1712                         return 1;
1713
1714                 if (!host_initiated &&
1715                     !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP) &&
1716                     !guest_cpuid_has(vcpu, X86_FEATURE_RDPID))
1717                         return 1;
1718
1719                 /*
1720                  * Per Intel's SDM, bits 63:32 are reserved, but AMD's APM has
1721                  * incomplete and conflicting architectural behavior.  Current
1722                  * AMD CPUs completely ignore bits 63:32, i.e. they aren't
1723                  * reserved and always read as zeros.  Enforce Intel's reserved
1724                  * bits check if and only if the guest CPU is Intel, and clear
1725                  * the bits in all other cases.  This ensures cross-vendor
1726                  * migration will provide consistent behavior for the guest.
1727                  */
1728                 if (guest_cpuid_is_intel(vcpu) && (data >> 32) != 0)
1729                         return 1;
1730
1731                 data = (u32)data;
1732                 break;
1733         }
1734
1735         msr.data = data;
1736         msr.index = index;
1737         msr.host_initiated = host_initiated;
1738
1739         return static_call(kvm_x86_set_msr)(vcpu, &msr);
1740 }
1741
1742 static int kvm_set_msr_ignored_check(struct kvm_vcpu *vcpu,
1743                                      u32 index, u64 data, bool host_initiated)
1744 {
1745         int ret = __kvm_set_msr(vcpu, index, data, host_initiated);
1746
1747         if (ret == KVM_MSR_RET_INVALID)
1748                 if (kvm_msr_ignored_check(index, data, true))
1749                         ret = 0;
1750
1751         return ret;
1752 }
1753
1754 /*
1755  * Read the MSR specified by @index into @data.  Select MSR specific fault
1756  * checks are bypassed if @host_initiated is %true.
1757  * Returns 0 on success, non-0 otherwise.
1758  * Assumes vcpu_load() was already called.
1759  */
1760 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data,
1761                   bool host_initiated)
1762 {
1763         struct msr_data msr;
1764         int ret;
1765
1766         if (!host_initiated && !kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_READ))
1767                 return KVM_MSR_RET_FILTERED;
1768
1769         switch (index) {
1770         case MSR_TSC_AUX:
1771                 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX))
1772                         return 1;
1773
1774                 if (!host_initiated &&
1775                     !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP) &&
1776                     !guest_cpuid_has(vcpu, X86_FEATURE_RDPID))
1777                         return 1;
1778                 break;
1779         }
1780
1781         msr.index = index;
1782         msr.host_initiated = host_initiated;
1783
1784         ret = static_call(kvm_x86_get_msr)(vcpu, &msr);
1785         if (!ret)
1786                 *data = msr.data;
1787         return ret;
1788 }
1789
1790 static int kvm_get_msr_ignored_check(struct kvm_vcpu *vcpu,
1791                                      u32 index, u64 *data, bool host_initiated)
1792 {
1793         int ret = __kvm_get_msr(vcpu, index, data, host_initiated);
1794
1795         if (ret == KVM_MSR_RET_INVALID) {
1796                 /* Unconditionally clear *data for simplicity */
1797                 *data = 0;
1798                 if (kvm_msr_ignored_check(index, 0, false))
1799                         ret = 0;
1800         }
1801
1802         return ret;
1803 }
1804
1805 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data)
1806 {
1807         return kvm_get_msr_ignored_check(vcpu, index, data, false);
1808 }
1809 EXPORT_SYMBOL_GPL(kvm_get_msr);
1810
1811 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data)
1812 {
1813         return kvm_set_msr_ignored_check(vcpu, index, data, false);
1814 }
1815 EXPORT_SYMBOL_GPL(kvm_set_msr);
1816
1817 static int complete_emulated_rdmsr(struct kvm_vcpu *vcpu)
1818 {
1819         int err = vcpu->run->msr.error;
1820         if (!err) {
1821                 kvm_rax_write(vcpu, (u32)vcpu->run->msr.data);
1822                 kvm_rdx_write(vcpu, vcpu->run->msr.data >> 32);
1823         }
1824
1825         return static_call(kvm_x86_complete_emulated_msr)(vcpu, err);
1826 }
1827
1828 static int complete_emulated_wrmsr(struct kvm_vcpu *vcpu)
1829 {
1830         return static_call(kvm_x86_complete_emulated_msr)(vcpu, vcpu->run->msr.error);
1831 }
1832
1833 static u64 kvm_msr_reason(int r)
1834 {
1835         switch (r) {
1836         case KVM_MSR_RET_INVALID:
1837                 return KVM_MSR_EXIT_REASON_UNKNOWN;
1838         case KVM_MSR_RET_FILTERED:
1839                 return KVM_MSR_EXIT_REASON_FILTER;
1840         default:
1841                 return KVM_MSR_EXIT_REASON_INVAL;
1842         }
1843 }
1844
1845 static int kvm_msr_user_space(struct kvm_vcpu *vcpu, u32 index,
1846                               u32 exit_reason, u64 data,
1847                               int (*completion)(struct kvm_vcpu *vcpu),
1848                               int r)
1849 {
1850         u64 msr_reason = kvm_msr_reason(r);
1851
1852         /* Check if the user wanted to know about this MSR fault */
1853         if (!(vcpu->kvm->arch.user_space_msr_mask & msr_reason))
1854                 return 0;
1855
1856         vcpu->run->exit_reason = exit_reason;
1857         vcpu->run->msr.error = 0;
1858         memset(vcpu->run->msr.pad, 0, sizeof(vcpu->run->msr.pad));
1859         vcpu->run->msr.reason = msr_reason;
1860         vcpu->run->msr.index = index;
1861         vcpu->run->msr.data = data;
1862         vcpu->arch.complete_userspace_io = completion;
1863
1864         return 1;
1865 }
1866
1867 static int kvm_get_msr_user_space(struct kvm_vcpu *vcpu, u32 index, int r)
1868 {
1869         return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_RDMSR, 0,
1870                                    complete_emulated_rdmsr, r);
1871 }
1872
1873 static int kvm_set_msr_user_space(struct kvm_vcpu *vcpu, u32 index, u64 data, int r)
1874 {
1875         return kvm_msr_user_space(vcpu, index, KVM_EXIT_X86_WRMSR, data,
1876                                    complete_emulated_wrmsr, r);
1877 }
1878
1879 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu)
1880 {
1881         u32 ecx = kvm_rcx_read(vcpu);
1882         u64 data;
1883         int r;
1884
1885         r = kvm_get_msr(vcpu, ecx, &data);
1886
1887         /* MSR read failed? See if we should ask user space */
1888         if (r && kvm_get_msr_user_space(vcpu, ecx, r)) {
1889                 /* Bounce to user space */
1890                 return 0;
1891         }
1892
1893         if (!r) {
1894                 trace_kvm_msr_read(ecx, data);
1895
1896                 kvm_rax_write(vcpu, data & -1u);
1897                 kvm_rdx_write(vcpu, (data >> 32) & -1u);
1898         } else {
1899                 trace_kvm_msr_read_ex(ecx);
1900         }
1901
1902         return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
1903 }
1904 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr);
1905
1906 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu)
1907 {
1908         u32 ecx = kvm_rcx_read(vcpu);
1909         u64 data = kvm_read_edx_eax(vcpu);
1910         int r;
1911
1912         r = kvm_set_msr(vcpu, ecx, data);
1913
1914         /* MSR write failed? See if we should ask user space */
1915         if (r && kvm_set_msr_user_space(vcpu, ecx, data, r))
1916                 /* Bounce to user space */
1917                 return 0;
1918
1919         /* Signal all other negative errors to userspace */
1920         if (r < 0)
1921                 return r;
1922
1923         if (!r)
1924                 trace_kvm_msr_write(ecx, data);
1925         else
1926                 trace_kvm_msr_write_ex(ecx, data);
1927
1928         return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
1929 }
1930 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr);
1931
1932 int kvm_emulate_as_nop(struct kvm_vcpu *vcpu)
1933 {
1934         return kvm_skip_emulated_instruction(vcpu);
1935 }
1936 EXPORT_SYMBOL_GPL(kvm_emulate_as_nop);
1937
1938 int kvm_emulate_invd(struct kvm_vcpu *vcpu)
1939 {
1940         /* Treat an INVD instruction as a NOP and just skip it. */
1941         return kvm_emulate_as_nop(vcpu);
1942 }
1943 EXPORT_SYMBOL_GPL(kvm_emulate_invd);
1944
1945 int kvm_emulate_mwait(struct kvm_vcpu *vcpu)
1946 {
1947         pr_warn_once("kvm: MWAIT instruction emulated as NOP!\n");
1948         return kvm_emulate_as_nop(vcpu);
1949 }
1950 EXPORT_SYMBOL_GPL(kvm_emulate_mwait);
1951
1952 int kvm_handle_invalid_op(struct kvm_vcpu *vcpu)
1953 {
1954         kvm_queue_exception(vcpu, UD_VECTOR);
1955         return 1;
1956 }
1957 EXPORT_SYMBOL_GPL(kvm_handle_invalid_op);
1958
1959 int kvm_emulate_monitor(struct kvm_vcpu *vcpu)
1960 {
1961         pr_warn_once("kvm: MONITOR instruction emulated as NOP!\n");
1962         return kvm_emulate_as_nop(vcpu);
1963 }
1964 EXPORT_SYMBOL_GPL(kvm_emulate_monitor);
1965
1966 static inline bool kvm_vcpu_exit_request(struct kvm_vcpu *vcpu)
1967 {
1968         xfer_to_guest_mode_prepare();
1969         return vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu) ||
1970                 xfer_to_guest_mode_work_pending();
1971 }
1972
1973 /*
1974  * The fast path for frequent and performance sensitive wrmsr emulation,
1975  * i.e. the sending of IPI, sending IPI early in the VM-Exit flow reduces
1976  * the latency of virtual IPI by avoiding the expensive bits of transitioning
1977  * from guest to host, e.g. reacquiring KVM's SRCU lock. In contrast to the
1978  * other cases which must be called after interrupts are enabled on the host.
1979  */
1980 static int handle_fastpath_set_x2apic_icr_irqoff(struct kvm_vcpu *vcpu, u64 data)
1981 {
1982         if (!lapic_in_kernel(vcpu) || !apic_x2apic_mode(vcpu->arch.apic))
1983                 return 1;
1984
1985         if (((data & APIC_SHORT_MASK) == APIC_DEST_NOSHORT) &&
1986                 ((data & APIC_DEST_MASK) == APIC_DEST_PHYSICAL) &&
1987                 ((data & APIC_MODE_MASK) == APIC_DM_FIXED) &&
1988                 ((u32)(data >> 32) != X2APIC_BROADCAST)) {
1989
1990                 data &= ~(1 << 12);
1991                 kvm_apic_send_ipi(vcpu->arch.apic, (u32)data, (u32)(data >> 32));
1992                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR2, (u32)(data >> 32));
1993                 kvm_lapic_set_reg(vcpu->arch.apic, APIC_ICR, (u32)data);
1994                 trace_kvm_apic_write(APIC_ICR, (u32)data);
1995                 return 0;
1996         }
1997
1998         return 1;
1999 }
2000
2001 static int handle_fastpath_set_tscdeadline(struct kvm_vcpu *vcpu, u64 data)
2002 {
2003         if (!kvm_can_use_hv_timer(vcpu))
2004                 return 1;
2005
2006         kvm_set_lapic_tscdeadline_msr(vcpu, data);
2007         return 0;
2008 }
2009
2010 fastpath_t handle_fastpath_set_msr_irqoff(struct kvm_vcpu *vcpu)
2011 {
2012         u32 msr = kvm_rcx_read(vcpu);
2013         u64 data;
2014         fastpath_t ret = EXIT_FASTPATH_NONE;
2015
2016         switch (msr) {
2017         case APIC_BASE_MSR + (APIC_ICR >> 4):
2018                 data = kvm_read_edx_eax(vcpu);
2019                 if (!handle_fastpath_set_x2apic_icr_irqoff(vcpu, data)) {
2020                         kvm_skip_emulated_instruction(vcpu);
2021                         ret = EXIT_FASTPATH_EXIT_HANDLED;
2022                 }
2023                 break;
2024         case MSR_IA32_TSC_DEADLINE:
2025                 data = kvm_read_edx_eax(vcpu);
2026                 if (!handle_fastpath_set_tscdeadline(vcpu, data)) {
2027                         kvm_skip_emulated_instruction(vcpu);
2028                         ret = EXIT_FASTPATH_REENTER_GUEST;
2029                 }
2030                 break;
2031         default:
2032                 break;
2033         }
2034
2035         if (ret != EXIT_FASTPATH_NONE)
2036                 trace_kvm_msr_write(msr, data);
2037
2038         return ret;
2039 }
2040 EXPORT_SYMBOL_GPL(handle_fastpath_set_msr_irqoff);
2041
2042 /*
2043  * Adapt set_msr() to msr_io()'s calling convention
2044  */
2045 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
2046 {
2047         return kvm_get_msr_ignored_check(vcpu, index, data, true);
2048 }
2049
2050 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
2051 {
2052         return kvm_set_msr_ignored_check(vcpu, index, *data, true);
2053 }
2054
2055 #ifdef CONFIG_X86_64
2056 struct pvclock_clock {
2057         int vclock_mode;
2058         u64 cycle_last;
2059         u64 mask;
2060         u32 mult;
2061         u32 shift;
2062         u64 base_cycles;
2063         u64 offset;
2064 };
2065
2066 struct pvclock_gtod_data {
2067         seqcount_t      seq;
2068
2069         struct pvclock_clock clock; /* extract of a clocksource struct */
2070         struct pvclock_clock raw_clock; /* extract of a clocksource struct */
2071
2072         ktime_t         offs_boot;
2073         u64             wall_time_sec;
2074 };
2075
2076 static struct pvclock_gtod_data pvclock_gtod_data;
2077
2078 static void update_pvclock_gtod(struct timekeeper *tk)
2079 {
2080         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
2081
2082         write_seqcount_begin(&vdata->seq);
2083
2084         /* copy pvclock gtod data */
2085         vdata->clock.vclock_mode        = tk->tkr_mono.clock->vdso_clock_mode;
2086         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
2087         vdata->clock.mask               = tk->tkr_mono.mask;
2088         vdata->clock.mult               = tk->tkr_mono.mult;
2089         vdata->clock.shift              = tk->tkr_mono.shift;
2090         vdata->clock.base_cycles        = tk->tkr_mono.xtime_nsec;
2091         vdata->clock.offset             = tk->tkr_mono.base;
2092
2093         vdata->raw_clock.vclock_mode    = tk->tkr_raw.clock->vdso_clock_mode;
2094         vdata->raw_clock.cycle_last     = tk->tkr_raw.cycle_last;
2095         vdata->raw_clock.mask           = tk->tkr_raw.mask;
2096         vdata->raw_clock.mult           = tk->tkr_raw.mult;
2097         vdata->raw_clock.shift          = tk->tkr_raw.shift;
2098         vdata->raw_clock.base_cycles    = tk->tkr_raw.xtime_nsec;
2099         vdata->raw_clock.offset         = tk->tkr_raw.base;
2100
2101         vdata->wall_time_sec            = tk->xtime_sec;
2102
2103         vdata->offs_boot                = tk->offs_boot;
2104
2105         write_seqcount_end(&vdata->seq);
2106 }
2107
2108 static s64 get_kvmclock_base_ns(void)
2109 {
2110         /* Count up from boot time, but with the frequency of the raw clock.  */
2111         return ktime_to_ns(ktime_add(ktime_get_raw(), pvclock_gtod_data.offs_boot));
2112 }
2113 #else
2114 static s64 get_kvmclock_base_ns(void)
2115 {
2116         /* Master clock not used, so we can just use CLOCK_BOOTTIME.  */
2117         return ktime_get_boottime_ns();
2118 }
2119 #endif
2120
2121 void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock, int sec_hi_ofs)
2122 {
2123         int version;
2124         int r;
2125         struct pvclock_wall_clock wc;
2126         u32 wc_sec_hi;
2127         u64 wall_nsec;
2128
2129         if (!wall_clock)
2130                 return;
2131
2132         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
2133         if (r)
2134                 return;
2135
2136         if (version & 1)
2137                 ++version;  /* first time write, random junk */
2138
2139         ++version;
2140
2141         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
2142                 return;
2143
2144         /*
2145          * The guest calculates current wall clock time by adding
2146          * system time (updated by kvm_guest_time_update below) to the
2147          * wall clock specified here.  We do the reverse here.
2148          */
2149         wall_nsec = ktime_get_real_ns() - get_kvmclock_ns(kvm);
2150
2151         wc.nsec = do_div(wall_nsec, 1000000000);
2152         wc.sec = (u32)wall_nsec; /* overflow in 2106 guest time */
2153         wc.version = version;
2154
2155         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
2156
2157         if (sec_hi_ofs) {
2158                 wc_sec_hi = wall_nsec >> 32;
2159                 kvm_write_guest(kvm, wall_clock + sec_hi_ofs,
2160                                 &wc_sec_hi, sizeof(wc_sec_hi));
2161         }
2162
2163         version++;
2164         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
2165 }
2166
2167 static void kvm_write_system_time(struct kvm_vcpu *vcpu, gpa_t system_time,
2168                                   bool old_msr, bool host_initiated)
2169 {
2170         struct kvm_arch *ka = &vcpu->kvm->arch;
2171
2172         if (vcpu->vcpu_id == 0 && !host_initiated) {
2173                 if (ka->boot_vcpu_runs_old_kvmclock != old_msr)
2174                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2175
2176                 ka->boot_vcpu_runs_old_kvmclock = old_msr;
2177         }
2178
2179         vcpu->arch.time = system_time;
2180         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2181
2182         /* we verify if the enable bit is set... */
2183         vcpu->arch.pv_time_enabled = false;
2184         if (!(system_time & 1))
2185                 return;
2186
2187         if (!kvm_gfn_to_hva_cache_init(vcpu->kvm,
2188                                        &vcpu->arch.pv_time, system_time & ~1ULL,
2189                                        sizeof(struct pvclock_vcpu_time_info)))
2190                 vcpu->arch.pv_time_enabled = true;
2191
2192         return;
2193 }
2194
2195 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
2196 {
2197         do_shl32_div32(dividend, divisor);
2198         return dividend;
2199 }
2200
2201 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
2202                                s8 *pshift, u32 *pmultiplier)
2203 {
2204         uint64_t scaled64;
2205         int32_t  shift = 0;
2206         uint64_t tps64;
2207         uint32_t tps32;
2208
2209         tps64 = base_hz;
2210         scaled64 = scaled_hz;
2211         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
2212                 tps64 >>= 1;
2213                 shift--;
2214         }
2215
2216         tps32 = (uint32_t)tps64;
2217         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
2218                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
2219                         scaled64 >>= 1;
2220                 else
2221                         tps32 <<= 1;
2222                 shift++;
2223         }
2224
2225         *pshift = shift;
2226         *pmultiplier = div_frac(scaled64, tps32);
2227 }
2228
2229 #ifdef CONFIG_X86_64
2230 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
2231 #endif
2232
2233 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
2234 static unsigned long max_tsc_khz;
2235
2236 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
2237 {
2238         u64 v = (u64)khz * (1000000 + ppm);
2239         do_div(v, 1000000);
2240         return v;
2241 }
2242
2243 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu *vcpu, u64 l1_multiplier);
2244
2245 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
2246 {
2247         u64 ratio;
2248
2249         /* Guest TSC same frequency as host TSC? */
2250         if (!scale) {
2251                 kvm_vcpu_write_tsc_multiplier(vcpu, kvm_default_tsc_scaling_ratio);
2252                 return 0;
2253         }
2254
2255         /* TSC scaling supported? */
2256         if (!kvm_has_tsc_control) {
2257                 if (user_tsc_khz > tsc_khz) {
2258                         vcpu->arch.tsc_catchup = 1;
2259                         vcpu->arch.tsc_always_catchup = 1;
2260                         return 0;
2261                 } else {
2262                         pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
2263                         return -1;
2264                 }
2265         }
2266
2267         /* TSC scaling required  - calculate ratio */
2268         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
2269                                 user_tsc_khz, tsc_khz);
2270
2271         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
2272                 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
2273                                     user_tsc_khz);
2274                 return -1;
2275         }
2276
2277         kvm_vcpu_write_tsc_multiplier(vcpu, ratio);
2278         return 0;
2279 }
2280
2281 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
2282 {
2283         u32 thresh_lo, thresh_hi;
2284         int use_scaling = 0;
2285
2286         /* tsc_khz can be zero if TSC calibration fails */
2287         if (user_tsc_khz == 0) {
2288                 /* set tsc_scaling_ratio to a safe value */
2289                 kvm_vcpu_write_tsc_multiplier(vcpu, kvm_default_tsc_scaling_ratio);
2290                 return -1;
2291         }
2292
2293         /* Compute a scale to convert nanoseconds in TSC cycles */
2294         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
2295                            &vcpu->arch.virtual_tsc_shift,
2296                            &vcpu->arch.virtual_tsc_mult);
2297         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
2298
2299         /*
2300          * Compute the variation in TSC rate which is acceptable
2301          * within the range of tolerance and decide if the
2302          * rate being applied is within that bounds of the hardware
2303          * rate.  If so, no scaling or compensation need be done.
2304          */
2305         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
2306         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
2307         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
2308                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
2309                 use_scaling = 1;
2310         }
2311         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
2312 }
2313
2314 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
2315 {
2316         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
2317                                       vcpu->arch.virtual_tsc_mult,
2318                                       vcpu->arch.virtual_tsc_shift);
2319         tsc += vcpu->arch.this_tsc_write;
2320         return tsc;
2321 }
2322
2323 static inline int gtod_is_based_on_tsc(int mode)
2324 {
2325         return mode == VDSO_CLOCKMODE_TSC || mode == VDSO_CLOCKMODE_HVCLOCK;
2326 }
2327
2328 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
2329 {
2330 #ifdef CONFIG_X86_64
2331         bool vcpus_matched;
2332         struct kvm_arch *ka = &vcpu->kvm->arch;
2333         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2334
2335         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2336                          atomic_read(&vcpu->kvm->online_vcpus));
2337
2338         /*
2339          * Once the masterclock is enabled, always perform request in
2340          * order to update it.
2341          *
2342          * In order to enable masterclock, the host clocksource must be TSC
2343          * and the vcpus need to have matched TSCs.  When that happens,
2344          * perform request to enable masterclock.
2345          */
2346         if (ka->use_master_clock ||
2347             (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
2348                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2349
2350         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
2351                             atomic_read(&vcpu->kvm->online_vcpus),
2352                             ka->use_master_clock, gtod->clock.vclock_mode);
2353 #endif
2354 }
2355
2356 /*
2357  * Multiply tsc by a fixed point number represented by ratio.
2358  *
2359  * The most significant 64-N bits (mult) of ratio represent the
2360  * integral part of the fixed point number; the remaining N bits
2361  * (frac) represent the fractional part, ie. ratio represents a fixed
2362  * point number (mult + frac * 2^(-N)).
2363  *
2364  * N equals to kvm_tsc_scaling_ratio_frac_bits.
2365  */
2366 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
2367 {
2368         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
2369 }
2370
2371 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc, u64 ratio)
2372 {
2373         u64 _tsc = tsc;
2374
2375         if (ratio != kvm_default_tsc_scaling_ratio)
2376                 _tsc = __scale_tsc(ratio, tsc);
2377
2378         return _tsc;
2379 }
2380 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
2381
2382 static u64 kvm_compute_l1_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
2383 {
2384         u64 tsc;
2385
2386         tsc = kvm_scale_tsc(vcpu, rdtsc(), vcpu->arch.l1_tsc_scaling_ratio);
2387
2388         return target_tsc - tsc;
2389 }
2390
2391 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
2392 {
2393         return vcpu->arch.l1_tsc_offset +
2394                 kvm_scale_tsc(vcpu, host_tsc, vcpu->arch.l1_tsc_scaling_ratio);
2395 }
2396 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
2397
2398 u64 kvm_calc_nested_tsc_offset(u64 l1_offset, u64 l2_offset, u64 l2_multiplier)
2399 {
2400         u64 nested_offset;
2401
2402         if (l2_multiplier == kvm_default_tsc_scaling_ratio)
2403                 nested_offset = l1_offset;
2404         else
2405                 nested_offset = mul_s64_u64_shr((s64) l1_offset, l2_multiplier,
2406                                                 kvm_tsc_scaling_ratio_frac_bits);
2407
2408         nested_offset += l2_offset;
2409         return nested_offset;
2410 }
2411 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_offset);
2412
2413 u64 kvm_calc_nested_tsc_multiplier(u64 l1_multiplier, u64 l2_multiplier)
2414 {
2415         if (l2_multiplier != kvm_default_tsc_scaling_ratio)
2416                 return mul_u64_u64_shr(l1_multiplier, l2_multiplier,
2417                                        kvm_tsc_scaling_ratio_frac_bits);
2418
2419         return l1_multiplier;
2420 }
2421 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_multiplier);
2422
2423 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 l1_offset)
2424 {
2425         trace_kvm_write_tsc_offset(vcpu->vcpu_id,
2426                                    vcpu->arch.l1_tsc_offset,
2427                                    l1_offset);
2428
2429         vcpu->arch.l1_tsc_offset = l1_offset;
2430
2431         /*
2432          * If we are here because L1 chose not to trap WRMSR to TSC then
2433          * according to the spec this should set L1's TSC (as opposed to
2434          * setting L1's offset for L2).
2435          */
2436         if (is_guest_mode(vcpu))
2437                 vcpu->arch.tsc_offset = kvm_calc_nested_tsc_offset(
2438                         l1_offset,
2439                         static_call(kvm_x86_get_l2_tsc_offset)(vcpu),
2440                         static_call(kvm_x86_get_l2_tsc_multiplier)(vcpu));
2441         else
2442                 vcpu->arch.tsc_offset = l1_offset;
2443
2444         static_call(kvm_x86_write_tsc_offset)(vcpu, vcpu->arch.tsc_offset);
2445 }
2446
2447 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu *vcpu, u64 l1_multiplier)
2448 {
2449         vcpu->arch.l1_tsc_scaling_ratio = l1_multiplier;
2450
2451         /* Userspace is changing the multiplier while L2 is active */
2452         if (is_guest_mode(vcpu))
2453                 vcpu->arch.tsc_scaling_ratio = kvm_calc_nested_tsc_multiplier(
2454                         l1_multiplier,
2455                         static_call(kvm_x86_get_l2_tsc_multiplier)(vcpu));
2456         else
2457                 vcpu->arch.tsc_scaling_ratio = l1_multiplier;
2458
2459         if (kvm_has_tsc_control)
2460                 static_call(kvm_x86_write_tsc_multiplier)(
2461                         vcpu, vcpu->arch.tsc_scaling_ratio);
2462 }
2463
2464 static inline bool kvm_check_tsc_unstable(void)
2465 {
2466 #ifdef CONFIG_X86_64
2467         /*
2468          * TSC is marked unstable when we're running on Hyper-V,
2469          * 'TSC page' clocksource is good.
2470          */
2471         if (pvclock_gtod_data.clock.vclock_mode == VDSO_CLOCKMODE_HVCLOCK)
2472                 return false;
2473 #endif
2474         return check_tsc_unstable();
2475 }
2476
2477 /*
2478  * Infers attempts to synchronize the guest's tsc from host writes. Sets the
2479  * offset for the vcpu and tracks the TSC matching generation that the vcpu
2480  * participates in.
2481  */
2482 static void __kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 offset, u64 tsc,
2483                                   u64 ns, bool matched)
2484 {
2485         struct kvm *kvm = vcpu->kvm;
2486
2487         lockdep_assert_held(&kvm->arch.tsc_write_lock);
2488
2489         /*
2490          * We also track th most recent recorded KHZ, write and time to
2491          * allow the matching interval to be extended at each write.
2492          */
2493         kvm->arch.last_tsc_nsec = ns;
2494         kvm->arch.last_tsc_write = tsc;
2495         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
2496         kvm->arch.last_tsc_offset = offset;
2497
2498         vcpu->arch.last_guest_tsc = tsc;
2499
2500         kvm_vcpu_write_tsc_offset(vcpu, offset);
2501
2502         if (!matched) {
2503                 /*
2504                  * We split periods of matched TSC writes into generations.
2505                  * For each generation, we track the original measured
2506                  * nanosecond time, offset, and write, so if TSCs are in
2507                  * sync, we can match exact offset, and if not, we can match
2508                  * exact software computation in compute_guest_tsc()
2509                  *
2510                  * These values are tracked in kvm->arch.cur_xxx variables.
2511                  */
2512                 kvm->arch.cur_tsc_generation++;
2513                 kvm->arch.cur_tsc_nsec = ns;
2514                 kvm->arch.cur_tsc_write = tsc;
2515                 kvm->arch.cur_tsc_offset = offset;
2516                 kvm->arch.nr_vcpus_matched_tsc = 0;
2517         } else if (vcpu->arch.this_tsc_generation != kvm->arch.cur_tsc_generation) {
2518                 kvm->arch.nr_vcpus_matched_tsc++;
2519         }
2520
2521         /* Keep track of which generation this VCPU has synchronized to */
2522         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
2523         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
2524         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
2525
2526         kvm_track_tsc_matching(vcpu);
2527 }
2528
2529 static void kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 data)
2530 {
2531         struct kvm *kvm = vcpu->kvm;
2532         u64 offset, ns, elapsed;
2533         unsigned long flags;
2534         bool matched = false;
2535         bool synchronizing = false;
2536
2537         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
2538         offset = kvm_compute_l1_tsc_offset(vcpu, data);
2539         ns = get_kvmclock_base_ns();
2540         elapsed = ns - kvm->arch.last_tsc_nsec;
2541
2542         if (vcpu->arch.virtual_tsc_khz) {
2543                 if (data == 0) {
2544                         /*
2545                          * detection of vcpu initialization -- need to sync
2546                          * with other vCPUs. This particularly helps to keep
2547                          * kvm_clock stable after CPU hotplug
2548                          */
2549                         synchronizing = true;
2550                 } else {
2551                         u64 tsc_exp = kvm->arch.last_tsc_write +
2552                                                 nsec_to_cycles(vcpu, elapsed);
2553                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
2554                         /*
2555                          * Special case: TSC write with a small delta (1 second)
2556                          * of virtual cycle time against real time is
2557                          * interpreted as an attempt to synchronize the CPU.
2558                          */
2559                         synchronizing = data < tsc_exp + tsc_hz &&
2560                                         data + tsc_hz > tsc_exp;
2561                 }
2562         }
2563
2564         /*
2565          * For a reliable TSC, we can match TSC offsets, and for an unstable
2566          * TSC, we add elapsed time in this computation.  We could let the
2567          * compensation code attempt to catch up if we fall behind, but
2568          * it's better to try to match offsets from the beginning.
2569          */
2570         if (synchronizing &&
2571             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
2572                 if (!kvm_check_tsc_unstable()) {
2573                         offset = kvm->arch.cur_tsc_offset;
2574                 } else {
2575                         u64 delta = nsec_to_cycles(vcpu, elapsed);
2576                         data += delta;
2577                         offset = kvm_compute_l1_tsc_offset(vcpu, data);
2578                 }
2579                 matched = true;
2580         }
2581
2582         __kvm_synchronize_tsc(vcpu, offset, data, ns, matched);
2583         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
2584 }
2585
2586 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
2587                                            s64 adjustment)
2588 {
2589         u64 tsc_offset = vcpu->arch.l1_tsc_offset;
2590         kvm_vcpu_write_tsc_offset(vcpu, tsc_offset + adjustment);
2591 }
2592
2593 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
2594 {
2595         if (vcpu->arch.l1_tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
2596                 WARN_ON(adjustment < 0);
2597         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment,
2598                                    vcpu->arch.l1_tsc_scaling_ratio);
2599         adjust_tsc_offset_guest(vcpu, adjustment);
2600 }
2601
2602 #ifdef CONFIG_X86_64
2603
2604 static u64 read_tsc(void)
2605 {
2606         u64 ret = (u64)rdtsc_ordered();
2607         u64 last = pvclock_gtod_data.clock.cycle_last;
2608
2609         if (likely(ret >= last))
2610                 return ret;
2611
2612         /*
2613          * GCC likes to generate cmov here, but this branch is extremely
2614          * predictable (it's just a function of time and the likely is
2615          * very likely) and there's a data dependence, so force GCC
2616          * to generate a branch instead.  I don't barrier() because
2617          * we don't actually need a barrier, and if this function
2618          * ever gets inlined it will generate worse code.
2619          */
2620         asm volatile ("");
2621         return last;
2622 }
2623
2624 static inline u64 vgettsc(struct pvclock_clock *clock, u64 *tsc_timestamp,
2625                           int *mode)
2626 {
2627         long v;
2628         u64 tsc_pg_val;
2629
2630         switch (clock->vclock_mode) {
2631         case VDSO_CLOCKMODE_HVCLOCK:
2632                 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
2633                                                   tsc_timestamp);
2634                 if (tsc_pg_val != U64_MAX) {
2635                         /* TSC page valid */
2636                         *mode = VDSO_CLOCKMODE_HVCLOCK;
2637                         v = (tsc_pg_val - clock->cycle_last) &
2638                                 clock->mask;
2639                 } else {
2640                         /* TSC page invalid */
2641                         *mode = VDSO_CLOCKMODE_NONE;
2642                 }
2643                 break;
2644         case VDSO_CLOCKMODE_TSC:
2645                 *mode = VDSO_CLOCKMODE_TSC;
2646                 *tsc_timestamp = read_tsc();
2647                 v = (*tsc_timestamp - clock->cycle_last) &
2648                         clock->mask;
2649                 break;
2650         default:
2651                 *mode = VDSO_CLOCKMODE_NONE;
2652         }
2653
2654         if (*mode == VDSO_CLOCKMODE_NONE)
2655                 *tsc_timestamp = v = 0;
2656
2657         return v * clock->mult;
2658 }
2659
2660 static int do_monotonic_raw(s64 *t, u64 *tsc_timestamp)
2661 {
2662         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2663         unsigned long seq;
2664         int mode;
2665         u64 ns;
2666
2667         do {
2668                 seq = read_seqcount_begin(&gtod->seq);
2669                 ns = gtod->raw_clock.base_cycles;
2670                 ns += vgettsc(&gtod->raw_clock, tsc_timestamp, &mode);
2671                 ns >>= gtod->raw_clock.shift;
2672                 ns += ktime_to_ns(ktime_add(gtod->raw_clock.offset, gtod->offs_boot));
2673         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2674         *t = ns;
2675
2676         return mode;
2677 }
2678
2679 static int do_realtime(struct timespec64 *ts, u64 *tsc_timestamp)
2680 {
2681         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2682         unsigned long seq;
2683         int mode;
2684         u64 ns;
2685
2686         do {
2687                 seq = read_seqcount_begin(&gtod->seq);
2688                 ts->tv_sec = gtod->wall_time_sec;
2689                 ns = gtod->clock.base_cycles;
2690                 ns += vgettsc(&gtod->clock, tsc_timestamp, &mode);
2691                 ns >>= gtod->clock.shift;
2692         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2693
2694         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
2695         ts->tv_nsec = ns;
2696
2697         return mode;
2698 }
2699
2700 /* returns true if host is using TSC based clocksource */
2701 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
2702 {
2703         /* checked again under seqlock below */
2704         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2705                 return false;
2706
2707         return gtod_is_based_on_tsc(do_monotonic_raw(kernel_ns,
2708                                                       tsc_timestamp));
2709 }
2710
2711 /* returns true if host is using TSC based clocksource */
2712 static bool kvm_get_walltime_and_clockread(struct timespec64 *ts,
2713                                            u64 *tsc_timestamp)
2714 {
2715         /* checked again under seqlock below */
2716         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2717                 return false;
2718
2719         return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
2720 }
2721 #endif
2722
2723 /*
2724  *
2725  * Assuming a stable TSC across physical CPUS, and a stable TSC
2726  * across virtual CPUs, the following condition is possible.
2727  * Each numbered line represents an event visible to both
2728  * CPUs at the next numbered event.
2729  *
2730  * "timespecX" represents host monotonic time. "tscX" represents
2731  * RDTSC value.
2732  *
2733  *              VCPU0 on CPU0           |       VCPU1 on CPU1
2734  *
2735  * 1.  read timespec0,tsc0
2736  * 2.                                   | timespec1 = timespec0 + N
2737  *                                      | tsc1 = tsc0 + M
2738  * 3. transition to guest               | transition to guest
2739  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2740  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
2741  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2742  *
2743  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2744  *
2745  *      - ret0 < ret1
2746  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2747  *              ...
2748  *      - 0 < N - M => M < N
2749  *
2750  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2751  * always the case (the difference between two distinct xtime instances
2752  * might be smaller then the difference between corresponding TSC reads,
2753  * when updating guest vcpus pvclock areas).
2754  *
2755  * To avoid that problem, do not allow visibility of distinct
2756  * system_timestamp/tsc_timestamp values simultaneously: use a master
2757  * copy of host monotonic time values. Update that master copy
2758  * in lockstep.
2759  *
2760  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2761  *
2762  */
2763
2764 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
2765 {
2766 #ifdef CONFIG_X86_64
2767         struct kvm_arch *ka = &kvm->arch;
2768         int vclock_mode;
2769         bool host_tsc_clocksource, vcpus_matched;
2770
2771         lockdep_assert_held(&kvm->arch.tsc_write_lock);
2772         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2773                         atomic_read(&kvm->online_vcpus));
2774
2775         /*
2776          * If the host uses TSC clock, then passthrough TSC as stable
2777          * to the guest.
2778          */
2779         host_tsc_clocksource = kvm_get_time_and_clockread(
2780                                         &ka->master_kernel_ns,
2781                                         &ka->master_cycle_now);
2782
2783         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
2784                                 && !ka->backwards_tsc_observed
2785                                 && !ka->boot_vcpu_runs_old_kvmclock;
2786
2787         if (ka->use_master_clock)
2788                 atomic_set(&kvm_guest_has_master_clock, 1);
2789
2790         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
2791         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
2792                                         vcpus_matched);
2793 #endif
2794 }
2795
2796 static void kvm_make_mclock_inprogress_request(struct kvm *kvm)
2797 {
2798         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
2799 }
2800
2801 static void __kvm_start_pvclock_update(struct kvm *kvm)
2802 {
2803         raw_spin_lock_irq(&kvm->arch.tsc_write_lock);
2804         write_seqcount_begin(&kvm->arch.pvclock_sc);
2805 }
2806
2807 static void kvm_start_pvclock_update(struct kvm *kvm)
2808 {
2809         kvm_make_mclock_inprogress_request(kvm);
2810
2811         /* no guest entries from this point */
2812         __kvm_start_pvclock_update(kvm);
2813 }
2814
2815 static void kvm_end_pvclock_update(struct kvm *kvm)
2816 {
2817         struct kvm_arch *ka = &kvm->arch;
2818         struct kvm_vcpu *vcpu;
2819         int i;
2820
2821         write_seqcount_end(&ka->pvclock_sc);
2822         raw_spin_unlock_irq(&ka->tsc_write_lock);
2823         kvm_for_each_vcpu(i, vcpu, kvm)
2824                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2825
2826         /* guest entries allowed */
2827         kvm_for_each_vcpu(i, vcpu, kvm)
2828                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
2829 }
2830
2831 static void kvm_update_masterclock(struct kvm *kvm)
2832 {
2833         kvm_hv_invalidate_tsc_page(kvm);
2834         kvm_start_pvclock_update(kvm);
2835         pvclock_update_vm_gtod_copy(kvm);
2836         kvm_end_pvclock_update(kvm);
2837 }
2838
2839 /* Called within read_seqcount_begin/retry for kvm->pvclock_sc.  */
2840 static void __get_kvmclock(struct kvm *kvm, struct kvm_clock_data *data)
2841 {
2842         struct kvm_arch *ka = &kvm->arch;
2843         struct pvclock_vcpu_time_info hv_clock;
2844
2845         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2846         get_cpu();
2847
2848         data->flags = 0;
2849         if (ka->use_master_clock && __this_cpu_read(cpu_tsc_khz)) {
2850 #ifdef CONFIG_X86_64
2851                 struct timespec64 ts;
2852
2853                 if (kvm_get_walltime_and_clockread(&ts, &data->host_tsc)) {
2854                         data->realtime = ts.tv_nsec + NSEC_PER_SEC * ts.tv_sec;
2855                         data->flags |= KVM_CLOCK_REALTIME | KVM_CLOCK_HOST_TSC;
2856                 } else
2857 #endif
2858                 data->host_tsc = rdtsc();
2859
2860                 data->flags |= KVM_CLOCK_TSC_STABLE;
2861                 hv_clock.tsc_timestamp = ka->master_cycle_now;
2862                 hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
2863                 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
2864                                    &hv_clock.tsc_shift,
2865                                    &hv_clock.tsc_to_system_mul);
2866                 data->clock = __pvclock_read_cycles(&hv_clock, data->host_tsc);
2867         } else {
2868                 data->clock = get_kvmclock_base_ns() + ka->kvmclock_offset;
2869         }
2870
2871         put_cpu();
2872 }
2873
2874 static void get_kvmclock(struct kvm *kvm, struct kvm_clock_data *data)
2875 {
2876         struct kvm_arch *ka = &kvm->arch;
2877         unsigned seq;
2878
2879         do {
2880                 seq = read_seqcount_begin(&ka->pvclock_sc);
2881                 __get_kvmclock(kvm, data);
2882         } while (read_seqcount_retry(&ka->pvclock_sc, seq));
2883 }
2884
2885 u64 get_kvmclock_ns(struct kvm *kvm)
2886 {
2887         struct kvm_clock_data data;
2888
2889         get_kvmclock(kvm, &data);
2890         return data.clock;
2891 }
2892
2893 static void kvm_setup_pvclock_page(struct kvm_vcpu *v,
2894                                    struct gfn_to_hva_cache *cache,
2895                                    unsigned int offset)
2896 {
2897         struct kvm_vcpu_arch *vcpu = &v->arch;
2898         struct pvclock_vcpu_time_info guest_hv_clock;
2899
2900         if (unlikely(kvm_read_guest_offset_cached(v->kvm, cache,
2901                 &guest_hv_clock, offset, sizeof(guest_hv_clock))))
2902                 return;
2903
2904         /* This VCPU is paused, but it's legal for a guest to read another
2905          * VCPU's kvmclock, so we really have to follow the specification where
2906          * it says that version is odd if data is being modified, and even after
2907          * it is consistent.
2908          *
2909          * Version field updates must be kept separate.  This is because
2910          * kvm_write_guest_cached might use a "rep movs" instruction, and
2911          * writes within a string instruction are weakly ordered.  So there
2912          * are three writes overall.
2913          *
2914          * As a small optimization, only write the version field in the first
2915          * and third write.  The vcpu->pv_time cache is still valid, because the
2916          * version field is the first in the struct.
2917          */
2918         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
2919
2920         if (guest_hv_clock.version & 1)
2921                 ++guest_hv_clock.version;  /* first time write, random junk */
2922
2923         vcpu->hv_clock.version = guest_hv_clock.version + 1;
2924         kvm_write_guest_offset_cached(v->kvm, cache,
2925                                       &vcpu->hv_clock, offset,
2926                                       sizeof(vcpu->hv_clock.version));
2927
2928         smp_wmb();
2929
2930         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2931         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
2932
2933         if (vcpu->pvclock_set_guest_stopped_request) {
2934                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
2935                 vcpu->pvclock_set_guest_stopped_request = false;
2936         }
2937
2938         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
2939
2940         kvm_write_guest_offset_cached(v->kvm, cache,
2941                                       &vcpu->hv_clock, offset,
2942                                       sizeof(vcpu->hv_clock));
2943
2944         smp_wmb();
2945
2946         vcpu->hv_clock.version++;
2947         kvm_write_guest_offset_cached(v->kvm, cache,
2948                                      &vcpu->hv_clock, offset,
2949                                      sizeof(vcpu->hv_clock.version));
2950 }
2951
2952 static int kvm_guest_time_update(struct kvm_vcpu *v)
2953 {
2954         unsigned long flags, tgt_tsc_khz;
2955         unsigned seq;
2956         struct kvm_vcpu_arch *vcpu = &v->arch;
2957         struct kvm_arch *ka = &v->kvm->arch;
2958         s64 kernel_ns;
2959         u64 tsc_timestamp, host_tsc;
2960         u8 pvclock_flags;
2961         bool use_master_clock;
2962
2963         kernel_ns = 0;
2964         host_tsc = 0;
2965
2966         /*
2967          * If the host uses TSC clock, then passthrough TSC as stable
2968          * to the guest.
2969          */
2970         do {
2971                 seq = read_seqcount_begin(&ka->pvclock_sc);
2972                 use_master_clock = ka->use_master_clock;
2973                 if (use_master_clock) {
2974                         host_tsc = ka->master_cycle_now;
2975                         kernel_ns = ka->master_kernel_ns;
2976                 }
2977         } while (read_seqcount_retry(&ka->pvclock_sc, seq));
2978
2979         /* Keep irq disabled to prevent changes to the clock */
2980         local_irq_save(flags);
2981         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
2982         if (unlikely(tgt_tsc_khz == 0)) {
2983                 local_irq_restore(flags);
2984                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2985                 return 1;
2986         }
2987         if (!use_master_clock) {
2988                 host_tsc = rdtsc();
2989                 kernel_ns = get_kvmclock_base_ns();
2990         }
2991
2992         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
2993
2994         /*
2995          * We may have to catch up the TSC to match elapsed wall clock
2996          * time for two reasons, even if kvmclock is used.
2997          *   1) CPU could have been running below the maximum TSC rate
2998          *   2) Broken TSC compensation resets the base at each VCPU
2999          *      entry to avoid unknown leaps of TSC even when running
3000          *      again on the same CPU.  This may cause apparent elapsed
3001          *      time to disappear, and the guest to stand still or run
3002          *      very slowly.
3003          */
3004         if (vcpu->tsc_catchup) {
3005                 u64 tsc = compute_guest_tsc(v, kernel_ns);
3006                 if (tsc > tsc_timestamp) {
3007                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
3008                         tsc_timestamp = tsc;
3009                 }
3010         }
3011
3012         local_irq_restore(flags);
3013
3014         /* With all the info we got, fill in the values */
3015
3016         if (kvm_has_tsc_control)
3017                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz,
3018                                             v->arch.l1_tsc_scaling_ratio);
3019
3020         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
3021                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
3022                                    &vcpu->hv_clock.tsc_shift,
3023                                    &vcpu->hv_clock.tsc_to_system_mul);
3024                 vcpu->hw_tsc_khz = tgt_tsc_khz;
3025         }
3026
3027         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
3028         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
3029         vcpu->last_guest_tsc = tsc_timestamp;
3030
3031         /* If the host uses TSC clocksource, then it is stable */
3032         pvclock_flags = 0;
3033         if (use_master_clock)
3034                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
3035
3036         vcpu->hv_clock.flags = pvclock_flags;
3037
3038         if (vcpu->pv_time_enabled)
3039                 kvm_setup_pvclock_page(v, &vcpu->pv_time, 0);
3040         if (vcpu->xen.vcpu_info_set)
3041                 kvm_setup_pvclock_page(v, &vcpu->xen.vcpu_info_cache,
3042                                        offsetof(struct compat_vcpu_info, time));
3043         if (vcpu->xen.vcpu_time_info_set)
3044                 kvm_setup_pvclock_page(v, &vcpu->xen.vcpu_time_info_cache, 0);
3045         if (!v->vcpu_idx)
3046                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
3047         return 0;
3048 }
3049
3050 /*
3051  * kvmclock updates which are isolated to a given vcpu, such as
3052  * vcpu->cpu migration, should not allow system_timestamp from
3053  * the rest of the vcpus to remain static. Otherwise ntp frequency
3054  * correction applies to one vcpu's system_timestamp but not
3055  * the others.
3056  *
3057  * So in those cases, request a kvmclock update for all vcpus.
3058  * We need to rate-limit these requests though, as they can
3059  * considerably slow guests that have a large number of vcpus.
3060  * The time for a remote vcpu to update its kvmclock is bound
3061  * by the delay we use to rate-limit the updates.
3062  */
3063
3064 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
3065
3066 static void kvmclock_update_fn(struct work_struct *work)
3067 {
3068         int i;
3069         struct delayed_work *dwork = to_delayed_work(work);
3070         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
3071                                            kvmclock_update_work);
3072         struct kvm *kvm = container_of(ka, struct kvm, arch);
3073         struct kvm_vcpu *vcpu;
3074
3075         kvm_for_each_vcpu(i, vcpu, kvm) {
3076                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3077                 kvm_vcpu_kick(vcpu);
3078         }
3079 }
3080
3081 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
3082 {
3083         struct kvm *kvm = v->kvm;
3084
3085         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
3086         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
3087                                         KVMCLOCK_UPDATE_DELAY);
3088 }
3089
3090 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
3091
3092 static void kvmclock_sync_fn(struct work_struct *work)
3093 {
3094         struct delayed_work *dwork = to_delayed_work(work);
3095         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
3096                                            kvmclock_sync_work);
3097         struct kvm *kvm = container_of(ka, struct kvm, arch);
3098
3099         if (!kvmclock_periodic_sync)
3100                 return;
3101
3102         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
3103         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
3104                                         KVMCLOCK_SYNC_PERIOD);
3105 }
3106
3107 /*
3108  * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
3109  */
3110 static bool can_set_mci_status(struct kvm_vcpu *vcpu)
3111 {
3112         /* McStatusWrEn enabled? */
3113         if (guest_cpuid_is_amd_or_hygon(vcpu))
3114                 return !!(vcpu->arch.msr_hwcr & BIT_ULL(18));
3115
3116         return false;
3117 }
3118
3119 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3120 {
3121         u64 mcg_cap = vcpu->arch.mcg_cap;
3122         unsigned bank_num = mcg_cap & 0xff;
3123         u32 msr = msr_info->index;
3124         u64 data = msr_info->data;
3125
3126         switch (msr) {
3127         case MSR_IA32_MCG_STATUS:
3128                 vcpu->arch.mcg_status = data;
3129                 break;
3130         case MSR_IA32_MCG_CTL:
3131                 if (!(mcg_cap & MCG_CTL_P) &&
3132                     (data || !msr_info->host_initiated))
3133                         return 1;
3134                 if (data != 0 && data != ~(u64)0)
3135                         return 1;
3136                 vcpu->arch.mcg_ctl = data;
3137                 break;
3138         default:
3139                 if (msr >= MSR_IA32_MC0_CTL &&
3140                     msr < MSR_IA32_MCx_CTL(bank_num)) {
3141                         u32 offset = array_index_nospec(
3142                                 msr - MSR_IA32_MC0_CTL,
3143                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3144
3145                         /* only 0 or all 1s can be written to IA32_MCi_CTL
3146                          * some Linux kernels though clear bit 10 in bank 4 to
3147                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
3148                          * this to avoid an uncatched #GP in the guest
3149                          */
3150                         if ((offset & 0x3) == 0 &&
3151                             data != 0 && (data | (1 << 10)) != ~(u64)0)
3152                                 return -1;
3153
3154                         /* MCi_STATUS */
3155                         if (!msr_info->host_initiated &&
3156                             (offset & 0x3) == 1 && data != 0) {
3157                                 if (!can_set_mci_status(vcpu))
3158                                         return -1;
3159                         }
3160
3161                         vcpu->arch.mce_banks[offset] = data;
3162                         break;
3163                 }
3164                 return 1;
3165         }
3166         return 0;
3167 }
3168
3169 static inline bool kvm_pv_async_pf_enabled(struct kvm_vcpu *vcpu)
3170 {
3171         u64 mask = KVM_ASYNC_PF_ENABLED | KVM_ASYNC_PF_DELIVERY_AS_INT;
3172
3173         return (vcpu->arch.apf.msr_en_val & mask) == mask;
3174 }
3175
3176 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
3177 {
3178         gpa_t gpa = data & ~0x3f;
3179
3180         /* Bits 4:5 are reserved, Should be zero */
3181         if (data & 0x30)
3182                 return 1;
3183
3184         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_VMEXIT) &&
3185             (data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT))
3186                 return 1;
3187
3188         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT) &&
3189             (data & KVM_ASYNC_PF_DELIVERY_AS_INT))
3190                 return 1;
3191
3192         if (!lapic_in_kernel(vcpu))
3193                 return data ? 1 : 0;
3194
3195         vcpu->arch.apf.msr_en_val = data;
3196
3197         if (!kvm_pv_async_pf_enabled(vcpu)) {
3198                 kvm_clear_async_pf_completion_queue(vcpu);
3199                 kvm_async_pf_hash_reset(vcpu);
3200                 return 0;
3201         }
3202
3203         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
3204                                         sizeof(u64)))
3205                 return 1;
3206
3207         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
3208         vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
3209
3210         kvm_async_pf_wakeup_all(vcpu);
3211
3212         return 0;
3213 }
3214
3215 static int kvm_pv_enable_async_pf_int(struct kvm_vcpu *vcpu, u64 data)
3216 {
3217         /* Bits 8-63 are reserved */
3218         if (data >> 8)
3219                 return 1;
3220
3221         if (!lapic_in_kernel(vcpu))
3222                 return 1;
3223
3224         vcpu->arch.apf.msr_int_val = data;
3225
3226         vcpu->arch.apf.vec = data & KVM_ASYNC_PF_VEC_MASK;
3227
3228         return 0;
3229 }
3230
3231 static void kvmclock_reset(struct kvm_vcpu *vcpu)
3232 {
3233         vcpu->arch.pv_time_enabled = false;
3234         vcpu->arch.time = 0;
3235 }
3236
3237 static void kvm_vcpu_flush_tlb_all(struct kvm_vcpu *vcpu)
3238 {
3239         ++vcpu->stat.tlb_flush;
3240         static_call(kvm_x86_tlb_flush_all)(vcpu);
3241 }
3242
3243 static void kvm_vcpu_flush_tlb_guest(struct kvm_vcpu *vcpu)
3244 {
3245         ++vcpu->stat.tlb_flush;
3246
3247         if (!tdp_enabled) {
3248                 /*
3249                  * A TLB flush on behalf of the guest is equivalent to
3250                  * INVPCID(all), toggling CR4.PGE, etc., which requires
3251                  * a forced sync of the shadow page tables.  Ensure all the
3252                  * roots are synced and the guest TLB in hardware is clean.
3253                  */
3254                 kvm_mmu_sync_roots(vcpu);
3255                 kvm_mmu_sync_prev_roots(vcpu);
3256         }
3257
3258         static_call(kvm_x86_tlb_flush_guest)(vcpu);
3259 }
3260
3261 static void record_steal_time(struct kvm_vcpu *vcpu)
3262 {
3263         struct gfn_to_hva_cache *ghc = &vcpu->arch.st.cache;
3264         struct kvm_steal_time __user *st;
3265         struct kvm_memslots *slots;
3266         u64 steal;
3267         u32 version;
3268
3269         if (kvm_xen_msr_enabled(vcpu->kvm)) {
3270                 kvm_xen_runstate_set_running(vcpu);
3271                 return;
3272         }
3273
3274         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
3275                 return;
3276
3277         if (WARN_ON_ONCE(current->mm != vcpu->kvm->mm))
3278                 return;
3279
3280         slots = kvm_memslots(vcpu->kvm);
3281
3282         if (unlikely(slots->generation != ghc->generation ||
3283                      kvm_is_error_hva(ghc->hva) || !ghc->memslot)) {
3284                 gfn_t gfn = vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS;
3285
3286                 /* We rely on the fact that it fits in a single page. */
3287                 BUILD_BUG_ON((sizeof(*st) - 1) & KVM_STEAL_VALID_BITS);
3288
3289                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, ghc, gfn, sizeof(*st)) ||
3290                     kvm_is_error_hva(ghc->hva) || !ghc->memslot)
3291                         return;
3292         }
3293
3294         st = (struct kvm_steal_time __user *)ghc->hva;
3295         if (!user_access_begin(st, sizeof(*st)))
3296                 return;
3297
3298         /*
3299          * Doing a TLB flush here, on the guest's behalf, can avoid
3300          * expensive IPIs.
3301          */
3302         if (guest_pv_has(vcpu, KVM_FEATURE_PV_TLB_FLUSH)) {
3303                 u8 st_preempted = 0;
3304                 int err = -EFAULT;
3305
3306                 asm volatile("1: xchgb %0, %2\n"
3307                              "xor %1, %1\n"
3308                              "2:\n"
3309                              _ASM_EXTABLE_UA(1b, 2b)
3310                              : "+r" (st_preempted),
3311                                "+&r" (err)
3312                              : "m" (st->preempted));
3313                 if (err)
3314                         goto out;
3315
3316                 user_access_end();
3317
3318                 vcpu->arch.st.preempted = 0;
3319
3320                 trace_kvm_pv_tlb_flush(vcpu->vcpu_id,
3321                                        st_preempted & KVM_VCPU_FLUSH_TLB);
3322                 if (st_preempted & KVM_VCPU_FLUSH_TLB)
3323                         kvm_vcpu_flush_tlb_guest(vcpu);
3324
3325                 if (!user_access_begin(st, sizeof(*st)))
3326                         goto dirty;
3327         } else {
3328                 unsafe_put_user(0, &st->preempted, out);
3329                 vcpu->arch.st.preempted = 0;
3330         }
3331
3332         unsafe_get_user(version, &st->version, out);
3333         if (version & 1)
3334                 version += 1;  /* first time write, random junk */
3335
3336         version += 1;
3337         unsafe_put_user(version, &st->version, out);
3338
3339         smp_wmb();
3340
3341         unsafe_get_user(steal, &st->steal, out);
3342         steal += current->sched_info.run_delay -
3343                 vcpu->arch.st.last_steal;
3344         vcpu->arch.st.last_steal = current->sched_info.run_delay;
3345         unsafe_put_user(steal, &st->steal, out);
3346
3347         version += 1;
3348         unsafe_put_user(version, &st->version, out);
3349
3350  out:
3351         user_access_end();
3352  dirty:
3353         mark_page_dirty_in_slot(vcpu->kvm, ghc->memslot, gpa_to_gfn(ghc->gpa));
3354 }
3355
3356 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3357 {
3358         bool pr = false;
3359         u32 msr = msr_info->index;
3360         u64 data = msr_info->data;
3361
3362         if (msr && msr == vcpu->kvm->arch.xen_hvm_config.msr)
3363                 return kvm_xen_write_hypercall_page(vcpu, data);
3364
3365         switch (msr) {
3366         case MSR_AMD64_NB_CFG:
3367         case MSR_IA32_UCODE_WRITE:
3368         case MSR_VM_HSAVE_PA:
3369         case MSR_AMD64_PATCH_LOADER:
3370         case MSR_AMD64_BU_CFG2:
3371         case MSR_AMD64_DC_CFG:
3372         case MSR_F15H_EX_CFG:
3373                 break;
3374
3375         case MSR_IA32_UCODE_REV:
3376                 if (msr_info->host_initiated)
3377                         vcpu->arch.microcode_version = data;
3378                 break;
3379         case MSR_IA32_ARCH_CAPABILITIES:
3380                 if (!msr_info->host_initiated)
3381                         return 1;
3382                 vcpu->arch.arch_capabilities = data;
3383                 break;
3384         case MSR_IA32_PERF_CAPABILITIES: {
3385                 struct kvm_msr_entry msr_ent = {.index = msr, .data = 0};
3386
3387                 if (!msr_info->host_initiated)
3388                         return 1;
3389                 if (guest_cpuid_has(vcpu, X86_FEATURE_PDCM) && kvm_get_msr_feature(&msr_ent))
3390                         return 1;
3391                 if (data & ~msr_ent.data)
3392                         return 1;
3393
3394                 vcpu->arch.perf_capabilities = data;
3395
3396                 return 0;
3397                 }
3398         case MSR_EFER:
3399                 return set_efer(vcpu, msr_info);
3400         case MSR_K7_HWCR:
3401                 data &= ~(u64)0x40;     /* ignore flush filter disable */
3402                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
3403                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
3404
3405                 /* Handle McStatusWrEn */
3406                 if (data == BIT_ULL(18)) {
3407                         vcpu->arch.msr_hwcr = data;
3408                 } else if (data != 0) {
3409                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
3410                                     data);
3411                         return 1;
3412                 }
3413                 break;
3414         case MSR_FAM10H_MMIO_CONF_BASE:
3415                 if (data != 0) {
3416                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
3417                                     "0x%llx\n", data);
3418                         return 1;
3419                 }
3420                 break;
3421         case 0x200 ... 0x2ff:
3422                 return kvm_mtrr_set_msr(vcpu, msr, data);
3423         case MSR_IA32_APICBASE:
3424                 return kvm_set_apic_base(vcpu, msr_info);
3425         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3426                 return kvm_x2apic_msr_write(vcpu, msr, data);
3427         case MSR_IA32_TSC_DEADLINE:
3428                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
3429                 break;
3430         case MSR_IA32_TSC_ADJUST:
3431                 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
3432                         if (!msr_info->host_initiated) {
3433                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
3434                                 adjust_tsc_offset_guest(vcpu, adj);
3435                                 /* Before back to guest, tsc_timestamp must be adjusted
3436                                  * as well, otherwise guest's percpu pvclock time could jump.
3437                                  */
3438                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3439                         }
3440                         vcpu->arch.ia32_tsc_adjust_msr = data;
3441                 }
3442                 break;
3443         case MSR_IA32_MISC_ENABLE:
3444                 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT) &&
3445                     ((vcpu->arch.ia32_misc_enable_msr ^ data) & MSR_IA32_MISC_ENABLE_MWAIT)) {
3446                         if (!guest_cpuid_has(vcpu, X86_FEATURE_XMM3))
3447                                 return 1;
3448                         vcpu->arch.ia32_misc_enable_msr = data;
3449                         kvm_update_cpuid_runtime(vcpu);
3450                 } else {
3451                         vcpu->arch.ia32_misc_enable_msr = data;
3452                 }
3453                 break;
3454         case MSR_IA32_SMBASE:
3455                 if (!msr_info->host_initiated)
3456                         return 1;
3457                 vcpu->arch.smbase = data;
3458                 break;
3459         case MSR_IA32_POWER_CTL:
3460                 vcpu->arch.msr_ia32_power_ctl = data;
3461                 break;
3462         case MSR_IA32_TSC:
3463                 if (msr_info->host_initiated) {
3464                         kvm_synchronize_tsc(vcpu, data);
3465                 } else {
3466                         u64 adj = kvm_compute_l1_tsc_offset(vcpu, data) - vcpu->arch.l1_tsc_offset;
3467                         adjust_tsc_offset_guest(vcpu, adj);
3468                         vcpu->arch.ia32_tsc_adjust_msr += adj;
3469                 }
3470                 break;
3471         case MSR_IA32_XSS:
3472                 if (!msr_info->host_initiated &&
3473                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3474                         return 1;
3475                 /*
3476                  * KVM supports exposing PT to the guest, but does not support
3477                  * IA32_XSS[bit 8]. Guests have to use RDMSR/WRMSR rather than
3478                  * XSAVES/XRSTORS to save/restore PT MSRs.
3479                  */
3480                 if (data & ~supported_xss)
3481                         return 1;
3482                 vcpu->arch.ia32_xss = data;
3483                 break;
3484         case MSR_SMI_COUNT:
3485                 if (!msr_info->host_initiated)
3486                         return 1;
3487                 vcpu->arch.smi_count = data;
3488                 break;
3489         case MSR_KVM_WALL_CLOCK_NEW:
3490                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3491                         return 1;
3492
3493                 vcpu->kvm->arch.wall_clock = data;
3494                 kvm_write_wall_clock(vcpu->kvm, data, 0);
3495                 break;
3496         case MSR_KVM_WALL_CLOCK:
3497                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3498                         return 1;
3499
3500                 vcpu->kvm->arch.wall_clock = data;
3501                 kvm_write_wall_clock(vcpu->kvm, data, 0);
3502                 break;
3503         case MSR_KVM_SYSTEM_TIME_NEW:
3504                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3505                         return 1;
3506
3507                 kvm_write_system_time(vcpu, data, false, msr_info->host_initiated);
3508                 break;
3509         case MSR_KVM_SYSTEM_TIME:
3510                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3511                         return 1;
3512
3513                 kvm_write_system_time(vcpu, data, true,  msr_info->host_initiated);
3514                 break;
3515         case MSR_KVM_ASYNC_PF_EN:
3516                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3517                         return 1;
3518
3519                 if (kvm_pv_enable_async_pf(vcpu, data))
3520                         return 1;
3521                 break;
3522         case MSR_KVM_ASYNC_PF_INT:
3523                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3524                         return 1;
3525
3526                 if (kvm_pv_enable_async_pf_int(vcpu, data))
3527                         return 1;
3528                 break;
3529         case MSR_KVM_ASYNC_PF_ACK:
3530                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3531                         return 1;
3532                 if (data & 0x1) {
3533                         vcpu->arch.apf.pageready_pending = false;
3534                         kvm_check_async_pf_completion(vcpu);
3535                 }
3536                 break;
3537         case MSR_KVM_STEAL_TIME:
3538                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3539                         return 1;
3540
3541                 if (unlikely(!sched_info_on()))
3542                         return 1;
3543
3544                 if (data & KVM_STEAL_RESERVED_MASK)
3545                         return 1;
3546
3547                 vcpu->arch.st.msr_val = data;
3548
3549                 if (!(data & KVM_MSR_ENABLED))
3550                         break;
3551
3552                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3553
3554                 break;
3555         case MSR_KVM_PV_EOI_EN:
3556                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3557                         return 1;
3558
3559                 if (kvm_lapic_enable_pv_eoi(vcpu, data, sizeof(u8)))
3560                         return 1;
3561                 break;
3562
3563         case MSR_KVM_POLL_CONTROL:
3564                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3565                         return 1;
3566
3567                 /* only enable bit supported */
3568                 if (data & (-1ULL << 1))
3569                         return 1;
3570
3571                 vcpu->arch.msr_kvm_poll_control = data;
3572                 break;
3573
3574         case MSR_IA32_MCG_CTL:
3575         case MSR_IA32_MCG_STATUS:
3576         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3577                 return set_msr_mce(vcpu, msr_info);
3578
3579         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3580         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3581                 pr = true;
3582                 fallthrough;
3583         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3584         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3585                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3586                         return kvm_pmu_set_msr(vcpu, msr_info);
3587
3588                 if (pr || data != 0)
3589                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
3590                                     "0x%x data 0x%llx\n", msr, data);
3591                 break;
3592         case MSR_K7_CLK_CTL:
3593                 /*
3594                  * Ignore all writes to this no longer documented MSR.
3595                  * Writes are only relevant for old K7 processors,
3596                  * all pre-dating SVM, but a recommended workaround from
3597                  * AMD for these chips. It is possible to specify the
3598                  * affected processor models on the command line, hence
3599                  * the need to ignore the workaround.
3600                  */
3601                 break;
3602         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3603         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3604         case HV_X64_MSR_SYNDBG_OPTIONS:
3605         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3606         case HV_X64_MSR_CRASH_CTL:
3607         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3608         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3609         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3610         case HV_X64_MSR_TSC_EMULATION_STATUS:
3611                 return kvm_hv_set_msr_common(vcpu, msr, data,
3612                                              msr_info->host_initiated);
3613         case MSR_IA32_BBL_CR_CTL3:
3614                 /* Drop writes to this legacy MSR -- see rdmsr
3615                  * counterpart for further detail.
3616                  */
3617                 if (report_ignored_msrs)
3618                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
3619                                 msr, data);
3620                 break;
3621         case MSR_AMD64_OSVW_ID_LENGTH:
3622                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3623                         return 1;
3624                 vcpu->arch.osvw.length = data;
3625                 break;
3626         case MSR_AMD64_OSVW_STATUS:
3627                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3628                         return 1;
3629                 vcpu->arch.osvw.status = data;
3630                 break;
3631         case MSR_PLATFORM_INFO:
3632                 if (!msr_info->host_initiated ||
3633                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
3634                      cpuid_fault_enabled(vcpu)))
3635                         return 1;
3636                 vcpu->arch.msr_platform_info = data;
3637                 break;
3638         case MSR_MISC_FEATURES_ENABLES:
3639                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
3640                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
3641                      !supports_cpuid_fault(vcpu)))
3642                         return 1;
3643                 vcpu->arch.msr_misc_features_enables = data;
3644                 break;
3645         default:
3646                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3647                         return kvm_pmu_set_msr(vcpu, msr_info);
3648                 return KVM_MSR_RET_INVALID;
3649         }
3650         return 0;
3651 }
3652 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
3653
3654 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
3655 {
3656         u64 data;
3657         u64 mcg_cap = vcpu->arch.mcg_cap;
3658         unsigned bank_num = mcg_cap & 0xff;
3659
3660         switch (msr) {
3661         case MSR_IA32_P5_MC_ADDR:
3662         case MSR_IA32_P5_MC_TYPE:
3663                 data = 0;
3664                 break;
3665         case MSR_IA32_MCG_CAP:
3666                 data = vcpu->arch.mcg_cap;
3667                 break;
3668         case MSR_IA32_MCG_CTL:
3669                 if (!(mcg_cap & MCG_CTL_P) && !host)
3670                         return 1;
3671                 data = vcpu->arch.mcg_ctl;
3672                 break;
3673         case MSR_IA32_MCG_STATUS:
3674                 data = vcpu->arch.mcg_status;
3675                 break;
3676         default:
3677                 if (msr >= MSR_IA32_MC0_CTL &&
3678                     msr < MSR_IA32_MCx_CTL(bank_num)) {
3679                         u32 offset = array_index_nospec(
3680                                 msr - MSR_IA32_MC0_CTL,
3681                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3682
3683                         data = vcpu->arch.mce_banks[offset];
3684                         break;
3685                 }
3686                 return 1;
3687         }
3688         *pdata = data;
3689         return 0;
3690 }
3691
3692 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3693 {
3694         switch (msr_info->index) {
3695         case MSR_IA32_PLATFORM_ID:
3696         case MSR_IA32_EBL_CR_POWERON:
3697         case MSR_IA32_LASTBRANCHFROMIP:
3698         case MSR_IA32_LASTBRANCHTOIP:
3699         case MSR_IA32_LASTINTFROMIP:
3700         case MSR_IA32_LASTINTTOIP:
3701         case MSR_AMD64_SYSCFG:
3702         case MSR_K8_TSEG_ADDR:
3703         case MSR_K8_TSEG_MASK:
3704         case MSR_VM_HSAVE_PA:
3705         case MSR_K8_INT_PENDING_MSG:
3706         case MSR_AMD64_NB_CFG:
3707         case MSR_FAM10H_MMIO_CONF_BASE:
3708         case MSR_AMD64_BU_CFG2:
3709         case MSR_IA32_PERF_CTL:
3710         case MSR_AMD64_DC_CFG:
3711         case MSR_F15H_EX_CFG:
3712         /*
3713          * Intel Sandy Bridge CPUs must support the RAPL (running average power
3714          * limit) MSRs. Just return 0, as we do not want to expose the host
3715          * data here. Do not conditionalize this on CPUID, as KVM does not do
3716          * so for existing CPU-specific MSRs.
3717          */
3718         case MSR_RAPL_POWER_UNIT:
3719         case MSR_PP0_ENERGY_STATUS:     /* Power plane 0 (core) */
3720         case MSR_PP1_ENERGY_STATUS:     /* Power plane 1 (graphics uncore) */
3721         case MSR_PKG_ENERGY_STATUS:     /* Total package */
3722         case MSR_DRAM_ENERGY_STATUS:    /* DRAM controller */
3723                 msr_info->data = 0;
3724                 break;
3725         case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
3726                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3727                         return kvm_pmu_get_msr(vcpu, msr_info);
3728                 if (!msr_info->host_initiated)
3729                         return 1;
3730                 msr_info->data = 0;
3731                 break;
3732         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3733         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3734         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3735         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3736                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3737                         return kvm_pmu_get_msr(vcpu, msr_info);
3738                 msr_info->data = 0;
3739                 break;
3740         case MSR_IA32_UCODE_REV:
3741                 msr_info->data = vcpu->arch.microcode_version;
3742                 break;
3743         case MSR_IA32_ARCH_CAPABILITIES:
3744                 if (!msr_info->host_initiated &&
3745                     !guest_cpuid_has(vcpu, X86_FEATURE_ARCH_CAPABILITIES))
3746                         return 1;
3747                 msr_info->data = vcpu->arch.arch_capabilities;
3748                 break;
3749         case MSR_IA32_PERF_CAPABILITIES:
3750                 if (!msr_info->host_initiated &&
3751                     !guest_cpuid_has(vcpu, X86_FEATURE_PDCM))
3752                         return 1;
3753                 msr_info->data = vcpu->arch.perf_capabilities;
3754                 break;
3755         case MSR_IA32_POWER_CTL:
3756                 msr_info->data = vcpu->arch.msr_ia32_power_ctl;
3757                 break;
3758         case MSR_IA32_TSC: {
3759                 /*
3760                  * Intel SDM states that MSR_IA32_TSC read adds the TSC offset
3761                  * even when not intercepted. AMD manual doesn't explicitly
3762                  * state this but appears to behave the same.
3763                  *
3764                  * On userspace reads and writes, however, we unconditionally
3765                  * return L1's TSC value to ensure backwards-compatible
3766                  * behavior for migration.
3767                  */
3768                 u64 offset, ratio;
3769
3770                 if (msr_info->host_initiated) {
3771                         offset = vcpu->arch.l1_tsc_offset;
3772                         ratio = vcpu->arch.l1_tsc_scaling_ratio;
3773                 } else {
3774                         offset = vcpu->arch.tsc_offset;
3775                         ratio = vcpu->arch.tsc_scaling_ratio;
3776                 }
3777
3778                 msr_info->data = kvm_scale_tsc(vcpu, rdtsc(), ratio) + offset;
3779                 break;
3780         }
3781         case MSR_MTRRcap:
3782         case 0x200 ... 0x2ff:
3783                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
3784         case 0xcd: /* fsb frequency */
3785                 msr_info->data = 3;
3786                 break;
3787                 /*
3788                  * MSR_EBC_FREQUENCY_ID
3789                  * Conservative value valid for even the basic CPU models.
3790                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
3791                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
3792                  * and 266MHz for model 3, or 4. Set Core Clock
3793                  * Frequency to System Bus Frequency Ratio to 1 (bits
3794                  * 31:24) even though these are only valid for CPU
3795                  * models > 2, however guests may end up dividing or
3796                  * multiplying by zero otherwise.
3797                  */
3798         case MSR_EBC_FREQUENCY_ID:
3799                 msr_info->data = 1 << 24;
3800                 break;
3801         case MSR_IA32_APICBASE:
3802                 msr_info->data = kvm_get_apic_base(vcpu);
3803                 break;
3804         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3805                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
3806         case MSR_IA32_TSC_DEADLINE:
3807                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
3808                 break;
3809         case MSR_IA32_TSC_ADJUST:
3810                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
3811                 break;
3812         case MSR_IA32_MISC_ENABLE:
3813                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
3814                 break;
3815         case MSR_IA32_SMBASE:
3816                 if (!msr_info->host_initiated)
3817                         return 1;
3818                 msr_info->data = vcpu->arch.smbase;
3819                 break;
3820         case MSR_SMI_COUNT:
3821                 msr_info->data = vcpu->arch.smi_count;
3822                 break;
3823         case MSR_IA32_PERF_STATUS:
3824                 /* TSC increment by tick */
3825                 msr_info->data = 1000ULL;
3826                 /* CPU multiplier */
3827                 msr_info->data |= (((uint64_t)4ULL) << 40);
3828                 break;
3829         case MSR_EFER:
3830                 msr_info->data = vcpu->arch.efer;
3831                 break;
3832         case MSR_KVM_WALL_CLOCK:
3833                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3834                         return 1;
3835
3836                 msr_info->data = vcpu->kvm->arch.wall_clock;
3837                 break;
3838         case MSR_KVM_WALL_CLOCK_NEW:
3839                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3840                         return 1;
3841
3842                 msr_info->data = vcpu->kvm->arch.wall_clock;
3843                 break;
3844         case MSR_KVM_SYSTEM_TIME:
3845                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3846                         return 1;
3847
3848                 msr_info->data = vcpu->arch.time;
3849                 break;
3850         case MSR_KVM_SYSTEM_TIME_NEW:
3851                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3852                         return 1;
3853
3854                 msr_info->data = vcpu->arch.time;
3855                 break;
3856         case MSR_KVM_ASYNC_PF_EN:
3857                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3858                         return 1;
3859
3860                 msr_info->data = vcpu->arch.apf.msr_en_val;
3861                 break;
3862         case MSR_KVM_ASYNC_PF_INT:
3863                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3864                         return 1;
3865
3866                 msr_info->data = vcpu->arch.apf.msr_int_val;
3867                 break;
3868         case MSR_KVM_ASYNC_PF_ACK:
3869                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3870                         return 1;
3871
3872                 msr_info->data = 0;
3873                 break;
3874         case MSR_KVM_STEAL_TIME:
3875                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3876                         return 1;
3877
3878                 msr_info->data = vcpu->arch.st.msr_val;
3879                 break;
3880         case MSR_KVM_PV_EOI_EN:
3881                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3882                         return 1;
3883
3884                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
3885                 break;
3886         case MSR_KVM_POLL_CONTROL:
3887                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3888                         return 1;
3889
3890                 msr_info->data = vcpu->arch.msr_kvm_poll_control;
3891                 break;
3892         case MSR_IA32_P5_MC_ADDR:
3893         case MSR_IA32_P5_MC_TYPE:
3894         case MSR_IA32_MCG_CAP:
3895         case MSR_IA32_MCG_CTL:
3896         case MSR_IA32_MCG_STATUS:
3897         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3898                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data,
3899                                    msr_info->host_initiated);
3900         case MSR_IA32_XSS:
3901                 if (!msr_info->host_initiated &&
3902                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3903                         return 1;
3904                 msr_info->data = vcpu->arch.ia32_xss;
3905                 break;
3906         case MSR_K7_CLK_CTL:
3907                 /*
3908                  * Provide expected ramp-up count for K7. All other
3909                  * are set to zero, indicating minimum divisors for
3910                  * every field.
3911                  *
3912                  * This prevents guest kernels on AMD host with CPU
3913                  * type 6, model 8 and higher from exploding due to
3914                  * the rdmsr failing.
3915                  */
3916                 msr_info->data = 0x20000000;
3917                 break;
3918         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3919         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3920         case HV_X64_MSR_SYNDBG_OPTIONS:
3921         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3922         case HV_X64_MSR_CRASH_CTL:
3923         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3924         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3925         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3926         case HV_X64_MSR_TSC_EMULATION_STATUS:
3927                 return kvm_hv_get_msr_common(vcpu,
3928                                              msr_info->index, &msr_info->data,
3929                                              msr_info->host_initiated);
3930         case MSR_IA32_BBL_CR_CTL3:
3931                 /* This legacy MSR exists but isn't fully documented in current
3932                  * silicon.  It is however accessed by winxp in very narrow
3933                  * scenarios where it sets bit #19, itself documented as
3934                  * a "reserved" bit.  Best effort attempt to source coherent
3935                  * read data here should the balance of the register be
3936                  * interpreted by the guest:
3937                  *
3938                  * L2 cache control register 3: 64GB range, 256KB size,
3939                  * enabled, latency 0x1, configured
3940                  */
3941                 msr_info->data = 0xbe702111;
3942                 break;
3943         case MSR_AMD64_OSVW_ID_LENGTH:
3944                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3945                         return 1;
3946                 msr_info->data = vcpu->arch.osvw.length;
3947                 break;
3948         case MSR_AMD64_OSVW_STATUS:
3949                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3950                         return 1;
3951                 msr_info->data = vcpu->arch.osvw.status;
3952                 break;
3953         case MSR_PLATFORM_INFO:
3954                 if (!msr_info->host_initiated &&
3955                     !vcpu->kvm->arch.guest_can_read_msr_platform_info)
3956                         return 1;
3957                 msr_info->data = vcpu->arch.msr_platform_info;
3958                 break;
3959         case MSR_MISC_FEATURES_ENABLES:
3960                 msr_info->data = vcpu->arch.msr_misc_features_enables;
3961                 break;
3962         case MSR_K7_HWCR:
3963                 msr_info->data = vcpu->arch.msr_hwcr;
3964                 break;
3965         default:
3966                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3967                         return kvm_pmu_get_msr(vcpu, msr_info);
3968                 return KVM_MSR_RET_INVALID;
3969         }
3970         return 0;
3971 }
3972 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
3973
3974 /*
3975  * Read or write a bunch of msrs. All parameters are kernel addresses.
3976  *
3977  * @return number of msrs set successfully.
3978  */
3979 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
3980                     struct kvm_msr_entry *entries,
3981                     int (*do_msr)(struct kvm_vcpu *vcpu,
3982                                   unsigned index, u64 *data))
3983 {
3984         int i;
3985
3986         for (i = 0; i < msrs->nmsrs; ++i)
3987                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
3988                         break;
3989
3990         return i;
3991 }
3992
3993 /*
3994  * Read or write a bunch of msrs. Parameters are user addresses.
3995  *
3996  * @return number of msrs set successfully.
3997  */
3998 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
3999                   int (*do_msr)(struct kvm_vcpu *vcpu,
4000                                 unsigned index, u64 *data),
4001                   int writeback)
4002 {
4003         struct kvm_msrs msrs;
4004         struct kvm_msr_entry *entries;
4005         int r, n;
4006         unsigned size;
4007
4008         r = -EFAULT;
4009         if (copy_from_user(&msrs, user_msrs, sizeof(msrs)))
4010                 goto out;
4011
4012         r = -E2BIG;
4013         if (msrs.nmsrs >= MAX_IO_MSRS)
4014                 goto out;
4015
4016         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
4017         entries = memdup_user(user_msrs->entries, size);
4018         if (IS_ERR(entries)) {
4019                 r = PTR_ERR(entries);
4020                 goto out;
4021         }
4022
4023         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
4024         if (r < 0)
4025                 goto out_free;
4026
4027         r = -EFAULT;
4028         if (writeback && copy_to_user(user_msrs->entries, entries, size))
4029                 goto out_free;
4030
4031         r = n;
4032
4033 out_free:
4034         kfree(entries);
4035 out:
4036         return r;
4037 }
4038
4039 static inline bool kvm_can_mwait_in_guest(void)
4040 {
4041         return boot_cpu_has(X86_FEATURE_MWAIT) &&
4042                 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
4043                 boot_cpu_has(X86_FEATURE_ARAT);
4044 }
4045
4046 static int kvm_ioctl_get_supported_hv_cpuid(struct kvm_vcpu *vcpu,
4047                                             struct kvm_cpuid2 __user *cpuid_arg)
4048 {
4049         struct kvm_cpuid2 cpuid;
4050         int r;
4051
4052         r = -EFAULT;
4053         if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4054                 return r;
4055
4056         r = kvm_get_hv_cpuid(vcpu, &cpuid, cpuid_arg->entries);
4057         if (r)
4058                 return r;
4059
4060         r = -EFAULT;
4061         if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4062                 return r;
4063
4064         return 0;
4065 }
4066
4067 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
4068 {
4069         int r = 0;
4070
4071         switch (ext) {
4072         case KVM_CAP_IRQCHIP:
4073         case KVM_CAP_HLT:
4074         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
4075         case KVM_CAP_SET_TSS_ADDR:
4076         case KVM_CAP_EXT_CPUID:
4077         case KVM_CAP_EXT_EMUL_CPUID:
4078         case KVM_CAP_CLOCKSOURCE:
4079         case KVM_CAP_PIT:
4080         case KVM_CAP_NOP_IO_DELAY:
4081         case KVM_CAP_MP_STATE:
4082         case KVM_CAP_SYNC_MMU:
4083         case KVM_CAP_USER_NMI:
4084         case KVM_CAP_REINJECT_CONTROL:
4085         case KVM_CAP_IRQ_INJECT_STATUS:
4086         case KVM_CAP_IOEVENTFD:
4087         case KVM_CAP_IOEVENTFD_NO_LENGTH:
4088         case KVM_CAP_PIT2:
4089         case KVM_CAP_PIT_STATE2:
4090         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
4091         case KVM_CAP_VCPU_EVENTS:
4092         case KVM_CAP_HYPERV:
4093         case KVM_CAP_HYPERV_VAPIC:
4094         case KVM_CAP_HYPERV_SPIN:
4095         case KVM_CAP_HYPERV_SYNIC:
4096         case KVM_CAP_HYPERV_SYNIC2:
4097         case KVM_CAP_HYPERV_VP_INDEX:
4098         case KVM_CAP_HYPERV_EVENTFD:
4099         case KVM_CAP_HYPERV_TLBFLUSH:
4100         case KVM_CAP_HYPERV_SEND_IPI:
4101         case KVM_CAP_HYPERV_CPUID:
4102         case KVM_CAP_HYPERV_ENFORCE_CPUID:
4103         case KVM_CAP_SYS_HYPERV_CPUID:
4104         case KVM_CAP_PCI_SEGMENT:
4105         case KVM_CAP_DEBUGREGS:
4106         case KVM_CAP_X86_ROBUST_SINGLESTEP:
4107         case KVM_CAP_XSAVE:
4108         case KVM_CAP_ASYNC_PF:
4109         case KVM_CAP_ASYNC_PF_INT:
4110         case KVM_CAP_GET_TSC_KHZ:
4111         case KVM_CAP_KVMCLOCK_CTRL:
4112         case KVM_CAP_READONLY_MEM:
4113         case KVM_CAP_HYPERV_TIME:
4114         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
4115         case KVM_CAP_TSC_DEADLINE_TIMER:
4116         case KVM_CAP_DISABLE_QUIRKS:
4117         case KVM_CAP_SET_BOOT_CPU_ID:
4118         case KVM_CAP_SPLIT_IRQCHIP:
4119         case KVM_CAP_IMMEDIATE_EXIT:
4120         case KVM_CAP_PMU_EVENT_FILTER:
4121         case KVM_CAP_GET_MSR_FEATURES:
4122         case KVM_CAP_MSR_PLATFORM_INFO:
4123         case KVM_CAP_EXCEPTION_PAYLOAD:
4124         case KVM_CAP_SET_GUEST_DEBUG:
4125         case KVM_CAP_LAST_CPU:
4126         case KVM_CAP_X86_USER_SPACE_MSR:
4127         case KVM_CAP_X86_MSR_FILTER:
4128         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
4129 #ifdef CONFIG_X86_SGX_KVM
4130         case KVM_CAP_SGX_ATTRIBUTE:
4131 #endif
4132         case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
4133         case KVM_CAP_SREGS2:
4134         case KVM_CAP_EXIT_ON_EMULATION_FAILURE:
4135         case KVM_CAP_VCPU_ATTRIBUTES:
4136                 r = 1;
4137                 break;
4138         case KVM_CAP_EXIT_HYPERCALL:
4139                 r = KVM_EXIT_HYPERCALL_VALID_MASK;
4140                 break;
4141         case KVM_CAP_SET_GUEST_DEBUG2:
4142                 return KVM_GUESTDBG_VALID_MASK;
4143 #ifdef CONFIG_KVM_XEN
4144         case KVM_CAP_XEN_HVM:
4145                 r = KVM_XEN_HVM_CONFIG_HYPERCALL_MSR |
4146                     KVM_XEN_HVM_CONFIG_INTERCEPT_HCALL |
4147                     KVM_XEN_HVM_CONFIG_SHARED_INFO;
4148                 if (sched_info_on())
4149                         r |= KVM_XEN_HVM_CONFIG_RUNSTATE;
4150                 break;
4151 #endif
4152         case KVM_CAP_SYNC_REGS:
4153                 r = KVM_SYNC_X86_VALID_FIELDS;
4154                 break;
4155         case KVM_CAP_ADJUST_CLOCK:
4156                 r = KVM_CLOCK_VALID_FLAGS;
4157                 break;
4158         case KVM_CAP_X86_DISABLE_EXITS:
4159                 r |=  KVM_X86_DISABLE_EXITS_HLT | KVM_X86_DISABLE_EXITS_PAUSE |
4160                       KVM_X86_DISABLE_EXITS_CSTATE;
4161                 if(kvm_can_mwait_in_guest())
4162                         r |= KVM_X86_DISABLE_EXITS_MWAIT;
4163                 break;
4164         case KVM_CAP_X86_SMM:
4165                 /* SMBASE is usually relocated above 1M on modern chipsets,
4166                  * and SMM handlers might indeed rely on 4G segment limits,
4167                  * so do not report SMM to be available if real mode is
4168                  * emulated via vm86 mode.  Still, do not go to great lengths
4169                  * to avoid userspace's usage of the feature, because it is a
4170                  * fringe case that is not enabled except via specific settings
4171                  * of the module parameters.
4172                  */
4173                 r = static_call(kvm_x86_has_emulated_msr)(kvm, MSR_IA32_SMBASE);
4174                 break;
4175         case KVM_CAP_VAPIC:
4176                 r = !static_call(kvm_x86_cpu_has_accelerated_tpr)();
4177                 break;
4178         case KVM_CAP_NR_VCPUS:
4179                 r = KVM_SOFT_MAX_VCPUS;
4180                 break;
4181         case KVM_CAP_MAX_VCPUS:
4182                 r = KVM_MAX_VCPUS;
4183                 break;
4184         case KVM_CAP_MAX_VCPU_ID:
4185                 r = KVM_MAX_VCPU_IDS;
4186                 break;
4187         case KVM_CAP_PV_MMU:    /* obsolete */
4188                 r = 0;
4189                 break;
4190         case KVM_CAP_MCE:
4191                 r = KVM_MAX_MCE_BANKS;
4192                 break;
4193         case KVM_CAP_XCRS:
4194                 r = boot_cpu_has(X86_FEATURE_XSAVE);
4195                 break;
4196         case KVM_CAP_TSC_CONTROL:
4197                 r = kvm_has_tsc_control;
4198                 break;
4199         case KVM_CAP_X2APIC_API:
4200                 r = KVM_X2APIC_API_VALID_FLAGS;
4201                 break;
4202         case KVM_CAP_NESTED_STATE:
4203                 r = kvm_x86_ops.nested_ops->get_state ?
4204                         kvm_x86_ops.nested_ops->get_state(NULL, NULL, 0) : 0;
4205                 break;
4206         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
4207                 r = kvm_x86_ops.enable_direct_tlbflush != NULL;
4208                 break;
4209         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
4210                 r = kvm_x86_ops.nested_ops->enable_evmcs != NULL;
4211                 break;
4212         case KVM_CAP_SMALLER_MAXPHYADDR:
4213                 r = (int) allow_smaller_maxphyaddr;
4214                 break;
4215         case KVM_CAP_STEAL_TIME:
4216                 r = sched_info_on();
4217                 break;
4218         case KVM_CAP_X86_BUS_LOCK_EXIT:
4219                 if (kvm_has_bus_lock_exit)
4220                         r = KVM_BUS_LOCK_DETECTION_OFF |
4221                             KVM_BUS_LOCK_DETECTION_EXIT;
4222                 else
4223                         r = 0;
4224                 break;
4225         default:
4226                 break;
4227         }
4228         return r;
4229
4230 }
4231
4232 long kvm_arch_dev_ioctl(struct file *filp,
4233                         unsigned int ioctl, unsigned long arg)
4234 {
4235         void __user *argp = (void __user *)arg;
4236         long r;
4237
4238         switch (ioctl) {
4239         case KVM_GET_MSR_INDEX_LIST: {
4240                 struct kvm_msr_list __user *user_msr_list = argp;
4241                 struct kvm_msr_list msr_list;
4242                 unsigned n;
4243
4244                 r = -EFAULT;
4245                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
4246                         goto out;
4247                 n = msr_list.nmsrs;
4248                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
4249                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
4250                         goto out;
4251                 r = -E2BIG;
4252                 if (n < msr_list.nmsrs)
4253                         goto out;
4254                 r = -EFAULT;
4255                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
4256                                  num_msrs_to_save * sizeof(u32)))
4257                         goto out;
4258                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
4259                                  &emulated_msrs,
4260                                  num_emulated_msrs * sizeof(u32)))
4261                         goto out;
4262                 r = 0;
4263                 break;
4264         }
4265         case KVM_GET_SUPPORTED_CPUID:
4266         case KVM_GET_EMULATED_CPUID: {
4267                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4268                 struct kvm_cpuid2 cpuid;
4269
4270                 r = -EFAULT;
4271                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4272                         goto out;
4273
4274                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
4275                                             ioctl);
4276                 if (r)
4277                         goto out;
4278
4279                 r = -EFAULT;
4280                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4281                         goto out;
4282                 r = 0;
4283                 break;
4284         }
4285         case KVM_X86_GET_MCE_CAP_SUPPORTED:
4286                 r = -EFAULT;
4287                 if (copy_to_user(argp, &kvm_mce_cap_supported,
4288                                  sizeof(kvm_mce_cap_supported)))
4289                         goto out;
4290                 r = 0;
4291                 break;
4292         case KVM_GET_MSR_FEATURE_INDEX_LIST: {
4293                 struct kvm_msr_list __user *user_msr_list = argp;
4294                 struct kvm_msr_list msr_list;
4295                 unsigned int n;
4296
4297                 r = -EFAULT;
4298                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
4299                         goto out;
4300                 n = msr_list.nmsrs;
4301                 msr_list.nmsrs = num_msr_based_features;
4302                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
4303                         goto out;
4304                 r = -E2BIG;
4305                 if (n < msr_list.nmsrs)
4306                         goto out;
4307                 r = -EFAULT;
4308                 if (copy_to_user(user_msr_list->indices, &msr_based_features,
4309                                  num_msr_based_features * sizeof(u32)))
4310                         goto out;
4311                 r = 0;
4312                 break;
4313         }
4314         case KVM_GET_MSRS:
4315                 r = msr_io(NULL, argp, do_get_msr_feature, 1);
4316                 break;
4317         case KVM_GET_SUPPORTED_HV_CPUID:
4318                 r = kvm_ioctl_get_supported_hv_cpuid(NULL, argp);
4319                 break;
4320         default:
4321                 r = -EINVAL;
4322                 break;
4323         }
4324 out:
4325         return r;
4326 }
4327
4328 static void wbinvd_ipi(void *garbage)
4329 {
4330         wbinvd();
4331 }
4332
4333 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
4334 {
4335         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
4336 }
4337
4338 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
4339 {
4340         /* Address WBINVD may be executed by guest */
4341         if (need_emulate_wbinvd(vcpu)) {
4342                 if (static_call(kvm_x86_has_wbinvd_exit)())
4343                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4344                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
4345                         smp_call_function_single(vcpu->cpu,
4346                                         wbinvd_ipi, NULL, 1);
4347         }
4348
4349         static_call(kvm_x86_vcpu_load)(vcpu, cpu);
4350
4351         /* Save host pkru register if supported */
4352         vcpu->arch.host_pkru = read_pkru();
4353
4354         /* Apply any externally detected TSC adjustments (due to suspend) */
4355         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
4356                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
4357                 vcpu->arch.tsc_offset_adjustment = 0;
4358                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4359         }
4360
4361         if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
4362                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
4363                                 rdtsc() - vcpu->arch.last_host_tsc;
4364                 if (tsc_delta < 0)
4365                         mark_tsc_unstable("KVM discovered backwards TSC");
4366
4367                 if (kvm_check_tsc_unstable()) {
4368                         u64 offset = kvm_compute_l1_tsc_offset(vcpu,
4369                                                 vcpu->arch.last_guest_tsc);
4370                         kvm_vcpu_write_tsc_offset(vcpu, offset);
4371                         vcpu->arch.tsc_catchup = 1;
4372                 }
4373
4374                 if (kvm_lapic_hv_timer_in_use(vcpu))
4375                         kvm_lapic_restart_hv_timer(vcpu);
4376
4377                 /*
4378                  * On a host with synchronized TSC, there is no need to update
4379                  * kvmclock on vcpu->cpu migration
4380                  */
4381                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
4382                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
4383                 if (vcpu->cpu != cpu)
4384                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
4385                 vcpu->cpu = cpu;
4386         }
4387
4388         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
4389 }
4390
4391 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
4392 {
4393         struct gfn_to_hva_cache *ghc = &vcpu->arch.st.cache;
4394         struct kvm_steal_time __user *st;
4395         struct kvm_memslots *slots;
4396         static const u8 preempted = KVM_VCPU_PREEMPTED;
4397
4398         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
4399                 return;
4400
4401         if (vcpu->arch.st.preempted)
4402                 return;
4403
4404         /* This happens on process exit */
4405         if (unlikely(current->mm != vcpu->kvm->mm))
4406                 return;
4407
4408         slots = kvm_memslots(vcpu->kvm);
4409
4410         if (unlikely(slots->generation != ghc->generation ||
4411                      kvm_is_error_hva(ghc->hva) || !ghc->memslot))
4412                 return;
4413
4414         st = (struct kvm_steal_time __user *)ghc->hva;
4415         BUILD_BUG_ON(sizeof(st->preempted) != sizeof(preempted));
4416
4417         if (!copy_to_user_nofault(&st->preempted, &preempted, sizeof(preempted)))
4418                 vcpu->arch.st.preempted = KVM_VCPU_PREEMPTED;
4419
4420         mark_page_dirty_in_slot(vcpu->kvm, ghc->memslot, gpa_to_gfn(ghc->gpa));
4421 }
4422
4423 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
4424 {
4425         int idx;
4426
4427         if (vcpu->preempted && !vcpu->arch.guest_state_protected)
4428                 vcpu->arch.preempted_in_kernel = !static_call(kvm_x86_get_cpl)(vcpu);
4429
4430         /*
4431          * Take the srcu lock as memslots will be accessed to check the gfn
4432          * cache generation against the memslots generation.
4433          */
4434         idx = srcu_read_lock(&vcpu->kvm->srcu);
4435         if (kvm_xen_msr_enabled(vcpu->kvm))
4436                 kvm_xen_runstate_set_preempted(vcpu);
4437         else
4438                 kvm_steal_time_set_preempted(vcpu);
4439         srcu_read_unlock(&vcpu->kvm->srcu, idx);
4440
4441         static_call(kvm_x86_vcpu_put)(vcpu);
4442         vcpu->arch.last_host_tsc = rdtsc();
4443 }
4444
4445 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
4446                                     struct kvm_lapic_state *s)
4447 {
4448         if (vcpu->arch.apicv_active)
4449                 static_call(kvm_x86_sync_pir_to_irr)(vcpu);
4450
4451         return kvm_apic_get_state(vcpu, s);
4452 }
4453
4454 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
4455                                     struct kvm_lapic_state *s)
4456 {
4457         int r;
4458
4459         r = kvm_apic_set_state(vcpu, s);
4460         if (r)
4461                 return r;
4462         update_cr8_intercept(vcpu);
4463
4464         return 0;
4465 }
4466
4467 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
4468 {
4469         /*
4470          * We can accept userspace's request for interrupt injection
4471          * as long as we have a place to store the interrupt number.
4472          * The actual injection will happen when the CPU is able to
4473          * deliver the interrupt.
4474          */
4475         if (kvm_cpu_has_extint(vcpu))
4476                 return false;
4477
4478         /* Acknowledging ExtINT does not happen if LINT0 is masked.  */
4479         return (!lapic_in_kernel(vcpu) ||
4480                 kvm_apic_accept_pic_intr(vcpu));
4481 }
4482
4483 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
4484 {
4485         /*
4486          * Do not cause an interrupt window exit if an exception
4487          * is pending or an event needs reinjection; userspace
4488          * might want to inject the interrupt manually using KVM_SET_REGS
4489          * or KVM_SET_SREGS.  For that to work, we must be at an
4490          * instruction boundary and with no events half-injected.
4491          */
4492         return (kvm_arch_interrupt_allowed(vcpu) &&
4493                 kvm_cpu_accept_dm_intr(vcpu) &&
4494                 !kvm_event_needs_reinjection(vcpu) &&
4495                 !vcpu->arch.exception.pending);
4496 }
4497
4498 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
4499                                     struct kvm_interrupt *irq)
4500 {
4501         if (irq->irq >= KVM_NR_INTERRUPTS)
4502                 return -EINVAL;
4503
4504         if (!irqchip_in_kernel(vcpu->kvm)) {
4505                 kvm_queue_interrupt(vcpu, irq->irq, false);
4506                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4507                 return 0;
4508         }
4509
4510         /*
4511          * With in-kernel LAPIC, we only use this to inject EXTINT, so
4512          * fail for in-kernel 8259.
4513          */
4514         if (pic_in_kernel(vcpu->kvm))
4515                 return -ENXIO;
4516
4517         if (vcpu->arch.pending_external_vector != -1)
4518                 return -EEXIST;
4519
4520         vcpu->arch.pending_external_vector = irq->irq;
4521         kvm_make_request(KVM_REQ_EVENT, vcpu);
4522         return 0;
4523 }
4524
4525 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
4526 {
4527         kvm_inject_nmi(vcpu);
4528
4529         return 0;
4530 }
4531
4532 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
4533 {
4534         kvm_make_request(KVM_REQ_SMI, vcpu);
4535
4536         return 0;
4537 }
4538
4539 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
4540                                            struct kvm_tpr_access_ctl *tac)
4541 {
4542         if (tac->flags)
4543                 return -EINVAL;
4544         vcpu->arch.tpr_access_reporting = !!tac->enabled;
4545         return 0;
4546 }
4547
4548 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
4549                                         u64 mcg_cap)
4550 {
4551         int r;
4552         unsigned bank_num = mcg_cap & 0xff, bank;
4553
4554         r = -EINVAL;
4555         if (!bank_num || bank_num > KVM_MAX_MCE_BANKS)
4556                 goto out;
4557         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
4558                 goto out;
4559         r = 0;
4560         vcpu->arch.mcg_cap = mcg_cap;
4561         /* Init IA32_MCG_CTL to all 1s */
4562         if (mcg_cap & MCG_CTL_P)
4563                 vcpu->arch.mcg_ctl = ~(u64)0;
4564         /* Init IA32_MCi_CTL to all 1s */
4565         for (bank = 0; bank < bank_num; bank++)
4566                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
4567
4568         static_call(kvm_x86_setup_mce)(vcpu);
4569 out:
4570         return r;
4571 }
4572
4573 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
4574                                       struct kvm_x86_mce *mce)
4575 {
4576         u64 mcg_cap = vcpu->arch.mcg_cap;
4577         unsigned bank_num = mcg_cap & 0xff;
4578         u64 *banks = vcpu->arch.mce_banks;
4579
4580         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
4581                 return -EINVAL;
4582         /*
4583          * if IA32_MCG_CTL is not all 1s, the uncorrected error
4584          * reporting is disabled
4585          */
4586         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
4587             vcpu->arch.mcg_ctl != ~(u64)0)
4588                 return 0;
4589         banks += 4 * mce->bank;
4590         /*
4591          * if IA32_MCi_CTL is not all 1s, the uncorrected error
4592          * reporting is disabled for the bank
4593          */
4594         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
4595                 return 0;
4596         if (mce->status & MCI_STATUS_UC) {
4597                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
4598                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
4599                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
4600                         return 0;
4601                 }
4602                 if (banks[1] & MCI_STATUS_VAL)
4603                         mce->status |= MCI_STATUS_OVER;
4604                 banks[2] = mce->addr;
4605                 banks[3] = mce->misc;
4606                 vcpu->arch.mcg_status = mce->mcg_status;
4607                 banks[1] = mce->status;
4608                 kvm_queue_exception(vcpu, MC_VECTOR);
4609         } else if (!(banks[1] & MCI_STATUS_VAL)
4610                    || !(banks[1] & MCI_STATUS_UC)) {
4611                 if (banks[1] & MCI_STATUS_VAL)
4612                         mce->status |= MCI_STATUS_OVER;
4613                 banks[2] = mce->addr;
4614                 banks[3] = mce->misc;
4615                 banks[1] = mce->status;
4616         } else
4617                 banks[1] |= MCI_STATUS_OVER;
4618         return 0;
4619 }
4620
4621 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
4622                                                struct kvm_vcpu_events *events)
4623 {
4624         process_nmi(vcpu);
4625
4626         if (kvm_check_request(KVM_REQ_SMI, vcpu))
4627                 process_smi(vcpu);
4628
4629         /*
4630          * In guest mode, payload delivery should be deferred,
4631          * so that the L1 hypervisor can intercept #PF before
4632          * CR2 is modified (or intercept #DB before DR6 is
4633          * modified under nVMX). Unless the per-VM capability,
4634          * KVM_CAP_EXCEPTION_PAYLOAD, is set, we may not defer the delivery of
4635          * an exception payload and handle after a KVM_GET_VCPU_EVENTS. Since we
4636          * opportunistically defer the exception payload, deliver it if the
4637          * capability hasn't been requested before processing a
4638          * KVM_GET_VCPU_EVENTS.
4639          */
4640         if (!vcpu->kvm->arch.exception_payload_enabled &&
4641             vcpu->arch.exception.pending && vcpu->arch.exception.has_payload)
4642                 kvm_deliver_exception_payload(vcpu);
4643
4644         /*
4645          * The API doesn't provide the instruction length for software
4646          * exceptions, so don't report them. As long as the guest RIP
4647          * isn't advanced, we should expect to encounter the exception
4648          * again.
4649          */
4650         if (kvm_exception_is_soft(vcpu->arch.exception.nr)) {
4651                 events->exception.injected = 0;
4652                 events->exception.pending = 0;
4653         } else {
4654                 events->exception.injected = vcpu->arch.exception.injected;
4655                 events->exception.pending = vcpu->arch.exception.pending;
4656                 /*
4657                  * For ABI compatibility, deliberately conflate
4658                  * pending and injected exceptions when
4659                  * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
4660                  */
4661                 if (!vcpu->kvm->arch.exception_payload_enabled)
4662                         events->exception.injected |=
4663                                 vcpu->arch.exception.pending;
4664         }
4665         events->exception.nr = vcpu->arch.exception.nr;
4666         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
4667         events->exception.error_code = vcpu->arch.exception.error_code;
4668         events->exception_has_payload = vcpu->arch.exception.has_payload;
4669         events->exception_payload = vcpu->arch.exception.payload;
4670
4671         events->interrupt.injected =
4672                 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
4673         events->interrupt.nr = vcpu->arch.interrupt.nr;
4674         events->interrupt.soft = 0;
4675         events->interrupt.shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
4676
4677         events->nmi.injected = vcpu->arch.nmi_injected;
4678         events->nmi.pending = vcpu->arch.nmi_pending != 0;
4679         events->nmi.masked = static_call(kvm_x86_get_nmi_mask)(vcpu);
4680         events->nmi.pad = 0;
4681
4682         events->sipi_vector = 0; /* never valid when reporting to user space */
4683
4684         events->smi.smm = is_smm(vcpu);
4685         events->smi.pending = vcpu->arch.smi_pending;
4686         events->smi.smm_inside_nmi =
4687                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
4688         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
4689
4690         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
4691                          | KVM_VCPUEVENT_VALID_SHADOW
4692                          | KVM_VCPUEVENT_VALID_SMM);
4693         if (vcpu->kvm->arch.exception_payload_enabled)
4694                 events->flags |= KVM_VCPUEVENT_VALID_PAYLOAD;
4695
4696         memset(&events->reserved, 0, sizeof(events->reserved));
4697 }
4698
4699 static void kvm_smm_changed(struct kvm_vcpu *vcpu, bool entering_smm);
4700
4701 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
4702                                               struct kvm_vcpu_events *events)
4703 {
4704         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
4705                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
4706                               | KVM_VCPUEVENT_VALID_SHADOW
4707                               | KVM_VCPUEVENT_VALID_SMM
4708                               | KVM_VCPUEVENT_VALID_PAYLOAD))
4709                 return -EINVAL;
4710
4711         if (events->flags & KVM_VCPUEVENT_VALID_PAYLOAD) {
4712                 if (!vcpu->kvm->arch.exception_payload_enabled)
4713                         return -EINVAL;
4714                 if (events->exception.pending)
4715                         events->exception.injected = 0;
4716                 else
4717                         events->exception_has_payload = 0;
4718         } else {
4719                 events->exception.pending = 0;
4720                 events->exception_has_payload = 0;
4721         }
4722
4723         if ((events->exception.injected || events->exception.pending) &&
4724             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
4725                 return -EINVAL;
4726
4727         /* INITs are latched while in SMM */
4728         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
4729             (events->smi.smm || events->smi.pending) &&
4730             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
4731                 return -EINVAL;
4732
4733         process_nmi(vcpu);
4734         vcpu->arch.exception.injected = events->exception.injected;
4735         vcpu->arch.exception.pending = events->exception.pending;
4736         vcpu->arch.exception.nr = events->exception.nr;
4737         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
4738         vcpu->arch.exception.error_code = events->exception.error_code;
4739         vcpu->arch.exception.has_payload = events->exception_has_payload;
4740         vcpu->arch.exception.payload = events->exception_payload;
4741
4742         vcpu->arch.interrupt.injected = events->interrupt.injected;
4743         vcpu->arch.interrupt.nr = events->interrupt.nr;
4744         vcpu->arch.interrupt.soft = events->interrupt.soft;
4745         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
4746                 static_call(kvm_x86_set_interrupt_shadow)(vcpu,
4747                                                 events->interrupt.shadow);
4748
4749         vcpu->arch.nmi_injected = events->nmi.injected;
4750         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
4751                 vcpu->arch.nmi_pending = events->nmi.pending;
4752         static_call(kvm_x86_set_nmi_mask)(vcpu, events->nmi.masked);
4753
4754         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
4755             lapic_in_kernel(vcpu))
4756                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
4757
4758         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
4759                 if (!!(vcpu->arch.hflags & HF_SMM_MASK) != events->smi.smm)
4760                         kvm_smm_changed(vcpu, events->smi.smm);
4761
4762                 vcpu->arch.smi_pending = events->smi.pending;
4763
4764                 if (events->smi.smm) {
4765                         if (events->smi.smm_inside_nmi)
4766                                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
4767                         else
4768                                 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
4769                 }
4770
4771                 if (lapic_in_kernel(vcpu)) {
4772                         if (events->smi.latched_init)
4773                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4774                         else
4775                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4776                 }
4777         }
4778
4779         kvm_make_request(KVM_REQ_EVENT, vcpu);
4780
4781         return 0;
4782 }
4783
4784 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
4785                                              struct kvm_debugregs *dbgregs)
4786 {
4787         unsigned long val;
4788
4789         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
4790         kvm_get_dr(vcpu, 6, &val);
4791         dbgregs->dr6 = val;
4792         dbgregs->dr7 = vcpu->arch.dr7;
4793         dbgregs->flags = 0;
4794         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
4795 }
4796
4797 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
4798                                             struct kvm_debugregs *dbgregs)
4799 {
4800         if (dbgregs->flags)
4801                 return -EINVAL;
4802
4803         if (!kvm_dr6_valid(dbgregs->dr6))
4804                 return -EINVAL;
4805         if (!kvm_dr7_valid(dbgregs->dr7))
4806                 return -EINVAL;
4807
4808         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
4809         kvm_update_dr0123(vcpu);
4810         vcpu->arch.dr6 = dbgregs->dr6;
4811         vcpu->arch.dr7 = dbgregs->dr7;
4812         kvm_update_dr7(vcpu);
4813
4814         return 0;
4815 }
4816
4817 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
4818
4819 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
4820 {
4821         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4822         u64 xstate_bv = xsave->header.xfeatures;
4823         u64 valid;
4824
4825         /*
4826          * Copy legacy XSAVE area, to avoid complications with CPUID
4827          * leaves 0 and 1 in the loop below.
4828          */
4829         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
4830
4831         /* Set XSTATE_BV */
4832         xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
4833         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
4834
4835         /*
4836          * Copy each region from the possibly compacted offset to the
4837          * non-compacted offset.
4838          */
4839         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4840         while (valid) {
4841                 u32 size, offset, ecx, edx;
4842                 u64 xfeature_mask = valid & -valid;
4843                 int xfeature_nr = fls64(xfeature_mask) - 1;
4844                 void *src;
4845
4846                 cpuid_count(XSTATE_CPUID, xfeature_nr,
4847                             &size, &offset, &ecx, &edx);
4848
4849                 if (xfeature_nr == XFEATURE_PKRU) {
4850                         memcpy(dest + offset, &vcpu->arch.pkru,
4851                                sizeof(vcpu->arch.pkru));
4852                 } else {
4853                         src = get_xsave_addr(xsave, xfeature_nr);
4854                         if (src)
4855                                 memcpy(dest + offset, src, size);
4856                 }
4857
4858                 valid -= xfeature_mask;
4859         }
4860 }
4861
4862 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
4863 {
4864         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
4865         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
4866         u64 valid;
4867
4868         /*
4869          * Copy legacy XSAVE area, to avoid complications with CPUID
4870          * leaves 0 and 1 in the loop below.
4871          */
4872         memcpy(xsave, src, XSAVE_HDR_OFFSET);
4873
4874         /* Set XSTATE_BV and possibly XCOMP_BV.  */
4875         xsave->header.xfeatures = xstate_bv;
4876         if (boot_cpu_has(X86_FEATURE_XSAVES))
4877                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
4878
4879         /*
4880          * Copy each region from the non-compacted offset to the
4881          * possibly compacted offset.
4882          */
4883         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
4884         while (valid) {
4885                 u32 size, offset, ecx, edx;
4886                 u64 xfeature_mask = valid & -valid;
4887                 int xfeature_nr = fls64(xfeature_mask) - 1;
4888
4889                 cpuid_count(XSTATE_CPUID, xfeature_nr,
4890                             &size, &offset, &ecx, &edx);
4891
4892                 if (xfeature_nr == XFEATURE_PKRU) {
4893                         memcpy(&vcpu->arch.pkru, src + offset,
4894                                sizeof(vcpu->arch.pkru));
4895                 } else {
4896                         void *dest = get_xsave_addr(xsave, xfeature_nr);
4897
4898                         if (dest)
4899                                 memcpy(dest, src + offset, size);
4900                 }
4901
4902                 valid -= xfeature_mask;
4903         }
4904 }
4905
4906 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
4907                                          struct kvm_xsave *guest_xsave)
4908 {
4909         if (!vcpu->arch.guest_fpu)
4910                 return;
4911
4912         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4913                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
4914                 fill_xsave((u8 *) guest_xsave->region, vcpu);
4915         } else {
4916                 memcpy(guest_xsave->region,
4917                         &vcpu->arch.guest_fpu->state.fxsave,
4918                         sizeof(struct fxregs_state));
4919                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
4920                         XFEATURE_MASK_FPSSE;
4921         }
4922 }
4923
4924 #define XSAVE_MXCSR_OFFSET 24
4925
4926 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
4927                                         struct kvm_xsave *guest_xsave)
4928 {
4929         u64 xstate_bv;
4930         u32 mxcsr;
4931
4932         if (!vcpu->arch.guest_fpu)
4933                 return 0;
4934
4935         xstate_bv = *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
4936         mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
4937
4938         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
4939                 /*
4940                  * Here we allow setting states that are not present in
4941                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
4942                  * with old userspace.
4943                  */
4944                 if (xstate_bv & ~supported_xcr0 || mxcsr & ~mxcsr_feature_mask)
4945                         return -EINVAL;
4946                 load_xsave(vcpu, (u8 *)guest_xsave->region);
4947         } else {
4948                 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
4949                         mxcsr & ~mxcsr_feature_mask)
4950                         return -EINVAL;
4951                 memcpy(&vcpu->arch.guest_fpu->state.fxsave,
4952                         guest_xsave->region, sizeof(struct fxregs_state));
4953         }
4954         return 0;
4955 }
4956
4957 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
4958                                         struct kvm_xcrs *guest_xcrs)
4959 {
4960         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
4961                 guest_xcrs->nr_xcrs = 0;
4962                 return;
4963         }
4964
4965         guest_xcrs->nr_xcrs = 1;
4966         guest_xcrs->flags = 0;
4967         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
4968         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
4969 }
4970
4971 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
4972                                        struct kvm_xcrs *guest_xcrs)
4973 {
4974         int i, r = 0;
4975
4976         if (!boot_cpu_has(X86_FEATURE_XSAVE))
4977                 return -EINVAL;
4978
4979         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
4980                 return -EINVAL;
4981
4982         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
4983                 /* Only support XCR0 currently */
4984                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
4985                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
4986                                 guest_xcrs->xcrs[i].value);
4987                         break;
4988                 }
4989         if (r)
4990                 r = -EINVAL;
4991         return r;
4992 }
4993
4994 /*
4995  * kvm_set_guest_paused() indicates to the guest kernel that it has been
4996  * stopped by the hypervisor.  This function will be called from the host only.
4997  * EINVAL is returned when the host attempts to set the flag for a guest that
4998  * does not support pv clocks.
4999  */
5000 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
5001 {
5002         if (!vcpu->arch.pv_time_enabled)
5003                 return -EINVAL;
5004         vcpu->arch.pvclock_set_guest_stopped_request = true;
5005         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5006         return 0;
5007 }
5008
5009 static int kvm_arch_tsc_has_attr(struct kvm_vcpu *vcpu,
5010                                  struct kvm_device_attr *attr)
5011 {
5012         int r;
5013
5014         switch (attr->attr) {
5015         case KVM_VCPU_TSC_OFFSET:
5016                 r = 0;
5017                 break;
5018         default:
5019                 r = -ENXIO;
5020         }
5021
5022         return r;
5023 }
5024
5025 static int kvm_arch_tsc_get_attr(struct kvm_vcpu *vcpu,
5026                                  struct kvm_device_attr *attr)
5027 {
5028         u64 __user *uaddr = (u64 __user *)(unsigned long)attr->addr;
5029         int r;
5030
5031         if ((u64)(unsigned long)uaddr != attr->addr)
5032                 return -EFAULT;
5033
5034         switch (attr->attr) {
5035         case KVM_VCPU_TSC_OFFSET:
5036                 r = -EFAULT;
5037                 if (put_user(vcpu->arch.l1_tsc_offset, uaddr))
5038                         break;
5039                 r = 0;
5040                 break;
5041         default:
5042                 r = -ENXIO;
5043         }
5044
5045         return r;
5046 }
5047
5048 static int kvm_arch_tsc_set_attr(struct kvm_vcpu *vcpu,
5049                                  struct kvm_device_attr *attr)
5050 {
5051         u64 __user *uaddr = (u64 __user *)(unsigned long)attr->addr;
5052         struct kvm *kvm = vcpu->kvm;
5053         int r;
5054
5055         if ((u64)(unsigned long)uaddr != attr->addr)
5056                 return -EFAULT;
5057
5058         switch (attr->attr) {
5059         case KVM_VCPU_TSC_OFFSET: {
5060                 u64 offset, tsc, ns;
5061                 unsigned long flags;
5062                 bool matched;
5063
5064                 r = -EFAULT;
5065                 if (get_user(offset, uaddr))
5066                         break;
5067
5068                 raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
5069
5070                 matched = (vcpu->arch.virtual_tsc_khz &&
5071                            kvm->arch.last_tsc_khz == vcpu->arch.virtual_tsc_khz &&
5072                            kvm->arch.last_tsc_offset == offset);
5073
5074                 tsc = kvm_scale_tsc(vcpu, rdtsc(), vcpu->arch.l1_tsc_scaling_ratio) + offset;
5075                 ns = get_kvmclock_base_ns();
5076
5077                 __kvm_synchronize_tsc(vcpu, offset, tsc, ns, matched);
5078                 raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
5079
5080                 r = 0;
5081                 break;
5082         }
5083         default:
5084                 r = -ENXIO;
5085         }
5086
5087         return r;
5088 }
5089
5090 static int kvm_vcpu_ioctl_device_attr(struct kvm_vcpu *vcpu,
5091                                       unsigned int ioctl,
5092                                       void __user *argp)
5093 {
5094         struct kvm_device_attr attr;
5095         int r;
5096
5097         if (copy_from_user(&attr, argp, sizeof(attr)))
5098                 return -EFAULT;
5099
5100         if (attr.group != KVM_VCPU_TSC_CTRL)
5101                 return -ENXIO;
5102
5103         switch (ioctl) {
5104         case KVM_HAS_DEVICE_ATTR:
5105                 r = kvm_arch_tsc_has_attr(vcpu, &attr);
5106                 break;
5107         case KVM_GET_DEVICE_ATTR:
5108                 r = kvm_arch_tsc_get_attr(vcpu, &attr);
5109                 break;
5110         case KVM_SET_DEVICE_ATTR:
5111                 r = kvm_arch_tsc_set_attr(vcpu, &attr);
5112                 break;
5113         }
5114
5115         return r;
5116 }
5117
5118 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
5119                                      struct kvm_enable_cap *cap)
5120 {
5121         int r;
5122         uint16_t vmcs_version;
5123         void __user *user_ptr;
5124
5125         if (cap->flags)
5126                 return -EINVAL;
5127
5128         switch (cap->cap) {
5129         case KVM_CAP_HYPERV_SYNIC2:
5130                 if (cap->args[0])
5131                         return -EINVAL;
5132                 fallthrough;
5133
5134         case KVM_CAP_HYPERV_SYNIC:
5135                 if (!irqchip_in_kernel(vcpu->kvm))
5136                         return -EINVAL;
5137                 return kvm_hv_activate_synic(vcpu, cap->cap ==
5138                                              KVM_CAP_HYPERV_SYNIC2);
5139         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
5140                 if (!kvm_x86_ops.nested_ops->enable_evmcs)
5141                         return -ENOTTY;
5142                 r = kvm_x86_ops.nested_ops->enable_evmcs(vcpu, &vmcs_version);
5143                 if (!r) {
5144                         user_ptr = (void __user *)(uintptr_t)cap->args[0];
5145                         if (copy_to_user(user_ptr, &vmcs_version,
5146                                          sizeof(vmcs_version)))
5147                                 r = -EFAULT;
5148                 }
5149                 return r;
5150         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
5151                 if (!kvm_x86_ops.enable_direct_tlbflush)
5152                         return -ENOTTY;
5153
5154                 return static_call(kvm_x86_enable_direct_tlbflush)(vcpu);
5155
5156         case KVM_CAP_HYPERV_ENFORCE_CPUID:
5157                 return kvm_hv_set_enforce_cpuid(vcpu, cap->args[0]);
5158
5159         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
5160                 vcpu->arch.pv_cpuid.enforce = cap->args[0];
5161                 if (vcpu->arch.pv_cpuid.enforce)
5162                         kvm_update_pv_runtime(vcpu);
5163
5164                 return 0;
5165         default:
5166                 return -EINVAL;
5167         }
5168 }
5169
5170 long kvm_arch_vcpu_ioctl(struct file *filp,
5171                          unsigned int ioctl, unsigned long arg)
5172 {
5173         struct kvm_vcpu *vcpu = filp->private_data;
5174         void __user *argp = (void __user *)arg;
5175         int r;
5176         union {
5177                 struct kvm_sregs2 *sregs2;
5178                 struct kvm_lapic_state *lapic;
5179                 struct kvm_xsave *xsave;
5180                 struct kvm_xcrs *xcrs;
5181                 void *buffer;
5182         } u;
5183
5184         vcpu_load(vcpu);
5185
5186         u.buffer = NULL;
5187         switch (ioctl) {
5188         case KVM_GET_LAPIC: {
5189                 r = -EINVAL;
5190                 if (!lapic_in_kernel(vcpu))
5191                         goto out;
5192                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state),
5193                                 GFP_KERNEL_ACCOUNT);
5194
5195                 r = -ENOMEM;
5196                 if (!u.lapic)
5197                         goto out;
5198                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
5199                 if (r)
5200                         goto out;
5201                 r = -EFAULT;
5202                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
5203                         goto out;
5204                 r = 0;
5205                 break;
5206         }
5207         case KVM_SET_LAPIC: {
5208                 r = -EINVAL;
5209                 if (!lapic_in_kernel(vcpu))
5210                         goto out;
5211                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
5212                 if (IS_ERR(u.lapic)) {
5213                         r = PTR_ERR(u.lapic);
5214                         goto out_nofree;
5215                 }
5216
5217                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
5218                 break;
5219         }
5220         case KVM_INTERRUPT: {
5221                 struct kvm_interrupt irq;
5222
5223                 r = -EFAULT;
5224                 if (copy_from_user(&irq, argp, sizeof(irq)))
5225                         goto out;
5226                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
5227                 break;
5228         }
5229         case KVM_NMI: {
5230                 r = kvm_vcpu_ioctl_nmi(vcpu);
5231                 break;
5232         }
5233         case KVM_SMI: {
5234                 r = kvm_vcpu_ioctl_smi(vcpu);
5235                 break;
5236         }
5237         case KVM_SET_CPUID: {
5238                 struct kvm_cpuid __user *cpuid_arg = argp;
5239                 struct kvm_cpuid cpuid;
5240
5241                 r = -EFAULT;
5242                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5243                         goto out;
5244                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
5245                 break;
5246         }
5247         case KVM_SET_CPUID2: {
5248                 struct kvm_cpuid2 __user *cpuid_arg = argp;
5249                 struct kvm_cpuid2 cpuid;
5250
5251                 r = -EFAULT;
5252                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5253                         goto out;
5254                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
5255                                               cpuid_arg->entries);
5256                 break;
5257         }
5258         case KVM_GET_CPUID2: {
5259                 struct kvm_cpuid2 __user *cpuid_arg = argp;
5260                 struct kvm_cpuid2 cpuid;
5261
5262                 r = -EFAULT;
5263                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5264                         goto out;
5265                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
5266                                               cpuid_arg->entries);
5267                 if (r)
5268                         goto out;
5269                 r = -EFAULT;
5270                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
5271                         goto out;
5272                 r = 0;
5273                 break;
5274         }
5275         case KVM_GET_MSRS: {
5276                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
5277                 r = msr_io(vcpu, argp, do_get_msr, 1);
5278                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5279                 break;
5280         }
5281         case KVM_SET_MSRS: {
5282                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
5283                 r = msr_io(vcpu, argp, do_set_msr, 0);
5284                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5285                 break;
5286         }
5287         case KVM_TPR_ACCESS_REPORTING: {
5288                 struct kvm_tpr_access_ctl tac;
5289
5290                 r = -EFAULT;
5291                 if (copy_from_user(&tac, argp, sizeof(tac)))
5292                         goto out;
5293                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
5294                 if (r)
5295                         goto out;
5296                 r = -EFAULT;
5297                 if (copy_to_user(argp, &tac, sizeof(tac)))
5298                         goto out;
5299                 r = 0;
5300                 break;
5301         };
5302         case KVM_SET_VAPIC_ADDR: {
5303                 struct kvm_vapic_addr va;
5304                 int idx;
5305
5306                 r = -EINVAL;
5307                 if (!lapic_in_kernel(vcpu))
5308                         goto out;
5309                 r = -EFAULT;
5310                 if (copy_from_user(&va, argp, sizeof(va)))
5311                         goto out;
5312                 idx = srcu_read_lock(&vcpu->kvm->srcu);
5313                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
5314                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5315                 break;
5316         }
5317         case KVM_X86_SETUP_MCE: {
5318                 u64 mcg_cap;
5319
5320                 r = -EFAULT;
5321                 if (copy_from_user(&mcg_cap, argp, sizeof(mcg_cap)))
5322                         goto out;
5323                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
5324                 break;
5325         }
5326         case KVM_X86_SET_MCE: {
5327                 struct kvm_x86_mce mce;
5328
5329                 r = -EFAULT;
5330                 if (copy_from_user(&mce, argp, sizeof(mce)))
5331                         goto out;
5332                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
5333                 break;
5334         }
5335         case KVM_GET_VCPU_EVENTS: {
5336                 struct kvm_vcpu_events events;
5337
5338                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
5339
5340                 r = -EFAULT;
5341                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
5342                         break;
5343                 r = 0;
5344                 break;
5345         }
5346         case KVM_SET_VCPU_EVENTS: {
5347                 struct kvm_vcpu_events events;
5348
5349                 r = -EFAULT;
5350                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
5351                         break;
5352
5353                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
5354                 break;
5355         }
5356         case KVM_GET_DEBUGREGS: {
5357                 struct kvm_debugregs dbgregs;
5358
5359                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
5360
5361                 r = -EFAULT;
5362                 if (copy_to_user(argp, &dbgregs,
5363                                  sizeof(struct kvm_debugregs)))
5364                         break;
5365                 r = 0;
5366                 break;
5367         }
5368         case KVM_SET_DEBUGREGS: {
5369                 struct kvm_debugregs dbgregs;
5370
5371                 r = -EFAULT;
5372                 if (copy_from_user(&dbgregs, argp,
5373                                    sizeof(struct kvm_debugregs)))
5374                         break;
5375
5376                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
5377                 break;
5378         }
5379         case KVM_GET_XSAVE: {
5380                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL_ACCOUNT);
5381                 r = -ENOMEM;
5382                 if (!u.xsave)
5383                         break;
5384
5385                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
5386
5387                 r = -EFAULT;
5388                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
5389                         break;
5390                 r = 0;
5391                 break;
5392         }
5393         case KVM_SET_XSAVE: {
5394                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
5395                 if (IS_ERR(u.xsave)) {
5396                         r = PTR_ERR(u.xsave);
5397                         goto out_nofree;
5398                 }
5399
5400                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
5401                 break;
5402         }
5403         case KVM_GET_XCRS: {
5404                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL_ACCOUNT);
5405                 r = -ENOMEM;
5406                 if (!u.xcrs)
5407                         break;
5408
5409                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
5410
5411                 r = -EFAULT;
5412                 if (copy_to_user(argp, u.xcrs,
5413                                  sizeof(struct kvm_xcrs)))
5414                         break;
5415                 r = 0;
5416                 break;
5417         }
5418         case KVM_SET_XCRS: {
5419                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
5420                 if (IS_ERR(u.xcrs)) {
5421                         r = PTR_ERR(u.xcrs);
5422                         goto out_nofree;
5423                 }
5424
5425                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
5426                 break;
5427         }
5428         case KVM_SET_TSC_KHZ: {
5429                 u32 user_tsc_khz;
5430
5431                 r = -EINVAL;
5432                 user_tsc_khz = (u32)arg;
5433
5434                 if (kvm_has_tsc_control &&
5435                     user_tsc_khz >= kvm_max_guest_tsc_khz)
5436                         goto out;
5437
5438                 if (user_tsc_khz == 0)
5439                         user_tsc_khz = tsc_khz;
5440
5441                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
5442                         r = 0;
5443
5444                 goto out;
5445         }
5446         case KVM_GET_TSC_KHZ: {
5447                 r = vcpu->arch.virtual_tsc_khz;
5448                 goto out;
5449         }
5450         case KVM_KVMCLOCK_CTRL: {
5451                 r = kvm_set_guest_paused(vcpu);
5452                 goto out;
5453         }
5454         case KVM_ENABLE_CAP: {
5455                 struct kvm_enable_cap cap;
5456
5457                 r = -EFAULT;
5458                 if (copy_from_user(&cap, argp, sizeof(cap)))
5459                         goto out;
5460                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
5461                 break;
5462         }
5463         case KVM_GET_NESTED_STATE: {
5464                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5465                 u32 user_data_size;
5466
5467                 r = -EINVAL;
5468                 if (!kvm_x86_ops.nested_ops->get_state)
5469                         break;
5470
5471                 BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));
5472                 r = -EFAULT;
5473                 if (get_user(user_data_size, &user_kvm_nested_state->size))
5474                         break;
5475
5476                 r = kvm_x86_ops.nested_ops->get_state(vcpu, user_kvm_nested_state,
5477                                                      user_data_size);
5478                 if (r < 0)
5479                         break;
5480
5481                 if (r > user_data_size) {
5482                         if (put_user(r, &user_kvm_nested_state->size))
5483                                 r = -EFAULT;
5484                         else
5485                                 r = -E2BIG;
5486                         break;
5487                 }
5488
5489                 r = 0;
5490                 break;
5491         }
5492         case KVM_SET_NESTED_STATE: {
5493                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5494                 struct kvm_nested_state kvm_state;
5495                 int idx;
5496
5497                 r = -EINVAL;
5498                 if (!kvm_x86_ops.nested_ops->set_state)
5499                         break;
5500
5501                 r = -EFAULT;
5502                 if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))
5503                         break;
5504
5505                 r = -EINVAL;
5506                 if (kvm_state.size < sizeof(kvm_state))
5507                         break;
5508
5509                 if (kvm_state.flags &
5510                     ~(KVM_STATE_NESTED_RUN_PENDING | KVM_STATE_NESTED_GUEST_MODE
5511                       | KVM_STATE_NESTED_EVMCS | KVM_STATE_NESTED_MTF_PENDING
5512                       | KVM_STATE_NESTED_GIF_SET))
5513                         break;
5514
5515                 /* nested_run_pending implies guest_mode.  */
5516                 if ((kvm_state.flags & KVM_STATE_NESTED_RUN_PENDING)
5517                     && !(kvm_state.flags & KVM_STATE_NESTED_GUEST_MODE))
5518                         break;
5519
5520                 idx = srcu_read_lock(&vcpu->kvm->srcu);
5521                 r = kvm_x86_ops.nested_ops->set_state(vcpu, user_kvm_nested_state, &kvm_state);
5522                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5523                 break;
5524         }
5525         case KVM_GET_SUPPORTED_HV_CPUID:
5526                 r = kvm_ioctl_get_supported_hv_cpuid(vcpu, argp);
5527                 break;
5528 #ifdef CONFIG_KVM_XEN
5529         case KVM_XEN_VCPU_GET_ATTR: {
5530                 struct kvm_xen_vcpu_attr xva;
5531
5532                 r = -EFAULT;
5533                 if (copy_from_user(&xva, argp, sizeof(xva)))
5534                         goto out;
5535                 r = kvm_xen_vcpu_get_attr(vcpu, &xva);
5536                 if (!r && copy_to_user(argp, &xva, sizeof(xva)))
5537                         r = -EFAULT;
5538                 break;
5539         }
5540         case KVM_XEN_VCPU_SET_ATTR: {
5541                 struct kvm_xen_vcpu_attr xva;
5542
5543                 r = -EFAULT;
5544                 if (copy_from_user(&xva, argp, sizeof(xva)))
5545                         goto out;
5546                 r = kvm_xen_vcpu_set_attr(vcpu, &xva);
5547                 break;
5548         }
5549 #endif
5550         case KVM_GET_SREGS2: {
5551                 u.sregs2 = kzalloc(sizeof(struct kvm_sregs2), GFP_KERNEL);
5552                 r = -ENOMEM;
5553                 if (!u.sregs2)
5554                         goto out;
5555                 __get_sregs2(vcpu, u.sregs2);
5556                 r = -EFAULT;
5557                 if (copy_to_user(argp, u.sregs2, sizeof(struct kvm_sregs2)))
5558                         goto out;
5559                 r = 0;
5560                 break;
5561         }
5562         case KVM_SET_SREGS2: {
5563                 u.sregs2 = memdup_user(argp, sizeof(struct kvm_sregs2));
5564                 if (IS_ERR(u.sregs2)) {
5565                         r = PTR_ERR(u.sregs2);
5566                         u.sregs2 = NULL;
5567                         goto out;
5568                 }
5569                 r = __set_sregs2(vcpu, u.sregs2);
5570                 break;
5571         }
5572         case KVM_HAS_DEVICE_ATTR:
5573         case KVM_GET_DEVICE_ATTR:
5574         case KVM_SET_DEVICE_ATTR:
5575                 r = kvm_vcpu_ioctl_device_attr(vcpu, ioctl, argp);
5576                 break;
5577         default:
5578                 r = -EINVAL;
5579         }
5580 out:
5581         kfree(u.buffer);
5582 out_nofree:
5583         vcpu_put(vcpu);
5584         return r;
5585 }
5586
5587 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
5588 {
5589         return VM_FAULT_SIGBUS;
5590 }
5591
5592 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
5593 {
5594         int ret;
5595
5596         if (addr > (unsigned int)(-3 * PAGE_SIZE))
5597                 return -EINVAL;
5598         ret = static_call(kvm_x86_set_tss_addr)(kvm, addr);
5599         return ret;
5600 }
5601
5602 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
5603                                               u64 ident_addr)
5604 {
5605         return static_call(kvm_x86_set_identity_map_addr)(kvm, ident_addr);
5606 }
5607
5608 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
5609                                          unsigned long kvm_nr_mmu_pages)
5610 {
5611         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
5612                 return -EINVAL;
5613
5614         mutex_lock(&kvm->slots_lock);
5615
5616         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
5617         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
5618
5619         mutex_unlock(&kvm->slots_lock);
5620         return 0;
5621 }
5622
5623 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
5624 {
5625         return kvm->arch.n_max_mmu_pages;
5626 }
5627
5628 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5629 {
5630         struct kvm_pic *pic = kvm->arch.vpic;
5631         int r;
5632
5633         r = 0;
5634         switch (chip->chip_id) {
5635         case KVM_IRQCHIP_PIC_MASTER:
5636                 memcpy(&chip->chip.pic, &pic->pics[0],
5637                         sizeof(struct kvm_pic_state));
5638                 break;
5639         case KVM_IRQCHIP_PIC_SLAVE:
5640                 memcpy(&chip->chip.pic, &pic->pics[1],
5641                         sizeof(struct kvm_pic_state));
5642                 break;
5643         case KVM_IRQCHIP_IOAPIC:
5644                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
5645                 break;
5646         default:
5647                 r = -EINVAL;
5648                 break;
5649         }
5650         return r;
5651 }
5652
5653 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5654 {
5655         struct kvm_pic *pic = kvm->arch.vpic;
5656         int r;
5657
5658         r = 0;
5659         switch (chip->chip_id) {
5660         case KVM_IRQCHIP_PIC_MASTER:
5661                 spin_lock(&pic->lock);
5662                 memcpy(&pic->pics[0], &chip->chip.pic,
5663                         sizeof(struct kvm_pic_state));
5664                 spin_unlock(&pic->lock);
5665                 break;
5666         case KVM_IRQCHIP_PIC_SLAVE:
5667                 spin_lock(&pic->lock);
5668                 memcpy(&pic->pics[1], &chip->chip.pic,
5669                         sizeof(struct kvm_pic_state));
5670                 spin_unlock(&pic->lock);
5671                 break;
5672         case KVM_IRQCHIP_IOAPIC:
5673                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
5674                 break;
5675         default:
5676                 r = -EINVAL;
5677                 break;
5678         }
5679         kvm_pic_update_irq(pic);
5680         return r;
5681 }
5682
5683 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5684 {
5685         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
5686
5687         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
5688
5689         mutex_lock(&kps->lock);
5690         memcpy(ps, &kps->channels, sizeof(*ps));
5691         mutex_unlock(&kps->lock);
5692         return 0;
5693 }
5694
5695 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5696 {
5697         int i;
5698         struct kvm_pit *pit = kvm->arch.vpit;
5699
5700         mutex_lock(&pit->pit_state.lock);
5701         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
5702         for (i = 0; i < 3; i++)
5703                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
5704         mutex_unlock(&pit->pit_state.lock);
5705         return 0;
5706 }
5707
5708 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5709 {
5710         mutex_lock(&kvm->arch.vpit->pit_state.lock);
5711         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
5712                 sizeof(ps->channels));
5713         ps->flags = kvm->arch.vpit->pit_state.flags;
5714         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
5715         memset(&ps->reserved, 0, sizeof(ps->reserved));
5716         return 0;
5717 }
5718
5719 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5720 {
5721         int start = 0;
5722         int i;
5723         u32 prev_legacy, cur_legacy;
5724         struct kvm_pit *pit = kvm->arch.vpit;
5725
5726         mutex_lock(&pit->pit_state.lock);
5727         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
5728         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
5729         if (!prev_legacy && cur_legacy)
5730                 start = 1;
5731         memcpy(&pit->pit_state.channels, &ps->channels,
5732                sizeof(pit->pit_state.channels));
5733         pit->pit_state.flags = ps->flags;
5734         for (i = 0; i < 3; i++)
5735                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
5736                                    start && i == 0);
5737         mutex_unlock(&pit->pit_state.lock);
5738         return 0;
5739 }
5740
5741 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
5742                                  struct kvm_reinject_control *control)
5743 {
5744         struct kvm_pit *pit = kvm->arch.vpit;
5745
5746         /* pit->pit_state.lock was overloaded to prevent userspace from getting
5747          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
5748          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
5749          */
5750         mutex_lock(&pit->pit_state.lock);
5751         kvm_pit_set_reinject(pit, control->pit_reinject);
5752         mutex_unlock(&pit->pit_state.lock);
5753
5754         return 0;
5755 }
5756
5757 void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot)
5758 {
5759
5760         /*
5761          * Flush all CPUs' dirty log buffers to the  dirty_bitmap.  Called
5762          * before reporting dirty_bitmap to userspace.  KVM flushes the buffers
5763          * on all VM-Exits, thus we only need to kick running vCPUs to force a
5764          * VM-Exit.
5765          */
5766         struct kvm_vcpu *vcpu;
5767         int i;
5768
5769         kvm_for_each_vcpu(i, vcpu, kvm)
5770                 kvm_vcpu_kick(vcpu);
5771 }
5772
5773 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
5774                         bool line_status)
5775 {
5776         if (!irqchip_in_kernel(kvm))
5777                 return -ENXIO;
5778
5779         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
5780                                         irq_event->irq, irq_event->level,
5781                                         line_status);
5782         return 0;
5783 }
5784
5785 int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
5786                             struct kvm_enable_cap *cap)
5787 {
5788         int r;
5789
5790         if (cap->flags)
5791                 return -EINVAL;
5792
5793         switch (cap->cap) {
5794         case KVM_CAP_DISABLE_QUIRKS:
5795                 kvm->arch.disabled_quirks = cap->args[0];
5796                 r = 0;
5797                 break;
5798         case KVM_CAP_SPLIT_IRQCHIP: {
5799                 mutex_lock(&kvm->lock);
5800                 r = -EINVAL;
5801                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
5802                         goto split_irqchip_unlock;
5803                 r = -EEXIST;
5804                 if (irqchip_in_kernel(kvm))
5805                         goto split_irqchip_unlock;
5806                 if (kvm->created_vcpus)
5807                         goto split_irqchip_unlock;
5808                 r = kvm_setup_empty_irq_routing(kvm);
5809                 if (r)
5810                         goto split_irqchip_unlock;
5811                 /* Pairs with irqchip_in_kernel. */
5812                 smp_wmb();
5813                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
5814                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
5815                 r = 0;
5816 split_irqchip_unlock:
5817                 mutex_unlock(&kvm->lock);
5818                 break;
5819         }
5820         case KVM_CAP_X2APIC_API:
5821                 r = -EINVAL;
5822                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
5823                         break;
5824
5825                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
5826                         kvm->arch.x2apic_format = true;
5827                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
5828                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
5829
5830                 r = 0;
5831                 break;
5832         case KVM_CAP_X86_DISABLE_EXITS:
5833                 r = -EINVAL;
5834                 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
5835                         break;
5836
5837                 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
5838                         kvm_can_mwait_in_guest())
5839                         kvm->arch.mwait_in_guest = true;
5840                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT)
5841                         kvm->arch.hlt_in_guest = true;
5842                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
5843                         kvm->arch.pause_in_guest = true;
5844                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_CSTATE)
5845                         kvm->arch.cstate_in_guest = true;
5846                 r = 0;
5847                 break;
5848         case KVM_CAP_MSR_PLATFORM_INFO:
5849                 kvm->arch.guest_can_read_msr_platform_info = cap->args[0];
5850                 r = 0;
5851                 break;
5852         case KVM_CAP_EXCEPTION_PAYLOAD:
5853                 kvm->arch.exception_payload_enabled = cap->args[0];
5854                 r = 0;
5855                 break;
5856         case KVM_CAP_X86_USER_SPACE_MSR:
5857                 kvm->arch.user_space_msr_mask = cap->args[0];
5858                 r = 0;
5859                 break;
5860         case KVM_CAP_X86_BUS_LOCK_EXIT:
5861                 r = -EINVAL;
5862                 if (cap->args[0] & ~KVM_BUS_LOCK_DETECTION_VALID_MODE)
5863                         break;
5864
5865                 if ((cap->args[0] & KVM_BUS_LOCK_DETECTION_OFF) &&
5866                     (cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT))
5867                         break;
5868
5869                 if (kvm_has_bus_lock_exit &&
5870                     cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT)
5871                         kvm->arch.bus_lock_detection_enabled = true;
5872                 r = 0;
5873                 break;
5874 #ifdef CONFIG_X86_SGX_KVM
5875         case KVM_CAP_SGX_ATTRIBUTE: {
5876                 unsigned long allowed_attributes = 0;
5877
5878                 r = sgx_set_attribute(&allowed_attributes, cap->args[0]);
5879                 if (r)
5880                         break;
5881
5882                 /* KVM only supports the PROVISIONKEY privileged attribute. */
5883                 if ((allowed_attributes & SGX_ATTR_PROVISIONKEY) &&
5884                     !(allowed_attributes & ~SGX_ATTR_PROVISIONKEY))
5885                         kvm->arch.sgx_provisioning_allowed = true;
5886                 else
5887                         r = -EINVAL;
5888                 break;
5889         }
5890 #endif
5891         case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
5892                 r = -EINVAL;
5893                 if (kvm_x86_ops.vm_copy_enc_context_from)
5894                         r = kvm_x86_ops.vm_copy_enc_context_from(kvm, cap->args[0]);
5895                 return r;
5896         case KVM_CAP_EXIT_HYPERCALL:
5897                 if (cap->args[0] & ~KVM_EXIT_HYPERCALL_VALID_MASK) {
5898                         r = -EINVAL;
5899                         break;
5900                 }
5901                 kvm->arch.hypercall_exit_enabled = cap->args[0];
5902                 r = 0;
5903                 break;
5904         case KVM_CAP_EXIT_ON_EMULATION_FAILURE:
5905                 r = -EINVAL;
5906                 if (cap->args[0] & ~1)
5907                         break;
5908                 kvm->arch.exit_on_emulation_error = cap->args[0];
5909                 r = 0;
5910                 break;
5911         default:
5912                 r = -EINVAL;
5913                 break;
5914         }
5915         return r;
5916 }
5917
5918 static struct kvm_x86_msr_filter *kvm_alloc_msr_filter(bool default_allow)
5919 {
5920         struct kvm_x86_msr_filter *msr_filter;
5921
5922         msr_filter = kzalloc(sizeof(*msr_filter), GFP_KERNEL_ACCOUNT);
5923         if (!msr_filter)
5924                 return NULL;
5925
5926         msr_filter->default_allow = default_allow;
5927         return msr_filter;
5928 }
5929
5930 static void kvm_free_msr_filter(struct kvm_x86_msr_filter *msr_filter)
5931 {
5932         u32 i;
5933
5934         if (!msr_filter)
5935                 return;
5936
5937         for (i = 0; i < msr_filter->count; i++)
5938                 kfree(msr_filter->ranges[i].bitmap);
5939
5940         kfree(msr_filter);
5941 }
5942
5943 static int kvm_add_msr_filter(struct kvm_x86_msr_filter *msr_filter,
5944                               struct kvm_msr_filter_range *user_range)
5945 {
5946         unsigned long *bitmap = NULL;
5947         size_t bitmap_size;
5948
5949         if (!user_range->nmsrs)
5950                 return 0;
5951
5952         if (user_range->flags & ~(KVM_MSR_FILTER_READ | KVM_MSR_FILTER_WRITE))
5953                 return -EINVAL;
5954
5955         if (!user_range->flags)
5956                 return -EINVAL;
5957
5958         bitmap_size = BITS_TO_LONGS(user_range->nmsrs) * sizeof(long);
5959         if (!bitmap_size || bitmap_size > KVM_MSR_FILTER_MAX_BITMAP_SIZE)
5960                 return -EINVAL;
5961
5962         bitmap = memdup_user((__user u8*)user_range->bitmap, bitmap_size);
5963         if (IS_ERR(bitmap))
5964                 return PTR_ERR(bitmap);
5965
5966         msr_filter->ranges[msr_filter->count] = (struct msr_bitmap_range) {
5967                 .flags = user_range->flags,
5968                 .base = user_range->base,
5969                 .nmsrs = user_range->nmsrs,
5970                 .bitmap = bitmap,
5971         };
5972
5973         msr_filter->count++;
5974         return 0;
5975 }
5976
5977 static int kvm_vm_ioctl_set_msr_filter(struct kvm *kvm, void __user *argp)
5978 {
5979         struct kvm_msr_filter __user *user_msr_filter = argp;
5980         struct kvm_x86_msr_filter *new_filter, *old_filter;
5981         struct kvm_msr_filter filter;
5982         bool default_allow;
5983         bool empty = true;
5984         int r = 0;
5985         u32 i;
5986
5987         if (copy_from_user(&filter, user_msr_filter, sizeof(filter)))
5988                 return -EFAULT;
5989
5990         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++)
5991                 empty &= !filter.ranges[i].nmsrs;
5992
5993         default_allow = !(filter.flags & KVM_MSR_FILTER_DEFAULT_DENY);
5994         if (empty && !default_allow)
5995                 return -EINVAL;
5996
5997         new_filter = kvm_alloc_msr_filter(default_allow);
5998         if (!new_filter)
5999                 return -ENOMEM;
6000
6001         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++) {
6002                 r = kvm_add_msr_filter(new_filter, &filter.ranges[i]);
6003                 if (r) {
6004                         kvm_free_msr_filter(new_filter);
6005                         return r;
6006                 }
6007         }
6008
6009         mutex_lock(&kvm->lock);
6010
6011         /* The per-VM filter is protected by kvm->lock... */
6012         old_filter = srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1);
6013
6014         rcu_assign_pointer(kvm->arch.msr_filter, new_filter);
6015         synchronize_srcu(&kvm->srcu);
6016
6017         kvm_free_msr_filter(old_filter);
6018
6019         kvm_make_all_cpus_request(kvm, KVM_REQ_MSR_FILTER_CHANGED);
6020         mutex_unlock(&kvm->lock);
6021
6022         return 0;
6023 }
6024
6025 #ifdef CONFIG_HAVE_KVM_PM_NOTIFIER
6026 static int kvm_arch_suspend_notifier(struct kvm *kvm)
6027 {
6028         struct kvm_vcpu *vcpu;
6029         int i, ret = 0;
6030
6031         mutex_lock(&kvm->lock);
6032         kvm_for_each_vcpu(i, vcpu, kvm) {
6033                 if (!vcpu->arch.pv_time_enabled)
6034                         continue;
6035
6036                 ret = kvm_set_guest_paused(vcpu);
6037                 if (ret) {
6038                         kvm_err("Failed to pause guest VCPU%d: %d\n",
6039                                 vcpu->vcpu_id, ret);
6040                         break;
6041                 }
6042         }
6043         mutex_unlock(&kvm->lock);
6044
6045         return ret ? NOTIFY_BAD : NOTIFY_DONE;
6046 }
6047
6048 int kvm_arch_pm_notifier(struct kvm *kvm, unsigned long state)
6049 {
6050         switch (state) {
6051         case PM_HIBERNATION_PREPARE:
6052         case PM_SUSPEND_PREPARE:
6053                 return kvm_arch_suspend_notifier(kvm);
6054         }
6055
6056         return NOTIFY_DONE;
6057 }
6058 #endif /* CONFIG_HAVE_KVM_PM_NOTIFIER */
6059
6060 static int kvm_vm_ioctl_get_clock(struct kvm *kvm, void __user *argp)
6061 {
6062         struct kvm_clock_data data = { 0 };
6063
6064         get_kvmclock(kvm, &data);
6065         if (copy_to_user(argp, &data, sizeof(data)))
6066                 return -EFAULT;
6067
6068         return 0;
6069 }
6070
6071 static int kvm_vm_ioctl_set_clock(struct kvm *kvm, void __user *argp)
6072 {
6073         struct kvm_arch *ka = &kvm->arch;
6074         struct kvm_clock_data data;
6075         u64 now_raw_ns;
6076
6077         if (copy_from_user(&data, argp, sizeof(data)))
6078                 return -EFAULT;
6079
6080         /*
6081          * Only KVM_CLOCK_REALTIME is used, but allow passing the
6082          * result of KVM_GET_CLOCK back to KVM_SET_CLOCK.
6083          */
6084         if (data.flags & ~KVM_CLOCK_VALID_FLAGS)
6085                 return -EINVAL;
6086
6087         kvm_hv_invalidate_tsc_page(kvm);
6088         kvm_start_pvclock_update(kvm);
6089         pvclock_update_vm_gtod_copy(kvm);
6090
6091         /*
6092          * This pairs with kvm_guest_time_update(): when masterclock is
6093          * in use, we use master_kernel_ns + kvmclock_offset to set
6094          * unsigned 'system_time' so if we use get_kvmclock_ns() (which
6095          * is slightly ahead) here we risk going negative on unsigned
6096          * 'system_time' when 'data.clock' is very small.
6097          */
6098         if (data.flags & KVM_CLOCK_REALTIME) {
6099                 u64 now_real_ns = ktime_get_real_ns();
6100
6101                 /*
6102                  * Avoid stepping the kvmclock backwards.
6103                  */
6104                 if (now_real_ns > data.realtime)
6105                         data.clock += now_real_ns - data.realtime;
6106         }
6107
6108         if (ka->use_master_clock)
6109                 now_raw_ns = ka->master_kernel_ns;
6110         else
6111                 now_raw_ns = get_kvmclock_base_ns();
6112         ka->kvmclock_offset = data.clock - now_raw_ns;
6113         kvm_end_pvclock_update(kvm);
6114         return 0;
6115 }
6116
6117 long kvm_arch_vm_ioctl(struct file *filp,
6118                        unsigned int ioctl, unsigned long arg)
6119 {
6120         struct kvm *kvm = filp->private_data;
6121         void __user *argp = (void __user *)arg;
6122         int r = -ENOTTY;
6123         /*
6124          * This union makes it completely explicit to gcc-3.x
6125          * that these two variables' stack usage should be
6126          * combined, not added together.
6127          */
6128         union {
6129                 struct kvm_pit_state ps;
6130                 struct kvm_pit_state2 ps2;
6131                 struct kvm_pit_config pit_config;
6132         } u;
6133
6134         switch (ioctl) {
6135         case KVM_SET_TSS_ADDR:
6136                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
6137                 break;
6138         case KVM_SET_IDENTITY_MAP_ADDR: {
6139                 u64 ident_addr;
6140
6141                 mutex_lock(&kvm->lock);
6142                 r = -EINVAL;
6143                 if (kvm->created_vcpus)
6144                         goto set_identity_unlock;
6145                 r = -EFAULT;
6146                 if (copy_from_user(&ident_addr, argp, sizeof(ident_addr)))
6147                         goto set_identity_unlock;
6148                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
6149 set_identity_unlock:
6150                 mutex_unlock(&kvm->lock);
6151                 break;
6152         }
6153         case KVM_SET_NR_MMU_PAGES:
6154                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
6155                 break;
6156         case KVM_GET_NR_MMU_PAGES:
6157                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
6158                 break;
6159         case KVM_CREATE_IRQCHIP: {
6160                 mutex_lock(&kvm->lock);
6161
6162                 r = -EEXIST;
6163                 if (irqchip_in_kernel(kvm))
6164                         goto create_irqchip_unlock;
6165
6166                 r = -EINVAL;
6167                 if (kvm->created_vcpus)
6168                         goto create_irqchip_unlock;
6169
6170                 r = kvm_pic_init(kvm);
6171                 if (r)
6172                         goto create_irqchip_unlock;
6173
6174                 r = kvm_ioapic_init(kvm);
6175                 if (r) {
6176                         kvm_pic_destroy(kvm);
6177                         goto create_irqchip_unlock;
6178                 }
6179
6180                 r = kvm_setup_default_irq_routing(kvm);
6181                 if (r) {
6182                         kvm_ioapic_destroy(kvm);
6183                         kvm_pic_destroy(kvm);
6184                         goto create_irqchip_unlock;
6185                 }
6186                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
6187                 smp_wmb();
6188                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
6189         create_irqchip_unlock:
6190                 mutex_unlock(&kvm->lock);
6191                 break;
6192         }
6193         case KVM_CREATE_PIT:
6194                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
6195                 goto create_pit;
6196         case KVM_CREATE_PIT2:
6197                 r = -EFAULT;
6198                 if (copy_from_user(&u.pit_config, argp,
6199                                    sizeof(struct kvm_pit_config)))
6200                         goto out;
6201         create_pit:
6202                 mutex_lock(&kvm->lock);
6203                 r = -EEXIST;
6204                 if (kvm->arch.vpit)
6205                         goto create_pit_unlock;
6206                 r = -ENOMEM;
6207                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
6208                 if (kvm->arch.vpit)
6209                         r = 0;
6210         create_pit_unlock:
6211                 mutex_unlock(&kvm->lock);
6212                 break;
6213         case KVM_GET_IRQCHIP: {
6214                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
6215                 struct kvm_irqchip *chip;
6216
6217                 chip = memdup_user(argp, sizeof(*chip));
6218                 if (IS_ERR(chip)) {
6219                         r = PTR_ERR(chip);
6220                         goto out;
6221                 }
6222
6223                 r = -ENXIO;
6224                 if (!irqchip_kernel(kvm))
6225                         goto get_irqchip_out;
6226                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
6227                 if (r)
6228                         goto get_irqchip_out;
6229                 r = -EFAULT;
6230                 if (copy_to_user(argp, chip, sizeof(*chip)))
6231                         goto get_irqchip_out;
6232                 r = 0;
6233         get_irqchip_out:
6234                 kfree(chip);
6235                 break;
6236         }
6237         case KVM_SET_IRQCHIP: {
6238                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
6239                 struct kvm_irqchip *chip;
6240
6241                 chip = memdup_user(argp, sizeof(*chip));
6242                 if (IS_ERR(chip)) {
6243                         r = PTR_ERR(chip);
6244                         goto out;
6245                 }
6246
6247                 r = -ENXIO;
6248                 if (!irqchip_kernel(kvm))
6249                         goto set_irqchip_out;
6250                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
6251         set_irqchip_out:
6252                 kfree(chip);
6253                 break;
6254         }
6255         case KVM_GET_PIT: {
6256                 r = -EFAULT;
6257                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
6258                         goto out;
6259                 r = -ENXIO;
6260                 if (!kvm->arch.vpit)
6261                         goto out;
6262                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
6263                 if (r)
6264                         goto out;
6265                 r = -EFAULT;
6266                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
6267                         goto out;
6268                 r = 0;
6269                 break;
6270         }
6271         case KVM_SET_PIT: {
6272                 r = -EFAULT;
6273                 if (copy_from_user(&u.ps, argp, sizeof(u.ps)))
6274                         goto out;
6275                 mutex_lock(&kvm->lock);
6276                 r = -ENXIO;
6277                 if (!kvm->arch.vpit)
6278                         goto set_pit_out;
6279                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
6280 set_pit_out:
6281                 mutex_unlock(&kvm->lock);
6282                 break;
6283         }
6284         case KVM_GET_PIT2: {
6285                 r = -ENXIO;
6286                 if (!kvm->arch.vpit)
6287                         goto out;
6288                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
6289                 if (r)
6290                         goto out;
6291                 r = -EFAULT;
6292                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
6293                         goto out;
6294                 r = 0;
6295                 break;
6296         }
6297         case KVM_SET_PIT2: {
6298                 r = -EFAULT;
6299                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
6300                         goto out;
6301                 mutex_lock(&kvm->lock);
6302                 r = -ENXIO;
6303                 if (!kvm->arch.vpit)
6304                         goto set_pit2_out;
6305                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
6306 set_pit2_out:
6307                 mutex_unlock(&kvm->lock);
6308                 break;
6309         }
6310         case KVM_REINJECT_CONTROL: {
6311                 struct kvm_reinject_control control;
6312                 r =  -EFAULT;
6313                 if (copy_from_user(&control, argp, sizeof(control)))
6314                         goto out;
6315                 r = -ENXIO;
6316                 if (!kvm->arch.vpit)
6317                         goto out;
6318                 r = kvm_vm_ioctl_reinject(kvm, &control);
6319                 break;
6320         }
6321         case KVM_SET_BOOT_CPU_ID:
6322                 r = 0;
6323                 mutex_lock(&kvm->lock);
6324                 if (kvm->created_vcpus)
6325                         r = -EBUSY;
6326                 else
6327                         kvm->arch.bsp_vcpu_id = arg;
6328                 mutex_unlock(&kvm->lock);
6329                 break;
6330 #ifdef CONFIG_KVM_XEN
6331         case KVM_XEN_HVM_CONFIG: {
6332                 struct kvm_xen_hvm_config xhc;
6333                 r = -EFAULT;
6334                 if (copy_from_user(&xhc, argp, sizeof(xhc)))
6335                         goto out;
6336                 r = kvm_xen_hvm_config(kvm, &xhc);
6337                 break;
6338         }
6339         case KVM_XEN_HVM_GET_ATTR: {
6340                 struct kvm_xen_hvm_attr xha;
6341
6342                 r = -EFAULT;
6343                 if (copy_from_user(&xha, argp, sizeof(xha)))
6344                         goto out;
6345                 r = kvm_xen_hvm_get_attr(kvm, &xha);
6346                 if (!r && copy_to_user(argp, &xha, sizeof(xha)))
6347                         r = -EFAULT;
6348                 break;
6349         }
6350         case KVM_XEN_HVM_SET_ATTR: {
6351                 struct kvm_xen_hvm_attr xha;
6352
6353                 r = -EFAULT;
6354                 if (copy_from_user(&xha, argp, sizeof(xha)))
6355                         goto out;
6356                 r = kvm_xen_hvm_set_attr(kvm, &xha);
6357                 break;
6358         }
6359 #endif
6360         case KVM_SET_CLOCK:
6361                 r = kvm_vm_ioctl_set_clock(kvm, argp);
6362                 break;
6363         case KVM_GET_CLOCK:
6364                 r = kvm_vm_ioctl_get_clock(kvm, argp);
6365                 break;
6366         case KVM_MEMORY_ENCRYPT_OP: {
6367                 r = -ENOTTY;
6368                 if (kvm_x86_ops.mem_enc_op)
6369                         r = static_call(kvm_x86_mem_enc_op)(kvm, argp);
6370                 break;
6371         }
6372         case KVM_MEMORY_ENCRYPT_REG_REGION: {
6373                 struct kvm_enc_region region;
6374
6375                 r = -EFAULT;
6376                 if (copy_from_user(&region, argp, sizeof(region)))
6377                         goto out;
6378
6379                 r = -ENOTTY;
6380                 if (kvm_x86_ops.mem_enc_reg_region)
6381                         r = static_call(kvm_x86_mem_enc_reg_region)(kvm, &region);
6382                 break;
6383         }
6384         case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
6385                 struct kvm_enc_region region;
6386
6387                 r = -EFAULT;
6388                 if (copy_from_user(&region, argp, sizeof(region)))
6389                         goto out;
6390
6391                 r = -ENOTTY;
6392                 if (kvm_x86_ops.mem_enc_unreg_region)
6393                         r = static_call(kvm_x86_mem_enc_unreg_region)(kvm, &region);
6394                 break;
6395         }
6396         case KVM_HYPERV_EVENTFD: {
6397                 struct kvm_hyperv_eventfd hvevfd;
6398
6399                 r = -EFAULT;
6400                 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
6401                         goto out;
6402                 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
6403                 break;
6404         }
6405         case KVM_SET_PMU_EVENT_FILTER:
6406                 r = kvm_vm_ioctl_set_pmu_event_filter(kvm, argp);
6407                 break;
6408         case KVM_X86_SET_MSR_FILTER:
6409                 r = kvm_vm_ioctl_set_msr_filter(kvm, argp);
6410                 break;
6411         default:
6412                 r = -ENOTTY;
6413         }
6414 out:
6415         return r;
6416 }
6417
6418 static void kvm_init_msr_list(void)
6419 {
6420         struct x86_pmu_capability x86_pmu;
6421         u32 dummy[2];
6422         unsigned i;
6423
6424         BUILD_BUG_ON_MSG(INTEL_PMC_MAX_FIXED != 4,
6425                          "Please update the fixed PMCs in msrs_to_saved_all[]");
6426
6427         perf_get_x86_pmu_capability(&x86_pmu);
6428
6429         num_msrs_to_save = 0;
6430         num_emulated_msrs = 0;
6431         num_msr_based_features = 0;
6432
6433         for (i = 0; i < ARRAY_SIZE(msrs_to_save_all); i++) {
6434                 if (rdmsr_safe(msrs_to_save_all[i], &dummy[0], &dummy[1]) < 0)
6435                         continue;
6436
6437                 /*
6438                  * Even MSRs that are valid in the host may not be exposed
6439                  * to the guests in some cases.
6440                  */
6441                 switch (msrs_to_save_all[i]) {
6442                 case MSR_IA32_BNDCFGS:
6443                         if (!kvm_mpx_supported())
6444                                 continue;
6445                         break;
6446                 case MSR_TSC_AUX:
6447                         if (!kvm_cpu_cap_has(X86_FEATURE_RDTSCP) &&
6448                             !kvm_cpu_cap_has(X86_FEATURE_RDPID))
6449                                 continue;
6450                         break;
6451                 case MSR_IA32_UMWAIT_CONTROL:
6452                         if (!kvm_cpu_cap_has(X86_FEATURE_WAITPKG))
6453                                 continue;
6454                         break;
6455                 case MSR_IA32_RTIT_CTL:
6456                 case MSR_IA32_RTIT_STATUS:
6457                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT))
6458                                 continue;
6459                         break;
6460                 case MSR_IA32_RTIT_CR3_MATCH:
6461                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6462                             !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering))
6463                                 continue;
6464                         break;
6465                 case MSR_IA32_RTIT_OUTPUT_BASE:
6466                 case MSR_IA32_RTIT_OUTPUT_MASK:
6467                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6468                                 (!intel_pt_validate_hw_cap(PT_CAP_topa_output) &&
6469                                  !intel_pt_validate_hw_cap(PT_CAP_single_range_output)))
6470                                 continue;
6471                         break;
6472                 case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B:
6473                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6474                                 msrs_to_save_all[i] - MSR_IA32_RTIT_ADDR0_A >=
6475                                 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges) * 2)
6476                                 continue;
6477                         break;
6478                 case MSR_ARCH_PERFMON_PERFCTR0 ... MSR_ARCH_PERFMON_PERFCTR0 + 17:
6479                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_PERFCTR0 >=
6480                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
6481                                 continue;
6482                         break;
6483                 case MSR_ARCH_PERFMON_EVENTSEL0 ... MSR_ARCH_PERFMON_EVENTSEL0 + 17:
6484                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_EVENTSEL0 >=
6485                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
6486                                 continue;
6487                         break;
6488                 default:
6489                         break;
6490                 }
6491
6492                 msrs_to_save[num_msrs_to_save++] = msrs_to_save_all[i];
6493         }
6494
6495         for (i = 0; i < ARRAY_SIZE(emulated_msrs_all); i++) {
6496                 if (!static_call(kvm_x86_has_emulated_msr)(NULL, emulated_msrs_all[i]))
6497                         continue;
6498
6499                 emulated_msrs[num_emulated_msrs++] = emulated_msrs_all[i];
6500         }
6501
6502         for (i = 0; i < ARRAY_SIZE(msr_based_features_all); i++) {
6503                 struct kvm_msr_entry msr;
6504
6505                 msr.index = msr_based_features_all[i];
6506                 if (kvm_get_msr_feature(&msr))
6507                         continue;
6508
6509                 msr_based_features[num_msr_based_features++] = msr_based_features_all[i];
6510         }
6511 }
6512
6513 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
6514                            const void *v)
6515 {
6516         int handled = 0;
6517         int n;
6518
6519         do {
6520                 n = min(len, 8);
6521                 if (!(lapic_in_kernel(vcpu) &&
6522                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
6523                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
6524                         break;
6525                 handled += n;
6526                 addr += n;
6527                 len -= n;
6528                 v += n;
6529         } while (len);
6530
6531         return handled;
6532 }
6533
6534 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
6535 {
6536         int handled = 0;
6537         int n;
6538
6539         do {
6540                 n = min(len, 8);
6541                 if (!(lapic_in_kernel(vcpu) &&
6542                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
6543                                          addr, n, v))
6544                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
6545                         break;
6546                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
6547                 handled += n;
6548                 addr += n;
6549                 len -= n;
6550                 v += n;
6551         } while (len);
6552
6553         return handled;
6554 }
6555
6556 static void kvm_set_segment(struct kvm_vcpu *vcpu,
6557                         struct kvm_segment *var, int seg)
6558 {
6559         static_call(kvm_x86_set_segment)(vcpu, var, seg);
6560 }
6561
6562 void kvm_get_segment(struct kvm_vcpu *vcpu,
6563                      struct kvm_segment *var, int seg)
6564 {
6565         static_call(kvm_x86_get_segment)(vcpu, var, seg);
6566 }
6567
6568 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
6569                            struct x86_exception *exception)
6570 {
6571         gpa_t t_gpa;
6572
6573         BUG_ON(!mmu_is_nested(vcpu));
6574
6575         /* NPT walks are always user-walks */
6576         access |= PFERR_USER_MASK;
6577         t_gpa  = vcpu->arch.mmu->gva_to_gpa(vcpu, gpa, access, exception);
6578
6579         return t_gpa;
6580 }
6581
6582 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
6583                               struct x86_exception *exception)
6584 {
6585         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6586         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6587 }
6588 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_read);
6589
6590  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
6591                                 struct x86_exception *exception)
6592 {
6593         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6594         access |= PFERR_FETCH_MASK;
6595         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6596 }
6597
6598 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
6599                                struct x86_exception *exception)
6600 {
6601         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6602         access |= PFERR_WRITE_MASK;
6603         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6604 }
6605 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_write);
6606
6607 /* uses this to access any guest's mapped memory without checking CPL */
6608 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
6609                                 struct x86_exception *exception)
6610 {
6611         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
6612 }
6613
6614 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6615                                       struct kvm_vcpu *vcpu, u32 access,
6616                                       struct x86_exception *exception)
6617 {
6618         void *data = val;
6619         int r = X86EMUL_CONTINUE;
6620
6621         while (bytes) {
6622                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
6623                                                             exception);
6624                 unsigned offset = addr & (PAGE_SIZE-1);
6625                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
6626                 int ret;
6627
6628                 if (gpa == UNMAPPED_GVA)
6629                         return X86EMUL_PROPAGATE_FAULT;
6630                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
6631                                                offset, toread);
6632                 if (ret < 0) {
6633                         r = X86EMUL_IO_NEEDED;
6634                         goto out;
6635                 }
6636
6637                 bytes -= toread;
6638                 data += toread;
6639                 addr += toread;
6640         }
6641 out:
6642         return r;
6643 }
6644
6645 /* used for instruction fetching */
6646 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
6647                                 gva_t addr, void *val, unsigned int bytes,
6648                                 struct x86_exception *exception)
6649 {
6650         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6651         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6652         unsigned offset;
6653         int ret;
6654
6655         /* Inline kvm_read_guest_virt_helper for speed.  */
6656         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
6657                                                     exception);
6658         if (unlikely(gpa == UNMAPPED_GVA))
6659                 return X86EMUL_PROPAGATE_FAULT;
6660
6661         offset = addr & (PAGE_SIZE-1);
6662         if (WARN_ON(offset + bytes > PAGE_SIZE))
6663                 bytes = (unsigned)PAGE_SIZE - offset;
6664         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
6665                                        offset, bytes);
6666         if (unlikely(ret < 0))
6667                 return X86EMUL_IO_NEEDED;
6668
6669         return X86EMUL_CONTINUE;
6670 }
6671
6672 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
6673                                gva_t addr, void *val, unsigned int bytes,
6674                                struct x86_exception *exception)
6675 {
6676         u32 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6677
6678         /*
6679          * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
6680          * is returned, but our callers are not ready for that and they blindly
6681          * call kvm_inject_page_fault.  Ensure that they at least do not leak
6682          * uninitialized kernel stack memory into cr2 and error code.
6683          */
6684         memset(exception, 0, sizeof(*exception));
6685         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
6686                                           exception);
6687 }
6688 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
6689
6690 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
6691                              gva_t addr, void *val, unsigned int bytes,
6692                              struct x86_exception *exception, bool system)
6693 {
6694         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6695         u32 access = 0;
6696
6697         if (!system && static_call(kvm_x86_get_cpl)(vcpu) == 3)
6698                 access |= PFERR_USER_MASK;
6699
6700         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
6701 }
6702
6703 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
6704                 unsigned long addr, void *val, unsigned int bytes)
6705 {
6706         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6707         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
6708
6709         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
6710 }
6711
6712 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6713                                       struct kvm_vcpu *vcpu, u32 access,
6714                                       struct x86_exception *exception)
6715 {
6716         void *data = val;
6717         int r = X86EMUL_CONTINUE;
6718
6719         while (bytes) {
6720                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
6721                                                              access,
6722                                                              exception);
6723                 unsigned offset = addr & (PAGE_SIZE-1);
6724                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
6725                 int ret;
6726
6727                 if (gpa == UNMAPPED_GVA)
6728                         return X86EMUL_PROPAGATE_FAULT;
6729                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
6730                 if (ret < 0) {
6731                         r = X86EMUL_IO_NEEDED;
6732                         goto out;
6733                 }
6734
6735                 bytes -= towrite;
6736                 data += towrite;
6737                 addr += towrite;
6738         }
6739 out:
6740         return r;
6741 }
6742
6743 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
6744                               unsigned int bytes, struct x86_exception *exception,
6745                               bool system)
6746 {
6747         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6748         u32 access = PFERR_WRITE_MASK;
6749
6750         if (!system && static_call(kvm_x86_get_cpl)(vcpu) == 3)
6751                 access |= PFERR_USER_MASK;
6752
6753         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6754                                            access, exception);
6755 }
6756
6757 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
6758                                 unsigned int bytes, struct x86_exception *exception)
6759 {
6760         /* kvm_write_guest_virt_system can pull in tons of pages. */
6761         vcpu->arch.l1tf_flush_l1d = true;
6762
6763         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6764                                            PFERR_WRITE_MASK, exception);
6765 }
6766 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
6767
6768 int handle_ud(struct kvm_vcpu *vcpu)
6769 {
6770         static const char kvm_emulate_prefix[] = { __KVM_EMULATE_PREFIX };
6771         int emul_type = EMULTYPE_TRAP_UD;
6772         char sig[5]; /* ud2; .ascii "kvm" */
6773         struct x86_exception e;
6774
6775         if (unlikely(!static_call(kvm_x86_can_emulate_instruction)(vcpu, NULL, 0)))
6776                 return 1;
6777
6778         if (force_emulation_prefix &&
6779             kvm_read_guest_virt(vcpu, kvm_get_linear_rip(vcpu),
6780                                 sig, sizeof(sig), &e) == 0 &&
6781             memcmp(sig, kvm_emulate_prefix, sizeof(sig)) == 0) {
6782                 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
6783                 emul_type = EMULTYPE_TRAP_UD_FORCED;
6784         }
6785
6786         return kvm_emulate_instruction(vcpu, emul_type);
6787 }
6788 EXPORT_SYMBOL_GPL(handle_ud);
6789
6790 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6791                             gpa_t gpa, bool write)
6792 {
6793         /* For APIC access vmexit */
6794         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
6795                 return 1;
6796
6797         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
6798                 trace_vcpu_match_mmio(gva, gpa, write, true);
6799                 return 1;
6800         }
6801
6802         return 0;
6803 }
6804
6805 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
6806                                 gpa_t *gpa, struct x86_exception *exception,
6807                                 bool write)
6808 {
6809         u32 access = ((static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0)
6810                 | (write ? PFERR_WRITE_MASK : 0);
6811
6812         /*
6813          * currently PKRU is only applied to ept enabled guest so
6814          * there is no pkey in EPT page table for L1 guest or EPT
6815          * shadow page table for L2 guest.
6816          */
6817         if (vcpu_match_mmio_gva(vcpu, gva) && (!is_paging(vcpu) ||
6818             !permission_fault(vcpu, vcpu->arch.walk_mmu,
6819                               vcpu->arch.mmio_access, 0, access))) {
6820                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
6821                                         (gva & (PAGE_SIZE - 1));
6822                 trace_vcpu_match_mmio(gva, *gpa, write, false);
6823                 return 1;
6824         }
6825
6826         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
6827
6828         if (*gpa == UNMAPPED_GVA)
6829                 return -1;
6830
6831         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
6832 }
6833
6834 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
6835                         const void *val, int bytes)
6836 {
6837         int ret;
6838
6839         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
6840         if (ret < 0)
6841                 return 0;
6842         kvm_page_track_write(vcpu, gpa, val, bytes);
6843         return 1;
6844 }
6845
6846 struct read_write_emulator_ops {
6847         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
6848                                   int bytes);
6849         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
6850                                   void *val, int bytes);
6851         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6852                                int bytes, void *val);
6853         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
6854                                     void *val, int bytes);
6855         bool write;
6856 };
6857
6858 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
6859 {
6860         if (vcpu->mmio_read_completed) {
6861                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
6862                                vcpu->mmio_fragments[0].gpa, val);
6863                 vcpu->mmio_read_completed = 0;
6864                 return 1;
6865         }
6866
6867         return 0;
6868 }
6869
6870 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6871                         void *val, int bytes)
6872 {
6873         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
6874 }
6875
6876 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
6877                          void *val, int bytes)
6878 {
6879         return emulator_write_phys(vcpu, gpa, val, bytes);
6880 }
6881
6882 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
6883 {
6884         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
6885         return vcpu_mmio_write(vcpu, gpa, bytes, val);
6886 }
6887
6888 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6889                           void *val, int bytes)
6890 {
6891         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
6892         return X86EMUL_IO_NEEDED;
6893 }
6894
6895 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
6896                            void *val, int bytes)
6897 {
6898         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
6899
6900         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
6901         return X86EMUL_CONTINUE;
6902 }
6903
6904 static const struct read_write_emulator_ops read_emultor = {
6905         .read_write_prepare = read_prepare,
6906         .read_write_emulate = read_emulate,
6907         .read_write_mmio = vcpu_mmio_read,
6908         .read_write_exit_mmio = read_exit_mmio,
6909 };
6910
6911 static const struct read_write_emulator_ops write_emultor = {
6912         .read_write_emulate = write_emulate,
6913         .read_write_mmio = write_mmio,
6914         .read_write_exit_mmio = write_exit_mmio,
6915         .write = true,
6916 };
6917
6918 static int emulator_read_write_onepage(unsigned long addr, void *val,
6919                                        unsigned int bytes,
6920                                        struct x86_exception *exception,
6921                                        struct kvm_vcpu *vcpu,
6922                                        const struct read_write_emulator_ops *ops)
6923 {
6924         gpa_t gpa;
6925         int handled, ret;
6926         bool write = ops->write;
6927         struct kvm_mmio_fragment *frag;
6928         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
6929
6930         /*
6931          * If the exit was due to a NPF we may already have a GPA.
6932          * If the GPA is present, use it to avoid the GVA to GPA table walk.
6933          * Note, this cannot be used on string operations since string
6934          * operation using rep will only have the initial GPA from the NPF
6935          * occurred.
6936          */
6937         if (ctxt->gpa_available && emulator_can_use_gpa(ctxt) &&
6938             (addr & ~PAGE_MASK) == (ctxt->gpa_val & ~PAGE_MASK)) {
6939                 gpa = ctxt->gpa_val;
6940                 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
6941         } else {
6942                 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
6943                 if (ret < 0)
6944                         return X86EMUL_PROPAGATE_FAULT;
6945         }
6946
6947         if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
6948                 return X86EMUL_CONTINUE;
6949
6950         /*
6951          * Is this MMIO handled locally?
6952          */
6953         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
6954         if (handled == bytes)
6955                 return X86EMUL_CONTINUE;
6956
6957         gpa += handled;
6958         bytes -= handled;
6959         val += handled;
6960
6961         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
6962         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
6963         frag->gpa = gpa;
6964         frag->data = val;
6965         frag->len = bytes;
6966         return X86EMUL_CONTINUE;
6967 }
6968
6969 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
6970                         unsigned long addr,
6971                         void *val, unsigned int bytes,
6972                         struct x86_exception *exception,
6973                         const struct read_write_emulator_ops *ops)
6974 {
6975         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6976         gpa_t gpa;
6977         int rc;
6978
6979         if (ops->read_write_prepare &&
6980                   ops->read_write_prepare(vcpu, val, bytes))
6981                 return X86EMUL_CONTINUE;
6982
6983         vcpu->mmio_nr_fragments = 0;
6984
6985         /* Crossing a page boundary? */
6986         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
6987                 int now;
6988
6989                 now = -addr & ~PAGE_MASK;
6990                 rc = emulator_read_write_onepage(addr, val, now, exception,
6991                                                  vcpu, ops);
6992
6993                 if (rc != X86EMUL_CONTINUE)
6994                         return rc;
6995                 addr += now;
6996                 if (ctxt->mode != X86EMUL_MODE_PROT64)
6997                         addr = (u32)addr;
6998                 val += now;
6999                 bytes -= now;
7000         }
7001
7002         rc = emulator_read_write_onepage(addr, val, bytes, exception,
7003                                          vcpu, ops);
7004         if (rc != X86EMUL_CONTINUE)
7005                 return rc;
7006
7007         if (!vcpu->mmio_nr_fragments)
7008                 return rc;
7009
7010         gpa = vcpu->mmio_fragments[0].gpa;
7011
7012         vcpu->mmio_needed = 1;
7013         vcpu->mmio_cur_fragment = 0;
7014
7015         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
7016         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
7017         vcpu->run->exit_reason = KVM_EXIT_MMIO;
7018         vcpu->run->mmio.phys_addr = gpa;
7019
7020         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
7021 }
7022
7023 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
7024                                   unsigned long addr,
7025                                   void *val,
7026                                   unsigned int bytes,
7027                                   struct x86_exception *exception)
7028 {
7029         return emulator_read_write(ctxt, addr, val, bytes,
7030                                    exception, &read_emultor);
7031 }
7032
7033 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
7034                             unsigned long addr,
7035                             const void *val,
7036                             unsigned int bytes,
7037                             struct x86_exception *exception)
7038 {
7039         return emulator_read_write(ctxt, addr, (void *)val, bytes,
7040                                    exception, &write_emultor);
7041 }
7042
7043 #define CMPXCHG_TYPE(t, ptr, old, new) \
7044         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
7045
7046 #ifdef CONFIG_X86_64
7047 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
7048 #else
7049 #  define CMPXCHG64(ptr, old, new) \
7050         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
7051 #endif
7052
7053 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
7054                                      unsigned long addr,
7055                                      const void *old,
7056                                      const void *new,
7057                                      unsigned int bytes,
7058                                      struct x86_exception *exception)
7059 {
7060         struct kvm_host_map map;
7061         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7062         u64 page_line_mask;
7063         gpa_t gpa;
7064         char *kaddr;
7065         bool exchanged;
7066
7067         /* guests cmpxchg8b have to be emulated atomically */
7068         if (bytes > 8 || (bytes & (bytes - 1)))
7069                 goto emul_write;
7070
7071         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
7072
7073         if (gpa == UNMAPPED_GVA ||
7074             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
7075                 goto emul_write;
7076
7077         /*
7078          * Emulate the atomic as a straight write to avoid #AC if SLD is
7079          * enabled in the host and the access splits a cache line.
7080          */
7081         if (boot_cpu_has(X86_FEATURE_SPLIT_LOCK_DETECT))
7082                 page_line_mask = ~(cache_line_size() - 1);
7083         else
7084                 page_line_mask = PAGE_MASK;
7085
7086         if (((gpa + bytes - 1) & page_line_mask) != (gpa & page_line_mask))
7087                 goto emul_write;
7088
7089         if (kvm_vcpu_map(vcpu, gpa_to_gfn(gpa), &map))
7090                 goto emul_write;
7091
7092         kaddr = map.hva + offset_in_page(gpa);
7093
7094         switch (bytes) {
7095         case 1:
7096                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
7097                 break;
7098         case 2:
7099                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
7100                 break;
7101         case 4:
7102                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
7103                 break;
7104         case 8:
7105                 exchanged = CMPXCHG64(kaddr, old, new);
7106                 break;
7107         default:
7108                 BUG();
7109         }
7110
7111         kvm_vcpu_unmap(vcpu, &map, true);
7112
7113         if (!exchanged)
7114                 return X86EMUL_CMPXCHG_FAILED;
7115
7116         kvm_page_track_write(vcpu, gpa, new, bytes);
7117
7118         return X86EMUL_CONTINUE;
7119
7120 emul_write:
7121         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
7122
7123         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
7124 }
7125
7126 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
7127 {
7128         int r = 0, i;
7129
7130         for (i = 0; i < vcpu->arch.pio.count; i++) {
7131                 if (vcpu->arch.pio.in)
7132                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
7133                                             vcpu->arch.pio.size, pd);
7134                 else
7135                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
7136                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
7137                                              pd);
7138                 if (r)
7139                         break;
7140                 pd += vcpu->arch.pio.size;
7141         }
7142         return r;
7143 }
7144
7145 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
7146                                unsigned short port, void *val,
7147                                unsigned int count, bool in)
7148 {
7149         vcpu->arch.pio.port = port;
7150         vcpu->arch.pio.in = in;
7151         vcpu->arch.pio.count  = count;
7152         vcpu->arch.pio.size = size;
7153
7154         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
7155                 vcpu->arch.pio.count = 0;
7156                 return 1;
7157         }
7158
7159         vcpu->run->exit_reason = KVM_EXIT_IO;
7160         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
7161         vcpu->run->io.size = size;
7162         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
7163         vcpu->run->io.count = count;
7164         vcpu->run->io.port = port;
7165
7166         return 0;
7167 }
7168
7169 static int emulator_pio_in(struct kvm_vcpu *vcpu, int size,
7170                            unsigned short port, void *val, unsigned int count)
7171 {
7172         int ret;
7173
7174         if (vcpu->arch.pio.count)
7175                 goto data_avail;
7176
7177         memset(vcpu->arch.pio_data, 0, size * count);
7178
7179         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
7180         if (ret) {
7181 data_avail:
7182                 memcpy(val, vcpu->arch.pio_data, size * count);
7183                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
7184                 vcpu->arch.pio.count = 0;
7185                 return 1;
7186         }
7187
7188         return 0;
7189 }
7190
7191 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
7192                                     int size, unsigned short port, void *val,
7193                                     unsigned int count)
7194 {
7195         return emulator_pio_in(emul_to_vcpu(ctxt), size, port, val, count);
7196
7197 }
7198
7199 static int emulator_pio_out(struct kvm_vcpu *vcpu, int size,
7200                             unsigned short port, const void *val,
7201                             unsigned int count)
7202 {
7203         memcpy(vcpu->arch.pio_data, val, size * count);
7204         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
7205         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
7206 }
7207
7208 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
7209                                      int size, unsigned short port,
7210                                      const void *val, unsigned int count)
7211 {
7212         return emulator_pio_out(emul_to_vcpu(ctxt), size, port, val, count);
7213 }
7214
7215 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
7216 {
7217         return static_call(kvm_x86_get_segment_base)(vcpu, seg);
7218 }
7219
7220 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
7221 {
7222         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
7223 }
7224
7225 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
7226 {
7227         if (!need_emulate_wbinvd(vcpu))
7228                 return X86EMUL_CONTINUE;
7229
7230         if (static_call(kvm_x86_has_wbinvd_exit)()) {
7231                 int cpu = get_cpu();
7232
7233                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
7234                 on_each_cpu_mask(vcpu->arch.wbinvd_dirty_mask,
7235                                 wbinvd_ipi, NULL, 1);
7236                 put_cpu();
7237                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
7238         } else
7239                 wbinvd();
7240         return X86EMUL_CONTINUE;
7241 }
7242
7243 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
7244 {
7245         kvm_emulate_wbinvd_noskip(vcpu);
7246         return kvm_skip_emulated_instruction(vcpu);
7247 }
7248 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
7249
7250
7251
7252 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
7253 {
7254         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
7255 }
7256
7257 static void emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
7258                             unsigned long *dest)
7259 {
7260         kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
7261 }
7262
7263 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
7264                            unsigned long value)
7265 {
7266
7267         return kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
7268 }
7269
7270 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
7271 {
7272         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
7273 }
7274
7275 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
7276 {
7277         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7278         unsigned long value;
7279
7280         switch (cr) {
7281         case 0:
7282                 value = kvm_read_cr0(vcpu);
7283                 break;
7284         case 2:
7285                 value = vcpu->arch.cr2;
7286                 break;
7287         case 3:
7288                 value = kvm_read_cr3(vcpu);
7289                 break;
7290         case 4:
7291                 value = kvm_read_cr4(vcpu);
7292                 break;
7293         case 8:
7294                 value = kvm_get_cr8(vcpu);
7295                 break;
7296         default:
7297                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
7298                 return 0;
7299         }
7300
7301         return value;
7302 }
7303
7304 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
7305 {
7306         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7307         int res = 0;
7308
7309         switch (cr) {
7310         case 0:
7311                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
7312                 break;
7313         case 2:
7314                 vcpu->arch.cr2 = val;
7315                 break;
7316         case 3:
7317                 res = kvm_set_cr3(vcpu, val);
7318                 break;
7319         case 4:
7320                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
7321                 break;
7322         case 8:
7323                 res = kvm_set_cr8(vcpu, val);
7324                 break;
7325         default:
7326                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
7327                 res = -1;
7328         }
7329
7330         return res;
7331 }
7332
7333 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
7334 {
7335         return static_call(kvm_x86_get_cpl)(emul_to_vcpu(ctxt));
7336 }
7337
7338 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7339 {
7340         static_call(kvm_x86_get_gdt)(emul_to_vcpu(ctxt), dt);
7341 }
7342
7343 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7344 {
7345         static_call(kvm_x86_get_idt)(emul_to_vcpu(ctxt), dt);
7346 }
7347
7348 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7349 {
7350         static_call(kvm_x86_set_gdt)(emul_to_vcpu(ctxt), dt);
7351 }
7352
7353 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7354 {
7355         static_call(kvm_x86_set_idt)(emul_to_vcpu(ctxt), dt);
7356 }
7357
7358 static unsigned long emulator_get_cached_segment_base(
7359         struct x86_emulate_ctxt *ctxt, int seg)
7360 {
7361         return get_segment_base(emul_to_vcpu(ctxt), seg);
7362 }
7363
7364 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
7365                                  struct desc_struct *desc, u32 *base3,
7366                                  int seg)
7367 {
7368         struct kvm_segment var;
7369
7370         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
7371         *selector = var.selector;
7372
7373         if (var.unusable) {
7374                 memset(desc, 0, sizeof(*desc));
7375                 if (base3)
7376                         *base3 = 0;
7377                 return false;
7378         }
7379
7380         if (var.g)
7381                 var.limit >>= 12;
7382         set_desc_limit(desc, var.limit);
7383         set_desc_base(desc, (unsigned long)var.base);
7384 #ifdef CONFIG_X86_64
7385         if (base3)
7386                 *base3 = var.base >> 32;
7387 #endif
7388         desc->type = var.type;
7389         desc->s = var.s;
7390         desc->dpl = var.dpl;
7391         desc->p = var.present;
7392         desc->avl = var.avl;
7393         desc->l = var.l;
7394         desc->d = var.db;
7395         desc->g = var.g;
7396
7397         return true;
7398 }
7399
7400 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
7401                                  struct desc_struct *desc, u32 base3,
7402                                  int seg)
7403 {
7404         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7405         struct kvm_segment var;
7406
7407         var.selector = selector;
7408         var.base = get_desc_base(desc);
7409 #ifdef CONFIG_X86_64
7410         var.base |= ((u64)base3) << 32;
7411 #endif
7412         var.limit = get_desc_limit(desc);
7413         if (desc->g)
7414                 var.limit = (var.limit << 12) | 0xfff;
7415         var.type = desc->type;
7416         var.dpl = desc->dpl;
7417         var.db = desc->d;
7418         var.s = desc->s;
7419         var.l = desc->l;
7420         var.g = desc->g;
7421         var.avl = desc->avl;
7422         var.present = desc->p;
7423         var.unusable = !var.present;
7424         var.padding = 0;
7425
7426         kvm_set_segment(vcpu, &var, seg);
7427         return;
7428 }
7429
7430 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
7431                             u32 msr_index, u64 *pdata)
7432 {
7433         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7434         int r;
7435
7436         r = kvm_get_msr(vcpu, msr_index, pdata);
7437
7438         if (r && kvm_get_msr_user_space(vcpu, msr_index, r)) {
7439                 /* Bounce to user space */
7440                 return X86EMUL_IO_NEEDED;
7441         }
7442
7443         return r;
7444 }
7445
7446 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
7447                             u32 msr_index, u64 data)
7448 {
7449         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7450         int r;
7451
7452         r = kvm_set_msr(vcpu, msr_index, data);
7453
7454         if (r && kvm_set_msr_user_space(vcpu, msr_index, data, r)) {
7455                 /* Bounce to user space */
7456                 return X86EMUL_IO_NEEDED;
7457         }
7458
7459         return r;
7460 }
7461
7462 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
7463 {
7464         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7465
7466         return vcpu->arch.smbase;
7467 }
7468
7469 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
7470 {
7471         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7472
7473         vcpu->arch.smbase = smbase;
7474 }
7475
7476 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
7477                               u32 pmc)
7478 {
7479         return kvm_pmu_is_valid_rdpmc_ecx(emul_to_vcpu(ctxt), pmc);
7480 }
7481
7482 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
7483                              u32 pmc, u64 *pdata)
7484 {
7485         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
7486 }
7487
7488 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
7489 {
7490         emul_to_vcpu(ctxt)->arch.halt_request = 1;
7491 }
7492
7493 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
7494                               struct x86_instruction_info *info,
7495                               enum x86_intercept_stage stage)
7496 {
7497         return static_call(kvm_x86_check_intercept)(emul_to_vcpu(ctxt), info, stage,
7498                                             &ctxt->exception);
7499 }
7500
7501 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
7502                               u32 *eax, u32 *ebx, u32 *ecx, u32 *edx,
7503                               bool exact_only)
7504 {
7505         return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, exact_only);
7506 }
7507
7508 static bool emulator_guest_has_long_mode(struct x86_emulate_ctxt *ctxt)
7509 {
7510         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_LM);
7511 }
7512
7513 static bool emulator_guest_has_movbe(struct x86_emulate_ctxt *ctxt)
7514 {
7515         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_MOVBE);
7516 }
7517
7518 static bool emulator_guest_has_fxsr(struct x86_emulate_ctxt *ctxt)
7519 {
7520         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_FXSR);
7521 }
7522
7523 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
7524 {
7525         return kvm_register_read_raw(emul_to_vcpu(ctxt), reg);
7526 }
7527
7528 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
7529 {
7530         kvm_register_write_raw(emul_to_vcpu(ctxt), reg, val);
7531 }
7532
7533 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
7534 {
7535         static_call(kvm_x86_set_nmi_mask)(emul_to_vcpu(ctxt), masked);
7536 }
7537
7538 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
7539 {
7540         return emul_to_vcpu(ctxt)->arch.hflags;
7541 }
7542
7543 static void emulator_exiting_smm(struct x86_emulate_ctxt *ctxt)
7544 {
7545         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7546
7547         kvm_smm_changed(vcpu, false);
7548 }
7549
7550 static int emulator_leave_smm(struct x86_emulate_ctxt *ctxt,
7551                                   const char *smstate)
7552 {
7553         return static_call(kvm_x86_leave_smm)(emul_to_vcpu(ctxt), smstate);
7554 }
7555
7556 static void emulator_triple_fault(struct x86_emulate_ctxt *ctxt)
7557 {
7558         kvm_make_request(KVM_REQ_TRIPLE_FAULT, emul_to_vcpu(ctxt));
7559 }
7560
7561 static int emulator_set_xcr(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr)
7562 {
7563         return __kvm_set_xcr(emul_to_vcpu(ctxt), index, xcr);
7564 }
7565
7566 static const struct x86_emulate_ops emulate_ops = {
7567         .read_gpr            = emulator_read_gpr,
7568         .write_gpr           = emulator_write_gpr,
7569         .read_std            = emulator_read_std,
7570         .write_std           = emulator_write_std,
7571         .read_phys           = kvm_read_guest_phys_system,
7572         .fetch               = kvm_fetch_guest_virt,
7573         .read_emulated       = emulator_read_emulated,
7574         .write_emulated      = emulator_write_emulated,
7575         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
7576         .invlpg              = emulator_invlpg,
7577         .pio_in_emulated     = emulator_pio_in_emulated,
7578         .pio_out_emulated    = emulator_pio_out_emulated,
7579         .get_segment         = emulator_get_segment,
7580         .set_segment         = emulator_set_segment,
7581         .get_cached_segment_base = emulator_get_cached_segment_base,
7582         .get_gdt             = emulator_get_gdt,
7583         .get_idt             = emulator_get_idt,
7584         .set_gdt             = emulator_set_gdt,
7585         .set_idt             = emulator_set_idt,
7586         .get_cr              = emulator_get_cr,
7587         .set_cr              = emulator_set_cr,
7588         .cpl                 = emulator_get_cpl,
7589         .get_dr              = emulator_get_dr,
7590         .set_dr              = emulator_set_dr,
7591         .get_smbase          = emulator_get_smbase,
7592         .set_smbase          = emulator_set_smbase,
7593         .set_msr             = emulator_set_msr,
7594         .get_msr             = emulator_get_msr,
7595         .check_pmc           = emulator_check_pmc,
7596         .read_pmc            = emulator_read_pmc,
7597         .halt                = emulator_halt,
7598         .wbinvd              = emulator_wbinvd,
7599         .fix_hypercall       = emulator_fix_hypercall,
7600         .intercept           = emulator_intercept,
7601         .get_cpuid           = emulator_get_cpuid,
7602         .guest_has_long_mode = emulator_guest_has_long_mode,
7603         .guest_has_movbe     = emulator_guest_has_movbe,
7604         .guest_has_fxsr      = emulator_guest_has_fxsr,
7605         .set_nmi_mask        = emulator_set_nmi_mask,
7606         .get_hflags          = emulator_get_hflags,
7607         .exiting_smm         = emulator_exiting_smm,
7608         .leave_smm           = emulator_leave_smm,
7609         .triple_fault        = emulator_triple_fault,
7610         .set_xcr             = emulator_set_xcr,
7611 };
7612
7613 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
7614 {
7615         u32 int_shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
7616         /*
7617          * an sti; sti; sequence only disable interrupts for the first
7618          * instruction. So, if the last instruction, be it emulated or
7619          * not, left the system with the INT_STI flag enabled, it
7620          * means that the last instruction is an sti. We should not
7621          * leave the flag on in this case. The same goes for mov ss
7622          */
7623         if (int_shadow & mask)
7624                 mask = 0;
7625         if (unlikely(int_shadow || mask)) {
7626                 static_call(kvm_x86_set_interrupt_shadow)(vcpu, mask);
7627                 if (!mask)
7628                         kvm_make_request(KVM_REQ_EVENT, vcpu);
7629         }
7630 }
7631
7632 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
7633 {
7634         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7635         if (ctxt->exception.vector == PF_VECTOR)
7636                 return kvm_inject_emulated_page_fault(vcpu, &ctxt->exception);
7637
7638         if (ctxt->exception.error_code_valid)
7639                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
7640                                       ctxt->exception.error_code);
7641         else
7642                 kvm_queue_exception(vcpu, ctxt->exception.vector);
7643         return false;
7644 }
7645
7646 static struct x86_emulate_ctxt *alloc_emulate_ctxt(struct kvm_vcpu *vcpu)
7647 {
7648         struct x86_emulate_ctxt *ctxt;
7649
7650         ctxt = kmem_cache_zalloc(x86_emulator_cache, GFP_KERNEL_ACCOUNT);
7651         if (!ctxt) {
7652                 pr_err("kvm: failed to allocate vcpu's emulator\n");
7653                 return NULL;
7654         }
7655
7656         ctxt->vcpu = vcpu;
7657         ctxt->ops = &emulate_ops;
7658         vcpu->arch.emulate_ctxt = ctxt;
7659
7660         return ctxt;
7661 }
7662
7663 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
7664 {
7665         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7666         int cs_db, cs_l;
7667
7668         static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
7669
7670         ctxt->gpa_available = false;
7671         ctxt->eflags = kvm_get_rflags(vcpu);
7672         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
7673
7674         ctxt->eip = kvm_rip_read(vcpu);
7675         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
7676                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
7677                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
7678                      cs_db                              ? X86EMUL_MODE_PROT32 :
7679                                                           X86EMUL_MODE_PROT16;
7680         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
7681         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
7682         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
7683
7684         ctxt->interruptibility = 0;
7685         ctxt->have_exception = false;
7686         ctxt->exception.vector = -1;
7687         ctxt->perm_ok = false;
7688
7689         init_decode_cache(ctxt);
7690         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
7691 }
7692
7693 void kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
7694 {
7695         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7696         int ret;
7697
7698         init_emulate_ctxt(vcpu);
7699
7700         ctxt->op_bytes = 2;
7701         ctxt->ad_bytes = 2;
7702         ctxt->_eip = ctxt->eip + inc_eip;
7703         ret = emulate_int_real(ctxt, irq);
7704
7705         if (ret != X86EMUL_CONTINUE) {
7706                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
7707         } else {
7708                 ctxt->eip = ctxt->_eip;
7709                 kvm_rip_write(vcpu, ctxt->eip);
7710                 kvm_set_rflags(vcpu, ctxt->eflags);
7711         }
7712 }
7713 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
7714
7715 static void prepare_emulation_failure_exit(struct kvm_vcpu *vcpu, u64 *data,
7716                                            u8 ndata, u8 *insn_bytes, u8 insn_size)
7717 {
7718         struct kvm_run *run = vcpu->run;
7719         u64 info[5];
7720         u8 info_start;
7721
7722         /*
7723          * Zero the whole array used to retrieve the exit info, as casting to
7724          * u32 for select entries will leave some chunks uninitialized.
7725          */
7726         memset(&info, 0, sizeof(info));
7727
7728         static_call(kvm_x86_get_exit_info)(vcpu, (u32 *)&info[0], &info[1],
7729                                            &info[2], (u32 *)&info[3],
7730                                            (u32 *)&info[4]);
7731
7732         run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
7733         run->emulation_failure.suberror = KVM_INTERNAL_ERROR_EMULATION;
7734
7735         /*
7736          * There's currently space for 13 entries, but 5 are used for the exit
7737          * reason and info.  Restrict to 4 to reduce the maintenance burden
7738          * when expanding kvm_run.emulation_failure in the future.
7739          */
7740         if (WARN_ON_ONCE(ndata > 4))
7741                 ndata = 4;
7742
7743         /* Always include the flags as a 'data' entry. */
7744         info_start = 1;
7745         run->emulation_failure.flags = 0;
7746
7747         if (insn_size) {
7748                 BUILD_BUG_ON((sizeof(run->emulation_failure.insn_size) +
7749                               sizeof(run->emulation_failure.insn_bytes) != 16));
7750                 info_start += 2;
7751                 run->emulation_failure.flags |=
7752                         KVM_INTERNAL_ERROR_EMULATION_FLAG_INSTRUCTION_BYTES;
7753                 run->emulation_failure.insn_size = insn_size;
7754                 memset(run->emulation_failure.insn_bytes, 0x90,
7755                        sizeof(run->emulation_failure.insn_bytes));
7756                 memcpy(run->emulation_failure.insn_bytes, insn_bytes, insn_size);
7757         }
7758
7759         memcpy(&run->internal.data[info_start], info, sizeof(info));
7760         memcpy(&run->internal.data[info_start + ARRAY_SIZE(info)], data,
7761                ndata * sizeof(data[0]));
7762
7763         run->emulation_failure.ndata = info_start + ARRAY_SIZE(info) + ndata;
7764 }
7765
7766 static void prepare_emulation_ctxt_failure_exit(struct kvm_vcpu *vcpu)
7767 {
7768         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7769
7770         prepare_emulation_failure_exit(vcpu, NULL, 0, ctxt->fetch.data,
7771                                        ctxt->fetch.end - ctxt->fetch.data);
7772 }
7773
7774 void __kvm_prepare_emulation_failure_exit(struct kvm_vcpu *vcpu, u64 *data,
7775                                           u8 ndata)
7776 {
7777         prepare_emulation_failure_exit(vcpu, data, ndata, NULL, 0);
7778 }
7779 EXPORT_SYMBOL_GPL(__kvm_prepare_emulation_failure_exit);
7780
7781 void kvm_prepare_emulation_failure_exit(struct kvm_vcpu *vcpu)
7782 {
7783         __kvm_prepare_emulation_failure_exit(vcpu, NULL, 0);
7784 }
7785 EXPORT_SYMBOL_GPL(kvm_prepare_emulation_failure_exit);
7786
7787 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
7788 {
7789         struct kvm *kvm = vcpu->kvm;
7790
7791         ++vcpu->stat.insn_emulation_fail;
7792         trace_kvm_emulate_insn_failed(vcpu);
7793
7794         if (emulation_type & EMULTYPE_VMWARE_GP) {
7795                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
7796                 return 1;
7797         }
7798
7799         if (kvm->arch.exit_on_emulation_error ||
7800             (emulation_type & EMULTYPE_SKIP)) {
7801                 prepare_emulation_ctxt_failure_exit(vcpu);
7802                 return 0;
7803         }
7804
7805         kvm_queue_exception(vcpu, UD_VECTOR);
7806
7807         if (!is_guest_mode(vcpu) && static_call(kvm_x86_get_cpl)(vcpu) == 0) {
7808                 prepare_emulation_ctxt_failure_exit(vcpu);
7809                 return 0;
7810         }
7811
7812         return 1;
7813 }
7814
7815 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
7816                                   bool write_fault_to_shadow_pgtable,
7817                                   int emulation_type)
7818 {
7819         gpa_t gpa = cr2_or_gpa;
7820         kvm_pfn_t pfn;
7821
7822         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7823                 return false;
7824
7825         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7826             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7827                 return false;
7828
7829         if (!vcpu->arch.mmu->direct_map) {
7830                 /*
7831                  * Write permission should be allowed since only
7832                  * write access need to be emulated.
7833                  */
7834                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7835
7836                 /*
7837                  * If the mapping is invalid in guest, let cpu retry
7838                  * it to generate fault.
7839                  */
7840                 if (gpa == UNMAPPED_GVA)
7841                         return true;
7842         }
7843
7844         /*
7845          * Do not retry the unhandleable instruction if it faults on the
7846          * readonly host memory, otherwise it will goto a infinite loop:
7847          * retry instruction -> write #PF -> emulation fail -> retry
7848          * instruction -> ...
7849          */
7850         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
7851
7852         /*
7853          * If the instruction failed on the error pfn, it can not be fixed,
7854          * report the error to userspace.
7855          */
7856         if (is_error_noslot_pfn(pfn))
7857                 return false;
7858
7859         kvm_release_pfn_clean(pfn);
7860
7861         /* The instructions are well-emulated on direct mmu. */
7862         if (vcpu->arch.mmu->direct_map) {
7863                 unsigned int indirect_shadow_pages;
7864
7865                 write_lock(&vcpu->kvm->mmu_lock);
7866                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
7867                 write_unlock(&vcpu->kvm->mmu_lock);
7868
7869                 if (indirect_shadow_pages)
7870                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7871
7872                 return true;
7873         }
7874
7875         /*
7876          * if emulation was due to access to shadowed page table
7877          * and it failed try to unshadow page and re-enter the
7878          * guest to let CPU execute the instruction.
7879          */
7880         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7881
7882         /*
7883          * If the access faults on its page table, it can not
7884          * be fixed by unprotecting shadow page and it should
7885          * be reported to userspace.
7886          */
7887         return !write_fault_to_shadow_pgtable;
7888 }
7889
7890 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
7891                               gpa_t cr2_or_gpa,  int emulation_type)
7892 {
7893         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7894         unsigned long last_retry_eip, last_retry_addr, gpa = cr2_or_gpa;
7895
7896         last_retry_eip = vcpu->arch.last_retry_eip;
7897         last_retry_addr = vcpu->arch.last_retry_addr;
7898
7899         /*
7900          * If the emulation is caused by #PF and it is non-page_table
7901          * writing instruction, it means the VM-EXIT is caused by shadow
7902          * page protected, we can zap the shadow page and retry this
7903          * instruction directly.
7904          *
7905          * Note: if the guest uses a non-page-table modifying instruction
7906          * on the PDE that points to the instruction, then we will unmap
7907          * the instruction and go to an infinite loop. So, we cache the
7908          * last retried eip and the last fault address, if we meet the eip
7909          * and the address again, we can break out of the potential infinite
7910          * loop.
7911          */
7912         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
7913
7914         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
7915                 return false;
7916
7917         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
7918             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
7919                 return false;
7920
7921         if (x86_page_table_writing_insn(ctxt))
7922                 return false;
7923
7924         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2_or_gpa)
7925                 return false;
7926
7927         vcpu->arch.last_retry_eip = ctxt->eip;
7928         vcpu->arch.last_retry_addr = cr2_or_gpa;
7929
7930         if (!vcpu->arch.mmu->direct_map)
7931                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
7932
7933         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
7934
7935         return true;
7936 }
7937
7938 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
7939 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
7940
7941 static void kvm_smm_changed(struct kvm_vcpu *vcpu, bool entering_smm)
7942 {
7943         trace_kvm_smm_transition(vcpu->vcpu_id, vcpu->arch.smbase, entering_smm);
7944
7945         if (entering_smm) {
7946                 vcpu->arch.hflags |= HF_SMM_MASK;
7947         } else {
7948                 vcpu->arch.hflags &= ~(HF_SMM_MASK | HF_SMM_INSIDE_NMI_MASK);
7949
7950                 /* Process a latched INIT or SMI, if any.  */
7951                 kvm_make_request(KVM_REQ_EVENT, vcpu);
7952
7953                 /*
7954                  * Even if KVM_SET_SREGS2 loaded PDPTRs out of band,
7955                  * on SMM exit we still need to reload them from
7956                  * guest memory
7957                  */
7958                 vcpu->arch.pdptrs_from_userspace = false;
7959         }
7960
7961         kvm_mmu_reset_context(vcpu);
7962 }
7963
7964 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
7965                                 unsigned long *db)
7966 {
7967         u32 dr6 = 0;
7968         int i;
7969         u32 enable, rwlen;
7970
7971         enable = dr7;
7972         rwlen = dr7 >> 16;
7973         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
7974                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
7975                         dr6 |= (1 << i);
7976         return dr6;
7977 }
7978
7979 static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu)
7980 {
7981         struct kvm_run *kvm_run = vcpu->run;
7982
7983         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
7984                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_ACTIVE_LOW;
7985                 kvm_run->debug.arch.pc = kvm_get_linear_rip(vcpu);
7986                 kvm_run->debug.arch.exception = DB_VECTOR;
7987                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
7988                 return 0;
7989         }
7990         kvm_queue_exception_p(vcpu, DB_VECTOR, DR6_BS);
7991         return 1;
7992 }
7993
7994 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
7995 {
7996         unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
7997         int r;
7998
7999         r = static_call(kvm_x86_skip_emulated_instruction)(vcpu);
8000         if (unlikely(!r))
8001                 return 0;
8002
8003         /*
8004          * rflags is the old, "raw" value of the flags.  The new value has
8005          * not been saved yet.
8006          *
8007          * This is correct even for TF set by the guest, because "the
8008          * processor will not generate this exception after the instruction
8009          * that sets the TF flag".
8010          */
8011         if (unlikely(rflags & X86_EFLAGS_TF))
8012                 r = kvm_vcpu_do_singlestep(vcpu);
8013         return r;
8014 }
8015 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
8016
8017 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
8018 {
8019         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
8020             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
8021                 struct kvm_run *kvm_run = vcpu->run;
8022                 unsigned long eip = kvm_get_linear_rip(vcpu);
8023                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
8024                                            vcpu->arch.guest_debug_dr7,
8025                                            vcpu->arch.eff_db);
8026
8027                 if (dr6 != 0) {
8028                         kvm_run->debug.arch.dr6 = dr6 | DR6_ACTIVE_LOW;
8029                         kvm_run->debug.arch.pc = eip;
8030                         kvm_run->debug.arch.exception = DB_VECTOR;
8031                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
8032                         *r = 0;
8033                         return true;
8034                 }
8035         }
8036
8037         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
8038             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
8039                 unsigned long eip = kvm_get_linear_rip(vcpu);
8040                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
8041                                            vcpu->arch.dr7,
8042                                            vcpu->arch.db);
8043
8044                 if (dr6 != 0) {
8045                         kvm_queue_exception_p(vcpu, DB_VECTOR, dr6);
8046                         *r = 1;
8047                         return true;
8048                 }
8049         }
8050
8051         return false;
8052 }
8053
8054 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
8055 {
8056         switch (ctxt->opcode_len) {
8057         case 1:
8058                 switch (ctxt->b) {
8059                 case 0xe4:      /* IN */
8060                 case 0xe5:
8061                 case 0xec:
8062                 case 0xed:
8063                 case 0xe6:      /* OUT */
8064                 case 0xe7:
8065                 case 0xee:
8066                 case 0xef:
8067                 case 0x6c:      /* INS */
8068                 case 0x6d:
8069                 case 0x6e:      /* OUTS */
8070                 case 0x6f:
8071                         return true;
8072                 }
8073                 break;
8074         case 2:
8075                 switch (ctxt->b) {
8076                 case 0x33:      /* RDPMC */
8077                         return true;
8078                 }
8079                 break;
8080         }
8081
8082         return false;
8083 }
8084
8085 /*
8086  * Decode to be emulated instruction. Return EMULATION_OK if success.
8087  */
8088 int x86_decode_emulated_instruction(struct kvm_vcpu *vcpu, int emulation_type,
8089                                     void *insn, int insn_len)
8090 {
8091         int r = EMULATION_OK;
8092         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
8093
8094         init_emulate_ctxt(vcpu);
8095
8096         /*
8097          * We will reenter on the same instruction since we do not set
8098          * complete_userspace_io. This does not handle watchpoints yet,
8099          * those would be handled in the emulate_ops.
8100          */
8101         if (!(emulation_type & EMULTYPE_SKIP) &&
8102             kvm_vcpu_check_breakpoint(vcpu, &r))
8103                 return r;
8104
8105         r = x86_decode_insn(ctxt, insn, insn_len, emulation_type);
8106
8107         trace_kvm_emulate_insn_start(vcpu);
8108         ++vcpu->stat.insn_emulation;
8109
8110         return r;
8111 }
8112 EXPORT_SYMBOL_GPL(x86_decode_emulated_instruction);
8113
8114 int x86_emulate_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
8115                             int emulation_type, void *insn, int insn_len)
8116 {
8117         int r;
8118         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
8119         bool writeback = true;
8120         bool write_fault_to_spt;
8121
8122         if (unlikely(!static_call(kvm_x86_can_emulate_instruction)(vcpu, insn, insn_len)))
8123                 return 1;
8124
8125         vcpu->arch.l1tf_flush_l1d = true;
8126
8127         /*
8128          * Clear write_fault_to_shadow_pgtable here to ensure it is
8129          * never reused.
8130          */
8131         write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
8132         vcpu->arch.write_fault_to_shadow_pgtable = false;
8133
8134         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
8135                 kvm_clear_exception_queue(vcpu);
8136
8137                 r = x86_decode_emulated_instruction(vcpu, emulation_type,
8138                                                     insn, insn_len);
8139                 if (r != EMULATION_OK)  {
8140                         if ((emulation_type & EMULTYPE_TRAP_UD) ||
8141                             (emulation_type & EMULTYPE_TRAP_UD_FORCED)) {
8142                                 kvm_queue_exception(vcpu, UD_VECTOR);
8143                                 return 1;
8144                         }
8145                         if (reexecute_instruction(vcpu, cr2_or_gpa,
8146                                                   write_fault_to_spt,
8147                                                   emulation_type))
8148                                 return 1;
8149                         if (ctxt->have_exception) {
8150                                 /*
8151                                  * #UD should result in just EMULATION_FAILED, and trap-like
8152                                  * exception should not be encountered during decode.
8153                                  */
8154                                 WARN_ON_ONCE(ctxt->exception.vector == UD_VECTOR ||
8155                                              exception_type(ctxt->exception.vector) == EXCPT_TRAP);
8156                                 inject_emulated_exception(vcpu);
8157                                 return 1;
8158                         }
8159                         return handle_emulation_failure(vcpu, emulation_type);
8160                 }
8161         }
8162
8163         if ((emulation_type & EMULTYPE_VMWARE_GP) &&
8164             !is_vmware_backdoor_opcode(ctxt)) {
8165                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
8166                 return 1;
8167         }
8168
8169         /*
8170          * Note, EMULTYPE_SKIP is intended for use *only* by vendor callbacks
8171          * for kvm_skip_emulated_instruction().  The caller is responsible for
8172          * updating interruptibility state and injecting single-step #DBs.
8173          */
8174         if (emulation_type & EMULTYPE_SKIP) {
8175                 kvm_rip_write(vcpu, ctxt->_eip);
8176                 if (ctxt->eflags & X86_EFLAGS_RF)
8177                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
8178                 return 1;
8179         }
8180
8181         if (retry_instruction(ctxt, cr2_or_gpa, emulation_type))
8182                 return 1;
8183
8184         /* this is needed for vmware backdoor interface to work since it
8185            changes registers values  during IO operation */
8186         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
8187                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
8188                 emulator_invalidate_register_cache(ctxt);
8189         }
8190
8191 restart:
8192         if (emulation_type & EMULTYPE_PF) {
8193                 /* Save the faulting GPA (cr2) in the address field */
8194                 ctxt->exception.address = cr2_or_gpa;
8195
8196                 /* With shadow page tables, cr2 contains a GVA or nGPA. */
8197                 if (vcpu->arch.mmu->direct_map) {
8198                         ctxt->gpa_available = true;
8199                         ctxt->gpa_val = cr2_or_gpa;
8200                 }
8201         } else {
8202                 /* Sanitize the address out of an abundance of paranoia. */
8203                 ctxt->exception.address = 0;
8204         }
8205
8206         r = x86_emulate_insn(ctxt);
8207
8208         if (r == EMULATION_INTERCEPTED)
8209                 return 1;
8210
8211         if (r == EMULATION_FAILED) {
8212                 if (reexecute_instruction(vcpu, cr2_or_gpa, write_fault_to_spt,
8213                                         emulation_type))
8214                         return 1;
8215
8216                 return handle_emulation_failure(vcpu, emulation_type);
8217         }
8218
8219         if (ctxt->have_exception) {
8220                 r = 1;
8221                 if (inject_emulated_exception(vcpu))
8222                         return r;
8223         } else if (vcpu->arch.pio.count) {
8224                 if (!vcpu->arch.pio.in) {
8225                         /* FIXME: return into emulator if single-stepping.  */
8226                         vcpu->arch.pio.count = 0;
8227                 } else {
8228                         writeback = false;
8229                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
8230                 }
8231                 r = 0;
8232         } else if (vcpu->mmio_needed) {
8233                 ++vcpu->stat.mmio_exits;
8234
8235                 if (!vcpu->mmio_is_write)
8236                         writeback = false;
8237                 r = 0;
8238                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
8239         } else if (r == EMULATION_RESTART)
8240                 goto restart;
8241         else
8242                 r = 1;
8243
8244         if (writeback) {
8245                 unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
8246                 toggle_interruptibility(vcpu, ctxt->interruptibility);
8247                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
8248                 if (!ctxt->have_exception ||
8249                     exception_type(ctxt->exception.vector) == EXCPT_TRAP) {
8250                         kvm_rip_write(vcpu, ctxt->eip);
8251                         if (r && (ctxt->tf || (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)))
8252                                 r = kvm_vcpu_do_singlestep(vcpu);
8253                         if (kvm_x86_ops.update_emulated_instruction)
8254                                 static_call(kvm_x86_update_emulated_instruction)(vcpu);
8255                         __kvm_set_rflags(vcpu, ctxt->eflags);
8256                 }
8257
8258                 /*
8259                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
8260                  * do nothing, and it will be requested again as soon as
8261                  * the shadow expires.  But we still need to check here,
8262                  * because POPF has no interrupt shadow.
8263                  */
8264                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
8265                         kvm_make_request(KVM_REQ_EVENT, vcpu);
8266         } else
8267                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
8268
8269         return r;
8270 }
8271
8272 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type)
8273 {
8274         return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
8275 }
8276 EXPORT_SYMBOL_GPL(kvm_emulate_instruction);
8277
8278 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
8279                                         void *insn, int insn_len)
8280 {
8281         return x86_emulate_instruction(vcpu, 0, 0, insn, insn_len);
8282 }
8283 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer);
8284
8285 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu *vcpu)
8286 {
8287         vcpu->arch.pio.count = 0;
8288         return 1;
8289 }
8290
8291 static int complete_fast_pio_out(struct kvm_vcpu *vcpu)
8292 {
8293         vcpu->arch.pio.count = 0;
8294
8295         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip)))
8296                 return 1;
8297
8298         return kvm_skip_emulated_instruction(vcpu);
8299 }
8300
8301 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
8302                             unsigned short port)
8303 {
8304         unsigned long val = kvm_rax_read(vcpu);
8305         int ret = emulator_pio_out(vcpu, size, port, &val, 1);
8306
8307         if (ret)
8308                 return ret;
8309
8310         /*
8311          * Workaround userspace that relies on old KVM behavior of %rip being
8312          * incremented prior to exiting to userspace to handle "OUT 0x7e".
8313          */
8314         if (port == 0x7e &&
8315             kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_OUT_7E_INC_RIP)) {
8316                 vcpu->arch.complete_userspace_io =
8317                         complete_fast_pio_out_port_0x7e;
8318                 kvm_skip_emulated_instruction(vcpu);
8319         } else {
8320                 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
8321                 vcpu->arch.complete_userspace_io = complete_fast_pio_out;
8322         }
8323         return 0;
8324 }
8325
8326 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
8327 {
8328         unsigned long val;
8329
8330         /* We should only ever be called with arch.pio.count equal to 1 */
8331         BUG_ON(vcpu->arch.pio.count != 1);
8332
8333         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip))) {
8334                 vcpu->arch.pio.count = 0;
8335                 return 1;
8336         }
8337
8338         /* For size less than 4 we merge, else we zero extend */
8339         val = (vcpu->arch.pio.size < 4) ? kvm_rax_read(vcpu) : 0;
8340
8341         /*
8342          * Since vcpu->arch.pio.count == 1 let emulator_pio_in perform
8343          * the copy and tracing
8344          */
8345         emulator_pio_in(vcpu, vcpu->arch.pio.size, vcpu->arch.pio.port, &val, 1);
8346         kvm_rax_write(vcpu, val);
8347
8348         return kvm_skip_emulated_instruction(vcpu);
8349 }
8350
8351 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
8352                            unsigned short port)
8353 {
8354         unsigned long val;
8355         int ret;
8356
8357         /* For size less than 4 we merge, else we zero extend */
8358         val = (size < 4) ? kvm_rax_read(vcpu) : 0;
8359
8360         ret = emulator_pio_in(vcpu, size, port, &val, 1);
8361         if (ret) {
8362                 kvm_rax_write(vcpu, val);
8363                 return ret;
8364         }
8365
8366         vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
8367         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
8368
8369         return 0;
8370 }
8371
8372 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
8373 {
8374         int ret;
8375
8376         if (in)
8377                 ret = kvm_fast_pio_in(vcpu, size, port);
8378         else
8379                 ret = kvm_fast_pio_out(vcpu, size, port);
8380         return ret && kvm_skip_emulated_instruction(vcpu);
8381 }
8382 EXPORT_SYMBOL_GPL(kvm_fast_pio);
8383
8384 static int kvmclock_cpu_down_prep(unsigned int cpu)
8385 {
8386         __this_cpu_write(cpu_tsc_khz, 0);
8387         return 0;
8388 }
8389
8390 static void tsc_khz_changed(void *data)
8391 {
8392         struct cpufreq_freqs *freq = data;
8393         unsigned long khz = 0;
8394
8395         if (data)
8396                 khz = freq->new;
8397         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
8398                 khz = cpufreq_quick_get(raw_smp_processor_id());
8399         if (!khz)
8400                 khz = tsc_khz;
8401         __this_cpu_write(cpu_tsc_khz, khz);
8402 }
8403
8404 #ifdef CONFIG_X86_64
8405 static void kvm_hyperv_tsc_notifier(void)
8406 {
8407         struct kvm *kvm;
8408         int cpu;
8409
8410         mutex_lock(&kvm_lock);
8411         list_for_each_entry(kvm, &vm_list, vm_list)
8412                 kvm_make_mclock_inprogress_request(kvm);
8413
8414         /* no guest entries from this point */
8415         hyperv_stop_tsc_emulation();
8416
8417         /* TSC frequency always matches when on Hyper-V */
8418         for_each_present_cpu(cpu)
8419                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
8420         kvm_max_guest_tsc_khz = tsc_khz;
8421
8422         list_for_each_entry(kvm, &vm_list, vm_list) {
8423                 __kvm_start_pvclock_update(kvm);
8424                 pvclock_update_vm_gtod_copy(kvm);
8425                 kvm_end_pvclock_update(kvm);
8426         }
8427
8428         mutex_unlock(&kvm_lock);
8429 }
8430 #endif
8431
8432 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs *freq, int cpu)
8433 {
8434         struct kvm *kvm;
8435         struct kvm_vcpu *vcpu;
8436         int i, send_ipi = 0;
8437
8438         /*
8439          * We allow guests to temporarily run on slowing clocks,
8440          * provided we notify them after, or to run on accelerating
8441          * clocks, provided we notify them before.  Thus time never
8442          * goes backwards.
8443          *
8444          * However, we have a problem.  We can't atomically update
8445          * the frequency of a given CPU from this function; it is
8446          * merely a notifier, which can be called from any CPU.
8447          * Changing the TSC frequency at arbitrary points in time
8448          * requires a recomputation of local variables related to
8449          * the TSC for each VCPU.  We must flag these local variables
8450          * to be updated and be sure the update takes place with the
8451          * new frequency before any guests proceed.
8452          *
8453          * Unfortunately, the combination of hotplug CPU and frequency
8454          * change creates an intractable locking scenario; the order
8455          * of when these callouts happen is undefined with respect to
8456          * CPU hotplug, and they can race with each other.  As such,
8457          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
8458          * undefined; you can actually have a CPU frequency change take
8459          * place in between the computation of X and the setting of the
8460          * variable.  To protect against this problem, all updates of
8461          * the per_cpu tsc_khz variable are done in an interrupt
8462          * protected IPI, and all callers wishing to update the value
8463          * must wait for a synchronous IPI to complete (which is trivial
8464          * if the caller is on the CPU already).  This establishes the
8465          * necessary total order on variable updates.
8466          *
8467          * Note that because a guest time update may take place
8468          * anytime after the setting of the VCPU's request bit, the
8469          * correct TSC value must be set before the request.  However,
8470          * to ensure the update actually makes it to any guest which
8471          * starts running in hardware virtualization between the set
8472          * and the acquisition of the spinlock, we must also ping the
8473          * CPU after setting the request bit.
8474          *
8475          */
8476
8477         smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
8478
8479         mutex_lock(&kvm_lock);
8480         list_for_each_entry(kvm, &vm_list, vm_list) {
8481                 kvm_for_each_vcpu(i, vcpu, kvm) {
8482                         if (vcpu->cpu != cpu)
8483                                 continue;
8484                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8485                         if (vcpu->cpu != raw_smp_processor_id())
8486                                 send_ipi = 1;
8487                 }
8488         }
8489         mutex_unlock(&kvm_lock);
8490
8491         if (freq->old < freq->new && send_ipi) {
8492                 /*
8493                  * We upscale the frequency.  Must make the guest
8494                  * doesn't see old kvmclock values while running with
8495                  * the new frequency, otherwise we risk the guest sees
8496                  * time go backwards.
8497                  *
8498                  * In case we update the frequency for another cpu
8499                  * (which might be in guest context) send an interrupt
8500                  * to kick the cpu out of guest context.  Next time
8501                  * guest context is entered kvmclock will be updated,
8502                  * so the guest will not see stale values.
8503                  */
8504                 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
8505         }
8506 }
8507
8508 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
8509                                      void *data)
8510 {
8511         struct cpufreq_freqs *freq = data;
8512         int cpu;
8513
8514         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
8515                 return 0;
8516         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
8517                 return 0;
8518
8519         for_each_cpu(cpu, freq->policy->cpus)
8520                 __kvmclock_cpufreq_notifier(freq, cpu);
8521
8522         return 0;
8523 }
8524
8525 static struct notifier_block kvmclock_cpufreq_notifier_block = {
8526         .notifier_call  = kvmclock_cpufreq_notifier
8527 };
8528
8529 static int kvmclock_cpu_online(unsigned int cpu)
8530 {
8531         tsc_khz_changed(NULL);
8532         return 0;
8533 }
8534
8535 static void kvm_timer_init(void)
8536 {
8537         max_tsc_khz = tsc_khz;
8538
8539         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
8540 #ifdef CONFIG_CPU_FREQ
8541                 struct cpufreq_policy *policy;
8542                 int cpu;
8543
8544                 cpu = get_cpu();
8545                 policy = cpufreq_cpu_get(cpu);
8546                 if (policy) {
8547                         if (policy->cpuinfo.max_freq)
8548                                 max_tsc_khz = policy->cpuinfo.max_freq;
8549                         cpufreq_cpu_put(policy);
8550                 }
8551                 put_cpu();
8552 #endif
8553                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
8554                                           CPUFREQ_TRANSITION_NOTIFIER);
8555         }
8556
8557         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
8558                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
8559 }
8560
8561 DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
8562 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu);
8563
8564 int kvm_is_in_guest(void)
8565 {
8566         return __this_cpu_read(current_vcpu) != NULL;
8567 }
8568
8569 static int kvm_is_user_mode(void)
8570 {
8571         int user_mode = 3;
8572
8573         if (__this_cpu_read(current_vcpu))
8574                 user_mode = static_call(kvm_x86_get_cpl)(__this_cpu_read(current_vcpu));
8575
8576         return user_mode != 0;
8577 }
8578
8579 static unsigned long kvm_get_guest_ip(void)
8580 {
8581         unsigned long ip = 0;
8582
8583         if (__this_cpu_read(current_vcpu))
8584                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
8585
8586         return ip;
8587 }
8588
8589 static void kvm_handle_intel_pt_intr(void)
8590 {
8591         struct kvm_vcpu *vcpu = __this_cpu_read(current_vcpu);
8592
8593         kvm_make_request(KVM_REQ_PMI, vcpu);
8594         __set_bit(MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI_BIT,
8595                         (unsigned long *)&vcpu->arch.pmu.global_status);
8596 }
8597
8598 static struct perf_guest_info_callbacks kvm_guest_cbs = {
8599         .is_in_guest            = kvm_is_in_guest,
8600         .is_user_mode           = kvm_is_user_mode,
8601         .get_guest_ip           = kvm_get_guest_ip,
8602         .handle_intel_pt_intr   = kvm_handle_intel_pt_intr,
8603 };
8604
8605 #ifdef CONFIG_X86_64
8606 static void pvclock_gtod_update_fn(struct work_struct *work)
8607 {
8608         struct kvm *kvm;
8609
8610         struct kvm_vcpu *vcpu;
8611         int i;
8612
8613         mutex_lock(&kvm_lock);
8614         list_for_each_entry(kvm, &vm_list, vm_list)
8615                 kvm_for_each_vcpu(i, vcpu, kvm)
8616                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
8617         atomic_set(&kvm_guest_has_master_clock, 0);
8618         mutex_unlock(&kvm_lock);
8619 }
8620
8621 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
8622
8623 /*
8624  * Indirection to move queue_work() out of the tk_core.seq write held
8625  * region to prevent possible deadlocks against time accessors which
8626  * are invoked with work related locks held.
8627  */
8628 static void pvclock_irq_work_fn(struct irq_work *w)
8629 {
8630         queue_work(system_long_wq, &pvclock_gtod_work);
8631 }
8632
8633 static DEFINE_IRQ_WORK(pvclock_irq_work, pvclock_irq_work_fn);
8634
8635 /*
8636  * Notification about pvclock gtod data update.
8637  */
8638 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
8639                                void *priv)
8640 {
8641         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
8642         struct timekeeper *tk = priv;
8643
8644         update_pvclock_gtod(tk);
8645
8646         /*
8647          * Disable master clock if host does not trust, or does not use,
8648          * TSC based clocksource. Delegate queue_work() to irq_work as
8649          * this is invoked with tk_core.seq write held.
8650          */
8651         if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
8652             atomic_read(&kvm_guest_has_master_clock) != 0)
8653                 irq_work_queue(&pvclock_irq_work);
8654         return 0;
8655 }
8656
8657 static struct notifier_block pvclock_gtod_notifier = {
8658         .notifier_call = pvclock_gtod_notify,
8659 };
8660 #endif
8661
8662 int kvm_arch_init(void *opaque)
8663 {
8664         struct kvm_x86_init_ops *ops = opaque;
8665         int r;
8666
8667         if (kvm_x86_ops.hardware_enable) {
8668                 pr_err("kvm: already loaded vendor module '%s'\n", kvm_x86_ops.name);
8669                 r = -EEXIST;
8670                 goto out;
8671         }
8672
8673         if (!ops->cpu_has_kvm_support()) {
8674                 pr_err_ratelimited("kvm: no hardware support for '%s'\n",
8675                                    ops->runtime_ops->name);
8676                 r = -EOPNOTSUPP;
8677                 goto out;
8678         }
8679         if (ops->disabled_by_bios()) {
8680                 pr_err_ratelimited("kvm: support for '%s' disabled by bios\n",
8681                                    ops->runtime_ops->name);
8682                 r = -EOPNOTSUPP;
8683                 goto out;
8684         }
8685
8686         /*
8687          * KVM explicitly assumes that the guest has an FPU and
8688          * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
8689          * vCPU's FPU state as a fxregs_state struct.
8690          */
8691         if (!boot_cpu_has(X86_FEATURE_FPU) || !boot_cpu_has(X86_FEATURE_FXSR)) {
8692                 printk(KERN_ERR "kvm: inadequate fpu\n");
8693                 r = -EOPNOTSUPP;
8694                 goto out;
8695         }
8696
8697         r = -ENOMEM;
8698         x86_fpu_cache = kmem_cache_create("x86_fpu", sizeof(struct fpu),
8699                                           __alignof__(struct fpu), SLAB_ACCOUNT,
8700                                           NULL);
8701         if (!x86_fpu_cache) {
8702                 printk(KERN_ERR "kvm: failed to allocate cache for x86 fpu\n");
8703                 goto out;
8704         }
8705
8706         x86_emulator_cache = kvm_alloc_emulator_cache();
8707         if (!x86_emulator_cache) {
8708                 pr_err("kvm: failed to allocate cache for x86 emulator\n");
8709                 goto out_free_x86_fpu_cache;
8710         }
8711
8712         user_return_msrs = alloc_percpu(struct kvm_user_return_msrs);
8713         if (!user_return_msrs) {
8714                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_user_return_msrs\n");
8715                 goto out_free_x86_emulator_cache;
8716         }
8717         kvm_nr_uret_msrs = 0;
8718
8719         r = kvm_mmu_module_init();
8720         if (r)
8721                 goto out_free_percpu;
8722
8723         kvm_timer_init();
8724
8725         perf_register_guest_info_callbacks(&kvm_guest_cbs);
8726
8727         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
8728                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
8729                 supported_xcr0 = host_xcr0 & KVM_SUPPORTED_XCR0;
8730         }
8731
8732         if (pi_inject_timer == -1)
8733                 pi_inject_timer = housekeeping_enabled(HK_FLAG_TIMER);
8734 #ifdef CONFIG_X86_64
8735         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
8736
8737         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
8738                 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
8739 #endif
8740
8741         return 0;
8742
8743 out_free_percpu:
8744         free_percpu(user_return_msrs);
8745 out_free_x86_emulator_cache:
8746         kmem_cache_destroy(x86_emulator_cache);
8747 out_free_x86_fpu_cache:
8748         kmem_cache_destroy(x86_fpu_cache);
8749 out:
8750         return r;
8751 }
8752
8753 void kvm_arch_exit(void)
8754 {
8755 #ifdef CONFIG_X86_64
8756         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
8757                 clear_hv_tscchange_cb();
8758 #endif
8759         kvm_lapic_exit();
8760         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
8761
8762         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
8763                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
8764                                             CPUFREQ_TRANSITION_NOTIFIER);
8765         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
8766 #ifdef CONFIG_X86_64
8767         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
8768         irq_work_sync(&pvclock_irq_work);
8769         cancel_work_sync(&pvclock_gtod_work);
8770 #endif
8771         kvm_x86_ops.hardware_enable = NULL;
8772         kvm_mmu_module_exit();
8773         free_percpu(user_return_msrs);
8774         kmem_cache_destroy(x86_emulator_cache);
8775         kmem_cache_destroy(x86_fpu_cache);
8776 #ifdef CONFIG_KVM_XEN
8777         static_key_deferred_flush(&kvm_xen_enabled);
8778         WARN_ON(static_branch_unlikely(&kvm_xen_enabled.key));
8779 #endif
8780 }
8781
8782 static int __kvm_vcpu_halt(struct kvm_vcpu *vcpu, int state, int reason)
8783 {
8784         ++vcpu->stat.halt_exits;
8785         if (lapic_in_kernel(vcpu)) {
8786                 vcpu->arch.mp_state = state;
8787                 return 1;
8788         } else {
8789                 vcpu->run->exit_reason = reason;
8790                 return 0;
8791         }
8792 }
8793
8794 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
8795 {
8796         return __kvm_vcpu_halt(vcpu, KVM_MP_STATE_HALTED, KVM_EXIT_HLT);
8797 }
8798 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
8799
8800 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
8801 {
8802         int ret = kvm_skip_emulated_instruction(vcpu);
8803         /*
8804          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
8805          * KVM_EXIT_DEBUG here.
8806          */
8807         return kvm_vcpu_halt(vcpu) && ret;
8808 }
8809 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
8810
8811 int kvm_emulate_ap_reset_hold(struct kvm_vcpu *vcpu)
8812 {
8813         int ret = kvm_skip_emulated_instruction(vcpu);
8814
8815         return __kvm_vcpu_halt(vcpu, KVM_MP_STATE_AP_RESET_HOLD, KVM_EXIT_AP_RESET_HOLD) && ret;
8816 }
8817 EXPORT_SYMBOL_GPL(kvm_emulate_ap_reset_hold);
8818
8819 #ifdef CONFIG_X86_64
8820 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
8821                                 unsigned long clock_type)
8822 {
8823         struct kvm_clock_pairing clock_pairing;
8824         struct timespec64 ts;
8825         u64 cycle;
8826         int ret;
8827
8828         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
8829                 return -KVM_EOPNOTSUPP;
8830
8831         if (!kvm_get_walltime_and_clockread(&ts, &cycle))
8832                 return -KVM_EOPNOTSUPP;
8833
8834         clock_pairing.sec = ts.tv_sec;
8835         clock_pairing.nsec = ts.tv_nsec;
8836         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
8837         clock_pairing.flags = 0;
8838         memset(&clock_pairing.pad, 0, sizeof(clock_pairing.pad));
8839
8840         ret = 0;
8841         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
8842                             sizeof(struct kvm_clock_pairing)))
8843                 ret = -KVM_EFAULT;
8844
8845         return ret;
8846 }
8847 #endif
8848
8849 /*
8850  * kvm_pv_kick_cpu_op:  Kick a vcpu.
8851  *
8852  * @apicid - apicid of vcpu to be kicked.
8853  */
8854 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
8855 {
8856         struct kvm_lapic_irq lapic_irq;
8857
8858         lapic_irq.shorthand = APIC_DEST_NOSHORT;
8859         lapic_irq.dest_mode = APIC_DEST_PHYSICAL;
8860         lapic_irq.level = 0;
8861         lapic_irq.dest_id = apicid;
8862         lapic_irq.msi_redir_hint = false;
8863
8864         lapic_irq.delivery_mode = APIC_DM_REMRD;
8865         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
8866 }
8867
8868 bool kvm_apicv_activated(struct kvm *kvm)
8869 {
8870         return (READ_ONCE(kvm->arch.apicv_inhibit_reasons) == 0);
8871 }
8872 EXPORT_SYMBOL_GPL(kvm_apicv_activated);
8873
8874 static void kvm_apicv_init(struct kvm *kvm)
8875 {
8876         init_rwsem(&kvm->arch.apicv_update_lock);
8877
8878         if (enable_apicv)
8879                 clear_bit(APICV_INHIBIT_REASON_DISABLE,
8880                           &kvm->arch.apicv_inhibit_reasons);
8881         else
8882                 set_bit(APICV_INHIBIT_REASON_DISABLE,
8883                         &kvm->arch.apicv_inhibit_reasons);
8884 }
8885
8886 static void kvm_sched_yield(struct kvm_vcpu *vcpu, unsigned long dest_id)
8887 {
8888         struct kvm_vcpu *target = NULL;
8889         struct kvm_apic_map *map;
8890
8891         vcpu->stat.directed_yield_attempted++;
8892
8893         if (single_task_running())
8894                 goto no_yield;
8895
8896         rcu_read_lock();
8897         map = rcu_dereference(vcpu->kvm->arch.apic_map);
8898
8899         if (likely(map) && dest_id <= map->max_apic_id && map->phys_map[dest_id])
8900                 target = map->phys_map[dest_id]->vcpu;
8901
8902         rcu_read_unlock();
8903
8904         if (!target || !READ_ONCE(target->ready))
8905                 goto no_yield;
8906
8907         /* Ignore requests to yield to self */
8908         if (vcpu == target)
8909                 goto no_yield;
8910
8911         if (kvm_vcpu_yield_to(target) <= 0)
8912                 goto no_yield;
8913
8914         vcpu->stat.directed_yield_successful++;
8915
8916 no_yield:
8917         return;
8918 }
8919
8920 static int complete_hypercall_exit(struct kvm_vcpu *vcpu)
8921 {
8922         u64 ret = vcpu->run->hypercall.ret;
8923
8924         if (!is_64_bit_mode(vcpu))
8925                 ret = (u32)ret;
8926         kvm_rax_write(vcpu, ret);
8927         ++vcpu->stat.hypercalls;
8928         return kvm_skip_emulated_instruction(vcpu);
8929 }
8930
8931 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
8932 {
8933         unsigned long nr, a0, a1, a2, a3, ret;
8934         int op_64_bit;
8935
8936         if (kvm_xen_hypercall_enabled(vcpu->kvm))
8937                 return kvm_xen_hypercall(vcpu);
8938
8939         if (kvm_hv_hypercall_enabled(vcpu))
8940                 return kvm_hv_hypercall(vcpu);
8941
8942         nr = kvm_rax_read(vcpu);
8943         a0 = kvm_rbx_read(vcpu);
8944         a1 = kvm_rcx_read(vcpu);
8945         a2 = kvm_rdx_read(vcpu);
8946         a3 = kvm_rsi_read(vcpu);
8947
8948         trace_kvm_hypercall(nr, a0, a1, a2, a3);
8949
8950         op_64_bit = is_64_bit_mode(vcpu);
8951         if (!op_64_bit) {
8952                 nr &= 0xFFFFFFFF;
8953                 a0 &= 0xFFFFFFFF;
8954                 a1 &= 0xFFFFFFFF;
8955                 a2 &= 0xFFFFFFFF;
8956                 a3 &= 0xFFFFFFFF;
8957         }
8958
8959         if (static_call(kvm_x86_get_cpl)(vcpu) != 0) {
8960                 ret = -KVM_EPERM;
8961                 goto out;
8962         }
8963
8964         ret = -KVM_ENOSYS;
8965
8966         switch (nr) {
8967         case KVM_HC_VAPIC_POLL_IRQ:
8968                 ret = 0;
8969                 break;
8970         case KVM_HC_KICK_CPU:
8971                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_UNHALT))
8972                         break;
8973
8974                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
8975                 kvm_sched_yield(vcpu, a1);
8976                 ret = 0;
8977                 break;
8978 #ifdef CONFIG_X86_64
8979         case KVM_HC_CLOCK_PAIRING:
8980                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
8981                 break;
8982 #endif
8983         case KVM_HC_SEND_IPI:
8984                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SEND_IPI))
8985                         break;
8986
8987                 ret = kvm_pv_send_ipi(vcpu->kvm, a0, a1, a2, a3, op_64_bit);
8988                 break;
8989         case KVM_HC_SCHED_YIELD:
8990                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SCHED_YIELD))
8991                         break;
8992
8993                 kvm_sched_yield(vcpu, a0);
8994                 ret = 0;
8995                 break;
8996         case KVM_HC_MAP_GPA_RANGE: {
8997                 u64 gpa = a0, npages = a1, attrs = a2;
8998
8999                 ret = -KVM_ENOSYS;
9000                 if (!(vcpu->kvm->arch.hypercall_exit_enabled & (1 << KVM_HC_MAP_GPA_RANGE)))
9001                         break;
9002
9003                 if (!PAGE_ALIGNED(gpa) || !npages ||
9004                     gpa_to_gfn(gpa) + npages <= gpa_to_gfn(gpa)) {
9005                         ret = -KVM_EINVAL;
9006                         break;
9007                 }
9008
9009                 vcpu->run->exit_reason        = KVM_EXIT_HYPERCALL;
9010                 vcpu->run->hypercall.nr       = KVM_HC_MAP_GPA_RANGE;
9011                 vcpu->run->hypercall.args[0]  = gpa;
9012                 vcpu->run->hypercall.args[1]  = npages;
9013                 vcpu->run->hypercall.args[2]  = attrs;
9014                 vcpu->run->hypercall.longmode = op_64_bit;
9015                 vcpu->arch.complete_userspace_io = complete_hypercall_exit;
9016                 return 0;
9017         }
9018         default:
9019                 ret = -KVM_ENOSYS;
9020                 break;
9021         }
9022 out:
9023         if (!op_64_bit)
9024                 ret = (u32)ret;
9025         kvm_rax_write(vcpu, ret);
9026
9027         ++vcpu->stat.hypercalls;
9028         return kvm_skip_emulated_instruction(vcpu);
9029 }
9030 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
9031
9032 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
9033 {
9034         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
9035         char instruction[3];
9036         unsigned long rip = kvm_rip_read(vcpu);
9037
9038         static_call(kvm_x86_patch_hypercall)(vcpu, instruction);
9039
9040         return emulator_write_emulated(ctxt, rip, instruction, 3,
9041                 &ctxt->exception);
9042 }
9043
9044 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
9045 {
9046         return vcpu->run->request_interrupt_window &&
9047                 likely(!pic_in_kernel(vcpu->kvm));
9048 }
9049
9050 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
9051 {
9052         struct kvm_run *kvm_run = vcpu->run;
9053
9054         /*
9055          * if_flag is obsolete and useless, so do not bother
9056          * setting it for SEV-ES guests.  Userspace can just
9057          * use kvm_run->ready_for_interrupt_injection.
9058          */
9059         kvm_run->if_flag = !vcpu->arch.guest_state_protected
9060                 && (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
9061
9062         kvm_run->cr8 = kvm_get_cr8(vcpu);
9063         kvm_run->apic_base = kvm_get_apic_base(vcpu);
9064         kvm_run->ready_for_interrupt_injection =
9065                 pic_in_kernel(vcpu->kvm) ||
9066                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
9067
9068         if (is_smm(vcpu))
9069                 kvm_run->flags |= KVM_RUN_X86_SMM;
9070 }
9071
9072 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
9073 {
9074         int max_irr, tpr;
9075
9076         if (!kvm_x86_ops.update_cr8_intercept)
9077                 return;
9078
9079         if (!lapic_in_kernel(vcpu))
9080                 return;
9081
9082         if (vcpu->arch.apicv_active)
9083                 return;
9084
9085         if (!vcpu->arch.apic->vapic_addr)
9086                 max_irr = kvm_lapic_find_highest_irr(vcpu);
9087         else
9088                 max_irr = -1;
9089
9090         if (max_irr != -1)
9091                 max_irr >>= 4;
9092
9093         tpr = kvm_lapic_get_cr8(vcpu);
9094
9095         static_call(kvm_x86_update_cr8_intercept)(vcpu, tpr, max_irr);
9096 }
9097
9098
9099 int kvm_check_nested_events(struct kvm_vcpu *vcpu)
9100 {
9101         if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
9102                 kvm_x86_ops.nested_ops->triple_fault(vcpu);
9103                 return 1;
9104         }
9105
9106         return kvm_x86_ops.nested_ops->check_events(vcpu);
9107 }
9108
9109 static void kvm_inject_exception(struct kvm_vcpu *vcpu)
9110 {
9111         if (vcpu->arch.exception.error_code && !is_protmode(vcpu))
9112                 vcpu->arch.exception.error_code = false;
9113         static_call(kvm_x86_queue_exception)(vcpu);
9114 }
9115
9116 static int inject_pending_event(struct kvm_vcpu *vcpu, bool *req_immediate_exit)
9117 {
9118         int r;
9119         bool can_inject = true;
9120
9121         /* try to reinject previous events if any */
9122
9123         if (vcpu->arch.exception.injected) {
9124                 kvm_inject_exception(vcpu);
9125                 can_inject = false;
9126         }
9127         /*
9128          * Do not inject an NMI or interrupt if there is a pending
9129          * exception.  Exceptions and interrupts are recognized at
9130          * instruction boundaries, i.e. the start of an instruction.
9131          * Trap-like exceptions, e.g. #DB, have higher priority than
9132          * NMIs and interrupts, i.e. traps are recognized before an
9133          * NMI/interrupt that's pending on the same instruction.
9134          * Fault-like exceptions, e.g. #GP and #PF, are the lowest
9135          * priority, but are only generated (pended) during instruction
9136          * execution, i.e. a pending fault-like exception means the
9137          * fault occurred on the *previous* instruction and must be
9138          * serviced prior to recognizing any new events in order to
9139          * fully complete the previous instruction.
9140          */
9141         else if (!vcpu->arch.exception.pending) {
9142                 if (vcpu->arch.nmi_injected) {
9143                         static_call(kvm_x86_set_nmi)(vcpu);
9144                         can_inject = false;
9145                 } else if (vcpu->arch.interrupt.injected) {
9146                         static_call(kvm_x86_set_irq)(vcpu);
9147                         can_inject = false;
9148                 }
9149         }
9150
9151         WARN_ON_ONCE(vcpu->arch.exception.injected &&
9152                      vcpu->arch.exception.pending);
9153
9154         /*
9155          * Call check_nested_events() even if we reinjected a previous event
9156          * in order for caller to determine if it should require immediate-exit
9157          * from L2 to L1 due to pending L1 events which require exit
9158          * from L2 to L1.
9159          */
9160         if (is_guest_mode(vcpu)) {
9161                 r = kvm_check_nested_events(vcpu);
9162                 if (r < 0)
9163                         goto out;
9164         }
9165
9166         /* try to inject new event if pending */
9167         if (vcpu->arch.exception.pending) {
9168                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
9169                                         vcpu->arch.exception.has_error_code,
9170                                         vcpu->arch.exception.error_code);
9171
9172                 vcpu->arch.exception.pending = false;
9173                 vcpu->arch.exception.injected = true;
9174
9175                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
9176                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
9177                                              X86_EFLAGS_RF);
9178
9179                 if (vcpu->arch.exception.nr == DB_VECTOR) {
9180                         kvm_deliver_exception_payload(vcpu);
9181                         if (vcpu->arch.dr7 & DR7_GD) {
9182                                 vcpu->arch.dr7 &= ~DR7_GD;
9183                                 kvm_update_dr7(vcpu);
9184                         }
9185                 }
9186
9187                 kvm_inject_exception(vcpu);
9188                 can_inject = false;
9189         }
9190
9191         /* Don't inject interrupts if the user asked to avoid doing so */
9192         if (vcpu->guest_debug & KVM_GUESTDBG_BLOCKIRQ)
9193                 return 0;
9194
9195         /*
9196          * Finally, inject interrupt events.  If an event cannot be injected
9197          * due to architectural conditions (e.g. IF=0) a window-open exit
9198          * will re-request KVM_REQ_EVENT.  Sometimes however an event is pending
9199          * and can architecturally be injected, but we cannot do it right now:
9200          * an interrupt could have arrived just now and we have to inject it
9201          * as a vmexit, or there could already an event in the queue, which is
9202          * indicated by can_inject.  In that case we request an immediate exit
9203          * in order to make progress and get back here for another iteration.
9204          * The kvm_x86_ops hooks communicate this by returning -EBUSY.
9205          */
9206         if (vcpu->arch.smi_pending) {
9207                 r = can_inject ? static_call(kvm_x86_smi_allowed)(vcpu, true) : -EBUSY;
9208                 if (r < 0)
9209                         goto out;
9210                 if (r) {
9211                         vcpu->arch.smi_pending = false;
9212                         ++vcpu->arch.smi_count;
9213                         enter_smm(vcpu);
9214                         can_inject = false;
9215                 } else
9216                         static_call(kvm_x86_enable_smi_window)(vcpu);
9217         }
9218
9219         if (vcpu->arch.nmi_pending) {
9220                 r = can_inject ? static_call(kvm_x86_nmi_allowed)(vcpu, true) : -EBUSY;
9221                 if (r < 0)
9222                         goto out;
9223                 if (r) {
9224                         --vcpu->arch.nmi_pending;
9225                         vcpu->arch.nmi_injected = true;
9226                         static_call(kvm_x86_set_nmi)(vcpu);
9227                         can_inject = false;
9228                         WARN_ON(static_call(kvm_x86_nmi_allowed)(vcpu, true) < 0);
9229                 }
9230                 if (vcpu->arch.nmi_pending)
9231                         static_call(kvm_x86_enable_nmi_window)(vcpu);
9232         }
9233
9234         if (kvm_cpu_has_injectable_intr(vcpu)) {
9235                 r = can_inject ? static_call(kvm_x86_interrupt_allowed)(vcpu, true) : -EBUSY;
9236                 if (r < 0)
9237                         goto out;
9238                 if (r) {
9239                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu), false);
9240                         static_call(kvm_x86_set_irq)(vcpu);
9241                         WARN_ON(static_call(kvm_x86_interrupt_allowed)(vcpu, true) < 0);
9242                 }
9243                 if (kvm_cpu_has_injectable_intr(vcpu))
9244                         static_call(kvm_x86_enable_irq_window)(vcpu);
9245         }
9246
9247         if (is_guest_mode(vcpu) &&
9248             kvm_x86_ops.nested_ops->hv_timer_pending &&
9249             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
9250                 *req_immediate_exit = true;
9251
9252         WARN_ON(vcpu->arch.exception.pending);
9253         return 0;
9254
9255 out:
9256         if (r == -EBUSY) {
9257                 *req_immediate_exit = true;
9258                 r = 0;
9259         }
9260         return r;
9261 }
9262
9263 static void process_nmi(struct kvm_vcpu *vcpu)
9264 {
9265         unsigned limit = 2;
9266
9267         /*
9268          * x86 is limited to one NMI running, and one NMI pending after it.
9269          * If an NMI is already in progress, limit further NMIs to just one.
9270          * Otherwise, allow two (and we'll inject the first one immediately).
9271          */
9272         if (static_call(kvm_x86_get_nmi_mask)(vcpu) || vcpu->arch.nmi_injected)
9273                 limit = 1;
9274
9275         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
9276         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
9277         kvm_make_request(KVM_REQ_EVENT, vcpu);
9278 }
9279
9280 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
9281 {
9282         u32 flags = 0;
9283         flags |= seg->g       << 23;
9284         flags |= seg->db      << 22;
9285         flags |= seg->l       << 21;
9286         flags |= seg->avl     << 20;
9287         flags |= seg->present << 15;
9288         flags |= seg->dpl     << 13;
9289         flags |= seg->s       << 12;
9290         flags |= seg->type    << 8;
9291         return flags;
9292 }
9293
9294 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
9295 {
9296         struct kvm_segment seg;
9297         int offset;
9298
9299         kvm_get_segment(vcpu, &seg, n);
9300         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
9301
9302         if (n < 3)
9303                 offset = 0x7f84 + n * 12;
9304         else
9305                 offset = 0x7f2c + (n - 3) * 12;
9306
9307         put_smstate(u32, buf, offset + 8, seg.base);
9308         put_smstate(u32, buf, offset + 4, seg.limit);
9309         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
9310 }
9311
9312 #ifdef CONFIG_X86_64
9313 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
9314 {
9315         struct kvm_segment seg;
9316         int offset;
9317         u16 flags;
9318
9319         kvm_get_segment(vcpu, &seg, n);
9320         offset = 0x7e00 + n * 16;
9321
9322         flags = enter_smm_get_segment_flags(&seg) >> 8;
9323         put_smstate(u16, buf, offset, seg.selector);
9324         put_smstate(u16, buf, offset + 2, flags);
9325         put_smstate(u32, buf, offset + 4, seg.limit);
9326         put_smstate(u64, buf, offset + 8, seg.base);
9327 }
9328 #endif
9329
9330 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
9331 {
9332         struct desc_ptr dt;
9333         struct kvm_segment seg;
9334         unsigned long val;
9335         int i;
9336
9337         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
9338         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
9339         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
9340         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
9341
9342         for (i = 0; i < 8; i++)
9343                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read_raw(vcpu, i));
9344
9345         kvm_get_dr(vcpu, 6, &val);
9346         put_smstate(u32, buf, 0x7fcc, (u32)val);
9347         kvm_get_dr(vcpu, 7, &val);
9348         put_smstate(u32, buf, 0x7fc8, (u32)val);
9349
9350         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
9351         put_smstate(u32, buf, 0x7fc4, seg.selector);
9352         put_smstate(u32, buf, 0x7f64, seg.base);
9353         put_smstate(u32, buf, 0x7f60, seg.limit);
9354         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
9355
9356         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
9357         put_smstate(u32, buf, 0x7fc0, seg.selector);
9358         put_smstate(u32, buf, 0x7f80, seg.base);
9359         put_smstate(u32, buf, 0x7f7c, seg.limit);
9360         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
9361
9362         static_call(kvm_x86_get_gdt)(vcpu, &dt);
9363         put_smstate(u32, buf, 0x7f74, dt.address);
9364         put_smstate(u32, buf, 0x7f70, dt.size);
9365
9366         static_call(kvm_x86_get_idt)(vcpu, &dt);
9367         put_smstate(u32, buf, 0x7f58, dt.address);
9368         put_smstate(u32, buf, 0x7f54, dt.size);
9369
9370         for (i = 0; i < 6; i++)
9371                 enter_smm_save_seg_32(vcpu, buf, i);
9372
9373         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
9374
9375         /* revision id */
9376         put_smstate(u32, buf, 0x7efc, 0x00020000);
9377         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
9378 }
9379
9380 #ifdef CONFIG_X86_64
9381 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
9382 {
9383         struct desc_ptr dt;
9384         struct kvm_segment seg;
9385         unsigned long val;
9386         int i;
9387
9388         for (i = 0; i < 16; i++)
9389                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read_raw(vcpu, i));
9390
9391         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
9392         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
9393
9394         kvm_get_dr(vcpu, 6, &val);
9395         put_smstate(u64, buf, 0x7f68, val);
9396         kvm_get_dr(vcpu, 7, &val);
9397         put_smstate(u64, buf, 0x7f60, val);
9398
9399         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
9400         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
9401         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
9402
9403         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
9404
9405         /* revision id */
9406         put_smstate(u32, buf, 0x7efc, 0x00020064);
9407
9408         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
9409
9410         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
9411         put_smstate(u16, buf, 0x7e90, seg.selector);
9412         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
9413         put_smstate(u32, buf, 0x7e94, seg.limit);
9414         put_smstate(u64, buf, 0x7e98, seg.base);
9415
9416         static_call(kvm_x86_get_idt)(vcpu, &dt);
9417         put_smstate(u32, buf, 0x7e84, dt.size);
9418         put_smstate(u64, buf, 0x7e88, dt.address);
9419
9420         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
9421         put_smstate(u16, buf, 0x7e70, seg.selector);
9422         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
9423         put_smstate(u32, buf, 0x7e74, seg.limit);
9424         put_smstate(u64, buf, 0x7e78, seg.base);
9425
9426         static_call(kvm_x86_get_gdt)(vcpu, &dt);
9427         put_smstate(u32, buf, 0x7e64, dt.size);
9428         put_smstate(u64, buf, 0x7e68, dt.address);
9429
9430         for (i = 0; i < 6; i++)
9431                 enter_smm_save_seg_64(vcpu, buf, i);
9432 }
9433 #endif
9434
9435 static void enter_smm(struct kvm_vcpu *vcpu)
9436 {
9437         struct kvm_segment cs, ds;
9438         struct desc_ptr dt;
9439         unsigned long cr0;
9440         char buf[512];
9441
9442         memset(buf, 0, 512);
9443 #ifdef CONFIG_X86_64
9444         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
9445                 enter_smm_save_state_64(vcpu, buf);
9446         else
9447 #endif
9448                 enter_smm_save_state_32(vcpu, buf);
9449
9450         /*
9451          * Give enter_smm() a chance to make ISA-specific changes to the vCPU
9452          * state (e.g. leave guest mode) after we've saved the state into the
9453          * SMM state-save area.
9454          */
9455         static_call(kvm_x86_enter_smm)(vcpu, buf);
9456
9457         kvm_smm_changed(vcpu, true);
9458         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
9459
9460         if (static_call(kvm_x86_get_nmi_mask)(vcpu))
9461                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
9462         else
9463                 static_call(kvm_x86_set_nmi_mask)(vcpu, true);
9464
9465         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
9466         kvm_rip_write(vcpu, 0x8000);
9467
9468         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
9469         static_call(kvm_x86_set_cr0)(vcpu, cr0);
9470         vcpu->arch.cr0 = cr0;
9471
9472         static_call(kvm_x86_set_cr4)(vcpu, 0);
9473
9474         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
9475         dt.address = dt.size = 0;
9476         static_call(kvm_x86_set_idt)(vcpu, &dt);
9477
9478         kvm_set_dr(vcpu, 7, DR7_FIXED_1);
9479
9480         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
9481         cs.base = vcpu->arch.smbase;
9482
9483         ds.selector = 0;
9484         ds.base = 0;
9485
9486         cs.limit    = ds.limit = 0xffffffff;
9487         cs.type     = ds.type = 0x3;
9488         cs.dpl      = ds.dpl = 0;
9489         cs.db       = ds.db = 0;
9490         cs.s        = ds.s = 1;
9491         cs.l        = ds.l = 0;
9492         cs.g        = ds.g = 1;
9493         cs.avl      = ds.avl = 0;
9494         cs.present  = ds.present = 1;
9495         cs.unusable = ds.unusable = 0;
9496         cs.padding  = ds.padding = 0;
9497
9498         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
9499         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
9500         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
9501         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
9502         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
9503         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
9504
9505 #ifdef CONFIG_X86_64
9506         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
9507                 static_call(kvm_x86_set_efer)(vcpu, 0);
9508 #endif
9509
9510         kvm_update_cpuid_runtime(vcpu);
9511         kvm_mmu_reset_context(vcpu);
9512 }
9513
9514 static void process_smi(struct kvm_vcpu *vcpu)
9515 {
9516         vcpu->arch.smi_pending = true;
9517         kvm_make_request(KVM_REQ_EVENT, vcpu);
9518 }
9519
9520 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm,
9521                                        unsigned long *vcpu_bitmap)
9522 {
9523         kvm_make_vcpus_request_mask(kvm, KVM_REQ_SCAN_IOAPIC, vcpu_bitmap);
9524 }
9525
9526 void kvm_make_scan_ioapic_request(struct kvm *kvm)
9527 {
9528         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
9529 }
9530
9531 void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu)
9532 {
9533         bool activate;
9534
9535         if (!lapic_in_kernel(vcpu))
9536                 return;
9537
9538         down_read(&vcpu->kvm->arch.apicv_update_lock);
9539
9540         activate = kvm_apicv_activated(vcpu->kvm);
9541         if (vcpu->arch.apicv_active == activate)
9542                 goto out;
9543
9544         vcpu->arch.apicv_active = activate;
9545         kvm_apic_update_apicv(vcpu);
9546         static_call(kvm_x86_refresh_apicv_exec_ctrl)(vcpu);
9547
9548         /*
9549          * When APICv gets disabled, we may still have injected interrupts
9550          * pending. At the same time, KVM_REQ_EVENT may not be set as APICv was
9551          * still active when the interrupt got accepted. Make sure
9552          * inject_pending_event() is called to check for that.
9553          */
9554         if (!vcpu->arch.apicv_active)
9555                 kvm_make_request(KVM_REQ_EVENT, vcpu);
9556
9557 out:
9558         up_read(&vcpu->kvm->arch.apicv_update_lock);
9559 }
9560 EXPORT_SYMBOL_GPL(kvm_vcpu_update_apicv);
9561
9562 void __kvm_request_apicv_update(struct kvm *kvm, bool activate, ulong bit)
9563 {
9564         unsigned long old, new;
9565
9566         lockdep_assert_held_write(&kvm->arch.apicv_update_lock);
9567
9568         if (!kvm_x86_ops.check_apicv_inhibit_reasons ||
9569             !static_call(kvm_x86_check_apicv_inhibit_reasons)(bit))
9570                 return;
9571
9572         old = new = kvm->arch.apicv_inhibit_reasons;
9573
9574         if (activate)
9575                 __clear_bit(bit, &new);
9576         else
9577                 __set_bit(bit, &new);
9578
9579         if (!!old != !!new) {
9580                 trace_kvm_apicv_update_request(activate, bit);
9581                 /*
9582                  * Kick all vCPUs before setting apicv_inhibit_reasons to avoid
9583                  * false positives in the sanity check WARN in svm_vcpu_run().
9584                  * This task will wait for all vCPUs to ack the kick IRQ before
9585                  * updating apicv_inhibit_reasons, and all other vCPUs will
9586                  * block on acquiring apicv_update_lock so that vCPUs can't
9587                  * redo svm_vcpu_run() without seeing the new inhibit state.
9588                  *
9589                  * Note, holding apicv_update_lock and taking it in the read
9590                  * side (handling the request) also prevents other vCPUs from
9591                  * servicing the request with a stale apicv_inhibit_reasons.
9592                  */
9593                 kvm_make_all_cpus_request(kvm, KVM_REQ_APICV_UPDATE);
9594                 kvm->arch.apicv_inhibit_reasons = new;
9595                 if (new) {
9596                         unsigned long gfn = gpa_to_gfn(APIC_DEFAULT_PHYS_BASE);
9597                         kvm_zap_gfn_range(kvm, gfn, gfn+1);
9598                 }
9599         } else
9600                 kvm->arch.apicv_inhibit_reasons = new;
9601 }
9602 EXPORT_SYMBOL_GPL(__kvm_request_apicv_update);
9603
9604 void kvm_request_apicv_update(struct kvm *kvm, bool activate, ulong bit)
9605 {
9606         down_write(&kvm->arch.apicv_update_lock);
9607         __kvm_request_apicv_update(kvm, activate, bit);
9608         up_write(&kvm->arch.apicv_update_lock);
9609 }
9610 EXPORT_SYMBOL_GPL(kvm_request_apicv_update);
9611
9612 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
9613 {
9614         if (!kvm_apic_present(vcpu))
9615                 return;
9616
9617         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
9618
9619         if (irqchip_split(vcpu->kvm))
9620                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
9621         else {
9622                 if (vcpu->arch.apicv_active)
9623                         static_call(kvm_x86_sync_pir_to_irr)(vcpu);
9624                 if (ioapic_in_kernel(vcpu->kvm))
9625                         kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
9626         }
9627
9628         if (is_guest_mode(vcpu))
9629                 vcpu->arch.load_eoi_exitmap_pending = true;
9630         else
9631                 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
9632 }
9633
9634 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
9635 {
9636         u64 eoi_exit_bitmap[4];
9637
9638         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
9639                 return;
9640
9641         if (to_hv_vcpu(vcpu))
9642                 bitmap_or((ulong *)eoi_exit_bitmap,
9643                           vcpu->arch.ioapic_handled_vectors,
9644                           to_hv_synic(vcpu)->vec_bitmap, 256);
9645
9646         static_call(kvm_x86_load_eoi_exitmap)(vcpu, eoi_exit_bitmap);
9647 }
9648
9649 void kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
9650                                             unsigned long start, unsigned long end)
9651 {
9652         unsigned long apic_address;
9653
9654         /*
9655          * The physical address of apic access page is stored in the VMCS.
9656          * Update it when it becomes invalid.
9657          */
9658         apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
9659         if (start <= apic_address && apic_address < end)
9660                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
9661 }
9662
9663 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
9664 {
9665         if (!lapic_in_kernel(vcpu))
9666                 return;
9667
9668         if (!kvm_x86_ops.set_apic_access_page_addr)
9669                 return;
9670
9671         static_call(kvm_x86_set_apic_access_page_addr)(vcpu);
9672 }
9673
9674 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu)
9675 {
9676         smp_send_reschedule(vcpu->cpu);
9677 }
9678 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit);
9679
9680 /*
9681  * Returns 1 to let vcpu_run() continue the guest execution loop without
9682  * exiting to the userspace.  Otherwise, the value will be returned to the
9683  * userspace.
9684  */
9685 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
9686 {
9687         int r;
9688         bool req_int_win =
9689                 dm_request_for_irq_injection(vcpu) &&
9690                 kvm_cpu_accept_dm_intr(vcpu);
9691         fastpath_t exit_fastpath;
9692
9693         bool req_immediate_exit = false;
9694
9695         /* Forbid vmenter if vcpu dirty ring is soft-full */
9696         if (unlikely(vcpu->kvm->dirty_ring_size &&
9697                      kvm_dirty_ring_soft_full(&vcpu->dirty_ring))) {
9698                 vcpu->run->exit_reason = KVM_EXIT_DIRTY_RING_FULL;
9699                 trace_kvm_dirty_ring_exit(vcpu);
9700                 r = 0;
9701                 goto out;
9702         }
9703
9704         if (kvm_request_pending(vcpu)) {
9705                 if (kvm_check_request(KVM_REQ_VM_BUGGED, vcpu)) {
9706                         r = -EIO;
9707                         goto out;
9708                 }
9709                 if (kvm_check_request(KVM_REQ_GET_NESTED_STATE_PAGES, vcpu)) {
9710                         if (unlikely(!kvm_x86_ops.nested_ops->get_nested_state_pages(vcpu))) {
9711                                 r = 0;
9712                                 goto out;
9713                         }
9714                 }
9715                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
9716                         kvm_mmu_unload(vcpu);
9717                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
9718                         __kvm_migrate_timers(vcpu);
9719                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
9720                         kvm_update_masterclock(vcpu->kvm);
9721                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
9722                         kvm_gen_kvmclock_update(vcpu);
9723                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
9724                         r = kvm_guest_time_update(vcpu);
9725                         if (unlikely(r))
9726                                 goto out;
9727                 }
9728                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
9729                         kvm_mmu_sync_roots(vcpu);
9730                 if (kvm_check_request(KVM_REQ_LOAD_MMU_PGD, vcpu))
9731                         kvm_mmu_load_pgd(vcpu);
9732                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu)) {
9733                         kvm_vcpu_flush_tlb_all(vcpu);
9734
9735                         /* Flushing all ASIDs flushes the current ASID... */
9736                         kvm_clear_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
9737                 }
9738                 if (kvm_check_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu))
9739                         kvm_vcpu_flush_tlb_current(vcpu);
9740                 if (kvm_check_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu))
9741                         kvm_vcpu_flush_tlb_guest(vcpu);
9742
9743                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
9744                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
9745                         r = 0;
9746                         goto out;
9747                 }
9748                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
9749                         if (is_guest_mode(vcpu)) {
9750                                 kvm_x86_ops.nested_ops->triple_fault(vcpu);
9751                         } else {
9752                                 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
9753                                 vcpu->mmio_needed = 0;
9754                                 r = 0;
9755                                 goto out;
9756                         }
9757                 }
9758                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
9759                         /* Page is swapped out. Do synthetic halt */
9760                         vcpu->arch.apf.halted = true;
9761                         r = 1;
9762                         goto out;
9763                 }
9764                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
9765                         record_steal_time(vcpu);
9766                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
9767                         process_smi(vcpu);
9768                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
9769                         process_nmi(vcpu);
9770                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
9771                         kvm_pmu_handle_event(vcpu);
9772                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
9773                         kvm_pmu_deliver_pmi(vcpu);
9774                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
9775                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
9776                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
9777                                      vcpu->arch.ioapic_handled_vectors)) {
9778                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
9779                                 vcpu->run->eoi.vector =
9780                                                 vcpu->arch.pending_ioapic_eoi;
9781                                 r = 0;
9782                                 goto out;
9783                         }
9784                 }
9785                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
9786                         vcpu_scan_ioapic(vcpu);
9787                 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
9788                         vcpu_load_eoi_exitmap(vcpu);
9789                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
9790                         kvm_vcpu_reload_apic_access_page(vcpu);
9791                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
9792                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
9793                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
9794                         r = 0;
9795                         goto out;
9796                 }
9797                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
9798                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
9799                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
9800                         r = 0;
9801                         goto out;
9802                 }
9803                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
9804                         struct kvm_vcpu_hv *hv_vcpu = to_hv_vcpu(vcpu);
9805
9806                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
9807                         vcpu->run->hyperv = hv_vcpu->exit;
9808                         r = 0;
9809                         goto out;
9810                 }
9811
9812                 /*
9813                  * KVM_REQ_HV_STIMER has to be processed after
9814                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
9815                  * depend on the guest clock being up-to-date
9816                  */
9817                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
9818                         kvm_hv_process_stimers(vcpu);
9819                 if (kvm_check_request(KVM_REQ_APICV_UPDATE, vcpu))
9820                         kvm_vcpu_update_apicv(vcpu);
9821                 if (kvm_check_request(KVM_REQ_APF_READY, vcpu))
9822                         kvm_check_async_pf_completion(vcpu);
9823                 if (kvm_check_request(KVM_REQ_MSR_FILTER_CHANGED, vcpu))
9824                         static_call(kvm_x86_msr_filter_changed)(vcpu);
9825
9826                 if (kvm_check_request(KVM_REQ_UPDATE_CPU_DIRTY_LOGGING, vcpu))
9827                         static_call(kvm_x86_update_cpu_dirty_logging)(vcpu);
9828         }
9829
9830         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win ||
9831             kvm_xen_has_interrupt(vcpu)) {
9832                 ++vcpu->stat.req_event;
9833                 r = kvm_apic_accept_events(vcpu);
9834                 if (r < 0) {
9835                         r = 0;
9836                         goto out;
9837                 }
9838                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
9839                         r = 1;
9840                         goto out;
9841                 }
9842
9843                 r = inject_pending_event(vcpu, &req_immediate_exit);
9844                 if (r < 0) {
9845                         r = 0;
9846                         goto out;
9847                 }
9848                 if (req_int_win)
9849                         static_call(kvm_x86_enable_irq_window)(vcpu);
9850
9851                 if (kvm_lapic_enabled(vcpu)) {
9852                         update_cr8_intercept(vcpu);
9853                         kvm_lapic_sync_to_vapic(vcpu);
9854                 }
9855         }
9856
9857         r = kvm_mmu_reload(vcpu);
9858         if (unlikely(r)) {
9859                 goto cancel_injection;
9860         }
9861
9862         preempt_disable();
9863
9864         static_call(kvm_x86_prepare_guest_switch)(vcpu);
9865
9866         /*
9867          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
9868          * IPI are then delayed after guest entry, which ensures that they
9869          * result in virtual interrupt delivery.
9870          */
9871         local_irq_disable();
9872         vcpu->mode = IN_GUEST_MODE;
9873
9874         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
9875
9876         /*
9877          * 1) We should set ->mode before checking ->requests.  Please see
9878          * the comment in kvm_vcpu_exiting_guest_mode().
9879          *
9880          * 2) For APICv, we should set ->mode before checking PID.ON. This
9881          * pairs with the memory barrier implicit in pi_test_and_set_on
9882          * (see vmx_deliver_posted_interrupt).
9883          *
9884          * 3) This also orders the write to mode from any reads to the page
9885          * tables done while the VCPU is running.  Please see the comment
9886          * in kvm_flush_remote_tlbs.
9887          */
9888         smp_mb__after_srcu_read_unlock();
9889
9890         /*
9891          * This handles the case where a posted interrupt was
9892          * notified with kvm_vcpu_kick.
9893          */
9894         if (kvm_lapic_enabled(vcpu) && vcpu->arch.apicv_active)
9895                 static_call(kvm_x86_sync_pir_to_irr)(vcpu);
9896
9897         if (kvm_vcpu_exit_request(vcpu)) {
9898                 vcpu->mode = OUTSIDE_GUEST_MODE;
9899                 smp_wmb();
9900                 local_irq_enable();
9901                 preempt_enable();
9902                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
9903                 r = 1;
9904                 goto cancel_injection;
9905         }
9906
9907         if (req_immediate_exit) {
9908                 kvm_make_request(KVM_REQ_EVENT, vcpu);
9909                 static_call(kvm_x86_request_immediate_exit)(vcpu);
9910         }
9911
9912         fpregs_assert_state_consistent();
9913         if (test_thread_flag(TIF_NEED_FPU_LOAD))
9914                 switch_fpu_return();
9915
9916         if (unlikely(vcpu->arch.switch_db_regs)) {
9917                 set_debugreg(0, 7);
9918                 set_debugreg(vcpu->arch.eff_db[0], 0);
9919                 set_debugreg(vcpu->arch.eff_db[1], 1);
9920                 set_debugreg(vcpu->arch.eff_db[2], 2);
9921                 set_debugreg(vcpu->arch.eff_db[3], 3);
9922         } else if (unlikely(hw_breakpoint_active())) {
9923                 set_debugreg(0, 7);
9924         }
9925
9926         for (;;) {
9927                 /*
9928                  * Assert that vCPU vs. VM APICv state is consistent.  An APICv
9929                  * update must kick and wait for all vCPUs before toggling the
9930                  * per-VM state, and responsing vCPUs must wait for the update
9931                  * to complete before servicing KVM_REQ_APICV_UPDATE.
9932                  */
9933                 WARN_ON_ONCE(kvm_apicv_activated(vcpu->kvm) != kvm_vcpu_apicv_active(vcpu));
9934
9935                 exit_fastpath = static_call(kvm_x86_run)(vcpu);
9936                 if (likely(exit_fastpath != EXIT_FASTPATH_REENTER_GUEST))
9937                         break;
9938
9939                 if (unlikely(kvm_vcpu_exit_request(vcpu))) {
9940                         exit_fastpath = EXIT_FASTPATH_EXIT_HANDLED;
9941                         break;
9942                 }
9943
9944                 if (vcpu->arch.apicv_active)
9945                         static_call(kvm_x86_sync_pir_to_irr)(vcpu);
9946         }
9947
9948         /*
9949          * Do this here before restoring debug registers on the host.  And
9950          * since we do this before handling the vmexit, a DR access vmexit
9951          * can (a) read the correct value of the debug registers, (b) set
9952          * KVM_DEBUGREG_WONT_EXIT again.
9953          */
9954         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
9955                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
9956                 static_call(kvm_x86_sync_dirty_debug_regs)(vcpu);
9957                 kvm_update_dr0123(vcpu);
9958                 kvm_update_dr7(vcpu);
9959         }
9960
9961         /*
9962          * If the guest has used debug registers, at least dr7
9963          * will be disabled while returning to the host.
9964          * If we don't have active breakpoints in the host, we don't
9965          * care about the messed up debug address registers. But if
9966          * we have some of them active, restore the old state.
9967          */
9968         if (hw_breakpoint_active())
9969                 hw_breakpoint_restore();
9970
9971         vcpu->arch.last_vmentry_cpu = vcpu->cpu;
9972         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
9973
9974         vcpu->mode = OUTSIDE_GUEST_MODE;
9975         smp_wmb();
9976
9977         static_call(kvm_x86_handle_exit_irqoff)(vcpu);
9978
9979         /*
9980          * Consume any pending interrupts, including the possible source of
9981          * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
9982          * An instruction is required after local_irq_enable() to fully unblock
9983          * interrupts on processors that implement an interrupt shadow, the
9984          * stat.exits increment will do nicely.
9985          */
9986         kvm_before_interrupt(vcpu);
9987         local_irq_enable();
9988         ++vcpu->stat.exits;
9989         local_irq_disable();
9990         kvm_after_interrupt(vcpu);
9991
9992         /*
9993          * Wait until after servicing IRQs to account guest time so that any
9994          * ticks that occurred while running the guest are properly accounted
9995          * to the guest.  Waiting until IRQs are enabled degrades the accuracy
9996          * of accounting via context tracking, but the loss of accuracy is
9997          * acceptable for all known use cases.
9998          */
9999         vtime_account_guest_exit();
10000
10001         if (lapic_in_kernel(vcpu)) {
10002                 s64 delta = vcpu->arch.apic->lapic_timer.advance_expire_delta;
10003                 if (delta != S64_MIN) {
10004                         trace_kvm_wait_lapic_expire(vcpu->vcpu_id, delta);
10005                         vcpu->arch.apic->lapic_timer.advance_expire_delta = S64_MIN;
10006                 }
10007         }
10008
10009         local_irq_enable();
10010         preempt_enable();
10011
10012         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
10013
10014         /*
10015          * Profile KVM exit RIPs:
10016          */
10017         if (unlikely(prof_on == KVM_PROFILING)) {
10018                 unsigned long rip = kvm_rip_read(vcpu);
10019                 profile_hit(KVM_PROFILING, (void *)rip);
10020         }
10021
10022         if (unlikely(vcpu->arch.tsc_always_catchup))
10023                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
10024
10025         if (vcpu->arch.apic_attention)
10026                 kvm_lapic_sync_from_vapic(vcpu);
10027
10028         r = static_call(kvm_x86_handle_exit)(vcpu, exit_fastpath);
10029         return r;
10030
10031 cancel_injection:
10032         if (req_immediate_exit)
10033                 kvm_make_request(KVM_REQ_EVENT, vcpu);
10034         static_call(kvm_x86_cancel_injection)(vcpu);
10035         if (unlikely(vcpu->arch.apic_attention))
10036                 kvm_lapic_sync_from_vapic(vcpu);
10037 out:
10038         return r;
10039 }
10040
10041 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
10042 {
10043         if (!kvm_arch_vcpu_runnable(vcpu) &&
10044             (!kvm_x86_ops.pre_block || static_call(kvm_x86_pre_block)(vcpu) == 0)) {
10045                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
10046                 kvm_vcpu_block(vcpu);
10047                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
10048
10049                 if (kvm_x86_ops.post_block)
10050                         static_call(kvm_x86_post_block)(vcpu);
10051
10052                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
10053                         return 1;
10054         }
10055
10056         if (kvm_apic_accept_events(vcpu) < 0)
10057                 return 0;
10058         switch(vcpu->arch.mp_state) {
10059         case KVM_MP_STATE_HALTED:
10060         case KVM_MP_STATE_AP_RESET_HOLD:
10061                 vcpu->arch.pv.pv_unhalted = false;
10062                 vcpu->arch.mp_state =
10063                         KVM_MP_STATE_RUNNABLE;
10064                 fallthrough;
10065         case KVM_MP_STATE_RUNNABLE:
10066                 vcpu->arch.apf.halted = false;
10067                 break;
10068         case KVM_MP_STATE_INIT_RECEIVED:
10069                 break;
10070         default:
10071                 return -EINTR;
10072         }
10073         return 1;
10074 }
10075
10076 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
10077 {
10078         if (is_guest_mode(vcpu))
10079                 kvm_check_nested_events(vcpu);
10080
10081         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
10082                 !vcpu->arch.apf.halted);
10083 }
10084
10085 static int vcpu_run(struct kvm_vcpu *vcpu)
10086 {
10087         int r;
10088         struct kvm *kvm = vcpu->kvm;
10089
10090         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
10091         vcpu->arch.l1tf_flush_l1d = true;
10092
10093         for (;;) {
10094                 if (kvm_vcpu_running(vcpu)) {
10095                         r = vcpu_enter_guest(vcpu);
10096                 } else {
10097                         r = vcpu_block(kvm, vcpu);
10098                 }
10099
10100                 if (r <= 0)
10101                         break;
10102
10103                 kvm_clear_request(KVM_REQ_UNBLOCK, vcpu);
10104                 if (kvm_cpu_has_pending_timer(vcpu))
10105                         kvm_inject_pending_timer_irqs(vcpu);
10106
10107                 if (dm_request_for_irq_injection(vcpu) &&
10108                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
10109                         r = 0;
10110                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
10111                         ++vcpu->stat.request_irq_exits;
10112                         break;
10113                 }
10114
10115                 if (__xfer_to_guest_mode_work_pending()) {
10116                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
10117                         r = xfer_to_guest_mode_handle_work(vcpu);
10118                         if (r)
10119                                 return r;
10120                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
10121                 }
10122         }
10123
10124         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
10125
10126         return r;
10127 }
10128
10129 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
10130 {
10131         int r;
10132
10133         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
10134         r = kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
10135         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
10136         return r;
10137 }
10138
10139 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
10140 {
10141         BUG_ON(!vcpu->arch.pio.count);
10142
10143         return complete_emulated_io(vcpu);
10144 }
10145
10146 /*
10147  * Implements the following, as a state machine:
10148  *
10149  * read:
10150  *   for each fragment
10151  *     for each mmio piece in the fragment
10152  *       write gpa, len
10153  *       exit
10154  *       copy data
10155  *   execute insn
10156  *
10157  * write:
10158  *   for each fragment
10159  *     for each mmio piece in the fragment
10160  *       write gpa, len
10161  *       copy data
10162  *       exit
10163  */
10164 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
10165 {
10166         struct kvm_run *run = vcpu->run;
10167         struct kvm_mmio_fragment *frag;
10168         unsigned len;
10169
10170         BUG_ON(!vcpu->mmio_needed);
10171
10172         /* Complete previous fragment */
10173         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
10174         len = min(8u, frag->len);
10175         if (!vcpu->mmio_is_write)
10176                 memcpy(frag->data, run->mmio.data, len);
10177
10178         if (frag->len <= 8) {
10179                 /* Switch to the next fragment. */
10180                 frag++;
10181                 vcpu->mmio_cur_fragment++;
10182         } else {
10183                 /* Go forward to the next mmio piece. */
10184                 frag->data += len;
10185                 frag->gpa += len;
10186                 frag->len -= len;
10187         }
10188
10189         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
10190                 vcpu->mmio_needed = 0;
10191
10192                 /* FIXME: return into emulator if single-stepping.  */
10193                 if (vcpu->mmio_is_write)
10194                         return 1;
10195                 vcpu->mmio_read_completed = 1;
10196                 return complete_emulated_io(vcpu);
10197         }
10198
10199         run->exit_reason = KVM_EXIT_MMIO;
10200         run->mmio.phys_addr = frag->gpa;
10201         if (vcpu->mmio_is_write)
10202                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
10203         run->mmio.len = min(8u, frag->len);
10204         run->mmio.is_write = vcpu->mmio_is_write;
10205         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
10206         return 0;
10207 }
10208
10209 static void kvm_save_current_fpu(struct fpu *fpu)
10210 {
10211         /*
10212          * If the target FPU state is not resident in the CPU registers, just
10213          * memcpy() from current, else save CPU state directly to the target.
10214          */
10215         if (test_thread_flag(TIF_NEED_FPU_LOAD))
10216                 memcpy(&fpu->state, &current->thread.fpu.state,
10217                        fpu_kernel_xstate_size);
10218         else
10219                 save_fpregs_to_fpstate(fpu);
10220 }
10221
10222 /* Swap (qemu) user FPU context for the guest FPU context. */
10223 static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
10224 {
10225         fpregs_lock();
10226
10227         kvm_save_current_fpu(vcpu->arch.user_fpu);
10228
10229         /*
10230          * Guests with protected state can't have it set by the hypervisor,
10231          * so skip trying to set it.
10232          */
10233         if (vcpu->arch.guest_fpu)
10234                 /* PKRU is separately restored in kvm_x86_ops.run. */
10235                 __restore_fpregs_from_fpstate(&vcpu->arch.guest_fpu->state,
10236                                         ~XFEATURE_MASK_PKRU);
10237
10238         fpregs_mark_activate();
10239         fpregs_unlock();
10240
10241         trace_kvm_fpu(1);
10242 }
10243
10244 /* When vcpu_run ends, restore user space FPU context. */
10245 static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
10246 {
10247         fpregs_lock();
10248
10249         /*
10250          * Guests with protected state can't have it read by the hypervisor,
10251          * so skip trying to save it.
10252          */
10253         if (vcpu->arch.guest_fpu)
10254                 kvm_save_current_fpu(vcpu->arch.guest_fpu);
10255
10256         restore_fpregs_from_fpstate(&vcpu->arch.user_fpu->state);
10257
10258         fpregs_mark_activate();
10259         fpregs_unlock();
10260
10261         ++vcpu->stat.fpu_reload;
10262         trace_kvm_fpu(0);
10263 }
10264
10265 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
10266 {
10267         struct kvm_run *kvm_run = vcpu->run;
10268         int r;
10269
10270         vcpu_load(vcpu);
10271         kvm_sigset_activate(vcpu);
10272         kvm_run->flags = 0;
10273         kvm_load_guest_fpu(vcpu);
10274
10275         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
10276                 if (kvm_run->immediate_exit) {
10277                         r = -EINTR;
10278                         goto out;
10279                 }
10280                 kvm_vcpu_block(vcpu);
10281                 if (kvm_apic_accept_events(vcpu) < 0) {
10282                         r = 0;
10283                         goto out;
10284                 }
10285                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
10286                 r = -EAGAIN;
10287                 if (signal_pending(current)) {
10288                         r = -EINTR;
10289                         kvm_run->exit_reason = KVM_EXIT_INTR;
10290                         ++vcpu->stat.signal_exits;
10291                 }
10292                 goto out;
10293         }
10294
10295         if ((kvm_run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) ||
10296             (kvm_run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)) {
10297                 r = -EINVAL;
10298                 goto out;
10299         }
10300
10301         if (kvm_run->kvm_dirty_regs) {
10302                 r = sync_regs(vcpu);
10303                 if (r != 0)
10304                         goto out;
10305         }
10306
10307         /* re-sync apic's tpr */
10308         if (!lapic_in_kernel(vcpu)) {
10309                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
10310                         r = -EINVAL;
10311                         goto out;
10312                 }
10313         }
10314
10315         if (unlikely(vcpu->arch.complete_userspace_io)) {
10316                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
10317                 vcpu->arch.complete_userspace_io = NULL;
10318                 r = cui(vcpu);
10319                 if (r <= 0)
10320                         goto out;
10321         } else
10322                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
10323
10324         if (kvm_run->immediate_exit)
10325                 r = -EINTR;
10326         else
10327                 r = vcpu_run(vcpu);
10328
10329 out:
10330         kvm_put_guest_fpu(vcpu);
10331         if (kvm_run->kvm_valid_regs)
10332                 store_regs(vcpu);
10333         post_kvm_run_save(vcpu);
10334         kvm_sigset_deactivate(vcpu);
10335
10336         vcpu_put(vcpu);
10337         return r;
10338 }
10339
10340 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10341 {
10342         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
10343                 /*
10344                  * We are here if userspace calls get_regs() in the middle of
10345                  * instruction emulation. Registers state needs to be copied
10346                  * back from emulation context to vcpu. Userspace shouldn't do
10347                  * that usually, but some bad designed PV devices (vmware
10348                  * backdoor interface) need this to work
10349                  */
10350                 emulator_writeback_register_cache(vcpu->arch.emulate_ctxt);
10351                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
10352         }
10353         regs->rax = kvm_rax_read(vcpu);
10354         regs->rbx = kvm_rbx_read(vcpu);
10355         regs->rcx = kvm_rcx_read(vcpu);
10356         regs->rdx = kvm_rdx_read(vcpu);
10357         regs->rsi = kvm_rsi_read(vcpu);
10358         regs->rdi = kvm_rdi_read(vcpu);
10359         regs->rsp = kvm_rsp_read(vcpu);
10360         regs->rbp = kvm_rbp_read(vcpu);
10361 #ifdef CONFIG_X86_64
10362         regs->r8 = kvm_r8_read(vcpu);
10363         regs->r9 = kvm_r9_read(vcpu);
10364         regs->r10 = kvm_r10_read(vcpu);
10365         regs->r11 = kvm_r11_read(vcpu);
10366         regs->r12 = kvm_r12_read(vcpu);
10367         regs->r13 = kvm_r13_read(vcpu);
10368         regs->r14 = kvm_r14_read(vcpu);
10369         regs->r15 = kvm_r15_read(vcpu);
10370 #endif
10371
10372         regs->rip = kvm_rip_read(vcpu);
10373         regs->rflags = kvm_get_rflags(vcpu);
10374 }
10375
10376 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10377 {
10378         vcpu_load(vcpu);
10379         __get_regs(vcpu, regs);
10380         vcpu_put(vcpu);
10381         return 0;
10382 }
10383
10384 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10385 {
10386         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
10387         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
10388
10389         kvm_rax_write(vcpu, regs->rax);
10390         kvm_rbx_write(vcpu, regs->rbx);
10391         kvm_rcx_write(vcpu, regs->rcx);
10392         kvm_rdx_write(vcpu, regs->rdx);
10393         kvm_rsi_write(vcpu, regs->rsi);
10394         kvm_rdi_write(vcpu, regs->rdi);
10395         kvm_rsp_write(vcpu, regs->rsp);
10396         kvm_rbp_write(vcpu, regs->rbp);
10397 #ifdef CONFIG_X86_64
10398         kvm_r8_write(vcpu, regs->r8);
10399         kvm_r9_write(vcpu, regs->r9);
10400         kvm_r10_write(vcpu, regs->r10);
10401         kvm_r11_write(vcpu, regs->r11);
10402         kvm_r12_write(vcpu, regs->r12);
10403         kvm_r13_write(vcpu, regs->r13);
10404         kvm_r14_write(vcpu, regs->r14);
10405         kvm_r15_write(vcpu, regs->r15);
10406 #endif
10407
10408         kvm_rip_write(vcpu, regs->rip);
10409         kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
10410
10411         vcpu->arch.exception.pending = false;
10412
10413         kvm_make_request(KVM_REQ_EVENT, vcpu);
10414 }
10415
10416 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10417 {
10418         vcpu_load(vcpu);
10419         __set_regs(vcpu, regs);
10420         vcpu_put(vcpu);
10421         return 0;
10422 }
10423
10424 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
10425 {
10426         struct kvm_segment cs;
10427
10428         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
10429         *db = cs.db;
10430         *l = cs.l;
10431 }
10432 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
10433
10434 static void __get_sregs_common(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10435 {
10436         struct desc_ptr dt;
10437
10438         if (vcpu->arch.guest_state_protected)
10439                 goto skip_protected_regs;
10440
10441         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
10442         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
10443         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
10444         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
10445         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
10446         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
10447
10448         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
10449         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
10450
10451         static_call(kvm_x86_get_idt)(vcpu, &dt);
10452         sregs->idt.limit = dt.size;
10453         sregs->idt.base = dt.address;
10454         static_call(kvm_x86_get_gdt)(vcpu, &dt);
10455         sregs->gdt.limit = dt.size;
10456         sregs->gdt.base = dt.address;
10457
10458         sregs->cr2 = vcpu->arch.cr2;
10459         sregs->cr3 = kvm_read_cr3(vcpu);
10460
10461 skip_protected_regs:
10462         sregs->cr0 = kvm_read_cr0(vcpu);
10463         sregs->cr4 = kvm_read_cr4(vcpu);
10464         sregs->cr8 = kvm_get_cr8(vcpu);
10465         sregs->efer = vcpu->arch.efer;
10466         sregs->apic_base = kvm_get_apic_base(vcpu);
10467 }
10468
10469 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10470 {
10471         __get_sregs_common(vcpu, sregs);
10472
10473         if (vcpu->arch.guest_state_protected)
10474                 return;
10475
10476         if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
10477                 set_bit(vcpu->arch.interrupt.nr,
10478                         (unsigned long *)sregs->interrupt_bitmap);
10479 }
10480
10481 static void __get_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2)
10482 {
10483         int i;
10484
10485         __get_sregs_common(vcpu, (struct kvm_sregs *)sregs2);
10486
10487         if (vcpu->arch.guest_state_protected)
10488                 return;
10489
10490         if (is_pae_paging(vcpu)) {
10491                 for (i = 0 ; i < 4 ; i++)
10492                         sregs2->pdptrs[i] = kvm_pdptr_read(vcpu, i);
10493                 sregs2->flags |= KVM_SREGS2_FLAGS_PDPTRS_VALID;
10494         }
10495 }
10496
10497 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
10498                                   struct kvm_sregs *sregs)
10499 {
10500         vcpu_load(vcpu);
10501         __get_sregs(vcpu, sregs);
10502         vcpu_put(vcpu);
10503         return 0;
10504 }
10505
10506 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
10507                                     struct kvm_mp_state *mp_state)
10508 {
10509         int r;
10510
10511         vcpu_load(vcpu);
10512         if (kvm_mpx_supported())
10513                 kvm_load_guest_fpu(vcpu);
10514
10515         r = kvm_apic_accept_events(vcpu);
10516         if (r < 0)
10517                 goto out;
10518         r = 0;
10519
10520         if ((vcpu->arch.mp_state == KVM_MP_STATE_HALTED ||
10521              vcpu->arch.mp_state == KVM_MP_STATE_AP_RESET_HOLD) &&
10522             vcpu->arch.pv.pv_unhalted)
10523                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
10524         else
10525                 mp_state->mp_state = vcpu->arch.mp_state;
10526
10527 out:
10528         if (kvm_mpx_supported())
10529                 kvm_put_guest_fpu(vcpu);
10530         vcpu_put(vcpu);
10531         return r;
10532 }
10533
10534 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
10535                                     struct kvm_mp_state *mp_state)
10536 {
10537         int ret = -EINVAL;
10538
10539         vcpu_load(vcpu);
10540
10541         if (!lapic_in_kernel(vcpu) &&
10542             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
10543                 goto out;
10544
10545         /*
10546          * KVM_MP_STATE_INIT_RECEIVED means the processor is in
10547          * INIT state; latched init should be reported using
10548          * KVM_SET_VCPU_EVENTS, so reject it here.
10549          */
10550         if ((kvm_vcpu_latch_init(vcpu) || vcpu->arch.smi_pending) &&
10551             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
10552              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
10553                 goto out;
10554
10555         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
10556                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
10557                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
10558         } else
10559                 vcpu->arch.mp_state = mp_state->mp_state;
10560         kvm_make_request(KVM_REQ_EVENT, vcpu);
10561
10562         ret = 0;
10563 out:
10564         vcpu_put(vcpu);
10565         return ret;
10566 }
10567
10568 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
10569                     int reason, bool has_error_code, u32 error_code)
10570 {
10571         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
10572         int ret;
10573
10574         init_emulate_ctxt(vcpu);
10575
10576         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
10577                                    has_error_code, error_code);
10578         if (ret) {
10579                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
10580                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
10581                 vcpu->run->internal.ndata = 0;
10582                 return 0;
10583         }
10584
10585         kvm_rip_write(vcpu, ctxt->eip);
10586         kvm_set_rflags(vcpu, ctxt->eflags);
10587         return 1;
10588 }
10589 EXPORT_SYMBOL_GPL(kvm_task_switch);
10590
10591 static bool kvm_is_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10592 {
10593         if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
10594                 /*
10595                  * When EFER.LME and CR0.PG are set, the processor is in
10596                  * 64-bit mode (though maybe in a 32-bit code segment).
10597                  * CR4.PAE and EFER.LMA must be set.
10598                  */
10599                 if (!(sregs->cr4 & X86_CR4_PAE) || !(sregs->efer & EFER_LMA))
10600                         return false;
10601                 if (kvm_vcpu_is_illegal_gpa(vcpu, sregs->cr3))
10602                         return false;
10603         } else {
10604                 /*
10605                  * Not in 64-bit mode: EFER.LMA is clear and the code
10606                  * segment cannot be 64-bit.
10607                  */
10608                 if (sregs->efer & EFER_LMA || sregs->cs.l)
10609                         return false;
10610         }
10611
10612         return kvm_is_valid_cr4(vcpu, sregs->cr4);
10613 }
10614
10615 static int __set_sregs_common(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs,
10616                 int *mmu_reset_needed, bool update_pdptrs)
10617 {
10618         struct msr_data apic_base_msr;
10619         int idx;
10620         struct desc_ptr dt;
10621
10622         if (!kvm_is_valid_sregs(vcpu, sregs))
10623                 return -EINVAL;
10624
10625         apic_base_msr.data = sregs->apic_base;
10626         apic_base_msr.host_initiated = true;
10627         if (kvm_set_apic_base(vcpu, &apic_base_msr))
10628                 return -EINVAL;
10629
10630         if (vcpu->arch.guest_state_protected)
10631                 return 0;
10632
10633         dt.size = sregs->idt.limit;
10634         dt.address = sregs->idt.base;
10635         static_call(kvm_x86_set_idt)(vcpu, &dt);
10636         dt.size = sregs->gdt.limit;
10637         dt.address = sregs->gdt.base;
10638         static_call(kvm_x86_set_gdt)(vcpu, &dt);
10639
10640         vcpu->arch.cr2 = sregs->cr2;
10641         *mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
10642         vcpu->arch.cr3 = sregs->cr3;
10643         kvm_register_mark_available(vcpu, VCPU_EXREG_CR3);
10644
10645         kvm_set_cr8(vcpu, sregs->cr8);
10646
10647         *mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
10648         static_call(kvm_x86_set_efer)(vcpu, sregs->efer);
10649
10650         *mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
10651         static_call(kvm_x86_set_cr0)(vcpu, sregs->cr0);
10652         vcpu->arch.cr0 = sregs->cr0;
10653
10654         *mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
10655         static_call(kvm_x86_set_cr4)(vcpu, sregs->cr4);
10656
10657         if (update_pdptrs) {
10658                 idx = srcu_read_lock(&vcpu->kvm->srcu);
10659                 if (is_pae_paging(vcpu)) {
10660                         load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
10661                         *mmu_reset_needed = 1;
10662                 }
10663                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
10664         }
10665
10666         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
10667         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
10668         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
10669         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
10670         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
10671         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
10672
10673         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
10674         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
10675
10676         update_cr8_intercept(vcpu);
10677
10678         /* Older userspace won't unhalt the vcpu on reset. */
10679         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
10680             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
10681             !is_protmode(vcpu))
10682                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10683
10684         return 0;
10685 }
10686
10687 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10688 {
10689         int pending_vec, max_bits;
10690         int mmu_reset_needed = 0;
10691         int ret = __set_sregs_common(vcpu, sregs, &mmu_reset_needed, true);
10692
10693         if (ret)
10694                 return ret;
10695
10696         if (mmu_reset_needed)
10697                 kvm_mmu_reset_context(vcpu);
10698
10699         max_bits = KVM_NR_INTERRUPTS;
10700         pending_vec = find_first_bit(
10701                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
10702
10703         if (pending_vec < max_bits) {
10704                 kvm_queue_interrupt(vcpu, pending_vec, false);
10705                 pr_debug("Set back pending irq %d\n", pending_vec);
10706                 kvm_make_request(KVM_REQ_EVENT, vcpu);
10707         }
10708         return 0;
10709 }
10710
10711 static int __set_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2)
10712 {
10713         int mmu_reset_needed = 0;
10714         bool valid_pdptrs = sregs2->flags & KVM_SREGS2_FLAGS_PDPTRS_VALID;
10715         bool pae = (sregs2->cr0 & X86_CR0_PG) && (sregs2->cr4 & X86_CR4_PAE) &&
10716                 !(sregs2->efer & EFER_LMA);
10717         int i, ret;
10718
10719         if (sregs2->flags & ~KVM_SREGS2_FLAGS_PDPTRS_VALID)
10720                 return -EINVAL;
10721
10722         if (valid_pdptrs && (!pae || vcpu->arch.guest_state_protected))
10723                 return -EINVAL;
10724
10725         ret = __set_sregs_common(vcpu, (struct kvm_sregs *)sregs2,
10726                                  &mmu_reset_needed, !valid_pdptrs);
10727         if (ret)
10728                 return ret;
10729
10730         if (valid_pdptrs) {
10731                 for (i = 0; i < 4 ; i++)
10732                         kvm_pdptr_write(vcpu, i, sregs2->pdptrs[i]);
10733
10734                 kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
10735                 mmu_reset_needed = 1;
10736                 vcpu->arch.pdptrs_from_userspace = true;
10737         }
10738         if (mmu_reset_needed)
10739                 kvm_mmu_reset_context(vcpu);
10740         return 0;
10741 }
10742
10743 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
10744                                   struct kvm_sregs *sregs)
10745 {
10746         int ret;
10747
10748         vcpu_load(vcpu);
10749         ret = __set_sregs(vcpu, sregs);
10750         vcpu_put(vcpu);
10751         return ret;
10752 }
10753
10754 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
10755                                         struct kvm_guest_debug *dbg)
10756 {
10757         unsigned long rflags;
10758         int i, r;
10759
10760         if (vcpu->arch.guest_state_protected)
10761                 return -EINVAL;
10762
10763         vcpu_load(vcpu);
10764
10765         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
10766                 r = -EBUSY;
10767                 if (vcpu->arch.exception.pending)
10768                         goto out;
10769                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
10770                         kvm_queue_exception(vcpu, DB_VECTOR);
10771                 else
10772                         kvm_queue_exception(vcpu, BP_VECTOR);
10773         }
10774
10775         /*
10776          * Read rflags as long as potentially injected trace flags are still
10777          * filtered out.
10778          */
10779         rflags = kvm_get_rflags(vcpu);
10780
10781         vcpu->guest_debug = dbg->control;
10782         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
10783                 vcpu->guest_debug = 0;
10784
10785         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
10786                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
10787                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
10788                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
10789         } else {
10790                 for (i = 0; i < KVM_NR_DB_REGS; i++)
10791                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
10792         }
10793         kvm_update_dr7(vcpu);
10794
10795         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
10796                 vcpu->arch.singlestep_rip = kvm_get_linear_rip(vcpu);
10797
10798         /*
10799          * Trigger an rflags update that will inject or remove the trace
10800          * flags.
10801          */
10802         kvm_set_rflags(vcpu, rflags);
10803
10804         static_call(kvm_x86_update_exception_bitmap)(vcpu);
10805
10806         r = 0;
10807
10808 out:
10809         vcpu_put(vcpu);
10810         return r;
10811 }
10812
10813 /*
10814  * Translate a guest virtual address to a guest physical address.
10815  */
10816 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
10817                                     struct kvm_translation *tr)
10818 {
10819         unsigned long vaddr = tr->linear_address;
10820         gpa_t gpa;
10821         int idx;
10822
10823         vcpu_load(vcpu);
10824
10825         idx = srcu_read_lock(&vcpu->kvm->srcu);
10826         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
10827         srcu_read_unlock(&vcpu->kvm->srcu, idx);
10828         tr->physical_address = gpa;
10829         tr->valid = gpa != UNMAPPED_GVA;
10830         tr->writeable = 1;
10831         tr->usermode = 0;
10832
10833         vcpu_put(vcpu);
10834         return 0;
10835 }
10836
10837 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
10838 {
10839         struct fxregs_state *fxsave;
10840
10841         if (!vcpu->arch.guest_fpu)
10842                 return 0;
10843
10844         vcpu_load(vcpu);
10845
10846         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
10847         memcpy(fpu->fpr, fxsave->st_space, 128);
10848         fpu->fcw = fxsave->cwd;
10849         fpu->fsw = fxsave->swd;
10850         fpu->ftwx = fxsave->twd;
10851         fpu->last_opcode = fxsave->fop;
10852         fpu->last_ip = fxsave->rip;
10853         fpu->last_dp = fxsave->rdp;
10854         memcpy(fpu->xmm, fxsave->xmm_space, sizeof(fxsave->xmm_space));
10855
10856         vcpu_put(vcpu);
10857         return 0;
10858 }
10859
10860 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
10861 {
10862         struct fxregs_state *fxsave;
10863
10864         if (!vcpu->arch.guest_fpu)
10865                 return 0;
10866
10867         vcpu_load(vcpu);
10868
10869         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
10870
10871         memcpy(fxsave->st_space, fpu->fpr, 128);
10872         fxsave->cwd = fpu->fcw;
10873         fxsave->swd = fpu->fsw;
10874         fxsave->twd = fpu->ftwx;
10875         fxsave->fop = fpu->last_opcode;
10876         fxsave->rip = fpu->last_ip;
10877         fxsave->rdp = fpu->last_dp;
10878         memcpy(fxsave->xmm_space, fpu->xmm, sizeof(fxsave->xmm_space));
10879
10880         vcpu_put(vcpu);
10881         return 0;
10882 }
10883
10884 static void store_regs(struct kvm_vcpu *vcpu)
10885 {
10886         BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
10887
10888         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
10889                 __get_regs(vcpu, &vcpu->run->s.regs.regs);
10890
10891         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
10892                 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
10893
10894         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
10895                 kvm_vcpu_ioctl_x86_get_vcpu_events(
10896                                 vcpu, &vcpu->run->s.regs.events);
10897 }
10898
10899 static int sync_regs(struct kvm_vcpu *vcpu)
10900 {
10901         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
10902                 __set_regs(vcpu, &vcpu->run->s.regs.regs);
10903                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
10904         }
10905         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
10906                 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
10907                         return -EINVAL;
10908                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
10909         }
10910         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
10911                 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
10912                                 vcpu, &vcpu->run->s.regs.events))
10913                         return -EINVAL;
10914                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
10915         }
10916
10917         return 0;
10918 }
10919
10920 void kvm_free_guest_fpu(struct kvm_vcpu *vcpu)
10921 {
10922         if (vcpu->arch.guest_fpu) {
10923                 kmem_cache_free(x86_fpu_cache, vcpu->arch.guest_fpu);
10924                 vcpu->arch.guest_fpu = NULL;
10925         }
10926 }
10927 EXPORT_SYMBOL_GPL(kvm_free_guest_fpu);
10928
10929 int kvm_arch_vcpu_precreate(struct kvm *kvm, unsigned int id)
10930 {
10931         if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
10932                 pr_warn_once("kvm: SMP vm created on host with unstable TSC; "
10933                              "guest TSC will not be reliable\n");
10934
10935         return 0;
10936 }
10937
10938 int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)
10939 {
10940         struct page *page;
10941         int r;
10942
10943         vcpu->arch.last_vmentry_cpu = -1;
10944         vcpu->arch.regs_avail = ~0;
10945         vcpu->arch.regs_dirty = ~0;
10946
10947         if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
10948                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10949         else
10950                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
10951
10952         r = kvm_mmu_create(vcpu);
10953         if (r < 0)
10954                 return r;
10955
10956         if (irqchip_in_kernel(vcpu->kvm)) {
10957                 r = kvm_create_lapic(vcpu, lapic_timer_advance_ns);
10958                 if (r < 0)
10959                         goto fail_mmu_destroy;
10960                 if (kvm_apicv_activated(vcpu->kvm))
10961                         vcpu->arch.apicv_active = true;
10962         } else
10963                 static_branch_inc(&kvm_has_noapic_vcpu);
10964
10965         r = -ENOMEM;
10966
10967         page = alloc_page(GFP_KERNEL_ACCOUNT | __GFP_ZERO);
10968         if (!page)
10969                 goto fail_free_lapic;
10970         vcpu->arch.pio_data = page_address(page);
10971
10972         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
10973                                        GFP_KERNEL_ACCOUNT);
10974         if (!vcpu->arch.mce_banks)
10975                 goto fail_free_pio_data;
10976         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
10977
10978         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask,
10979                                 GFP_KERNEL_ACCOUNT))
10980                 goto fail_free_mce_banks;
10981
10982         if (!alloc_emulate_ctxt(vcpu))
10983                 goto free_wbinvd_dirty_mask;
10984
10985         vcpu->arch.user_fpu = kmem_cache_zalloc(x86_fpu_cache,
10986                                                 GFP_KERNEL_ACCOUNT);
10987         if (!vcpu->arch.user_fpu) {
10988                 pr_err("kvm: failed to allocate userspace's fpu\n");
10989                 goto free_emulate_ctxt;
10990         }
10991
10992         vcpu->arch.guest_fpu = kmem_cache_zalloc(x86_fpu_cache,
10993                                                  GFP_KERNEL_ACCOUNT);
10994         if (!vcpu->arch.guest_fpu) {
10995                 pr_err("kvm: failed to allocate vcpu's fpu\n");
10996                 goto free_user_fpu;
10997         }
10998         fpstate_init(&vcpu->arch.guest_fpu->state);
10999         if (boot_cpu_has(X86_FEATURE_XSAVES))
11000                 vcpu->arch.guest_fpu->state.xsave.header.xcomp_bv =
11001                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
11002
11003         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
11004         vcpu->arch.reserved_gpa_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu);
11005
11006         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
11007
11008         kvm_async_pf_hash_reset(vcpu);
11009         kvm_pmu_init(vcpu);
11010
11011         vcpu->arch.pending_external_vector = -1;
11012         vcpu->arch.preempted_in_kernel = false;
11013
11014 #if IS_ENABLED(CONFIG_HYPERV)
11015         vcpu->arch.hv_root_tdp = INVALID_PAGE;
11016 #endif
11017
11018         r = static_call(kvm_x86_vcpu_create)(vcpu);
11019         if (r)
11020                 goto free_guest_fpu;
11021
11022         vcpu->arch.arch_capabilities = kvm_get_arch_capabilities();
11023         vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
11024         kvm_vcpu_mtrr_init(vcpu);
11025         vcpu_load(vcpu);
11026         kvm_set_tsc_khz(vcpu, max_tsc_khz);
11027         kvm_vcpu_reset(vcpu, false);
11028         kvm_init_mmu(vcpu);
11029         vcpu_put(vcpu);
11030         return 0;
11031
11032 free_guest_fpu:
11033         kvm_free_guest_fpu(vcpu);
11034 free_user_fpu:
11035         kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
11036 free_emulate_ctxt:
11037         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
11038 free_wbinvd_dirty_mask:
11039         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
11040 fail_free_mce_banks:
11041         kfree(vcpu->arch.mce_banks);
11042 fail_free_pio_data:
11043         free_page((unsigned long)vcpu->arch.pio_data);
11044 fail_free_lapic:
11045         kvm_free_lapic(vcpu);
11046 fail_mmu_destroy:
11047         kvm_mmu_destroy(vcpu);
11048         return r;
11049 }
11050
11051 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
11052 {
11053         struct kvm *kvm = vcpu->kvm;
11054
11055         if (mutex_lock_killable(&vcpu->mutex))
11056                 return;
11057         vcpu_load(vcpu);
11058         kvm_synchronize_tsc(vcpu, 0);
11059         vcpu_put(vcpu);
11060
11061         /* poll control enabled by default */
11062         vcpu->arch.msr_kvm_poll_control = 1;
11063
11064         mutex_unlock(&vcpu->mutex);
11065
11066         if (kvmclock_periodic_sync && vcpu->vcpu_idx == 0)
11067                 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
11068                                                 KVMCLOCK_SYNC_PERIOD);
11069 }
11070
11071 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
11072 {
11073         int idx;
11074
11075         kvmclock_reset(vcpu);
11076
11077         static_call(kvm_x86_vcpu_free)(vcpu);
11078
11079         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
11080         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
11081         kmem_cache_free(x86_fpu_cache, vcpu->arch.user_fpu);
11082         kvm_free_guest_fpu(vcpu);
11083
11084         kvm_hv_vcpu_uninit(vcpu);
11085         kvm_pmu_destroy(vcpu);
11086         kfree(vcpu->arch.mce_banks);
11087         kvm_free_lapic(vcpu);
11088         idx = srcu_read_lock(&vcpu->kvm->srcu);
11089         kvm_mmu_destroy(vcpu);
11090         srcu_read_unlock(&vcpu->kvm->srcu, idx);
11091         free_page((unsigned long)vcpu->arch.pio_data);
11092         kvfree(vcpu->arch.cpuid_entries);
11093         if (!lapic_in_kernel(vcpu))
11094                 static_branch_dec(&kvm_has_noapic_vcpu);
11095 }
11096
11097 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
11098 {
11099         struct kvm_cpuid_entry2 *cpuid_0x1;
11100         unsigned long old_cr0 = kvm_read_cr0(vcpu);
11101         unsigned long new_cr0;
11102
11103         /*
11104          * Several of the "set" flows, e.g. ->set_cr0(), read other registers
11105          * to handle side effects.  RESET emulation hits those flows and relies
11106          * on emulated/virtualized registers, including those that are loaded
11107          * into hardware, to be zeroed at vCPU creation.  Use CRs as a sentinel
11108          * to detect improper or missing initialization.
11109          */
11110         WARN_ON_ONCE(!init_event &&
11111                      (old_cr0 || kvm_read_cr3(vcpu) || kvm_read_cr4(vcpu)));
11112
11113         kvm_lapic_reset(vcpu, init_event);
11114
11115         vcpu->arch.hflags = 0;
11116
11117         vcpu->arch.smi_pending = 0;
11118         vcpu->arch.smi_count = 0;
11119         atomic_set(&vcpu->arch.nmi_queued, 0);
11120         vcpu->arch.nmi_pending = 0;
11121         vcpu->arch.nmi_injected = false;
11122         kvm_clear_interrupt_queue(vcpu);
11123         kvm_clear_exception_queue(vcpu);
11124
11125         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
11126         kvm_update_dr0123(vcpu);
11127         vcpu->arch.dr6 = DR6_ACTIVE_LOW;
11128         vcpu->arch.dr7 = DR7_FIXED_1;
11129         kvm_update_dr7(vcpu);
11130
11131         vcpu->arch.cr2 = 0;
11132
11133         kvm_make_request(KVM_REQ_EVENT, vcpu);
11134         vcpu->arch.apf.msr_en_val = 0;
11135         vcpu->arch.apf.msr_int_val = 0;
11136         vcpu->arch.st.msr_val = 0;
11137
11138         kvmclock_reset(vcpu);
11139
11140         kvm_clear_async_pf_completion_queue(vcpu);
11141         kvm_async_pf_hash_reset(vcpu);
11142         vcpu->arch.apf.halted = false;
11143
11144         if (vcpu->arch.guest_fpu && kvm_mpx_supported()) {
11145                 void *mpx_state_buffer;
11146
11147                 /*
11148                  * To avoid have the INIT path from kvm_apic_has_events() that be
11149                  * called with loaded FPU and does not let userspace fix the state.
11150                  */
11151                 if (init_event)
11152                         kvm_put_guest_fpu(vcpu);
11153                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
11154                                         XFEATURE_BNDREGS);
11155                 if (mpx_state_buffer)
11156                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndreg_state));
11157                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
11158                                         XFEATURE_BNDCSR);
11159                 if (mpx_state_buffer)
11160                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndcsr));
11161                 if (init_event)
11162                         kvm_load_guest_fpu(vcpu);
11163         }
11164
11165         if (!init_event) {
11166                 kvm_pmu_reset(vcpu);
11167                 vcpu->arch.smbase = 0x30000;
11168
11169                 vcpu->arch.msr_misc_features_enables = 0;
11170
11171                 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
11172         }
11173
11174         /* All GPRs except RDX (handled below) are zeroed on RESET/INIT. */
11175         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
11176         kvm_register_mark_dirty(vcpu, VCPU_REGS_RSP);
11177
11178         /*
11179          * Fall back to KVM's default Family/Model/Stepping of 0x600 (P6/Athlon)
11180          * if no CPUID match is found.  Note, it's impossible to get a match at
11181          * RESET since KVM emulates RESET before exposing the vCPU to userspace,
11182          * i.e. it's impossible for kvm_find_cpuid_entry() to find a valid entry
11183          * on RESET.  But, go through the motions in case that's ever remedied.
11184          */
11185         cpuid_0x1 = kvm_find_cpuid_entry(vcpu, 1, 0);
11186         kvm_rdx_write(vcpu, cpuid_0x1 ? cpuid_0x1->eax : 0x600);
11187
11188         vcpu->arch.ia32_xss = 0;
11189
11190         static_call(kvm_x86_vcpu_reset)(vcpu, init_event);
11191
11192         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
11193         kvm_rip_write(vcpu, 0xfff0);
11194
11195         vcpu->arch.cr3 = 0;
11196         kvm_register_mark_dirty(vcpu, VCPU_EXREG_CR3);
11197
11198         /*
11199          * CR0.CD/NW are set on RESET, preserved on INIT.  Note, some versions
11200          * of Intel's SDM list CD/NW as being set on INIT, but they contradict
11201          * (or qualify) that with a footnote stating that CD/NW are preserved.
11202          */
11203         new_cr0 = X86_CR0_ET;
11204         if (init_event)
11205                 new_cr0 |= (old_cr0 & (X86_CR0_NW | X86_CR0_CD));
11206         else
11207                 new_cr0 |= X86_CR0_NW | X86_CR0_CD;
11208
11209         static_call(kvm_x86_set_cr0)(vcpu, new_cr0);
11210         static_call(kvm_x86_set_cr4)(vcpu, 0);
11211         static_call(kvm_x86_set_efer)(vcpu, 0);
11212         static_call(kvm_x86_update_exception_bitmap)(vcpu);
11213
11214         /*
11215          * Reset the MMU context if paging was enabled prior to INIT (which is
11216          * implied if CR0.PG=1 as CR0 will be '0' prior to RESET).  Unlike the
11217          * standard CR0/CR4/EFER modification paths, only CR0.PG needs to be
11218          * checked because it is unconditionally cleared on INIT and all other
11219          * paging related bits are ignored if paging is disabled, i.e. CR0.WP,
11220          * CR4, and EFER changes are all irrelevant if CR0.PG was '0'.
11221          */
11222         if (old_cr0 & X86_CR0_PG)
11223                 kvm_mmu_reset_context(vcpu);
11224
11225         /*
11226          * Intel's SDM states that all TLB entries are flushed on INIT.  AMD's
11227          * APM states the TLBs are untouched by INIT, but it also states that
11228          * the TLBs are flushed on "External initialization of the processor."
11229          * Flush the guest TLB regardless of vendor, there is no meaningful
11230          * benefit in relying on the guest to flush the TLB immediately after
11231          * INIT.  A spurious TLB flush is benign and likely negligible from a
11232          * performance perspective.
11233          */
11234         if (init_event)
11235                 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
11236 }
11237 EXPORT_SYMBOL_GPL(kvm_vcpu_reset);
11238
11239 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
11240 {
11241         struct kvm_segment cs;
11242
11243         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
11244         cs.selector = vector << 8;
11245         cs.base = vector << 12;
11246         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
11247         kvm_rip_write(vcpu, 0);
11248 }
11249 EXPORT_SYMBOL_GPL(kvm_vcpu_deliver_sipi_vector);
11250
11251 int kvm_arch_hardware_enable(void)
11252 {
11253         struct kvm *kvm;
11254         struct kvm_vcpu *vcpu;
11255         int i;
11256         int ret;
11257         u64 local_tsc;
11258         u64 max_tsc = 0;
11259         bool stable, backwards_tsc = false;
11260
11261         kvm_user_return_msr_cpu_online();
11262         ret = static_call(kvm_x86_hardware_enable)();
11263         if (ret != 0)
11264                 return ret;
11265
11266         local_tsc = rdtsc();
11267         stable = !kvm_check_tsc_unstable();
11268         list_for_each_entry(kvm, &vm_list, vm_list) {
11269                 kvm_for_each_vcpu(i, vcpu, kvm) {
11270                         if (!stable && vcpu->cpu == smp_processor_id())
11271                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
11272                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
11273                                 backwards_tsc = true;
11274                                 if (vcpu->arch.last_host_tsc > max_tsc)
11275                                         max_tsc = vcpu->arch.last_host_tsc;
11276                         }
11277                 }
11278         }
11279
11280         /*
11281          * Sometimes, even reliable TSCs go backwards.  This happens on
11282          * platforms that reset TSC during suspend or hibernate actions, but
11283          * maintain synchronization.  We must compensate.  Fortunately, we can
11284          * detect that condition here, which happens early in CPU bringup,
11285          * before any KVM threads can be running.  Unfortunately, we can't
11286          * bring the TSCs fully up to date with real time, as we aren't yet far
11287          * enough into CPU bringup that we know how much real time has actually
11288          * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
11289          * variables that haven't been updated yet.
11290          *
11291          * So we simply find the maximum observed TSC above, then record the
11292          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
11293          * the adjustment will be applied.  Note that we accumulate
11294          * adjustments, in case multiple suspend cycles happen before some VCPU
11295          * gets a chance to run again.  In the event that no KVM threads get a
11296          * chance to run, we will miss the entire elapsed period, as we'll have
11297          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
11298          * loose cycle time.  This isn't too big a deal, since the loss will be
11299          * uniform across all VCPUs (not to mention the scenario is extremely
11300          * unlikely). It is possible that a second hibernate recovery happens
11301          * much faster than a first, causing the observed TSC here to be
11302          * smaller; this would require additional padding adjustment, which is
11303          * why we set last_host_tsc to the local tsc observed here.
11304          *
11305          * N.B. - this code below runs only on platforms with reliable TSC,
11306          * as that is the only way backwards_tsc is set above.  Also note
11307          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
11308          * have the same delta_cyc adjustment applied if backwards_tsc
11309          * is detected.  Note further, this adjustment is only done once,
11310          * as we reset last_host_tsc on all VCPUs to stop this from being
11311          * called multiple times (one for each physical CPU bringup).
11312          *
11313          * Platforms with unreliable TSCs don't have to deal with this, they
11314          * will be compensated by the logic in vcpu_load, which sets the TSC to
11315          * catchup mode.  This will catchup all VCPUs to real time, but cannot
11316          * guarantee that they stay in perfect synchronization.
11317          */
11318         if (backwards_tsc) {
11319                 u64 delta_cyc = max_tsc - local_tsc;
11320                 list_for_each_entry(kvm, &vm_list, vm_list) {
11321                         kvm->arch.backwards_tsc_observed = true;
11322                         kvm_for_each_vcpu(i, vcpu, kvm) {
11323                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
11324                                 vcpu->arch.last_host_tsc = local_tsc;
11325                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
11326                         }
11327
11328                         /*
11329                          * We have to disable TSC offset matching.. if you were
11330                          * booting a VM while issuing an S4 host suspend....
11331                          * you may have some problem.  Solving this issue is
11332                          * left as an exercise to the reader.
11333                          */
11334                         kvm->arch.last_tsc_nsec = 0;
11335                         kvm->arch.last_tsc_write = 0;
11336                 }
11337
11338         }
11339         return 0;
11340 }
11341
11342 void kvm_arch_hardware_disable(void)
11343 {
11344         static_call(kvm_x86_hardware_disable)();
11345         drop_user_return_notifiers();
11346 }
11347
11348 int kvm_arch_hardware_setup(void *opaque)
11349 {
11350         struct kvm_x86_init_ops *ops = opaque;
11351         int r;
11352
11353         rdmsrl_safe(MSR_EFER, &host_efer);
11354
11355         if (boot_cpu_has(X86_FEATURE_XSAVES))
11356                 rdmsrl(MSR_IA32_XSS, host_xss);
11357
11358         r = ops->hardware_setup();
11359         if (r != 0)
11360                 return r;
11361
11362         memcpy(&kvm_x86_ops, ops->runtime_ops, sizeof(kvm_x86_ops));
11363         kvm_ops_static_call_update();
11364
11365         if (!kvm_cpu_cap_has(X86_FEATURE_XSAVES))
11366                 supported_xss = 0;
11367
11368 #define __kvm_cpu_cap_has(UNUSED_, f) kvm_cpu_cap_has(f)
11369         cr4_reserved_bits = __cr4_reserved_bits(__kvm_cpu_cap_has, UNUSED_);
11370 #undef __kvm_cpu_cap_has
11371
11372         if (kvm_has_tsc_control) {
11373                 /*
11374                  * Make sure the user can only configure tsc_khz values that
11375                  * fit into a signed integer.
11376                  * A min value is not calculated because it will always
11377                  * be 1 on all machines.
11378                  */
11379                 u64 max = min(0x7fffffffULL,
11380                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
11381                 kvm_max_guest_tsc_khz = max;
11382
11383                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
11384         }
11385
11386         kvm_init_msr_list();
11387         return 0;
11388 }
11389
11390 void kvm_arch_hardware_unsetup(void)
11391 {
11392         static_call(kvm_x86_hardware_unsetup)();
11393 }
11394
11395 int kvm_arch_check_processor_compat(void *opaque)
11396 {
11397         struct cpuinfo_x86 *c = &cpu_data(smp_processor_id());
11398         struct kvm_x86_init_ops *ops = opaque;
11399
11400         WARN_ON(!irqs_disabled());
11401
11402         if (__cr4_reserved_bits(cpu_has, c) !=
11403             __cr4_reserved_bits(cpu_has, &boot_cpu_data))
11404                 return -EIO;
11405
11406         return ops->check_processor_compatibility();
11407 }
11408
11409 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
11410 {
11411         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
11412 }
11413 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
11414
11415 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
11416 {
11417         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
11418 }
11419
11420 __read_mostly DEFINE_STATIC_KEY_FALSE(kvm_has_noapic_vcpu);
11421 EXPORT_SYMBOL_GPL(kvm_has_noapic_vcpu);
11422
11423 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
11424 {
11425         struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
11426
11427         vcpu->arch.l1tf_flush_l1d = true;
11428         if (pmu->version && unlikely(pmu->event_count)) {
11429                 pmu->need_cleanup = true;
11430                 kvm_make_request(KVM_REQ_PMU, vcpu);
11431         }
11432         static_call(kvm_x86_sched_in)(vcpu, cpu);
11433 }
11434
11435 void kvm_arch_free_vm(struct kvm *kvm)
11436 {
11437         kfree(to_kvm_hv(kvm)->hv_pa_pg);
11438         __kvm_arch_free_vm(kvm);
11439 }
11440
11441
11442 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
11443 {
11444         int ret;
11445         unsigned long flags;
11446
11447         if (type)
11448                 return -EINVAL;
11449
11450         ret = kvm_page_track_init(kvm);
11451         if (ret)
11452                 return ret;
11453
11454         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
11455         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
11456         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
11457         INIT_LIST_HEAD(&kvm->arch.lpage_disallowed_mmu_pages);
11458         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
11459         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
11460
11461         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
11462         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
11463         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
11464         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
11465                 &kvm->arch.irq_sources_bitmap);
11466
11467         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
11468         mutex_init(&kvm->arch.apic_map_lock);
11469         seqcount_raw_spinlock_init(&kvm->arch.pvclock_sc, &kvm->arch.tsc_write_lock);
11470         kvm->arch.kvmclock_offset = -get_kvmclock_base_ns();
11471
11472         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
11473         pvclock_update_vm_gtod_copy(kvm);
11474         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
11475
11476         kvm->arch.guest_can_read_msr_platform_info = true;
11477
11478 #if IS_ENABLED(CONFIG_HYPERV)
11479         spin_lock_init(&kvm->arch.hv_root_tdp_lock);
11480         kvm->arch.hv_root_tdp = INVALID_PAGE;
11481 #endif
11482
11483         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
11484         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
11485
11486         kvm_apicv_init(kvm);
11487         kvm_hv_init_vm(kvm);
11488         kvm_mmu_init_vm(kvm);
11489         kvm_xen_init_vm(kvm);
11490
11491         return static_call(kvm_x86_vm_init)(kvm);
11492 }
11493
11494 int kvm_arch_post_init_vm(struct kvm *kvm)
11495 {
11496         return kvm_mmu_post_init_vm(kvm);
11497 }
11498
11499 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
11500 {
11501         vcpu_load(vcpu);
11502         kvm_mmu_unload(vcpu);
11503         vcpu_put(vcpu);
11504 }
11505
11506 static void kvm_free_vcpus(struct kvm *kvm)
11507 {
11508         unsigned int i;
11509         struct kvm_vcpu *vcpu;
11510
11511         /*
11512          * Unpin any mmu pages first.
11513          */
11514         kvm_for_each_vcpu(i, vcpu, kvm) {
11515                 kvm_clear_async_pf_completion_queue(vcpu);
11516                 kvm_unload_vcpu_mmu(vcpu);
11517         }
11518         kvm_for_each_vcpu(i, vcpu, kvm)
11519                 kvm_vcpu_destroy(vcpu);
11520
11521         mutex_lock(&kvm->lock);
11522         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
11523                 kvm->vcpus[i] = NULL;
11524
11525         atomic_set(&kvm->online_vcpus, 0);
11526         mutex_unlock(&kvm->lock);
11527 }
11528
11529 void kvm_arch_sync_events(struct kvm *kvm)
11530 {
11531         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
11532         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
11533         kvm_free_pit(kvm);
11534 }
11535
11536 #define  ERR_PTR_USR(e)  ((void __user *)ERR_PTR(e))
11537
11538 /**
11539  * __x86_set_memory_region: Setup KVM internal memory slot
11540  *
11541  * @kvm: the kvm pointer to the VM.
11542  * @id: the slot ID to setup.
11543  * @gpa: the GPA to install the slot (unused when @size == 0).
11544  * @size: the size of the slot. Set to zero to uninstall a slot.
11545  *
11546  * This function helps to setup a KVM internal memory slot.  Specify
11547  * @size > 0 to install a new slot, while @size == 0 to uninstall a
11548  * slot.  The return code can be one of the following:
11549  *
11550  *   HVA:           on success (uninstall will return a bogus HVA)
11551  *   -errno:        on error
11552  *
11553  * The caller should always use IS_ERR() to check the return value
11554  * before use.  Note, the KVM internal memory slots are guaranteed to
11555  * remain valid and unchanged until the VM is destroyed, i.e., the
11556  * GPA->HVA translation will not change.  However, the HVA is a user
11557  * address, i.e. its accessibility is not guaranteed, and must be
11558  * accessed via __copy_{to,from}_user().
11559  */
11560 void __user * __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa,
11561                                       u32 size)
11562 {
11563         int i, r;
11564         unsigned long hva, old_npages;
11565         struct kvm_memslots *slots = kvm_memslots(kvm);
11566         struct kvm_memory_slot *slot;
11567
11568         /* Called with kvm->slots_lock held.  */
11569         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
11570                 return ERR_PTR_USR(-EINVAL);
11571
11572         slot = id_to_memslot(slots, id);
11573         if (size) {
11574                 if (slot && slot->npages)
11575                         return ERR_PTR_USR(-EEXIST);
11576
11577                 /*
11578                  * MAP_SHARED to prevent internal slot pages from being moved
11579                  * by fork()/COW.
11580                  */
11581                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
11582                               MAP_SHARED | MAP_ANONYMOUS, 0);
11583                 if (IS_ERR((void *)hva))
11584                         return (void __user *)hva;
11585         } else {
11586                 if (!slot || !slot->npages)
11587                         return NULL;
11588
11589                 old_npages = slot->npages;
11590                 hva = slot->userspace_addr;
11591         }
11592
11593         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
11594                 struct kvm_userspace_memory_region m;
11595
11596                 m.slot = id | (i << 16);
11597                 m.flags = 0;
11598                 m.guest_phys_addr = gpa;
11599                 m.userspace_addr = hva;
11600                 m.memory_size = size;
11601                 r = __kvm_set_memory_region(kvm, &m);
11602                 if (r < 0)
11603                         return ERR_PTR_USR(r);
11604         }
11605
11606         if (!size)
11607                 vm_munmap(hva, old_npages * PAGE_SIZE);
11608
11609         return (void __user *)hva;
11610 }
11611 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
11612
11613 void kvm_arch_pre_destroy_vm(struct kvm *kvm)
11614 {
11615         kvm_mmu_pre_destroy_vm(kvm);
11616 }
11617
11618 void kvm_arch_destroy_vm(struct kvm *kvm)
11619 {
11620         if (current->mm == kvm->mm) {
11621                 /*
11622                  * Free memory regions allocated on behalf of userspace,
11623                  * unless the the memory map has changed due to process exit
11624                  * or fd copying.
11625                  */
11626                 mutex_lock(&kvm->slots_lock);
11627                 __x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT,
11628                                         0, 0);
11629                 __x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT,
11630                                         0, 0);
11631                 __x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
11632                 mutex_unlock(&kvm->slots_lock);
11633         }
11634         static_call_cond(kvm_x86_vm_destroy)(kvm);
11635         kvm_free_msr_filter(srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1));
11636         kvm_pic_destroy(kvm);
11637         kvm_ioapic_destroy(kvm);
11638         kvm_free_vcpus(kvm);
11639         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
11640         kfree(srcu_dereference_check(kvm->arch.pmu_event_filter, &kvm->srcu, 1));
11641         kvm_mmu_uninit_vm(kvm);
11642         kvm_page_track_cleanup(kvm);
11643         kvm_xen_destroy_vm(kvm);
11644         kvm_hv_destroy_vm(kvm);
11645 }
11646
11647 static void memslot_rmap_free(struct kvm_memory_slot *slot)
11648 {
11649         int i;
11650
11651         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
11652                 kvfree(slot->arch.rmap[i]);
11653                 slot->arch.rmap[i] = NULL;
11654         }
11655 }
11656
11657 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot)
11658 {
11659         int i;
11660
11661         memslot_rmap_free(slot);
11662
11663         for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11664                 kvfree(slot->arch.lpage_info[i - 1]);
11665                 slot->arch.lpage_info[i - 1] = NULL;
11666         }
11667
11668         kvm_page_track_free_memslot(slot);
11669 }
11670
11671 int memslot_rmap_alloc(struct kvm_memory_slot *slot, unsigned long npages)
11672 {
11673         const int sz = sizeof(*slot->arch.rmap[0]);
11674         int i;
11675
11676         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
11677                 int level = i + 1;
11678                 int lpages = __kvm_mmu_slot_lpages(slot, npages, level);
11679
11680                 if (slot->arch.rmap[i])
11681                         continue;
11682
11683                 slot->arch.rmap[i] = kvcalloc(lpages, sz, GFP_KERNEL_ACCOUNT);
11684                 if (!slot->arch.rmap[i]) {
11685                         memslot_rmap_free(slot);
11686                         return -ENOMEM;
11687                 }
11688         }
11689
11690         return 0;
11691 }
11692
11693 static int kvm_alloc_memslot_metadata(struct kvm *kvm,
11694                                       struct kvm_memory_slot *slot,
11695                                       unsigned long npages)
11696 {
11697         int i, r;
11698
11699         /*
11700          * Clear out the previous array pointers for the KVM_MR_MOVE case.  The
11701          * old arrays will be freed by __kvm_set_memory_region() if installing
11702          * the new memslot is successful.
11703          */
11704         memset(&slot->arch, 0, sizeof(slot->arch));
11705
11706         if (kvm_memslots_have_rmaps(kvm)) {
11707                 r = memslot_rmap_alloc(slot, npages);
11708                 if (r)
11709                         return r;
11710         }
11711
11712         for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11713                 struct kvm_lpage_info *linfo;
11714                 unsigned long ugfn;
11715                 int lpages;
11716                 int level = i + 1;
11717
11718                 lpages = __kvm_mmu_slot_lpages(slot, npages, level);
11719
11720                 linfo = kvcalloc(lpages, sizeof(*linfo), GFP_KERNEL_ACCOUNT);
11721                 if (!linfo)
11722                         goto out_free;
11723
11724                 slot->arch.lpage_info[i - 1] = linfo;
11725
11726                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
11727                         linfo[0].disallow_lpage = 1;
11728                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
11729                         linfo[lpages - 1].disallow_lpage = 1;
11730                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
11731                 /*
11732                  * If the gfn and userspace address are not aligned wrt each
11733                  * other, disable large page support for this slot.
11734                  */
11735                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1)) {
11736                         unsigned long j;
11737
11738                         for (j = 0; j < lpages; ++j)
11739                                 linfo[j].disallow_lpage = 1;
11740                 }
11741         }
11742
11743         if (kvm_page_track_create_memslot(kvm, slot, npages))
11744                 goto out_free;
11745
11746         return 0;
11747
11748 out_free:
11749         memslot_rmap_free(slot);
11750
11751         for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11752                 kvfree(slot->arch.lpage_info[i - 1]);
11753                 slot->arch.lpage_info[i - 1] = NULL;
11754         }
11755         return -ENOMEM;
11756 }
11757
11758 void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen)
11759 {
11760         struct kvm_vcpu *vcpu;
11761         int i;
11762
11763         /*
11764          * memslots->generation has been incremented.
11765          * mmio generation may have reached its maximum value.
11766          */
11767         kvm_mmu_invalidate_mmio_sptes(kvm, gen);
11768
11769         /* Force re-initialization of steal_time cache */
11770         kvm_for_each_vcpu(i, vcpu, kvm)
11771                 kvm_vcpu_kick(vcpu);
11772 }
11773
11774 int kvm_arch_prepare_memory_region(struct kvm *kvm,
11775                                 struct kvm_memory_slot *memslot,
11776                                 const struct kvm_userspace_memory_region *mem,
11777                                 enum kvm_mr_change change)
11778 {
11779         if (change == KVM_MR_CREATE || change == KVM_MR_MOVE)
11780                 return kvm_alloc_memslot_metadata(kvm, memslot,
11781                                                   mem->memory_size >> PAGE_SHIFT);
11782         return 0;
11783 }
11784
11785
11786 static void kvm_mmu_update_cpu_dirty_logging(struct kvm *kvm, bool enable)
11787 {
11788         struct kvm_arch *ka = &kvm->arch;
11789
11790         if (!kvm_x86_ops.cpu_dirty_log_size)
11791                 return;
11792
11793         if ((enable && ++ka->cpu_dirty_logging_count == 1) ||
11794             (!enable && --ka->cpu_dirty_logging_count == 0))
11795                 kvm_make_all_cpus_request(kvm, KVM_REQ_UPDATE_CPU_DIRTY_LOGGING);
11796
11797         WARN_ON_ONCE(ka->cpu_dirty_logging_count < 0);
11798 }
11799
11800 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
11801                                      struct kvm_memory_slot *old,
11802                                      const struct kvm_memory_slot *new,
11803                                      enum kvm_mr_change change)
11804 {
11805         bool log_dirty_pages = new->flags & KVM_MEM_LOG_DIRTY_PAGES;
11806
11807         /*
11808          * Update CPU dirty logging if dirty logging is being toggled.  This
11809          * applies to all operations.
11810          */
11811         if ((old->flags ^ new->flags) & KVM_MEM_LOG_DIRTY_PAGES)
11812                 kvm_mmu_update_cpu_dirty_logging(kvm, log_dirty_pages);
11813
11814         /*
11815          * Nothing more to do for RO slots (which can't be dirtied and can't be
11816          * made writable) or CREATE/MOVE/DELETE of a slot.
11817          *
11818          * For a memslot with dirty logging disabled:
11819          * CREATE:      No dirty mappings will already exist.
11820          * MOVE/DELETE: The old mappings will already have been cleaned up by
11821          *              kvm_arch_flush_shadow_memslot()
11822          *
11823          * For a memslot with dirty logging enabled:
11824          * CREATE:      No shadow pages exist, thus nothing to write-protect
11825          *              and no dirty bits to clear.
11826          * MOVE/DELETE: The old mappings will already have been cleaned up by
11827          *              kvm_arch_flush_shadow_memslot().
11828          */
11829         if ((change != KVM_MR_FLAGS_ONLY) || (new->flags & KVM_MEM_READONLY))
11830                 return;
11831
11832         /*
11833          * READONLY and non-flags changes were filtered out above, and the only
11834          * other flag is LOG_DIRTY_PAGES, i.e. something is wrong if dirty
11835          * logging isn't being toggled on or off.
11836          */
11837         if (WARN_ON_ONCE(!((old->flags ^ new->flags) & KVM_MEM_LOG_DIRTY_PAGES)))
11838                 return;
11839
11840         if (!log_dirty_pages) {
11841                 /*
11842                  * Dirty logging tracks sptes in 4k granularity, meaning that
11843                  * large sptes have to be split.  If live migration succeeds,
11844                  * the guest in the source machine will be destroyed and large
11845                  * sptes will be created in the destination.  However, if the
11846                  * guest continues to run in the source machine (for example if
11847                  * live migration fails), small sptes will remain around and
11848                  * cause bad performance.
11849                  *
11850                  * Scan sptes if dirty logging has been stopped, dropping those
11851                  * which can be collapsed into a single large-page spte.  Later
11852                  * page faults will create the large-page sptes.
11853                  */
11854                 kvm_mmu_zap_collapsible_sptes(kvm, new);
11855         } else {
11856                 /*
11857                  * Initially-all-set does not require write protecting any page,
11858                  * because they're all assumed to be dirty.
11859                  */
11860                 if (kvm_dirty_log_manual_protect_and_init_set(kvm))
11861                         return;
11862
11863                 if (kvm_x86_ops.cpu_dirty_log_size) {
11864                         kvm_mmu_slot_leaf_clear_dirty(kvm, new);
11865                         kvm_mmu_slot_remove_write_access(kvm, new, PG_LEVEL_2M);
11866                 } else {
11867                         kvm_mmu_slot_remove_write_access(kvm, new, PG_LEVEL_4K);
11868                 }
11869         }
11870 }
11871
11872 void kvm_arch_commit_memory_region(struct kvm *kvm,
11873                                 const struct kvm_userspace_memory_region *mem,
11874                                 struct kvm_memory_slot *old,
11875                                 const struct kvm_memory_slot *new,
11876                                 enum kvm_mr_change change)
11877 {
11878         if (!kvm->arch.n_requested_mmu_pages)
11879                 kvm_mmu_change_mmu_pages(kvm,
11880                                 kvm_mmu_calculate_default_mmu_pages(kvm));
11881
11882         kvm_mmu_slot_apply_flags(kvm, old, new, change);
11883
11884         /* Free the arrays associated with the old memslot. */
11885         if (change == KVM_MR_MOVE)
11886                 kvm_arch_free_memslot(kvm, old);
11887 }
11888
11889 void kvm_arch_flush_shadow_all(struct kvm *kvm)
11890 {
11891         kvm_mmu_zap_all(kvm);
11892 }
11893
11894 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
11895                                    struct kvm_memory_slot *slot)
11896 {
11897         kvm_page_track_flush_slot(kvm, slot);
11898 }
11899
11900 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu *vcpu)
11901 {
11902         return (is_guest_mode(vcpu) &&
11903                         kvm_x86_ops.guest_apic_has_interrupt &&
11904                         static_call(kvm_x86_guest_apic_has_interrupt)(vcpu));
11905 }
11906
11907 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
11908 {
11909         if (!list_empty_careful(&vcpu->async_pf.done))
11910                 return true;
11911
11912         if (kvm_apic_has_events(vcpu))
11913                 return true;
11914
11915         if (vcpu->arch.pv.pv_unhalted)
11916                 return true;
11917
11918         if (vcpu->arch.exception.pending)
11919                 return true;
11920
11921         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
11922             (vcpu->arch.nmi_pending &&
11923              static_call(kvm_x86_nmi_allowed)(vcpu, false)))
11924                 return true;
11925
11926         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
11927             (vcpu->arch.smi_pending &&
11928              static_call(kvm_x86_smi_allowed)(vcpu, false)))
11929                 return true;
11930
11931         if (kvm_arch_interrupt_allowed(vcpu) &&
11932             (kvm_cpu_has_interrupt(vcpu) ||
11933             kvm_guest_apic_has_interrupt(vcpu)))
11934                 return true;
11935
11936         if (kvm_hv_has_stimer_pending(vcpu))
11937                 return true;
11938
11939         if (is_guest_mode(vcpu) &&
11940             kvm_x86_ops.nested_ops->hv_timer_pending &&
11941             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
11942                 return true;
11943
11944         return false;
11945 }
11946
11947 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
11948 {
11949         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
11950 }
11951
11952 bool kvm_arch_dy_has_pending_interrupt(struct kvm_vcpu *vcpu)
11953 {
11954         if (vcpu->arch.apicv_active && static_call(kvm_x86_dy_apicv_has_pending_interrupt)(vcpu))
11955                 return true;
11956
11957         return false;
11958 }
11959
11960 bool kvm_arch_dy_runnable(struct kvm_vcpu *vcpu)
11961 {
11962         if (READ_ONCE(vcpu->arch.pv.pv_unhalted))
11963                 return true;
11964
11965         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
11966                 kvm_test_request(KVM_REQ_SMI, vcpu) ||
11967                  kvm_test_request(KVM_REQ_EVENT, vcpu))
11968                 return true;
11969
11970         return kvm_arch_dy_has_pending_interrupt(vcpu);
11971 }
11972
11973 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
11974 {
11975         if (vcpu->arch.guest_state_protected)
11976                 return true;
11977
11978         return vcpu->arch.preempted_in_kernel;
11979 }
11980
11981 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
11982 {
11983         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
11984 }
11985
11986 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
11987 {
11988         return static_call(kvm_x86_interrupt_allowed)(vcpu, false);
11989 }
11990
11991 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
11992 {
11993         /* Can't read the RIP when guest state is protected, just return 0 */
11994         if (vcpu->arch.guest_state_protected)
11995                 return 0;
11996
11997         if (is_64_bit_mode(vcpu))
11998                 return kvm_rip_read(vcpu);
11999         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
12000                      kvm_rip_read(vcpu));
12001 }
12002 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
12003
12004 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
12005 {
12006         return kvm_get_linear_rip(vcpu) == linear_rip;
12007 }
12008 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
12009
12010 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
12011 {
12012         unsigned long rflags;
12013
12014         rflags = static_call(kvm_x86_get_rflags)(vcpu);
12015         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
12016                 rflags &= ~X86_EFLAGS_TF;
12017         return rflags;
12018 }
12019 EXPORT_SYMBOL_GPL(kvm_get_rflags);
12020
12021 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
12022 {
12023         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
12024             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
12025                 rflags |= X86_EFLAGS_TF;
12026         static_call(kvm_x86_set_rflags)(vcpu, rflags);
12027 }
12028
12029 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
12030 {
12031         __kvm_set_rflags(vcpu, rflags);
12032         kvm_make_request(KVM_REQ_EVENT, vcpu);
12033 }
12034 EXPORT_SYMBOL_GPL(kvm_set_rflags);
12035
12036 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
12037 {
12038         int r;
12039
12040         if ((vcpu->arch.mmu->direct_map != work->arch.direct_map) ||
12041               work->wakeup_all)
12042                 return;
12043
12044         r = kvm_mmu_reload(vcpu);
12045         if (unlikely(r))
12046                 return;
12047
12048         if (!vcpu->arch.mmu->direct_map &&
12049               work->arch.cr3 != vcpu->arch.mmu->get_guest_pgd(vcpu))
12050                 return;
12051
12052         kvm_mmu_do_page_fault(vcpu, work->cr2_or_gpa, 0, true);
12053 }
12054
12055 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
12056 {
12057         BUILD_BUG_ON(!is_power_of_2(ASYNC_PF_PER_VCPU));
12058
12059         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
12060 }
12061
12062 static inline u32 kvm_async_pf_next_probe(u32 key)
12063 {
12064         return (key + 1) & (ASYNC_PF_PER_VCPU - 1);
12065 }
12066
12067 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
12068 {
12069         u32 key = kvm_async_pf_hash_fn(gfn);
12070
12071         while (vcpu->arch.apf.gfns[key] != ~0)
12072                 key = kvm_async_pf_next_probe(key);
12073
12074         vcpu->arch.apf.gfns[key] = gfn;
12075 }
12076
12077 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
12078 {
12079         int i;
12080         u32 key = kvm_async_pf_hash_fn(gfn);
12081
12082         for (i = 0; i < ASYNC_PF_PER_VCPU &&
12083                      (vcpu->arch.apf.gfns[key] != gfn &&
12084                       vcpu->arch.apf.gfns[key] != ~0); i++)
12085                 key = kvm_async_pf_next_probe(key);
12086
12087         return key;
12088 }
12089
12090 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
12091 {
12092         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
12093 }
12094
12095 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
12096 {
12097         u32 i, j, k;
12098
12099         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
12100
12101         if (WARN_ON_ONCE(vcpu->arch.apf.gfns[i] != gfn))
12102                 return;
12103
12104         while (true) {
12105                 vcpu->arch.apf.gfns[i] = ~0;
12106                 do {
12107                         j = kvm_async_pf_next_probe(j);
12108                         if (vcpu->arch.apf.gfns[j] == ~0)
12109                                 return;
12110                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
12111                         /*
12112                          * k lies cyclically in ]i,j]
12113                          * |    i.k.j |
12114                          * |....j i.k.| or  |.k..j i...|
12115                          */
12116                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
12117                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
12118                 i = j;
12119         }
12120 }
12121
12122 static inline int apf_put_user_notpresent(struct kvm_vcpu *vcpu)
12123 {
12124         u32 reason = KVM_PV_REASON_PAGE_NOT_PRESENT;
12125
12126         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &reason,
12127                                       sizeof(reason));
12128 }
12129
12130 static inline int apf_put_user_ready(struct kvm_vcpu *vcpu, u32 token)
12131 {
12132         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
12133
12134         return kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
12135                                              &token, offset, sizeof(token));
12136 }
12137
12138 static inline bool apf_pageready_slot_free(struct kvm_vcpu *vcpu)
12139 {
12140         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
12141         u32 val;
12142
12143         if (kvm_read_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
12144                                          &val, offset, sizeof(val)))
12145                 return false;
12146
12147         return !val;
12148 }
12149
12150 static bool kvm_can_deliver_async_pf(struct kvm_vcpu *vcpu)
12151 {
12152         if (!vcpu->arch.apf.delivery_as_pf_vmexit && is_guest_mode(vcpu))
12153                 return false;
12154
12155         if (!kvm_pv_async_pf_enabled(vcpu) ||
12156             (vcpu->arch.apf.send_user_only && static_call(kvm_x86_get_cpl)(vcpu) == 0))
12157                 return false;
12158
12159         return true;
12160 }
12161
12162 bool kvm_can_do_async_pf(struct kvm_vcpu *vcpu)
12163 {
12164         if (unlikely(!lapic_in_kernel(vcpu) ||
12165                      kvm_event_needs_reinjection(vcpu) ||
12166                      vcpu->arch.exception.pending))
12167                 return false;
12168
12169         if (kvm_hlt_in_guest(vcpu->kvm) && !kvm_can_deliver_async_pf(vcpu))
12170                 return false;
12171
12172         /*
12173          * If interrupts are off we cannot even use an artificial
12174          * halt state.
12175          */
12176         return kvm_arch_interrupt_allowed(vcpu);
12177 }
12178
12179 bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
12180                                      struct kvm_async_pf *work)
12181 {
12182         struct x86_exception fault;
12183
12184         trace_kvm_async_pf_not_present(work->arch.token, work->cr2_or_gpa);
12185         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
12186
12187         if (kvm_can_deliver_async_pf(vcpu) &&
12188             !apf_put_user_notpresent(vcpu)) {
12189                 fault.vector = PF_VECTOR;
12190                 fault.error_code_valid = true;
12191                 fault.error_code = 0;
12192                 fault.nested_page_fault = false;
12193                 fault.address = work->arch.token;
12194                 fault.async_page_fault = true;
12195                 kvm_inject_page_fault(vcpu, &fault);
12196                 return true;
12197         } else {
12198                 /*
12199                  * It is not possible to deliver a paravirtualized asynchronous
12200                  * page fault, but putting the guest in an artificial halt state
12201                  * can be beneficial nevertheless: if an interrupt arrives, we
12202                  * can deliver it timely and perhaps the guest will schedule
12203                  * another process.  When the instruction that triggered a page
12204                  * fault is retried, hopefully the page will be ready in the host.
12205                  */
12206                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
12207                 return false;
12208         }
12209 }
12210
12211 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
12212                                  struct kvm_async_pf *work)
12213 {
12214         struct kvm_lapic_irq irq = {
12215                 .delivery_mode = APIC_DM_FIXED,
12216                 .vector = vcpu->arch.apf.vec
12217         };
12218
12219         if (work->wakeup_all)
12220                 work->arch.token = ~0; /* broadcast wakeup */
12221         else
12222                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
12223         trace_kvm_async_pf_ready(work->arch.token, work->cr2_or_gpa);
12224
12225         if ((work->wakeup_all || work->notpresent_injected) &&
12226             kvm_pv_async_pf_enabled(vcpu) &&
12227             !apf_put_user_ready(vcpu, work->arch.token)) {
12228                 vcpu->arch.apf.pageready_pending = true;
12229                 kvm_apic_set_irq(vcpu, &irq, NULL);
12230         }
12231
12232         vcpu->arch.apf.halted = false;
12233         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
12234 }
12235
12236 void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu)
12237 {
12238         kvm_make_request(KVM_REQ_APF_READY, vcpu);
12239         if (!vcpu->arch.apf.pageready_pending)
12240                 kvm_vcpu_kick(vcpu);
12241 }
12242
12243 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu)
12244 {
12245         if (!kvm_pv_async_pf_enabled(vcpu))
12246                 return true;
12247         else
12248                 return kvm_lapic_enabled(vcpu) && apf_pageready_slot_free(vcpu);
12249 }
12250
12251 void kvm_arch_start_assignment(struct kvm *kvm)
12252 {
12253         if (atomic_inc_return(&kvm->arch.assigned_device_count) == 1)
12254                 static_call_cond(kvm_x86_start_assignment)(kvm);
12255 }
12256 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
12257
12258 void kvm_arch_end_assignment(struct kvm *kvm)
12259 {
12260         atomic_dec(&kvm->arch.assigned_device_count);
12261 }
12262 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
12263
12264 bool kvm_arch_has_assigned_device(struct kvm *kvm)
12265 {
12266         return atomic_read(&kvm->arch.assigned_device_count);
12267 }
12268 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
12269
12270 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
12271 {
12272         atomic_inc(&kvm->arch.noncoherent_dma_count);
12273 }
12274 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
12275
12276 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
12277 {
12278         atomic_dec(&kvm->arch.noncoherent_dma_count);
12279 }
12280 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
12281
12282 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
12283 {
12284         return atomic_read(&kvm->arch.noncoherent_dma_count);
12285 }
12286 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
12287
12288 bool kvm_arch_has_irq_bypass(void)
12289 {
12290         return true;
12291 }
12292
12293 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
12294                                       struct irq_bypass_producer *prod)
12295 {
12296         struct kvm_kernel_irqfd *irqfd =
12297                 container_of(cons, struct kvm_kernel_irqfd, consumer);
12298         int ret;
12299
12300         irqfd->producer = prod;
12301         kvm_arch_start_assignment(irqfd->kvm);
12302         ret = static_call(kvm_x86_update_pi_irte)(irqfd->kvm,
12303                                          prod->irq, irqfd->gsi, 1);
12304
12305         if (ret)
12306                 kvm_arch_end_assignment(irqfd->kvm);
12307
12308         return ret;
12309 }
12310
12311 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
12312                                       struct irq_bypass_producer *prod)
12313 {
12314         int ret;
12315         struct kvm_kernel_irqfd *irqfd =
12316                 container_of(cons, struct kvm_kernel_irqfd, consumer);
12317
12318         WARN_ON(irqfd->producer != prod);
12319         irqfd->producer = NULL;
12320
12321         /*
12322          * When producer of consumer is unregistered, we change back to
12323          * remapped mode, so we can re-use the current implementation
12324          * when the irq is masked/disabled or the consumer side (KVM
12325          * int this case doesn't want to receive the interrupts.
12326         */
12327         ret = static_call(kvm_x86_update_pi_irte)(irqfd->kvm, prod->irq, irqfd->gsi, 0);
12328         if (ret)
12329                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
12330                        " fails: %d\n", irqfd->consumer.token, ret);
12331
12332         kvm_arch_end_assignment(irqfd->kvm);
12333 }
12334
12335 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
12336                                    uint32_t guest_irq, bool set)
12337 {
12338         return static_call(kvm_x86_update_pi_irte)(kvm, host_irq, guest_irq, set);
12339 }
12340
12341 bool kvm_arch_irqfd_route_changed(struct kvm_kernel_irq_routing_entry *old,
12342                                   struct kvm_kernel_irq_routing_entry *new)
12343 {
12344         if (new->type != KVM_IRQ_ROUTING_MSI)
12345                 return true;
12346
12347         return !!memcmp(&old->msi, &new->msi, sizeof(new->msi));
12348 }
12349
12350 bool kvm_vector_hashing_enabled(void)
12351 {
12352         return vector_hashing;
12353 }
12354
12355 bool kvm_arch_no_poll(struct kvm_vcpu *vcpu)
12356 {
12357         return (vcpu->arch.msr_kvm_poll_control & 1) == 0;
12358 }
12359 EXPORT_SYMBOL_GPL(kvm_arch_no_poll);
12360
12361
12362 int kvm_spec_ctrl_test_value(u64 value)
12363 {
12364         /*
12365          * test that setting IA32_SPEC_CTRL to given value
12366          * is allowed by the host processor
12367          */
12368
12369         u64 saved_value;
12370         unsigned long flags;
12371         int ret = 0;
12372
12373         local_irq_save(flags);
12374
12375         if (rdmsrl_safe(MSR_IA32_SPEC_CTRL, &saved_value))
12376                 ret = 1;
12377         else if (wrmsrl_safe(MSR_IA32_SPEC_CTRL, value))
12378                 ret = 1;
12379         else
12380                 wrmsrl(MSR_IA32_SPEC_CTRL, saved_value);
12381
12382         local_irq_restore(flags);
12383
12384         return ret;
12385 }
12386 EXPORT_SYMBOL_GPL(kvm_spec_ctrl_test_value);
12387
12388 void kvm_fixup_and_inject_pf_error(struct kvm_vcpu *vcpu, gva_t gva, u16 error_code)
12389 {
12390         struct x86_exception fault;
12391         u32 access = error_code &
12392                 (PFERR_WRITE_MASK | PFERR_FETCH_MASK | PFERR_USER_MASK);
12393
12394         if (!(error_code & PFERR_PRESENT_MASK) ||
12395             vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, &fault) != UNMAPPED_GVA) {
12396                 /*
12397                  * If vcpu->arch.walk_mmu->gva_to_gpa succeeded, the page
12398                  * tables probably do not match the TLB.  Just proceed
12399                  * with the error code that the processor gave.
12400                  */
12401                 fault.vector = PF_VECTOR;
12402                 fault.error_code_valid = true;
12403                 fault.error_code = error_code;
12404                 fault.nested_page_fault = false;
12405                 fault.address = gva;
12406         }
12407         vcpu->arch.walk_mmu->inject_page_fault(vcpu, &fault);
12408 }
12409 EXPORT_SYMBOL_GPL(kvm_fixup_and_inject_pf_error);
12410
12411 /*
12412  * Handles kvm_read/write_guest_virt*() result and either injects #PF or returns
12413  * KVM_EXIT_INTERNAL_ERROR for cases not currently handled by KVM. Return value
12414  * indicates whether exit to userspace is needed.
12415  */
12416 int kvm_handle_memory_failure(struct kvm_vcpu *vcpu, int r,
12417                               struct x86_exception *e)
12418 {
12419         if (r == X86EMUL_PROPAGATE_FAULT) {
12420                 kvm_inject_emulated_page_fault(vcpu, e);
12421                 return 1;
12422         }
12423
12424         /*
12425          * In case kvm_read/write_guest_virt*() failed with X86EMUL_IO_NEEDED
12426          * while handling a VMX instruction KVM could've handled the request
12427          * correctly by exiting to userspace and performing I/O but there
12428          * doesn't seem to be a real use-case behind such requests, just return
12429          * KVM_EXIT_INTERNAL_ERROR for now.
12430          */
12431         kvm_prepare_emulation_failure_exit(vcpu);
12432
12433         return 0;
12434 }
12435 EXPORT_SYMBOL_GPL(kvm_handle_memory_failure);
12436
12437 int kvm_handle_invpcid(struct kvm_vcpu *vcpu, unsigned long type, gva_t gva)
12438 {
12439         bool pcid_enabled;
12440         struct x86_exception e;
12441         struct {
12442                 u64 pcid;
12443                 u64 gla;
12444         } operand;
12445         int r;
12446
12447         r = kvm_read_guest_virt(vcpu, gva, &operand, sizeof(operand), &e);
12448         if (r != X86EMUL_CONTINUE)
12449                 return kvm_handle_memory_failure(vcpu, r, &e);
12450
12451         if (operand.pcid >> 12 != 0) {
12452                 kvm_inject_gp(vcpu, 0);
12453                 return 1;
12454         }
12455
12456         pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
12457
12458         switch (type) {
12459         case INVPCID_TYPE_INDIV_ADDR:
12460                 if ((!pcid_enabled && (operand.pcid != 0)) ||
12461                     is_noncanonical_address(operand.gla, vcpu)) {
12462                         kvm_inject_gp(vcpu, 0);
12463                         return 1;
12464                 }
12465                 kvm_mmu_invpcid_gva(vcpu, operand.gla, operand.pcid);
12466                 return kvm_skip_emulated_instruction(vcpu);
12467
12468         case INVPCID_TYPE_SINGLE_CTXT:
12469                 if (!pcid_enabled && (operand.pcid != 0)) {
12470                         kvm_inject_gp(vcpu, 0);
12471                         return 1;
12472                 }
12473
12474                 kvm_invalidate_pcid(vcpu, operand.pcid);
12475                 return kvm_skip_emulated_instruction(vcpu);
12476
12477         case INVPCID_TYPE_ALL_NON_GLOBAL:
12478                 /*
12479                  * Currently, KVM doesn't mark global entries in the shadow
12480                  * page tables, so a non-global flush just degenerates to a
12481                  * global flush. If needed, we could optimize this later by
12482                  * keeping track of global entries in shadow page tables.
12483                  */
12484
12485                 fallthrough;
12486         case INVPCID_TYPE_ALL_INCL_GLOBAL:
12487                 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
12488                 return kvm_skip_emulated_instruction(vcpu);
12489
12490         default:
12491                 BUG(); /* We have already checked above that type <= 3 */
12492         }
12493 }
12494 EXPORT_SYMBOL_GPL(kvm_handle_invpcid);
12495
12496 static int complete_sev_es_emulated_mmio(struct kvm_vcpu *vcpu)
12497 {
12498         struct kvm_run *run = vcpu->run;
12499         struct kvm_mmio_fragment *frag;
12500         unsigned int len;
12501
12502         BUG_ON(!vcpu->mmio_needed);
12503
12504         /* Complete previous fragment */
12505         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
12506         len = min(8u, frag->len);
12507         if (!vcpu->mmio_is_write)
12508                 memcpy(frag->data, run->mmio.data, len);
12509
12510         if (frag->len <= 8) {
12511                 /* Switch to the next fragment. */
12512                 frag++;
12513                 vcpu->mmio_cur_fragment++;
12514         } else {
12515                 /* Go forward to the next mmio piece. */
12516                 frag->data += len;
12517                 frag->gpa += len;
12518                 frag->len -= len;
12519         }
12520
12521         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
12522                 vcpu->mmio_needed = 0;
12523
12524                 // VMG change, at this point, we're always done
12525                 // RIP has already been advanced
12526                 return 1;
12527         }
12528
12529         // More MMIO is needed
12530         run->mmio.phys_addr = frag->gpa;
12531         run->mmio.len = min(8u, frag->len);
12532         run->mmio.is_write = vcpu->mmio_is_write;
12533         if (run->mmio.is_write)
12534                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
12535         run->exit_reason = KVM_EXIT_MMIO;
12536
12537         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12538
12539         return 0;
12540 }
12541
12542 int kvm_sev_es_mmio_write(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
12543                           void *data)
12544 {
12545         int handled;
12546         struct kvm_mmio_fragment *frag;
12547
12548         if (!data)
12549                 return -EINVAL;
12550
12551         handled = write_emultor.read_write_mmio(vcpu, gpa, bytes, data);
12552         if (handled == bytes)
12553                 return 1;
12554
12555         bytes -= handled;
12556         gpa += handled;
12557         data += handled;
12558
12559         /*TODO: Check if need to increment number of frags */
12560         frag = vcpu->mmio_fragments;
12561         vcpu->mmio_nr_fragments = 1;
12562         frag->len = bytes;
12563         frag->gpa = gpa;
12564         frag->data = data;
12565
12566         vcpu->mmio_needed = 1;
12567         vcpu->mmio_cur_fragment = 0;
12568
12569         vcpu->run->mmio.phys_addr = gpa;
12570         vcpu->run->mmio.len = min(8u, frag->len);
12571         vcpu->run->mmio.is_write = 1;
12572         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
12573         vcpu->run->exit_reason = KVM_EXIT_MMIO;
12574
12575         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12576
12577         return 0;
12578 }
12579 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_write);
12580
12581 int kvm_sev_es_mmio_read(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
12582                          void *data)
12583 {
12584         int handled;
12585         struct kvm_mmio_fragment *frag;
12586
12587         if (!data)
12588                 return -EINVAL;
12589
12590         handled = read_emultor.read_write_mmio(vcpu, gpa, bytes, data);
12591         if (handled == bytes)
12592                 return 1;
12593
12594         bytes -= handled;
12595         gpa += handled;
12596         data += handled;
12597
12598         /*TODO: Check if need to increment number of frags */
12599         frag = vcpu->mmio_fragments;
12600         vcpu->mmio_nr_fragments = 1;
12601         frag->len = bytes;
12602         frag->gpa = gpa;
12603         frag->data = data;
12604
12605         vcpu->mmio_needed = 1;
12606         vcpu->mmio_cur_fragment = 0;
12607
12608         vcpu->run->mmio.phys_addr = gpa;
12609         vcpu->run->mmio.len = min(8u, frag->len);
12610         vcpu->run->mmio.is_write = 0;
12611         vcpu->run->exit_reason = KVM_EXIT_MMIO;
12612
12613         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12614
12615         return 0;
12616 }
12617 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_read);
12618
12619 static int complete_sev_es_emulated_ins(struct kvm_vcpu *vcpu)
12620 {
12621         memcpy(vcpu->arch.guest_ins_data, vcpu->arch.pio_data,
12622                vcpu->arch.pio.count * vcpu->arch.pio.size);
12623         vcpu->arch.pio.count = 0;
12624
12625         return 1;
12626 }
12627
12628 static int kvm_sev_es_outs(struct kvm_vcpu *vcpu, unsigned int size,
12629                            unsigned int port, void *data,  unsigned int count)
12630 {
12631         int ret;
12632
12633         ret = emulator_pio_out_emulated(vcpu->arch.emulate_ctxt, size, port,
12634                                         data, count);
12635         if (ret)
12636                 return ret;
12637
12638         vcpu->arch.pio.count = 0;
12639
12640         return 0;
12641 }
12642
12643 static int kvm_sev_es_ins(struct kvm_vcpu *vcpu, unsigned int size,
12644                           unsigned int port, void *data, unsigned int count)
12645 {
12646         int ret;
12647
12648         ret = emulator_pio_in_emulated(vcpu->arch.emulate_ctxt, size, port,
12649                                        data, count);
12650         if (ret) {
12651                 vcpu->arch.pio.count = 0;
12652         } else {
12653                 vcpu->arch.guest_ins_data = data;
12654                 vcpu->arch.complete_userspace_io = complete_sev_es_emulated_ins;
12655         }
12656
12657         return 0;
12658 }
12659
12660 int kvm_sev_es_string_io(struct kvm_vcpu *vcpu, unsigned int size,
12661                          unsigned int port, void *data,  unsigned int count,
12662                          int in)
12663 {
12664         return in ? kvm_sev_es_ins(vcpu, size, port, data, count)
12665                   : kvm_sev_es_outs(vcpu, size, port, data, count);
12666 }
12667 EXPORT_SYMBOL_GPL(kvm_sev_es_string_io);
12668
12669 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_entry);
12670 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
12671 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
12672 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
12673 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
12674 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
12675 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
12676 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
12677 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
12678 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
12679 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
12680 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed);
12681 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
12682 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
12683 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
12684 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
12685 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update);
12686 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
12687 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
12688 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
12689 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);
12690 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_ga_log);
12691 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_apicv_update_request);
12692 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_enter);
12693 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_exit);
12694 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_enter);
12695 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_exit);