drivers/gpu/drm/imx/ipuv3-plane.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * i.MX IPUv3 DP Overlay Planes
   4  *
   5  * Copyright (C) 2013 Philipp Zabel, Pengutronix
   6  */
   7
   8 #include <drm/drm_atomic.h>
   9 #include <drm/drm_atomic_helper.h>
  10 #include <drm/drm_fb_cma_helper.h>
  11 #include <drm/drm_fourcc.h>
  12 #include <drm/drm_gem_atomic_helper.h>
  13 #include <drm/drm_gem_cma_helper.h>
  14 #include <drm/drm_managed.h>
  15 #include <drm/drm_plane_helper.h>
  16
  17 #include <video/imx-ipu-v3.h>
  18
  19 #include "imx-drm.h"
  20 #include "ipuv3-plane.h"
  21
  22 struct ipu_plane_state {
  23         struct drm_plane_state base;
  24         bool use_pre;
  25 };
  26
  27 static inline struct ipu_plane_state *
  28 to_ipu_plane_state(struct drm_plane_state *p)
  29 {
  30         return container_of(p, struct ipu_plane_state, base);
  31 }
  32
  33 static inline struct ipu_plane *to_ipu_plane(struct drm_plane *p)
  34 {
  35         return container_of(p, struct ipu_plane, base);
  36 }
  37
  38 static const uint32_t ipu_plane_formats[] = {
  39         DRM_FORMAT_ARGB1555,
  40         DRM_FORMAT_XRGB1555,
  41         DRM_FORMAT_ABGR1555,
  42         DRM_FORMAT_XBGR1555,
  43         DRM_FORMAT_RGBA5551,
  44         DRM_FORMAT_BGRA5551,
  45         DRM_FORMAT_ARGB4444,
  46         DRM_FORMAT_ARGB8888,
  47         DRM_FORMAT_XRGB8888,
  48         DRM_FORMAT_ABGR8888,
  49         DRM_FORMAT_XBGR8888,
  50         DRM_FORMAT_RGBA8888,
  51         DRM_FORMAT_RGBX8888,
  52         DRM_FORMAT_BGRA8888,
  53         DRM_FORMAT_BGRX8888,
  54         DRM_FORMAT_UYVY,
  55         DRM_FORMAT_VYUY,
  56         DRM_FORMAT_YUYV,
  57         DRM_FORMAT_YVYU,
  58         DRM_FORMAT_YUV420,
  59         DRM_FORMAT_YVU420,
  60         DRM_FORMAT_YUV422,
  61         DRM_FORMAT_YVU422,
  62         DRM_FORMAT_YUV444,
  63         DRM_FORMAT_YVU444,
  64         DRM_FORMAT_NV12,
  65         DRM_FORMAT_NV16,
  66         DRM_FORMAT_RGB565,
  67         DRM_FORMAT_RGB565_A8,
  68         DRM_FORMAT_BGR565_A8,
  69         DRM_FORMAT_RGB888_A8,
  70         DRM_FORMAT_BGR888_A8,
  71         DRM_FORMAT_RGBX8888_A8,
  72         DRM_FORMAT_BGRX8888_A8,
  73 };
  74
  75 static const uint64_t ipu_format_modifiers[] = {
  76         DRM_FORMAT_MOD_LINEAR,
  77         DRM_FORMAT_MOD_INVALID
  78 };
  79
  80 static const uint64_t pre_format_modifiers[] = {
  81         DRM_FORMAT_MOD_LINEAR,
  82         DRM_FORMAT_MOD_VIVANTE_TILED,
  83         DRM_FORMAT_MOD_VIVANTE_SUPER_TILED,
  84         DRM_FORMAT_MOD_INVALID
  85 };
  86
  87 int ipu_plane_irq(struct ipu_plane *ipu_plane)
  88 {
  89         return ipu_idmac_channel_irq(ipu_plane->ipu, ipu_plane->ipu_ch,
  90                                      IPU_IRQ_EOF);
  91 }
  92
  93 static inline unsigned long
  94 drm_plane_state_to_eba(struct drm_plane_state *state, int plane)
  95 {
  96         struct drm_framebuffer *fb = state->fb;
  97         struct drm_gem_cma_object *cma_obj;
  98         int x = state->src.x1 >> 16;
  99         int y = state->src.y1 >> 16;
 100
 101         cma_obj = drm_fb_cma_get_gem_obj(fb, plane);
 102         BUG_ON(!cma_obj);
 103
 104         return cma_obj->paddr + fb->offsets[plane] + fb->pitches[plane] * y +
 105                fb->format->cpp[plane] * x;
 106 }
 107
 108 static inline unsigned long
 109 drm_plane_state_to_ubo(struct drm_plane_state *state)
 110 {
 111         struct drm_framebuffer *fb = state->fb;
 112         struct drm_gem_cma_object *cma_obj;
 113         unsigned long eba = drm_plane_state_to_eba(state, 0);
 114         int x = state->src.x1 >> 16;
 115         int y = state->src.y1 >> 16;
 116
 117         cma_obj = drm_fb_cma_get_gem_obj(fb, 1);
 118         BUG_ON(!cma_obj);
 119
 120         x /= fb->format->hsub;
 121         y /= fb->format->vsub;
 122
 123         return cma_obj->paddr + fb->offsets[1] + fb->pitches[1] * y +
 124                fb->format->cpp[1] * x - eba;
 125 }
 126
 127 static inline unsigned long
 128 drm_plane_state_to_vbo(struct drm_plane_state *state)
 129 {
 130         struct drm_framebuffer *fb = state->fb;
 131         struct drm_gem_cma_object *cma_obj;
 132         unsigned long eba = drm_plane_state_to_eba(state, 0);
 133         int x = state->src.x1 >> 16;
 134         int y = state->src.y1 >> 16;
 135
 136         cma_obj = drm_fb_cma_get_gem_obj(fb, 2);
 137         BUG_ON(!cma_obj);
 138
 139         x /= fb->format->hsub;
 140         y /= fb->format->vsub;
 141
 142         return cma_obj->paddr + fb->offsets[2] + fb->pitches[2] * y +
 143                fb->format->cpp[2] * x - eba;
 144 }
 145
 146 static void ipu_plane_put_resources(struct drm_device *dev, void *ptr)
 147 {
 148         struct ipu_plane *ipu_plane = ptr;
 149
 150         if (!IS_ERR_OR_NULL(ipu_plane->dp))
 151                 ipu_dp_put(ipu_plane->dp);
 152         if (!IS_ERR_OR_NULL(ipu_plane->dmfc))
 153                 ipu_dmfc_put(ipu_plane->dmfc);
 154         if (!IS_ERR_OR_NULL(ipu_plane->ipu_ch))
 155                 ipu_idmac_put(ipu_plane->ipu_ch);
 156         if (!IS_ERR_OR_NULL(ipu_plane->alpha_ch))
 157                 ipu_idmac_put(ipu_plane->alpha_ch);
 158 }
 159
 160 static int ipu_plane_get_resources(struct drm_device *dev,
 161                                    struct ipu_plane *ipu_plane)
 162 {
 163         int ret;
 164         int alpha_ch;
 165
 166         ipu_plane->ipu_ch = ipu_idmac_get(ipu_plane->ipu, ipu_plane->dma);
 167         if (IS_ERR(ipu_plane->ipu_ch)) {
 168                 ret = PTR_ERR(ipu_plane->ipu_ch);
 169                 DRM_ERROR("failed to get idmac channel: %d\n", ret);
 170                 return ret;
 171         }
 172
 173         ret = drmm_add_action_or_reset(dev, ipu_plane_put_resources, ipu_plane);
 174         if (ret)
 175                 return ret;
 176
 177         alpha_ch = ipu_channel_alpha_channel(ipu_plane->dma);
 178         if (alpha_ch >= 0) {
 179                 ipu_plane->alpha_ch = ipu_idmac_get(ipu_plane->ipu, alpha_ch);
 180                 if (IS_ERR(ipu_plane->alpha_ch)) {
 181                         ret = PTR_ERR(ipu_plane->alpha_ch);
 182                         DRM_ERROR("failed to get alpha idmac channel %d: %d\n",
 183                                   alpha_ch, ret);
 184                         return ret;
 185                 }
 186         }
 187
 188         ipu_plane->dmfc = ipu_dmfc_get(ipu_plane->ipu, ipu_plane->dma);
 189         if (IS_ERR(ipu_plane->dmfc)) {
 190                 ret = PTR_ERR(ipu_plane->dmfc);
 191                 DRM_ERROR("failed to get dmfc: ret %d\n", ret);
 192                 return ret;
 193         }
 194
 195         if (ipu_plane->dp_flow >= 0) {
 196                 ipu_plane->dp = ipu_dp_get(ipu_plane->ipu, ipu_plane->dp_flow);
 197                 if (IS_ERR(ipu_plane->dp)) {
 198                         ret = PTR_ERR(ipu_plane->dp);
 199                         DRM_ERROR("failed to get dp flow: %d\n", ret);
 200                         return ret;
 201                 }
 202         }
 203
 204         return 0;
 205 }
 206
 207 static bool ipu_plane_separate_alpha(struct ipu_plane *ipu_plane)
 208 {
 209         switch (ipu_plane->base.state->fb->format->format) {
 210         case DRM_FORMAT_RGB565_A8:
 211         case DRM_FORMAT_BGR565_A8:
 212         case DRM_FORMAT_RGB888_A8:
 213         case DRM_FORMAT_BGR888_A8:
 214         case DRM_FORMAT_RGBX8888_A8:
 215         case DRM_FORMAT_BGRX8888_A8:
 216                 return true;
 217         default:
 218                 return false;
 219         }
 220 }
 221
 222 static void ipu_plane_enable(struct ipu_plane *ipu_plane)
 223 {
 224         if (ipu_plane->dp)
 225                 ipu_dp_enable(ipu_plane->ipu);
 226         ipu_dmfc_enable_channel(ipu_plane->dmfc);
 227         ipu_idmac_enable_channel(ipu_plane->ipu_ch);
 228         if (ipu_plane_separate_alpha(ipu_plane))
 229                 ipu_idmac_enable_channel(ipu_plane->alpha_ch);
 230         if (ipu_plane->dp)
 231                 ipu_dp_enable_channel(ipu_plane->dp);
 232 }
 233
 234 void ipu_plane_disable(struct ipu_plane *ipu_plane, bool disable_dp_channel)
 235 {
 236         int ret;
 237
 238         DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
 239
 240         ret = ipu_idmac_wait_busy(ipu_plane->ipu_ch, 50);
 241         if (ret == -ETIMEDOUT) {
 242                 DRM_ERROR("[PLANE:%d] IDMAC timeout\n",
 243                           ipu_plane->base.base.id);
 244         }
 245
 246         if (ipu_plane->dp && disable_dp_channel)
 247                 ipu_dp_disable_channel(ipu_plane->dp, false);
 248         ipu_idmac_disable_channel(ipu_plane->ipu_ch);
 249         if (ipu_plane->alpha_ch)
 250                 ipu_idmac_disable_channel(ipu_plane->alpha_ch);
 251         ipu_dmfc_disable_channel(ipu_plane->dmfc);
 252         if (ipu_plane->dp)
 253                 ipu_dp_disable(ipu_plane->ipu);
 254         if (ipu_prg_present(ipu_plane->ipu))
 255                 ipu_prg_channel_disable(ipu_plane->ipu_ch);
 256 }
 257
 258 void ipu_plane_disable_deferred(struct drm_plane *plane)
 259 {
 260         struct ipu_plane *ipu_plane = to_ipu_plane(plane);
 261
 262         if (ipu_plane->disabling) {
 263                 ipu_plane->disabling = false;
 264                 ipu_plane_disable(ipu_plane, false);
 265         }
 266 }
 267 EXPORT_SYMBOL_GPL(ipu_plane_disable_deferred);
 268
 269 static void ipu_plane_state_reset(struct drm_plane *plane)
 270 {
 271         unsigned int zpos = (plane->type == DRM_PLANE_TYPE_PRIMARY) ? 0 : 1;
 272         struct ipu_plane_state *ipu_state;
 273
 274         if (plane->state) {
 275                 ipu_state = to_ipu_plane_state(plane->state);
 276                 __drm_atomic_helper_plane_destroy_state(plane->state);
 277                 kfree(ipu_state);
 278                 plane->state = NULL;
 279         }
 280
 281         ipu_state = kzalloc(sizeof(*ipu_state), GFP_KERNEL);
 282
 283         if (ipu_state) {
 284                 __drm_atomic_helper_plane_reset(plane, &ipu_state->base);
 285                 ipu_state->base.zpos = zpos;
 286                 ipu_state->base.normalized_zpos = zpos;
 287         }
 288 }
 289
 290 static struct drm_plane_state *
 291 ipu_plane_duplicate_state(struct drm_plane *plane)
 292 {
 293         struct ipu_plane_state *state;
 294
 295         if (WARN_ON(!plane->state))
 296                 return NULL;
 297
 298         state = kmalloc(sizeof(*state), GFP_KERNEL);
 299         if (state)
 300                 __drm_atomic_helper_plane_duplicate_state(plane, &state->base);
 301
 302         return &state->base;
 303 }
 304
 305 static void ipu_plane_destroy_state(struct drm_plane *plane,
 306                                     struct drm_plane_state *state)
 307 {
 308         struct ipu_plane_state *ipu_state = to_ipu_plane_state(state);
 309
 310         __drm_atomic_helper_plane_destroy_state(state);
 311         kfree(ipu_state);
 312 }
 313
 314 static bool ipu_plane_format_mod_supported(struct drm_plane *plane,
 315                                            uint32_t format, uint64_t modifier)
 316 {
 317         struct ipu_soc *ipu = to_ipu_plane(plane)->ipu;
 318
 319         /* linear is supported for all planes and formats */
 320         if (modifier == DRM_FORMAT_MOD_LINEAR)
 321                 return true;
 322
 323         /* without a PRG there are no supported modifiers */
 324         if (!ipu_prg_present(ipu))
 325                 return false;
 326
 327         return ipu_prg_format_supported(ipu, format, modifier);
 328 }
 329
 330 static const struct drm_plane_funcs ipu_plane_funcs = {
 331         .update_plane   = drm_atomic_helper_update_plane,
 332         .disable_plane  = drm_atomic_helper_disable_plane,
 333         .reset          = ipu_plane_state_reset,
 334         .atomic_duplicate_state = ipu_plane_duplicate_state,
 335         .atomic_destroy_state   = ipu_plane_destroy_state,
 336         .format_mod_supported = ipu_plane_format_mod_supported,
 337 };
 338
 339 static int ipu_plane_atomic_check(struct drm_plane *plane,
 340                                   struct drm_atomic_state *state)
 341 {
 342         struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state,
 343                                                                            plane);
 344         struct drm_plane_state *old_state = drm_atomic_get_old_plane_state(state,
 345                                                                            plane);
 346         struct drm_crtc_state *crtc_state;
 347         struct device *dev = plane->dev->dev;
 348         struct drm_framebuffer *fb = new_state->fb;
 349         struct drm_framebuffer *old_fb = old_state->fb;
 350         unsigned long eba, ubo, vbo, old_ubo, old_vbo, alpha_eba;
 351         bool can_position = (plane->type == DRM_PLANE_TYPE_OVERLAY);
 352         int ret;
 353
 354         /* Ok to disable */
 355         if (!fb)
 356                 return 0;
 357
 358         if (WARN_ON(!new_state->crtc))
 359                 return -EINVAL;
 360
 361         crtc_state =
 362                 drm_atomic_get_existing_crtc_state(state,
 363                                                    new_state->crtc);
 364         if (WARN_ON(!crtc_state))
 365                 return -EINVAL;
 366
 367         ret = drm_atomic_helper_check_plane_state(new_state, crtc_state,
 368                                                   DRM_PLANE_HELPER_NO_SCALING,
 369                                                   DRM_PLANE_HELPER_NO_SCALING,
 370                                                   can_position, true);
 371         if (ret)
 372                 return ret;
 373
 374         /* nothing to check when disabling or disabled */
 375         if (!crtc_state->enable)
 376                 return 0;
 377
 378         switch (plane->type) {
 379         case DRM_PLANE_TYPE_PRIMARY:
 380                 /* full plane minimum width is 13 pixels */
 381                 if (drm_rect_width(&new_state->dst) < 13)
 382                         return -EINVAL;
 383                 break;
 384         case DRM_PLANE_TYPE_OVERLAY:
 385                 break;
 386         default:
 387                 dev_warn(dev, "Unsupported plane type %d\n", plane->type);
 388                 return -EINVAL;
 389         }
 390
 391         if (drm_rect_height(&new_state->dst) < 2)
 392                 return -EINVAL;
 393
 394         /*
 395          * We support resizing active plane or changing its format by
 396          * forcing CRTC mode change in plane's ->atomic_check callback
 397          * and disabling all affected active planes in CRTC's ->atomic_disable
 398          * callback.  The planes will be reenabled in plane's ->atomic_update
 399          * callback.
 400          */
 401         if (old_fb &&
 402             (drm_rect_width(&new_state->dst) != drm_rect_width(&old_state->dst) ||
 403              drm_rect_height(&new_state->dst) != drm_rect_height(&old_state->dst) ||
 404              fb->format != old_fb->format))
 405                 crtc_state->mode_changed = true;
 406
 407         eba = drm_plane_state_to_eba(new_state, 0);
 408
 409         if (eba & 0x7)
 410                 return -EINVAL;
 411
 412         if (fb->pitches[0] < 1 || fb->pitches[0] > 16384)
 413                 return -EINVAL;
 414
 415         if (old_fb && fb->pitches[0] != old_fb->pitches[0])
 416                 crtc_state->mode_changed = true;
 417
 418         switch (fb->format->format) {
 419         case DRM_FORMAT_YUV420:
 420         case DRM_FORMAT_YVU420:
 421         case DRM_FORMAT_YUV422:
 422         case DRM_FORMAT_YVU422:
 423         case DRM_FORMAT_YUV444:
 424         case DRM_FORMAT_YVU444:
 425                 /*
 426                  * Multiplanar formats have to meet the following restrictions:
 427                  * - The (up to) three plane addresses are EBA, EBA+UBO, EBA+VBO
 428                  * - EBA, UBO and VBO are a multiple of 8
 429                  * - UBO and VBO are unsigned and not larger than 0xfffff8
 430                  * - Only EBA may be changed while scanout is active
 431                  * - The strides of U and V planes must be identical.
 432                  */
 433                 vbo = drm_plane_state_to_vbo(new_state);
 434
 435                 if (vbo & 0x7 || vbo > 0xfffff8)
 436                         return -EINVAL;
 437
 438                 if (old_fb && (fb->format == old_fb->format)) {
 439                         old_vbo = drm_plane_state_to_vbo(old_state);
 440                         if (vbo != old_vbo)
 441                                 crtc_state->mode_changed = true;
 442                 }
 443
 444                 if (fb->pitches[1] != fb->pitches[2])
 445                         return -EINVAL;
 446
 447                 fallthrough;
 448         case DRM_FORMAT_NV12:
 449         case DRM_FORMAT_NV16:
 450                 ubo = drm_plane_state_to_ubo(new_state);
 451
 452                 if (ubo & 0x7 || ubo > 0xfffff8)
 453                         return -EINVAL;
 454
 455                 if (old_fb && (fb->format == old_fb->format)) {
 456                         old_ubo = drm_plane_state_to_ubo(old_state);
 457                         if (ubo != old_ubo)
 458                                 crtc_state->mode_changed = true;
 459                 }
 460
 461                 if (fb->pitches[1] < 1 || fb->pitches[1] > 16384)
 462                         return -EINVAL;
 463
 464                 if (old_fb && old_fb->pitches[1] != fb->pitches[1])
 465                         crtc_state->mode_changed = true;
 466
 467                 /*
 468                  * The x/y offsets must be even in case of horizontal/vertical
 469                  * chroma subsampling.
 470                  */
 471                 if (((new_state->src.x1 >> 16) & (fb->format->hsub - 1)) ||
 472                     ((new_state->src.y1 >> 16) & (fb->format->vsub - 1)))
 473                         return -EINVAL;
 474                 break;
 475         case DRM_FORMAT_RGB565_A8:
 476         case DRM_FORMAT_BGR565_A8:
 477         case DRM_FORMAT_RGB888_A8:
 478         case DRM_FORMAT_BGR888_A8:
 479         case DRM_FORMAT_RGBX8888_A8:
 480         case DRM_FORMAT_BGRX8888_A8:
 481                 alpha_eba = drm_plane_state_to_eba(new_state, 1);
 482                 if (alpha_eba & 0x7)
 483                         return -EINVAL;
 484
 485                 if (fb->pitches[1] < 1 || fb->pitches[1] > 16384)
 486                         return -EINVAL;
 487
 488                 if (old_fb && old_fb->pitches[1] != fb->pitches[1])
 489                         crtc_state->mode_changed = true;
 490                 break;
 491         }
 492
 493         return 0;
 494 }
 495
 496 static void ipu_plane_atomic_disable(struct drm_plane *plane,
 497                                      struct drm_atomic_state *state)
 498 {
 499         struct ipu_plane *ipu_plane = to_ipu_plane(plane);
 500
 501         if (ipu_plane->dp)
 502                 ipu_dp_disable_channel(ipu_plane->dp, true);
 503         ipu_plane->disabling = true;
 504 }
 505
 506 static int ipu_chan_assign_axi_id(int ipu_chan)
 507 {
 508         switch (ipu_chan) {
 509         case IPUV3_CHANNEL_MEM_BG_SYNC:
 510                 return 1;
 511         case IPUV3_CHANNEL_MEM_FG_SYNC:
 512                 return 2;
 513         case IPUV3_CHANNEL_MEM_DC_SYNC:
 514                 return 3;
 515         default:
 516                 return 0;
 517         }
 518 }
 519
 520 static void ipu_calculate_bursts(u32 width, u32 cpp, u32 stride,
 521                                  u8 *burstsize, u8 *num_bursts)
 522 {
 523         const unsigned int width_bytes = width * cpp;
 524         unsigned int npb, bursts;
 525
 526         /* Maximum number of pixels per burst without overshooting stride */
 527         for (npb = 64 / cpp; npb > 0; --npb) {
 528                 if (round_up(width_bytes, npb * cpp) <= stride)
 529                         break;
 530         }
 531         *burstsize = npb;
 532
 533         /* Maximum number of consecutive bursts without overshooting stride */
 534         for (bursts = 8; bursts > 1; bursts /= 2) {
 535                 if (round_up(width_bytes, npb * cpp * bursts) <= stride)
 536                         break;
 537         }
 538         *num_bursts = bursts;
 539 }
 540
 541 static void ipu_plane_atomic_update(struct drm_plane *plane,
 542                                     struct drm_atomic_state *state)
 543 {
 544         struct drm_plane_state *old_state = drm_atomic_get_old_plane_state(state,
 545                                                                            plane);
 546         struct ipu_plane *ipu_plane = to_ipu_plane(plane);
 547         struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state,
 548                                                                            plane);
 549         struct ipu_plane_state *ipu_state = to_ipu_plane_state(new_state);
 550         struct drm_crtc_state *crtc_state = new_state->crtc->state;
 551         struct drm_framebuffer *fb = new_state->fb;
 552         struct drm_rect *dst = &new_state->dst;
 553         unsigned long eba, ubo, vbo;
 554         unsigned long alpha_eba = 0;
 555         enum ipu_color_space ics;
 556         unsigned int axi_id = 0;
 557         const struct drm_format_info *info;
 558         u8 burstsize, num_bursts;
 559         u32 width, height;
 560         int active;
 561
 562         if (ipu_plane->dp_flow == IPU_DP_FLOW_SYNC_FG)
 563                 ipu_dp_set_window_pos(ipu_plane->dp, dst->x1, dst->y1);
 564
 565         switch (ipu_plane->dp_flow) {
 566         case IPU_DP_FLOW_SYNC_BG:
 567                 if (new_state->normalized_zpos == 1) {
 568                         ipu_dp_set_global_alpha(ipu_plane->dp,
 569                                                 !fb->format->has_alpha, 0xff,
 570                                                 true);
 571                 } else {
 572                         ipu_dp_set_global_alpha(ipu_plane->dp, true, 0, true);
 573                 }
 574                 break;
 575         case IPU_DP_FLOW_SYNC_FG:
 576                 if (new_state->normalized_zpos == 1) {
 577                         ipu_dp_set_global_alpha(ipu_plane->dp,
 578                                                 !fb->format->has_alpha, 0xff,
 579                                                 false);
 580                 }
 581                 break;
 582         }
 583
 584         eba = drm_plane_state_to_eba(new_state, 0);
 585
 586         /*
 587          * Configure PRG channel and attached PRE, this changes the EBA to an
 588          * internal SRAM location.
 589          */
 590         if (ipu_state->use_pre) {
 591                 axi_id = ipu_chan_assign_axi_id(ipu_plane->dma);
 592                 ipu_prg_channel_configure(ipu_plane->ipu_ch, axi_id,
 593                                           drm_rect_width(&new_state->src) >> 16,
 594                                           drm_rect_height(&new_state->src) >> 16,
 595                                           fb->pitches[0], fb->format->format,
 596                                           fb->modifier, &eba);
 597         }
 598
 599         if (old_state->fb && !drm_atomic_crtc_needs_modeset(crtc_state)) {
 600                 /* nothing to do if PRE is used */
 601                 if (ipu_state->use_pre)
 602                         return;
 603                 active = ipu_idmac_get_current_buffer(ipu_plane->ipu_ch);
 604                 ipu_cpmem_set_buffer(ipu_plane->ipu_ch, !active, eba);
 605                 ipu_idmac_select_buffer(ipu_plane->ipu_ch, !active);
 606                 if (ipu_plane_separate_alpha(ipu_plane)) {
 607                         active = ipu_idmac_get_current_buffer(ipu_plane->alpha_ch);
 608                         ipu_cpmem_set_buffer(ipu_plane->alpha_ch, !active,
 609                                              alpha_eba);
 610                         ipu_idmac_select_buffer(ipu_plane->alpha_ch, !active);
 611                 }
 612                 return;
 613         }
 614
 615         ics = ipu_drm_fourcc_to_colorspace(fb->format->format);
 616         switch (ipu_plane->dp_flow) {
 617         case IPU_DP_FLOW_SYNC_BG:
 618                 ipu_dp_setup_channel(ipu_plane->dp, ics, IPUV3_COLORSPACE_RGB);
 619                 break;
 620         case IPU_DP_FLOW_SYNC_FG:
 621                 ipu_dp_setup_channel(ipu_plane->dp, ics,
 622                                         IPUV3_COLORSPACE_UNKNOWN);
 623                 break;
 624         }
 625
 626         ipu_dmfc_config_wait4eot(ipu_plane->dmfc, drm_rect_width(dst));
 627
 628         width = drm_rect_width(&new_state->src) >> 16;
 629         height = drm_rect_height(&new_state->src) >> 16;
 630         info = drm_format_info(fb->format->format);
 631         ipu_calculate_bursts(width, info->cpp[0], fb->pitches[0],
 632                              &burstsize, &num_bursts);
 633
 634         ipu_cpmem_zero(ipu_plane->ipu_ch);
 635         ipu_cpmem_set_resolution(ipu_plane->ipu_ch, width, height);
 636         ipu_cpmem_set_fmt(ipu_plane->ipu_ch, fb->format->format);
 637         ipu_cpmem_set_burstsize(ipu_plane->ipu_ch, burstsize);
 638         ipu_cpmem_set_high_priority(ipu_plane->ipu_ch);
 639         ipu_idmac_enable_watermark(ipu_plane->ipu_ch, true);
 640         ipu_idmac_set_double_buffer(ipu_plane->ipu_ch, 1);
 641         ipu_cpmem_set_stride(ipu_plane->ipu_ch, fb->pitches[0]);
 642         ipu_cpmem_set_axi_id(ipu_plane->ipu_ch, axi_id);
 643
 644         switch (fb->format->format) {
 645         case DRM_FORMAT_YUV420:
 646         case DRM_FORMAT_YVU420:
 647         case DRM_FORMAT_YUV422:
 648         case DRM_FORMAT_YVU422:
 649         case DRM_FORMAT_YUV444:
 650         case DRM_FORMAT_YVU444:
 651                 ubo = drm_plane_state_to_ubo(new_state);
 652                 vbo = drm_plane_state_to_vbo(new_state);
 653                 if (fb->format->format == DRM_FORMAT_YVU420 ||
 654                     fb->format->format == DRM_FORMAT_YVU422 ||
 655                     fb->format->format == DRM_FORMAT_YVU444)
 656                         swap(ubo, vbo);
 657
 658                 ipu_cpmem_set_yuv_planar_full(ipu_plane->ipu_ch,
 659                                               fb->pitches[1], ubo, vbo);
 660
 661                 dev_dbg(ipu_plane->base.dev->dev,
 662                         "phy = %lu %lu %lu, x = %d, y = %d", eba, ubo, vbo,
 663                         new_state->src.x1 >> 16, new_state->src.y1 >> 16);
 664                 break;
 665         case DRM_FORMAT_NV12:
 666         case DRM_FORMAT_NV16:
 667                 ubo = drm_plane_state_to_ubo(new_state);
 668
 669                 ipu_cpmem_set_yuv_planar_full(ipu_plane->ipu_ch,
 670                                               fb->pitches[1], ubo, ubo);
 671
 672                 dev_dbg(ipu_plane->base.dev->dev,
 673                         "phy = %lu %lu, x = %d, y = %d", eba, ubo,
 674                         new_state->src.x1 >> 16, new_state->src.y1 >> 16);
 675                 break;
 676         case DRM_FORMAT_RGB565_A8:
 677         case DRM_FORMAT_BGR565_A8:
 678         case DRM_FORMAT_RGB888_A8:
 679         case DRM_FORMAT_BGR888_A8:
 680         case DRM_FORMAT_RGBX8888_A8:
 681         case DRM_FORMAT_BGRX8888_A8:
 682                 alpha_eba = drm_plane_state_to_eba(new_state, 1);
 683                 num_bursts = 0;
 684
 685                 dev_dbg(ipu_plane->base.dev->dev, "phys = %lu %lu, x = %d, y = %d",
 686                         eba, alpha_eba, new_state->src.x1 >> 16,
 687                         new_state->src.y1 >> 16);
 688
 689                 ipu_cpmem_set_burstsize(ipu_plane->ipu_ch, 16);
 690
 691                 ipu_cpmem_zero(ipu_plane->alpha_ch);
 692                 ipu_cpmem_set_resolution(ipu_plane->alpha_ch,
 693                                          drm_rect_width(&new_state->src) >> 16,
 694                                          drm_rect_height(&new_state->src) >> 16);
 695                 ipu_cpmem_set_format_passthrough(ipu_plane->alpha_ch, 8);
 696                 ipu_cpmem_set_high_priority(ipu_plane->alpha_ch);
 697                 ipu_idmac_set_double_buffer(ipu_plane->alpha_ch, 1);
 698                 ipu_cpmem_set_stride(ipu_plane->alpha_ch, fb->pitches[1]);
 699                 ipu_cpmem_set_burstsize(ipu_plane->alpha_ch, 16);
 700                 ipu_cpmem_set_buffer(ipu_plane->alpha_ch, 0, alpha_eba);
 701                 ipu_cpmem_set_buffer(ipu_plane->alpha_ch, 1, alpha_eba);
 702                 break;
 703         default:
 704                 dev_dbg(ipu_plane->base.dev->dev, "phys = %lu, x = %d, y = %d",
 705                         eba, new_state->src.x1 >> 16, new_state->src.y1 >> 16);
 706                 break;
 707         }
 708         ipu_cpmem_set_buffer(ipu_plane->ipu_ch, 0, eba);
 709         ipu_cpmem_set_buffer(ipu_plane->ipu_ch, 1, eba);
 710         ipu_idmac_lock_enable(ipu_plane->ipu_ch, num_bursts);
 711         ipu_plane_enable(ipu_plane);
 712 }
 713
 714 static const struct drm_plane_helper_funcs ipu_plane_helper_funcs = {
 715         .prepare_fb = drm_gem_plane_helper_prepare_fb,
 716         .atomic_check = ipu_plane_atomic_check,
 717         .atomic_disable = ipu_plane_atomic_disable,
 718         .atomic_update = ipu_plane_atomic_update,
 719 };
 720
 721 bool ipu_plane_atomic_update_pending(struct drm_plane *plane)
 722 {
 723         struct ipu_plane *ipu_plane = to_ipu_plane(plane);
 724         struct drm_plane_state *state = plane->state;
 725         struct ipu_plane_state *ipu_state = to_ipu_plane_state(state);
 726
 727         /* disabled crtcs must not block the update */
 728         if (!state->crtc)
 729                 return false;
 730
 731         if (ipu_state->use_pre)
 732                 return ipu_prg_channel_configure_pending(ipu_plane->ipu_ch);
 733
 734         /*
 735          * Pretend no update is pending in the non-PRE/PRG case. For this to
 736          * happen, an atomic update would have to be deferred until after the
 737          * start of the next frame and simultaneously interrupt latency would
 738          * have to be high enough to let the atomic update finish and issue an
 739          * event before the previous end of frame interrupt handler can be
 740          * executed.
 741          */
 742         return false;
 743 }
 744 int ipu_planes_assign_pre(struct drm_device *dev,
 745                           struct drm_atomic_state *state)
 746 {
 747         struct drm_crtc_state *old_crtc_state, *crtc_state;
 748         struct drm_plane_state *plane_state;
 749         struct ipu_plane_state *ipu_state;
 750         struct ipu_plane *ipu_plane;
 751         struct drm_plane *plane;
 752         struct drm_crtc *crtc;
 753         int available_pres = ipu_prg_max_active_channels();
 754         int ret, i;
 755
 756         for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, crtc_state, i) {
 757                 ret = drm_atomic_add_affected_planes(state, crtc);
 758                 if (ret)
 759                         return ret;
 760         }
 761
 762         /*
 763          * We are going over the planes in 2 passes: first we assign PREs to
 764          * planes with a tiling modifier, which need the PREs to resolve into
 765          * linear. Any failure to assign a PRE there is fatal. In the second
 766          * pass we try to assign PREs to linear FBs, to improve memory access
 767          * patterns for them. Failure at this point is non-fatal, as we can
 768          * scan out linear FBs without a PRE.
 769          */
 770         for_each_new_plane_in_state(state, plane, plane_state, i) {
 771                 ipu_state = to_ipu_plane_state(plane_state);
 772                 ipu_plane = to_ipu_plane(plane);
 773
 774                 if (!plane_state->fb) {
 775                         ipu_state->use_pre = false;
 776                         continue;
 777                 }
 778
 779                 if (!(plane_state->fb->flags & DRM_MODE_FB_MODIFIERS) ||
 780                     plane_state->fb->modifier == DRM_FORMAT_MOD_LINEAR)
 781                         continue;
 782
 783                 if (!ipu_prg_present(ipu_plane->ipu) || !available_pres)
 784                         return -EINVAL;
 785
 786                 if (!ipu_prg_format_supported(ipu_plane->ipu,
 787                                               plane_state->fb->format->format,
 788                                               plane_state->fb->modifier))
 789                         return -EINVAL;
 790
 791                 ipu_state->use_pre = true;
 792                 available_pres--;
 793         }
 794
 795         for_each_new_plane_in_state(state, plane, plane_state, i) {
 796                 ipu_state = to_ipu_plane_state(plane_state);
 797                 ipu_plane = to_ipu_plane(plane);
 798
 799                 if (!plane_state->fb) {
 800                         ipu_state->use_pre = false;
 801                         continue;
 802                 }
 803
 804                 if ((plane_state->fb->flags & DRM_MODE_FB_MODIFIERS) &&
 805                     plane_state->fb->modifier != DRM_FORMAT_MOD_LINEAR)
 806                         continue;
 807
 808                 /* make sure that modifier is initialized */
 809                 plane_state->fb->modifier = DRM_FORMAT_MOD_LINEAR;
 810
 811                 if (ipu_prg_present(ipu_plane->ipu) && available_pres &&
 812                     ipu_prg_format_supported(ipu_plane->ipu,
 813                                              plane_state->fb->format->format,
 814                                              plane_state->fb->modifier)) {
 815                         ipu_state->use_pre = true;
 816                         available_pres--;
 817                 } else {
 818                         ipu_state->use_pre = false;
 819                 }
 820         }
 821
 822         return 0;
 823 }
 824 EXPORT_SYMBOL_GPL(ipu_planes_assign_pre);
 825
 826 struct ipu_plane *ipu_plane_init(struct drm_device *dev, struct ipu_soc *ipu,
 827                                  int dma, int dp, unsigned int possible_crtcs,
 828                                  enum drm_plane_type type)
 829 {
 830         struct ipu_plane *ipu_plane;
 831         const uint64_t *modifiers = ipu_format_modifiers;
 832         unsigned int zpos = (type == DRM_PLANE_TYPE_PRIMARY) ? 0 : 1;
 833         int ret;
 834
 835         DRM_DEBUG_KMS("channel %d, dp flow %d, possible_crtcs=0x%x\n",
 836                       dma, dp, possible_crtcs);
 837
 838         ipu_plane = drmm_universal_plane_alloc(dev, struct ipu_plane, base,
 839                                                possible_crtcs, &ipu_plane_funcs,
 840                                                ipu_plane_formats,
 841                                                ARRAY_SIZE(ipu_plane_formats),
 842                                                modifiers, type, NULL);
 843         if (IS_ERR(ipu_plane)) {
 844                 DRM_ERROR("failed to allocate and initialize %s plane\n",
 845                           zpos ? "overlay" : "primary");
 846                 return ipu_plane;
 847         }
 848
 849         ipu_plane->ipu = ipu;
 850         ipu_plane->dma = dma;
 851         ipu_plane->dp_flow = dp;
 852
 853         if (ipu_prg_present(ipu))
 854                 modifiers = pre_format_modifiers;
 855
 856         drm_plane_helper_add(&ipu_plane->base, &ipu_plane_helper_funcs);
 857
 858         if (dp == IPU_DP_FLOW_SYNC_BG || dp == IPU_DP_FLOW_SYNC_FG)
 859                 ret = drm_plane_create_zpos_property(&ipu_plane->base, zpos, 0,
 860                                                      1);
 861         else
 862                 ret = drm_plane_create_zpos_immutable_property(&ipu_plane->base,
 863                                                                0);
 864         if (ret)
 865                 return ERR_PTR(ret);
 866
 867         ret = ipu_plane_get_resources(dev, ipu_plane);
 868         if (ret) {
 869                 DRM_ERROR("failed to get %s plane resources: %pe\n",
 870                           zpos ? "overlay" : "primary", &ret);
 871                 return ERR_PTR(ret);
 872         }
 873
 874         return ipu_plane;
 875 }