1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (C) 2018 Intel Corporation
4 #include <asm/unaligned.h>
5 #include <linux/acpi.h>
7 #include <linux/module.h>
8 #include <linux/pm_runtime.h>
9 #include <media/v4l2-ctrls.h>
10 #include <media/v4l2-device.h>
11 #include <media/v4l2-event.h>
12 #include <media/v4l2-fwnode.h>
14 #define IMX319_REG_MODE_SELECT 0x0100
15 #define IMX319_MODE_STANDBY 0x00
16 #define IMX319_MODE_STREAMING 0x01
19 #define IMX319_REG_CHIP_ID 0x0016
20 #define IMX319_CHIP_ID 0x0319
22 /* V_TIMING internal */
23 #define IMX319_REG_FLL 0x0340
24 #define IMX319_FLL_MAX 0xffff
26 /* Exposure control */
27 #define IMX319_REG_EXPOSURE 0x0202
28 #define IMX319_EXPOSURE_MIN 1
29 #define IMX319_EXPOSURE_STEP 1
30 #define IMX319_EXPOSURE_DEFAULT 0x04f6
33 * the digital control register for all color control looks like:
34 * +-----------------+------------------+
36 * +-----------------+------------------+
38 * --------------------------------------
39 * it is used to calculate the digital gain times value(integral + fractional)
40 * the [15:8] bits is the fractional part and [7:0] bits is the integral
41 * calculation equation is:
42 * gain value (unit: times) = REG[15:8] + REG[7:0]/0x100
43 * Only value in 0x0100 ~ 0x0FFF range is allowed.
44 * Analog gain use 10 bits in the registers and allowed range is 0 ~ 960
46 /* Analog gain control */
47 #define IMX319_REG_ANALOG_GAIN 0x0204
48 #define IMX319_ANA_GAIN_MIN 0
49 #define IMX319_ANA_GAIN_MAX 960
50 #define IMX319_ANA_GAIN_STEP 1
51 #define IMX319_ANA_GAIN_DEFAULT 0
53 /* Digital gain control */
54 #define IMX319_REG_DPGA_USE_GLOBAL_GAIN 0x3ff9
55 #define IMX319_REG_DIG_GAIN_GLOBAL 0x020e
56 #define IMX319_DGTL_GAIN_MIN 256
57 #define IMX319_DGTL_GAIN_MAX 4095
58 #define IMX319_DGTL_GAIN_STEP 1
59 #define IMX319_DGTL_GAIN_DEFAULT 256
61 /* Test Pattern Control */
62 #define IMX319_REG_TEST_PATTERN 0x0600
63 #define IMX319_TEST_PATTERN_DISABLED 0
64 #define IMX319_TEST_PATTERN_SOLID_COLOR 1
65 #define IMX319_TEST_PATTERN_COLOR_BARS 2
66 #define IMX319_TEST_PATTERN_GRAY_COLOR_BARS 3
67 #define IMX319_TEST_PATTERN_PN9 4
70 #define IMX319_REG_ORIENTATION 0x0101
72 /* default link frequency and external clock */
73 #define IMX319_LINK_FREQ_DEFAULT 482400000
74 #define IMX319_EXT_CLK 19200000
75 #define IMX319_LINK_FREQ_INDEX 0
82 struct imx319_reg_list {
84 const struct imx319_reg *regs;
87 /* Mode : resolution and related config&values */
101 /* index of link frequency */
104 /* Default register values */
105 struct imx319_reg_list reg_list;
108 struct imx319_hwcfg {
109 u32 ext_clk; /* sensor external clk */
110 s64 *link_freqs; /* CSI-2 link frequencies */
111 unsigned int nr_of_link_freqs;
115 struct v4l2_subdev sd;
116 struct media_pad pad;
118 struct v4l2_ctrl_handler ctrl_handler;
120 struct v4l2_ctrl *link_freq;
121 struct v4l2_ctrl *pixel_rate;
122 struct v4l2_ctrl *vblank;
123 struct v4l2_ctrl *hblank;
124 struct v4l2_ctrl *exposure;
125 struct v4l2_ctrl *vflip;
126 struct v4l2_ctrl *hflip;
129 const struct imx319_mode *cur_mode;
131 struct imx319_hwcfg *hwcfg;
132 s64 link_def_freq; /* CSI-2 link default frequency */
135 * Mutex for serialized access:
136 * Protect sensor set pad format and start/stop streaming safely.
137 * Protect access to sensor v4l2 controls.
141 /* Streaming on/off */
145 static const struct imx319_reg imx319_global_regs[] = {
252 static const struct imx319_reg_list imx319_global_setting = {
253 .num_of_regs = ARRAY_SIZE(imx319_global_regs),
254 .regs = imx319_global_regs,
257 static const struct imx319_reg mode_3264x2448_regs[] = {
431 static const struct imx319_reg mode_3280x2464_regs[] = {
605 static const struct imx319_reg mode_1936x1096_regs[] = {
779 static const struct imx319_reg mode_1920x1080_regs[] = {
953 static const struct imx319_reg mode_1640x1232_regs[] = {
1127 static const struct imx319_reg mode_1640x922_regs[] = {
1301 static const struct imx319_reg mode_1296x736_regs[] = {
1475 static const struct imx319_reg mode_1280x720_regs[] = {
1649 static const char * const imx319_test_pattern_menu[] = {
1652 "Eight Vertical Colour Bars",
1653 "Colour Bars With Fade to Grey",
1654 "Pseudorandom Sequence (PN9)",
1657 /* supported link frequencies */
1658 static const s64 link_freq_menu_items[] = {
1659 IMX319_LINK_FREQ_DEFAULT,
1663 static const struct imx319_mode supported_modes[] = {
1670 .link_freq_index = IMX319_LINK_FREQ_INDEX,
1672 .num_of_regs = ARRAY_SIZE(mode_3280x2464_regs),
1673 .regs = mode_3280x2464_regs,
1682 .link_freq_index = IMX319_LINK_FREQ_INDEX,
1684 .num_of_regs = ARRAY_SIZE(mode_3264x2448_regs),
1685 .regs = mode_3264x2448_regs,
1694 .link_freq_index = IMX319_LINK_FREQ_INDEX,
1696 .num_of_regs = ARRAY_SIZE(mode_1936x1096_regs),
1697 .regs = mode_1936x1096_regs,
1706 .link_freq_index = IMX319_LINK_FREQ_INDEX,
1708 .num_of_regs = ARRAY_SIZE(mode_1920x1080_regs),
1709 .regs = mode_1920x1080_regs,
1718 .link_freq_index = IMX319_LINK_FREQ_INDEX,
1720 .num_of_regs = ARRAY_SIZE(mode_1640x1232_regs),
1721 .regs = mode_1640x1232_regs,
1730 .link_freq_index = IMX319_LINK_FREQ_INDEX,
1732 .num_of_regs = ARRAY_SIZE(mode_1640x922_regs),
1733 .regs = mode_1640x922_regs,
1742 .link_freq_index = IMX319_LINK_FREQ_INDEX,
1744 .num_of_regs = ARRAY_SIZE(mode_1296x736_regs),
1745 .regs = mode_1296x736_regs,
1754 .link_freq_index = IMX319_LINK_FREQ_INDEX,
1756 .num_of_regs = ARRAY_SIZE(mode_1280x720_regs),
1757 .regs = mode_1280x720_regs,
1762 static inline struct imx319 *to_imx319(struct v4l2_subdev *_sd)
1764 return container_of(_sd, struct imx319, sd);
1767 /* Get bayer order based on flip setting. */
1768 static u32 imx319_get_format_code(struct imx319 *imx319)
1771 * Only one bayer order is supported.
1772 * It depends on the flip settings.
1775 static const u32 codes[2][2] = {
1776 { MEDIA_BUS_FMT_SRGGB10_1X10, MEDIA_BUS_FMT_SGRBG10_1X10, },
1777 { MEDIA_BUS_FMT_SGBRG10_1X10, MEDIA_BUS_FMT_SBGGR10_1X10, },
1780 lockdep_assert_held(&imx319->mutex);
1781 code = codes[imx319->vflip->val][imx319->hflip->val];
1786 /* Read registers up to 4 at a time */
1787 static int imx319_read_reg(struct imx319 *imx319, u16 reg, u32 len, u32 *val)
1789 struct i2c_client *client = v4l2_get_subdevdata(&imx319->sd);
1790 struct i2c_msg msgs[2];
1792 u8 data_buf[4] = { 0 };
1798 put_unaligned_be16(reg, addr_buf);
1799 /* Write register address */
1800 msgs[0].addr = client->addr;
1802 msgs[0].len = ARRAY_SIZE(addr_buf);
1803 msgs[0].buf = addr_buf;
1805 /* Read data from register */
1806 msgs[1].addr = client->addr;
1807 msgs[1].flags = I2C_M_RD;
1809 msgs[1].buf = &data_buf[4 - len];
1811 ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
1812 if (ret != ARRAY_SIZE(msgs))
1815 *val = get_unaligned_be32(data_buf);
1820 /* Write registers up to 4 at a time */
1821 static int imx319_write_reg(struct imx319 *imx319, u16 reg, u32 len, u32 val)
1823 struct i2c_client *client = v4l2_get_subdevdata(&imx319->sd);
1829 put_unaligned_be16(reg, buf);
1830 put_unaligned_be32(val << (8 * (4 - len)), buf + 2);
1831 if (i2c_master_send(client, buf, len + 2) != len + 2)
1837 /* Write a list of registers */
1838 static int imx319_write_regs(struct imx319 *imx319,
1839 const struct imx319_reg *regs, u32 len)
1841 struct i2c_client *client = v4l2_get_subdevdata(&imx319->sd);
1845 for (i = 0; i < len; i++) {
1846 ret = imx319_write_reg(imx319, regs[i].address, 1, regs[i].val);
1848 dev_err_ratelimited(&client->dev,
1849 "write reg 0x%4.4x return err %d",
1850 regs[i].address, ret);
1858 /* Open sub-device */
1859 static int imx319_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
1861 struct imx319 *imx319 = to_imx319(sd);
1862 struct v4l2_mbus_framefmt *try_fmt =
1863 v4l2_subdev_get_try_format(sd, fh->pad, 0);
1865 mutex_lock(&imx319->mutex);
1867 /* Initialize try_fmt */
1868 try_fmt->width = imx319->cur_mode->width;
1869 try_fmt->height = imx319->cur_mode->height;
1870 try_fmt->code = imx319_get_format_code(imx319);
1871 try_fmt->field = V4L2_FIELD_NONE;
1873 mutex_unlock(&imx319->mutex);
1878 static int imx319_set_ctrl(struct v4l2_ctrl *ctrl)
1880 struct imx319 *imx319 = container_of(ctrl->handler,
1881 struct imx319, ctrl_handler);
1882 struct i2c_client *client = v4l2_get_subdevdata(&imx319->sd);
1886 /* Propagate change of current control to all related controls */
1888 case V4L2_CID_VBLANK:
1889 /* Update max exposure while meeting expected vblanking */
1890 max = imx319->cur_mode->height + ctrl->val - 18;
1891 __v4l2_ctrl_modify_range(imx319->exposure,
1892 imx319->exposure->minimum,
1893 max, imx319->exposure->step, max);
1898 * Applying V4L2 control value only happens
1899 * when power is up for streaming
1901 if (!pm_runtime_get_if_in_use(&client->dev))
1905 case V4L2_CID_ANALOGUE_GAIN:
1906 /* Analog gain = 1024/(1024 - ctrl->val) times */
1907 ret = imx319_write_reg(imx319, IMX319_REG_ANALOG_GAIN, 2,
1910 case V4L2_CID_DIGITAL_GAIN:
1911 ret = imx319_write_reg(imx319, IMX319_REG_DIG_GAIN_GLOBAL, 2,
1914 case V4L2_CID_EXPOSURE:
1915 ret = imx319_write_reg(imx319, IMX319_REG_EXPOSURE, 2,
1918 case V4L2_CID_VBLANK:
1919 /* Update FLL that meets expected vertical blanking */
1920 ret = imx319_write_reg(imx319, IMX319_REG_FLL, 2,
1921 imx319->cur_mode->height + ctrl->val);
1923 case V4L2_CID_TEST_PATTERN:
1924 ret = imx319_write_reg(imx319, IMX319_REG_TEST_PATTERN,
1927 case V4L2_CID_HFLIP:
1928 case V4L2_CID_VFLIP:
1929 ret = imx319_write_reg(imx319, IMX319_REG_ORIENTATION, 1,
1930 imx319->hflip->val |
1931 imx319->vflip->val << 1);
1935 dev_info(&client->dev, "ctrl(id:0x%x,val:0x%x) is not handled",
1936 ctrl->id, ctrl->val);
1940 pm_runtime_put(&client->dev);
1945 static const struct v4l2_ctrl_ops imx319_ctrl_ops = {
1946 .s_ctrl = imx319_set_ctrl,
1949 static int imx319_enum_mbus_code(struct v4l2_subdev *sd,
1950 struct v4l2_subdev_pad_config *cfg,
1951 struct v4l2_subdev_mbus_code_enum *code)
1953 struct imx319 *imx319 = to_imx319(sd);
1955 if (code->index > 0)
1958 mutex_lock(&imx319->mutex);
1959 code->code = imx319_get_format_code(imx319);
1960 mutex_unlock(&imx319->mutex);
1965 static int imx319_enum_frame_size(struct v4l2_subdev *sd,
1966 struct v4l2_subdev_pad_config *cfg,
1967 struct v4l2_subdev_frame_size_enum *fse)
1969 struct imx319 *imx319 = to_imx319(sd);
1971 if (fse->index >= ARRAY_SIZE(supported_modes))
1974 mutex_lock(&imx319->mutex);
1975 if (fse->code != imx319_get_format_code(imx319)) {
1976 mutex_unlock(&imx319->mutex);
1979 mutex_unlock(&imx319->mutex);
1981 fse->min_width = supported_modes[fse->index].width;
1982 fse->max_width = fse->min_width;
1983 fse->min_height = supported_modes[fse->index].height;
1984 fse->max_height = fse->min_height;
1989 static void imx319_update_pad_format(struct imx319 *imx319,
1990 const struct imx319_mode *mode,
1991 struct v4l2_subdev_format *fmt)
1993 fmt->format.width = mode->width;
1994 fmt->format.height = mode->height;
1995 fmt->format.code = imx319_get_format_code(imx319);
1996 fmt->format.field = V4L2_FIELD_NONE;
1999 static int imx319_do_get_pad_format(struct imx319 *imx319,
2000 struct v4l2_subdev_pad_config *cfg,
2001 struct v4l2_subdev_format *fmt)
2003 struct v4l2_mbus_framefmt *framefmt;
2004 struct v4l2_subdev *sd = &imx319->sd;
2006 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
2007 framefmt = v4l2_subdev_get_try_format(sd, cfg, fmt->pad);
2008 fmt->format = *framefmt;
2010 imx319_update_pad_format(imx319, imx319->cur_mode, fmt);
2016 static int imx319_get_pad_format(struct v4l2_subdev *sd,
2017 struct v4l2_subdev_pad_config *cfg,
2018 struct v4l2_subdev_format *fmt)
2020 struct imx319 *imx319 = to_imx319(sd);
2023 mutex_lock(&imx319->mutex);
2024 ret = imx319_do_get_pad_format(imx319, cfg, fmt);
2025 mutex_unlock(&imx319->mutex);
2031 imx319_set_pad_format(struct v4l2_subdev *sd,
2032 struct v4l2_subdev_pad_config *cfg,
2033 struct v4l2_subdev_format *fmt)
2035 struct imx319 *imx319 = to_imx319(sd);
2036 const struct imx319_mode *mode;
2037 struct v4l2_mbus_framefmt *framefmt;
2044 mutex_lock(&imx319->mutex);
2047 * Only one bayer order is supported.
2048 * It depends on the flip settings.
2050 fmt->format.code = imx319_get_format_code(imx319);
2052 mode = v4l2_find_nearest_size(supported_modes,
2053 ARRAY_SIZE(supported_modes),
2055 fmt->format.width, fmt->format.height);
2056 imx319_update_pad_format(imx319, mode, fmt);
2057 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
2058 framefmt = v4l2_subdev_get_try_format(sd, cfg, fmt->pad);
2059 *framefmt = fmt->format;
2061 imx319->cur_mode = mode;
2062 pixel_rate = imx319->link_def_freq * 2 * 4;
2063 do_div(pixel_rate, 10);
2064 __v4l2_ctrl_s_ctrl_int64(imx319->pixel_rate, pixel_rate);
2065 /* Update limits and set FPS to default */
2066 height = imx319->cur_mode->height;
2067 vblank_def = imx319->cur_mode->fll_def - height;
2068 vblank_min = imx319->cur_mode->fll_min - height;
2069 height = IMX319_FLL_MAX - height;
2070 __v4l2_ctrl_modify_range(imx319->vblank, vblank_min, height, 1,
2072 __v4l2_ctrl_s_ctrl(imx319->vblank, vblank_def);
2073 h_blank = mode->llp - imx319->cur_mode->width;
2075 * Currently hblank is not changeable.
2076 * So FPS control is done only by vblank.
2078 __v4l2_ctrl_modify_range(imx319->hblank, h_blank,
2079 h_blank, 1, h_blank);
2082 mutex_unlock(&imx319->mutex);
2087 /* Start streaming */
2088 static int imx319_start_streaming(struct imx319 *imx319)
2090 struct i2c_client *client = v4l2_get_subdevdata(&imx319->sd);
2091 const struct imx319_reg_list *reg_list;
2094 /* Global Setting */
2095 reg_list = &imx319_global_setting;
2096 ret = imx319_write_regs(imx319, reg_list->regs, reg_list->num_of_regs);
2098 dev_err(&client->dev, "failed to set global settings");
2102 /* Apply default values of current mode */
2103 reg_list = &imx319->cur_mode->reg_list;
2104 ret = imx319_write_regs(imx319, reg_list->regs, reg_list->num_of_regs);
2106 dev_err(&client->dev, "failed to set mode");
2110 /* set digital gain control to all color mode */
2111 ret = imx319_write_reg(imx319, IMX319_REG_DPGA_USE_GLOBAL_GAIN, 1, 1);
2115 /* Apply customized values from user */
2116 ret = __v4l2_ctrl_handler_setup(imx319->sd.ctrl_handler);
2120 return imx319_write_reg(imx319, IMX319_REG_MODE_SELECT,
2121 1, IMX319_MODE_STREAMING);
2124 /* Stop streaming */
2125 static int imx319_stop_streaming(struct imx319 *imx319)
2127 return imx319_write_reg(imx319, IMX319_REG_MODE_SELECT,
2128 1, IMX319_MODE_STANDBY);
2131 static int imx319_set_stream(struct v4l2_subdev *sd, int enable)
2133 struct imx319 *imx319 = to_imx319(sd);
2134 struct i2c_client *client = v4l2_get_subdevdata(sd);
2137 mutex_lock(&imx319->mutex);
2138 if (imx319->streaming == enable) {
2139 mutex_unlock(&imx319->mutex);
2144 ret = pm_runtime_get_sync(&client->dev);
2146 pm_runtime_put_noidle(&client->dev);
2151 * Apply default & customized values
2152 * and then start streaming.
2154 ret = imx319_start_streaming(imx319);
2158 imx319_stop_streaming(imx319);
2159 pm_runtime_put(&client->dev);
2162 imx319->streaming = enable;
2164 /* vflip and hflip cannot change during streaming */
2165 __v4l2_ctrl_grab(imx319->vflip, enable);
2166 __v4l2_ctrl_grab(imx319->hflip, enable);
2168 mutex_unlock(&imx319->mutex);
2173 pm_runtime_put(&client->dev);
2175 mutex_unlock(&imx319->mutex);
2180 static int __maybe_unused imx319_suspend(struct device *dev)
2182 struct i2c_client *client = to_i2c_client(dev);
2183 struct v4l2_subdev *sd = i2c_get_clientdata(client);
2184 struct imx319 *imx319 = to_imx319(sd);
2186 if (imx319->streaming)
2187 imx319_stop_streaming(imx319);
2192 static int __maybe_unused imx319_resume(struct device *dev)
2194 struct i2c_client *client = to_i2c_client(dev);
2195 struct v4l2_subdev *sd = i2c_get_clientdata(client);
2196 struct imx319 *imx319 = to_imx319(sd);
2199 if (imx319->streaming) {
2200 ret = imx319_start_streaming(imx319);
2208 imx319_stop_streaming(imx319);
2209 imx319->streaming = 0;
2213 /* Verify chip ID */
2214 static int imx319_identify_module(struct imx319 *imx319)
2216 struct i2c_client *client = v4l2_get_subdevdata(&imx319->sd);
2220 ret = imx319_read_reg(imx319, IMX319_REG_CHIP_ID, 2, &val);
2224 if (val != IMX319_CHIP_ID) {
2225 dev_err(&client->dev, "chip id mismatch: %x!=%x",
2226 IMX319_CHIP_ID, val);
2233 static const struct v4l2_subdev_core_ops imx319_subdev_core_ops = {
2234 .subscribe_event = v4l2_ctrl_subdev_subscribe_event,
2235 .unsubscribe_event = v4l2_event_subdev_unsubscribe,
2238 static const struct v4l2_subdev_video_ops imx319_video_ops = {
2239 .s_stream = imx319_set_stream,
2242 static const struct v4l2_subdev_pad_ops imx319_pad_ops = {
2243 .enum_mbus_code = imx319_enum_mbus_code,
2244 .get_fmt = imx319_get_pad_format,
2245 .set_fmt = imx319_set_pad_format,
2246 .enum_frame_size = imx319_enum_frame_size,
2249 static const struct v4l2_subdev_ops imx319_subdev_ops = {
2250 .core = &imx319_subdev_core_ops,
2251 .video = &imx319_video_ops,
2252 .pad = &imx319_pad_ops,
2255 static const struct media_entity_operations imx319_subdev_entity_ops = {
2256 .link_validate = v4l2_subdev_link_validate,
2259 static const struct v4l2_subdev_internal_ops imx319_internal_ops = {
2260 .open = imx319_open,
2263 /* Initialize control handlers */
2264 static int imx319_init_controls(struct imx319 *imx319)
2266 struct i2c_client *client = v4l2_get_subdevdata(&imx319->sd);
2267 struct v4l2_ctrl_handler *ctrl_hdlr;
2273 const struct imx319_mode *mode;
2277 ctrl_hdlr = &imx319->ctrl_handler;
2278 ret = v4l2_ctrl_handler_init(ctrl_hdlr, 10);
2282 ctrl_hdlr->lock = &imx319->mutex;
2283 max = ARRAY_SIZE(link_freq_menu_items) - 1;
2284 imx319->link_freq = v4l2_ctrl_new_int_menu(ctrl_hdlr, &imx319_ctrl_ops,
2285 V4L2_CID_LINK_FREQ, max, 0,
2286 link_freq_menu_items);
2287 if (imx319->link_freq)
2288 imx319->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
2290 /* pixel_rate = link_freq * 2 * nr_of_lanes / bits_per_sample */
2291 pixel_rate = imx319->link_def_freq * 2 * 4;
2292 do_div(pixel_rate, 10);
2293 /* By default, PIXEL_RATE is read only */
2294 imx319->pixel_rate = v4l2_ctrl_new_std(ctrl_hdlr, &imx319_ctrl_ops,
2295 V4L2_CID_PIXEL_RATE, pixel_rate,
2296 pixel_rate, 1, pixel_rate);
2298 /* Initial vblank/hblank/exposure parameters based on current mode */
2299 mode = imx319->cur_mode;
2300 vblank_def = mode->fll_def - mode->height;
2301 vblank_min = mode->fll_min - mode->height;
2302 imx319->vblank = v4l2_ctrl_new_std(ctrl_hdlr, &imx319_ctrl_ops,
2303 V4L2_CID_VBLANK, vblank_min,
2304 IMX319_FLL_MAX - mode->height,
2307 hblank = mode->llp - mode->width;
2308 imx319->hblank = v4l2_ctrl_new_std(ctrl_hdlr, &imx319_ctrl_ops,
2309 V4L2_CID_HBLANK, hblank, hblank,
2312 imx319->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
2314 /* fll >= exposure time + adjust parameter (default value is 18) */
2315 exposure_max = mode->fll_def - 18;
2316 imx319->exposure = v4l2_ctrl_new_std(ctrl_hdlr, &imx319_ctrl_ops,
2318 IMX319_EXPOSURE_MIN, exposure_max,
2319 IMX319_EXPOSURE_STEP,
2320 IMX319_EXPOSURE_DEFAULT);
2322 imx319->hflip = v4l2_ctrl_new_std(ctrl_hdlr, &imx319_ctrl_ops,
2323 V4L2_CID_HFLIP, 0, 1, 1, 0);
2324 imx319->vflip = v4l2_ctrl_new_std(ctrl_hdlr, &imx319_ctrl_ops,
2325 V4L2_CID_VFLIP, 0, 1, 1, 0);
2327 v4l2_ctrl_new_std(ctrl_hdlr, &imx319_ctrl_ops, V4L2_CID_ANALOGUE_GAIN,
2328 IMX319_ANA_GAIN_MIN, IMX319_ANA_GAIN_MAX,
2329 IMX319_ANA_GAIN_STEP, IMX319_ANA_GAIN_DEFAULT);
2332 v4l2_ctrl_new_std(ctrl_hdlr, &imx319_ctrl_ops, V4L2_CID_DIGITAL_GAIN,
2333 IMX319_DGTL_GAIN_MIN, IMX319_DGTL_GAIN_MAX,
2334 IMX319_DGTL_GAIN_STEP, IMX319_DGTL_GAIN_DEFAULT);
2336 v4l2_ctrl_new_std_menu_items(ctrl_hdlr, &imx319_ctrl_ops,
2337 V4L2_CID_TEST_PATTERN,
2338 ARRAY_SIZE(imx319_test_pattern_menu) - 1,
2339 0, 0, imx319_test_pattern_menu);
2340 if (ctrl_hdlr->error) {
2341 ret = ctrl_hdlr->error;
2342 dev_err(&client->dev, "control init failed: %d", ret);
2346 imx319->sd.ctrl_handler = ctrl_hdlr;
2351 v4l2_ctrl_handler_free(ctrl_hdlr);
2356 static struct imx319_hwcfg *imx319_get_hwcfg(struct device *dev)
2358 struct imx319_hwcfg *cfg;
2359 struct v4l2_fwnode_endpoint bus_cfg = {
2360 .bus_type = V4L2_MBUS_CSI2_DPHY
2362 struct fwnode_handle *ep;
2363 struct fwnode_handle *fwnode = dev_fwnode(dev);
2370 ep = fwnode_graph_get_next_endpoint(fwnode, NULL);
2374 ret = v4l2_fwnode_endpoint_alloc_parse(ep, &bus_cfg);
2378 cfg = devm_kzalloc(dev, sizeof(*cfg), GFP_KERNEL);
2382 ret = fwnode_property_read_u32(dev_fwnode(dev), "clock-frequency",
2385 dev_err(dev, "can't get clock frequency");
2389 dev_dbg(dev, "ext clk: %d", cfg->ext_clk);
2390 if (cfg->ext_clk != IMX319_EXT_CLK) {
2391 dev_err(dev, "external clock %d is not supported",
2396 dev_dbg(dev, "num of link freqs: %d", bus_cfg.nr_of_link_frequencies);
2397 if (!bus_cfg.nr_of_link_frequencies) {
2398 dev_warn(dev, "no link frequencies defined");
2402 cfg->nr_of_link_freqs = bus_cfg.nr_of_link_frequencies;
2403 cfg->link_freqs = devm_kcalloc(dev,
2404 bus_cfg.nr_of_link_frequencies + 1,
2405 sizeof(*cfg->link_freqs), GFP_KERNEL);
2406 if (!cfg->link_freqs)
2409 for (i = 0; i < bus_cfg.nr_of_link_frequencies; i++) {
2410 cfg->link_freqs[i] = bus_cfg.link_frequencies[i];
2411 dev_dbg(dev, "link_freq[%d] = %lld", i, cfg->link_freqs[i]);
2414 v4l2_fwnode_endpoint_free(&bus_cfg);
2415 fwnode_handle_put(ep);
2419 v4l2_fwnode_endpoint_free(&bus_cfg);
2420 fwnode_handle_put(ep);
2424 static int imx319_probe(struct i2c_client *client)
2426 struct imx319 *imx319;
2430 imx319 = devm_kzalloc(&client->dev, sizeof(*imx319), GFP_KERNEL);
2434 mutex_init(&imx319->mutex);
2436 /* Initialize subdev */
2437 v4l2_i2c_subdev_init(&imx319->sd, client, &imx319_subdev_ops);
2439 /* Check module identity */
2440 ret = imx319_identify_module(imx319);
2442 dev_err(&client->dev, "failed to find sensor: %d", ret);
2446 imx319->hwcfg = imx319_get_hwcfg(&client->dev);
2447 if (!imx319->hwcfg) {
2448 dev_err(&client->dev, "failed to get hwcfg");
2453 imx319->link_def_freq = link_freq_menu_items[IMX319_LINK_FREQ_INDEX];
2454 for (i = 0; i < imx319->hwcfg->nr_of_link_freqs; i++) {
2455 if (imx319->hwcfg->link_freqs[i] == imx319->link_def_freq) {
2456 dev_dbg(&client->dev, "link freq index %d matched", i);
2461 if (i == imx319->hwcfg->nr_of_link_freqs) {
2462 dev_err(&client->dev, "no link frequency supported");
2467 /* Set default mode to max resolution */
2468 imx319->cur_mode = &supported_modes[0];
2470 ret = imx319_init_controls(imx319);
2472 dev_err(&client->dev, "failed to init controls: %d", ret);
2476 /* Initialize subdev */
2477 imx319->sd.internal_ops = &imx319_internal_ops;
2478 imx319->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE |
2479 V4L2_SUBDEV_FL_HAS_EVENTS;
2480 imx319->sd.entity.ops = &imx319_subdev_entity_ops;
2481 imx319->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
2483 /* Initialize source pad */
2484 imx319->pad.flags = MEDIA_PAD_FL_SOURCE;
2485 ret = media_entity_pads_init(&imx319->sd.entity, 1, &imx319->pad);
2487 dev_err(&client->dev, "failed to init entity pads: %d", ret);
2488 goto error_handler_free;
2491 ret = v4l2_async_register_subdev_sensor_common(&imx319->sd);
2493 goto error_media_entity;
2496 * Device is already turned on by i2c-core with ACPI domain PM.
2497 * Enable runtime PM and turn off the device.
2499 pm_runtime_set_active(&client->dev);
2500 pm_runtime_enable(&client->dev);
2501 pm_runtime_idle(&client->dev);
2506 media_entity_cleanup(&imx319->sd.entity);
2509 v4l2_ctrl_handler_free(imx319->sd.ctrl_handler);
2512 mutex_destroy(&imx319->mutex);
2517 static int imx319_remove(struct i2c_client *client)
2519 struct v4l2_subdev *sd = i2c_get_clientdata(client);
2520 struct imx319 *imx319 = to_imx319(sd);
2522 v4l2_async_unregister_subdev(sd);
2523 media_entity_cleanup(&sd->entity);
2524 v4l2_ctrl_handler_free(sd->ctrl_handler);
2526 pm_runtime_disable(&client->dev);
2527 pm_runtime_set_suspended(&client->dev);
2529 mutex_destroy(&imx319->mutex);
2534 static const struct dev_pm_ops imx319_pm_ops = {
2535 SET_SYSTEM_SLEEP_PM_OPS(imx319_suspend, imx319_resume)
2538 static const struct acpi_device_id imx319_acpi_ids[] = {
2542 MODULE_DEVICE_TABLE(acpi, imx319_acpi_ids);
2544 static struct i2c_driver imx319_i2c_driver = {
2547 .pm = &imx319_pm_ops,
2548 .acpi_match_table = ACPI_PTR(imx319_acpi_ids),
2550 .probe_new = imx319_probe,
2551 .remove = imx319_remove,
2553 module_i2c_driver(imx319_i2c_driver);
2559 MODULE_DESCRIPTION("Sony imx319 sensor driver");
2560 MODULE_LICENSE("GPL v2");