drivers/scsi/ips.c

   1 /*****************************************************************************/
   2 /* ips.c -- driver for the Adaptec / IBM ServeRAID controller                */
   3 /*                                                                           */
   4 /* Written By: Keith Mitchell, IBM Corporation                               */
   5 /*             Jack Hammer, Adaptec, Inc.                                    */
   6 /*             David Jeffery, Adaptec, Inc.                                  */
   7 /*                                                                           */
   8 /* Copyright (C) 2000 IBM Corporation                                        */
   9 /* Copyright (C) 2002,2003 Adaptec, Inc.                                     */
  10 /*                                                                           */
  11 /* This program is free software; you can redistribute it and/or modify      */
  12 /* it under the terms of the GNU General Public License as published by      */
  13 /* the Free Software Foundation; either version 2 of the License, or         */
  14 /* (at your option) any later version.                                       */
  15 /*                                                                           */
  16 /* This program is distributed in the hope that it will be useful,           */
  17 /* but WITHOUT ANY WARRANTY; without even the implied warranty of            */
  18 /* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the             */
  19 /* GNU General Public License for more details.                              */
  20 /*                                                                           */
  21 /* NO WARRANTY                                                               */
  22 /* THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR        */
  23 /* CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT      */
  24 /* LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,      */
  25 /* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is    */
  26 /* solely responsible for determining the appropriateness of using and       */
  27 /* distributing the Program and assumes all risks associated with its        */
  28 /* exercise of rights under this Agreement, including but not limited to     */
  29 /* the risks and costs of program errors, damage to or loss of data,         */
  30 /* programs or equipment, and unavailability or interruption of operations.  */
  31 /*                                                                           */
  32 /* DISCLAIMER OF LIABILITY                                                   */
  33 /* NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY   */
  34 /* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL        */
  35 /* DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND   */
  36 /* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR     */
  37 /* TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE    */
  38 /* USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED  */
  39 /* HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES             */
  40 /*                                                                           */
  41 /* You should have received a copy of the GNU General Public License         */
  42 /* along with this program; if not, write to the Free Software               */
  43 /* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA */
  44 /*                                                                           */
  45 /* Bugs/Comments/Suggestions about this driver should be mailed to:          */
  46 /*      [email protected]                                                 */
  47 /*                                                                           */
  48 /* For system support issues, contact your local IBM Customer support.       */
  49 /* Directions to find IBM Customer Support for each country can be found at: */
  50 /*      http://www.ibm.com/planetwide/                                       */
  51 /*                                                                           */
  52 /*****************************************************************************/
  53
  54 /*****************************************************************************/
  55 /* Change Log                                                                */
  56 /*                                                                           */
  57 /* 0.99.02  - Breakup commands that are bigger than 8 * the stripe size      */
  58 /* 0.99.03  - Make interrupt routine handle all completed request on the     */
  59 /*            adapter not just the first one                                 */
  60 /*          - Make sure passthru commands get woken up if we run out of      */
  61 /*            SCBs                                                           */
  62 /*          - Send all of the commands on the queue at once rather than      */
  63 /*            one at a time since the card will support it.                  */
  64 /* 0.99.04  - Fix race condition in the passthru mechanism -- this required  */
  65 /*            the interface to the utilities to change                       */
  66 /*          - Fix error recovery code                                        */
  67 /* 0.99.05  - Fix an oops when we get certain passthru commands              */
  68 /* 1.00.00  - Initial Public Release                                         */
  69 /*            Functionally equivalent to 0.99.05                             */
  70 /* 3.60.00  - Bump max commands to 128 for use with firmware 3.60            */
  71 /*          - Change version to 3.60 to coincide with release numbering.     */
  72 /* 3.60.01  - Remove bogus error check in passthru routine                   */
  73 /* 3.60.02  - Make DCDB direction based on lookup table                      */
  74 /*          - Only allow one DCDB command to a SCSI ID at a time             */
  75 /* 4.00.00  - Add support for ServeRAID 4                                    */
  76 /* 4.00.01  - Add support for First Failure Data Capture                     */
  77 /* 4.00.02  - Fix problem with PT DCDB with no buffer                        */
  78 /* 4.00.03  - Add alternative passthru interface                             */
  79 /*          - Add ability to flash BIOS                                      */
  80 /* 4.00.04  - Rename structures/constants to be prefixed with IPS_           */
  81 /* 4.00.05  - Remove wish_block from init routine                            */
  82 /*          - Use linux/spinlock.h instead of asm/spinlock.h for kernels     */
  83 /*            2.3.18 and later                                               */
  84 /*          - Sync with other changes from the 2.3 kernels                   */
  85 /* 4.00.06  - Fix timeout with initial FFDC command                          */
  86 /* 4.00.06a - Port to 2.4 (trivial) -- Christoph Hellwig <[email protected]> */
  87 /* 4.10.00  - Add support for ServeRAID 4M/4L                                */
  88 /* 4.10.13  - Fix for dynamic unload and proc file system                    */
  89 /* 4.20.03  - Rename version to coincide with new release schedules          */
  90 /*            Performance fixes                                              */
  91 /*            Fix truncation of /proc files with cat                         */
  92 /*            Merge in changes through kernel 2.4.0test1ac21                 */
  93 /* 4.20.13  - Fix some failure cases / reset code                            */
  94 /*          - Hook into the reboot_notifier to flush the controller cache    */
  95 /* 4.50.01  - Fix problem when there is a hole in logical drive numbering    */
  96 /* 4.70.09  - Use a Common ( Large Buffer ) for Flashing from the JCRM CD    */
  97 /*          - Add IPSSEND Flash Support                                      */
  98 /*          - Set Sense Data for Unknown SCSI Command                        */
  99 /*          - Use Slot Number from NVRAM Page 5                              */
 100 /*          - Restore caller's DCDB Structure                                */
 101 /* 4.70.12  - Corrective actions for bad controller ( during initialization )*/
 102 /* 4.70.13  - Don't Send CDB's if we already know the device is not present  */
 103 /*          - Don't release HA Lock in ips_next() until SC taken off queue   */
 104 /*          - Unregister SCSI device in ips_release()                        */
 105 /* 4.70.15  - Fix Breakup for very large ( non-SG ) requests in ips_done()   */
 106 /* 4.71.00  - Change all memory allocations to not use GFP_DMA flag          */
 107 /*            Code Clean-Up for 2.4.x kernel                                 */
 108 /* 4.72.00  - Allow for a Scatter-Gather Element to exceed MAX_XFER Size     */
 109 /* 4.72.01  - I/O Mapped Memory release ( so "insmod ips" does not Fail )    */
 110 /*          - Don't Issue Internal FFDC Command if there are Active Commands */
 111 /*          - Close Window for getting too many IOCTL's active               */
 112 /* 4.80.00  - Make ia64 Safe                                                 */
 113 /* 4.80.04  - Eliminate calls to strtok() if 2.4.x or greater                */
 114 /*          - Adjustments to Device Queue Depth                              */
 115 /* 4.80.14  - Take all semaphores off stack                                  */
 116 /*          - Clean Up New_IOCTL path                                        */
 117 /* 4.80.20  - Set max_sectors in Scsi_Host structure ( if >= 2.4.7 kernel )  */
 118 /*          - 5 second delay needed after resetting an i960 adapter          */
 119 /* 4.80.26  - Clean up potential code problems ( Arjan's recommendations )   */
 120 /* 4.90.01  - Version Matching for FirmWare, BIOS, and Driver                */
 121 /* 4.90.05  - Use New PCI Architecture to facilitate Hot Plug Development    */
 122 /* 4.90.08  - Increase Delays in Flashing ( Trombone Only - 4H )             */
 123 /* 4.90.08  - Data Corruption if First Scatter Gather Element is > 64K       */
 124 /* 4.90.11  - Don't actually RESET unless it's physically required           */
 125 /*          - Remove unused compile options                                  */
 126 /* 5.00.01  - Sarasota ( 5i ) adapters must always be scanned first          */
 127 /*          - Get rid on IOCTL_NEW_COMMAND code                              */
 128 /*          - Add Extended DCDB Commands for Tape Support in 5I              */
 129 /* 5.10.12  - use pci_dma interfaces, update for 2.5 kernel changes          */
 130 /* 5.10.15  - remove unused code (sem, macros, etc.)                         */
 131 /* 5.30.00  - use __devexit_p()                                              */
 132 /* 6.00.00  - Add 6x Adapters and Battery Flash                              */
 133 /* 6.10.00  - Remove 1G Addressing Limitations                               */
 134 /* 6.11.xx  - Get VersionInfo buffer off the stack !              DDTS 60401 */
 135 /* 6.11.xx  - Make Logical Drive Info structure safe for DMA      DDTS 60639 */
 136 /* 7.10.18  - Add highmem_io flag in SCSI Templete for 2.4 kernels           */
 137 /*          - Fix path/name for scsi_hosts.h include for 2.6 kernels         */
 138 /*          - Fix sort order of 7k                                           */
 139 /*          - Remove 3 unused "inline" functions                             */
 140 /* 7.12.xx  - Use STATIC functions wherever possible                        */
 141 /*          - Clean up deprecated MODULE_PARM calls                          */
 142 /* 7.12.05  - Remove Version Matching per IBM request                        */
 143 /*****************************************************************************/
 144
 145 /*
 146  * Conditional Compilation directives for this driver:
 147  *
 148  * IPS_DEBUG            - Turn on debugging info
 149  *
 150  * Parameters:
 151  *
 152  * debug:<number>       - Set debug level to <number>
 153  *                        NOTE: only works when IPS_DEBUG compile directive is used.
 154  *       1              - Normal debug messages
 155  *       2              - Verbose debug messages
 156  *       11             - Method trace (non interrupt)
 157  *       12             - Method trace (includes interrupt)
 158  *
 159  * noi2o                - Don't use I2O Queues (ServeRAID 4 only)
 160  * nommap               - Don't use memory mapped I/O
 161  * ioctlsize            - Initial size of the IOCTL buffer
 162  */
 163
 164 #include <asm/io.h>
 165 #include <asm/byteorder.h>
 166 #include <asm/page.h>
 167 #include <linux/stddef.h>
 168 #include <linux/string.h>
 169 #include <linux/errno.h>
 170 #include <linux/kernel.h>
 171 #include <linux/ioport.h>
 172 #include <linux/slab.h>
 173 #include <linux/delay.h>
 174 #include <linux/pci.h>
 175 #include <linux/proc_fs.h>
 176 #include <linux/reboot.h>
 177 #include <linux/interrupt.h>
 178
 179 #include <linux/blkdev.h>
 180 #include <linux/types.h>
 181 #include <linux/dma-mapping.h>
 182
 183 #include <scsi/sg.h>
 184 #include "scsi.h"
 185 #include <scsi/scsi_host.h>
 186
 187 #include "ips.h"
 188
 189 #include <linux/module.h>
 190
 191 #include <linux/stat.h>
 192
 193 #include <linux/spinlock.h>
 194 #include <linux/init.h>
 195
 196 #include <linux/smp.h>
 197
 198 #ifdef MODULE
 199 static char *ips = NULL;
 200 module_param(ips, charp, 0);
 201 #endif
 202
 203 /*
 204  * DRIVER_VER
 205  */
 206 #define IPS_VERSION_HIGH        IPS_VER_MAJOR_STRING "." IPS_VER_MINOR_STRING
 207 #define IPS_VERSION_LOW         "." IPS_VER_BUILD_STRING " "
 208
 209 #define IPS_DMA_DIR(scb) ((!scb->scsi_cmd || ips_is_passthru(scb->scsi_cmd) || \
 210                          DMA_NONE == scb->scsi_cmd->sc_data_direction) ? \
 211                          DMA_BIDIRECTIONAL : \
 212                          scb->scsi_cmd->sc_data_direction)
 213
 214 #ifdef IPS_DEBUG
 215 #define METHOD_TRACE(s, i)    if (ips_debug >= (i+10)) printk(KERN_NOTICE s "\n");
 216 #define DEBUG(i, s)           if (ips_debug >= i) printk(KERN_NOTICE s "\n");
 217 #define DEBUG_VAR(i, s, v...) if (ips_debug >= i) printk(KERN_NOTICE s "\n", v);
 218 #else
 219 #define METHOD_TRACE(s, i)
 220 #define DEBUG(i, s)
 221 #define DEBUG_VAR(i, s, v...)
 222 #endif
 223
 224 /*
 225  * Function prototypes
 226  */
 227 static int ips_eh_abort(struct scsi_cmnd *);
 228 static int ips_eh_reset(struct scsi_cmnd *);
 229 static int ips_queue(struct Scsi_Host *, struct scsi_cmnd *);
 230 static const char *ips_info(struct Scsi_Host *);
 231 static irqreturn_t do_ipsintr(int, void *);
 232 static int ips_hainit(ips_ha_t *);
 233 static int ips_map_status(ips_ha_t *, ips_scb_t *, ips_stat_t *);
 234 static int ips_send_wait(ips_ha_t *, ips_scb_t *, int, int);
 235 static int ips_send_cmd(ips_ha_t *, ips_scb_t *);
 236 static int ips_online(ips_ha_t *, ips_scb_t *);
 237 static int ips_inquiry(ips_ha_t *, ips_scb_t *);
 238 static int ips_rdcap(ips_ha_t *, ips_scb_t *);
 239 static int ips_msense(ips_ha_t *, ips_scb_t *);
 240 static int ips_reqsen(ips_ha_t *, ips_scb_t *);
 241 static int ips_deallocatescbs(ips_ha_t *, int);
 242 static int ips_allocatescbs(ips_ha_t *);
 243 static int ips_reset_copperhead(ips_ha_t *);
 244 static int ips_reset_copperhead_memio(ips_ha_t *);
 245 static int ips_reset_morpheus(ips_ha_t *);
 246 static int ips_issue_copperhead(ips_ha_t *, ips_scb_t *);
 247 static int ips_issue_copperhead_memio(ips_ha_t *, ips_scb_t *);
 248 static int ips_issue_i2o(ips_ha_t *, ips_scb_t *);
 249 static int ips_issue_i2o_memio(ips_ha_t *, ips_scb_t *);
 250 static int ips_isintr_copperhead(ips_ha_t *);
 251 static int ips_isintr_copperhead_memio(ips_ha_t *);
 252 static int ips_isintr_morpheus(ips_ha_t *);
 253 static int ips_wait(ips_ha_t *, int, int);
 254 static int ips_write_driver_status(ips_ha_t *, int);
 255 static int ips_read_adapter_status(ips_ha_t *, int);
 256 static int ips_read_subsystem_parameters(ips_ha_t *, int);
 257 static int ips_read_config(ips_ha_t *, int);
 258 static int ips_clear_adapter(ips_ha_t *, int);
 259 static int ips_readwrite_page5(ips_ha_t *, int, int);
 260 static int ips_init_copperhead(ips_ha_t *);
 261 static int ips_init_copperhead_memio(ips_ha_t *);
 262 static int ips_init_morpheus(ips_ha_t *);
 263 static int ips_isinit_copperhead(ips_ha_t *);
 264 static int ips_isinit_copperhead_memio(ips_ha_t *);
 265 static int ips_isinit_morpheus(ips_ha_t *);
 266 static int ips_erase_bios(ips_ha_t *);
 267 static int ips_program_bios(ips_ha_t *, char *, uint32_t, uint32_t);
 268 static int ips_verify_bios(ips_ha_t *, char *, uint32_t, uint32_t);
 269 static int ips_erase_bios_memio(ips_ha_t *);
 270 static int ips_program_bios_memio(ips_ha_t *, char *, uint32_t, uint32_t);
 271 static int ips_verify_bios_memio(ips_ha_t *, char *, uint32_t, uint32_t);
 272 static int ips_flash_copperhead(ips_ha_t *, ips_passthru_t *, ips_scb_t *);
 273 static int ips_flash_bios(ips_ha_t *, ips_passthru_t *, ips_scb_t *);
 274 static int ips_flash_firmware(ips_ha_t *, ips_passthru_t *, ips_scb_t *);
 275 static void ips_free_flash_copperhead(ips_ha_t * ha);
 276 static void ips_get_bios_version(ips_ha_t *, int);
 277 static void ips_identify_controller(ips_ha_t *);
 278 static void ips_chkstatus(ips_ha_t *, IPS_STATUS *);
 279 static void ips_enable_int_copperhead(ips_ha_t *);
 280 static void ips_enable_int_copperhead_memio(ips_ha_t *);
 281 static void ips_enable_int_morpheus(ips_ha_t *);
 282 static int ips_intr_copperhead(ips_ha_t *);
 283 static int ips_intr_morpheus(ips_ha_t *);
 284 static void ips_next(ips_ha_t *, int);
 285 static void ipsintr_blocking(ips_ha_t *, struct ips_scb *);
 286 static void ipsintr_done(ips_ha_t *, struct ips_scb *);
 287 static void ips_done(ips_ha_t *, ips_scb_t *);
 288 static void ips_free(ips_ha_t *);
 289 static void ips_init_scb(ips_ha_t *, ips_scb_t *);
 290 static void ips_freescb(ips_ha_t *, ips_scb_t *);
 291 static void ips_setup_funclist(ips_ha_t *);
 292 static void ips_statinit(ips_ha_t *);
 293 static void ips_statinit_memio(ips_ha_t *);
 294 static void ips_fix_ffdc_time(ips_ha_t *, ips_scb_t *, time64_t);
 295 static void ips_ffdc_reset(ips_ha_t *, int);
 296 static void ips_ffdc_time(ips_ha_t *);
 297 static uint32_t ips_statupd_copperhead(ips_ha_t *);
 298 static uint32_t ips_statupd_copperhead_memio(ips_ha_t *);
 299 static uint32_t ips_statupd_morpheus(ips_ha_t *);
 300 static ips_scb_t *ips_getscb(ips_ha_t *);
 301 static void ips_putq_scb_head(ips_scb_queue_t *, ips_scb_t *);
 302 static void ips_putq_wait_tail(ips_wait_queue_entry_t *, struct scsi_cmnd *);
 303 static void ips_putq_copp_tail(ips_copp_queue_t *,
 304                                       ips_copp_wait_item_t *);
 305 static ips_scb_t *ips_removeq_scb_head(ips_scb_queue_t *);
 306 static ips_scb_t *ips_removeq_scb(ips_scb_queue_t *, ips_scb_t *);
 307 static struct scsi_cmnd *ips_removeq_wait_head(ips_wait_queue_entry_t *);
 308 static struct scsi_cmnd *ips_removeq_wait(ips_wait_queue_entry_t *,
 309                                           struct scsi_cmnd *);
 310 static ips_copp_wait_item_t *ips_removeq_copp(ips_copp_queue_t *,
 311                                                      ips_copp_wait_item_t *);
 312 static ips_copp_wait_item_t *ips_removeq_copp_head(ips_copp_queue_t *);
 313
 314 static int ips_is_passthru(struct scsi_cmnd *);
 315 static int ips_make_passthru(ips_ha_t *, struct scsi_cmnd *, ips_scb_t *, int);
 316 static int ips_usrcmd(ips_ha_t *, ips_passthru_t *, ips_scb_t *);
 317 static void ips_cleanup_passthru(ips_ha_t *, ips_scb_t *);
 318 static void ips_scmd_buf_write(struct scsi_cmnd * scmd, void *data,
 319                                unsigned int count);
 320 static void ips_scmd_buf_read(struct scsi_cmnd * scmd, void *data,
 321                               unsigned int count);
 322
 323 static int ips_write_info(struct Scsi_Host *, char *, int);
 324 static int ips_show_info(struct seq_file *, struct Scsi_Host *);
 325 static int ips_host_info(ips_ha_t *, struct seq_file *);
 326 static int ips_abort_init(ips_ha_t * ha, int index);
 327 static int ips_init_phase2(int index);
 328
 329 static int ips_init_phase1(struct pci_dev *pci_dev, int *indexPtr);
 330 static int ips_register_scsi(int index);
 331
 332 static int  ips_poll_for_flush_complete(ips_ha_t * ha);
 333 static void ips_flush_and_reset(ips_ha_t *ha);
 334
 335 /*
 336  * global variables
 337  */
 338 static const char ips_name[] = "ips";
 339 static struct Scsi_Host *ips_sh[IPS_MAX_ADAPTERS];      /* Array of host controller structures */
 340 static ips_ha_t *ips_ha[IPS_MAX_ADAPTERS];      /* Array of HA structures */
 341 static unsigned int ips_next_controller;
 342 static unsigned int ips_num_controllers;
 343 static unsigned int ips_released_controllers;
 344 static int ips_hotplug;
 345 static int ips_cmd_timeout = 60;
 346 static int ips_reset_timeout = 60 * 5;
 347 static int ips_force_memio = 1;         /* Always use Memory Mapped I/O    */
 348 static int ips_force_i2o = 1;   /* Always use I2O command delivery */
 349 static int ips_ioctlsize = IPS_IOCTL_SIZE;      /* Size of the ioctl buffer        */
 350 static int ips_cd_boot;                 /* Booting from Manager CD         */
 351 static char *ips_FlashData = NULL;      /* CD Boot - Flash Data Buffer      */
 352 static dma_addr_t ips_flashbusaddr;
 353 static long ips_FlashDataInUse;         /* CD Boot - Flash Data In Use Flag */
 354 static uint32_t MaxLiteCmds = 32;       /* Max Active Cmds for a Lite Adapter */
 355 static struct scsi_host_template ips_driver_template = {
 356         .info                   = ips_info,
 357         .queuecommand           = ips_queue,
 358         .eh_abort_handler       = ips_eh_abort,
 359         .eh_host_reset_handler  = ips_eh_reset,
 360         .proc_name              = "ips",
 361         .show_info              = ips_show_info,
 362         .write_info             = ips_write_info,
 363         .slave_configure        = ips_slave_configure,
 364         .bios_param             = ips_biosparam,
 365         .this_id                = -1,
 366         .sg_tablesize           = IPS_MAX_SG,
 367         .cmd_per_lun            = 3,
 368         .no_write_same          = 1,
 369 };
 370
 371
 372 /* This table describes all ServeRAID Adapters */
 373 static struct  pci_device_id  ips_pci_table[] = {
 374         { 0x1014, 0x002E, PCI_ANY_ID, PCI_ANY_ID, 0, 0 },
 375         { 0x1014, 0x01BD, PCI_ANY_ID, PCI_ANY_ID, 0, 0 },
 376         { 0x9005, 0x0250, PCI_ANY_ID, PCI_ANY_ID, 0, 0 },
 377         { 0, }
 378 };
 379
 380 MODULE_DEVICE_TABLE( pci, ips_pci_table );
 381
 382 static char ips_hot_plug_name[] = "ips";
 383
 384 static int  ips_insert_device(struct pci_dev *pci_dev, const struct pci_device_id *ent);
 385 static void ips_remove_device(struct pci_dev *pci_dev);
 386
 387 static struct pci_driver ips_pci_driver = {
 388         .name           = ips_hot_plug_name,
 389         .id_table       = ips_pci_table,
 390         .probe          = ips_insert_device,
 391         .remove         = ips_remove_device,
 392 };
 393
 394
 395 /*
 396  * Necessary forward function protoypes
 397  */
 398 static int ips_halt(struct notifier_block *nb, ulong event, void *buf);
 399
 400 #define MAX_ADAPTER_NAME 15
 401
 402 static char ips_adapter_name[][30] = {
 403         "ServeRAID",
 404         "ServeRAID II",
 405         "ServeRAID on motherboard",
 406         "ServeRAID on motherboard",
 407         "ServeRAID 3H",
 408         "ServeRAID 3L",
 409         "ServeRAID 4H",
 410         "ServeRAID 4M",
 411         "ServeRAID 4L",
 412         "ServeRAID 4Mx",
 413         "ServeRAID 4Lx",
 414         "ServeRAID 5i",
 415         "ServeRAID 5i",
 416         "ServeRAID 6M",
 417         "ServeRAID 6i",
 418         "ServeRAID 7t",
 419         "ServeRAID 7k",
 420         "ServeRAID 7M"
 421 };
 422
 423 static struct notifier_block ips_notifier = {
 424         ips_halt, NULL, 0
 425 };
 426
 427 /*
 428  * Direction table
 429  */
 430 static char ips_command_direction[] = {
 431         IPS_DATA_NONE, IPS_DATA_NONE, IPS_DATA_IN, IPS_DATA_IN, IPS_DATA_OUT,
 432         IPS_DATA_IN, IPS_DATA_IN, IPS_DATA_OUT, IPS_DATA_IN, IPS_DATA_UNK,
 433         IPS_DATA_OUT, IPS_DATA_OUT, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 434         IPS_DATA_IN, IPS_DATA_NONE, IPS_DATA_NONE, IPS_DATA_IN, IPS_DATA_OUT,
 435         IPS_DATA_IN, IPS_DATA_OUT, IPS_DATA_NONE, IPS_DATA_NONE, IPS_DATA_OUT,
 436         IPS_DATA_NONE, IPS_DATA_IN, IPS_DATA_NONE, IPS_DATA_IN, IPS_DATA_OUT,
 437         IPS_DATA_NONE, IPS_DATA_UNK, IPS_DATA_IN, IPS_DATA_UNK, IPS_DATA_IN,
 438         IPS_DATA_UNK, IPS_DATA_OUT, IPS_DATA_IN, IPS_DATA_UNK, IPS_DATA_UNK,
 439         IPS_DATA_IN, IPS_DATA_IN, IPS_DATA_OUT, IPS_DATA_NONE, IPS_DATA_UNK,
 440         IPS_DATA_IN, IPS_DATA_OUT, IPS_DATA_OUT, IPS_DATA_OUT, IPS_DATA_OUT,
 441         IPS_DATA_OUT, IPS_DATA_NONE, IPS_DATA_IN, IPS_DATA_NONE, IPS_DATA_NONE,
 442         IPS_DATA_IN, IPS_DATA_OUT, IPS_DATA_OUT, IPS_DATA_OUT, IPS_DATA_OUT,
 443         IPS_DATA_IN, IPS_DATA_OUT, IPS_DATA_IN, IPS_DATA_OUT, IPS_DATA_OUT,
 444         IPS_DATA_OUT, IPS_DATA_IN, IPS_DATA_IN, IPS_DATA_IN, IPS_DATA_NONE,
 445         IPS_DATA_UNK, IPS_DATA_NONE, IPS_DATA_NONE, IPS_DATA_NONE, IPS_DATA_UNK,
 446         IPS_DATA_NONE, IPS_DATA_OUT, IPS_DATA_IN, IPS_DATA_UNK, IPS_DATA_UNK,
 447         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 448         IPS_DATA_OUT, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 449         IPS_DATA_IN, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 450         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 451         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 452         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 453         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 454         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 455         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 456         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 457         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 458         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 459         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 460         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 461         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 462         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 463         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 464         IPS_DATA_NONE, IPS_DATA_NONE, IPS_DATA_UNK, IPS_DATA_IN, IPS_DATA_NONE,
 465         IPS_DATA_OUT, IPS_DATA_UNK, IPS_DATA_NONE, IPS_DATA_UNK, IPS_DATA_OUT,
 466         IPS_DATA_OUT, IPS_DATA_OUT, IPS_DATA_OUT, IPS_DATA_OUT, IPS_DATA_NONE,
 467         IPS_DATA_UNK, IPS_DATA_IN, IPS_DATA_OUT, IPS_DATA_IN, IPS_DATA_IN,
 468         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 469         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 470         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 471         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 472         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 473         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 474         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 475         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 476         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 477         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_OUT,
 478         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 479         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 480         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 481         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK
 482 };
 483
 484
 485 /****************************************************************************/
 486 /*                                                                          */
 487 /* Routine Name: ips_setup                                                  */
 488 /*                                                                          */
 489 /* Routine Description:                                                     */
 490 /*                                                                          */
 491 /*   setup parameters to the driver                                         */
 492 /*                                                                          */
 493 /****************************************************************************/
 494 static int
 495 ips_setup(char *ips_str)
 496 {
 497
 498         int i;
 499         char *key;
 500         char *value;
 501         static const IPS_OPTION options[] = {
 502                 {"noi2o", &ips_force_i2o, 0},
 503                 {"nommap", &ips_force_memio, 0},
 504                 {"ioctlsize", &ips_ioctlsize, IPS_IOCTL_SIZE},
 505                 {"cdboot", &ips_cd_boot, 0},
 506                 {"maxcmds", &MaxLiteCmds, 32},
 507         };
 508
 509         /* Don't use strtok() anymore ( if 2.4 Kernel or beyond ) */
 510         /* Search for value */
 511         while ((key = strsep(&ips_str, ",."))) {
 512                 if (!*key)
 513                         continue;
 514                 value = strchr(key, ':');
 515                 if (value)
 516                         *value++ = '\0';
 517                 /*
 518                  * We now have key/value pairs.
 519                  * Update the variables
 520                  */
 521                 for (i = 0; i < ARRAY_SIZE(options); i++) {
 522                         if (strncasecmp
 523                             (key, options[i].option_name,
 524                              strlen(options[i].option_name)) == 0) {
 525                                 if (value)
 526                                         *options[i].option_flag =
 527                                             simple_strtoul(value, NULL, 0);
 528                                 else
 529                                         *options[i].option_flag =
 530                                             options[i].option_value;
 531                                 break;
 532                         }
 533                 }
 534         }
 535
 536         return (1);
 537 }
 538
 539 __setup("ips=", ips_setup);
 540
 541 /****************************************************************************/
 542 /*                                                                          */
 543 /* Routine Name: ips_detect                                                 */
 544 /*                                                                          */
 545 /* Routine Description:                                                     */
 546 /*                                                                          */
 547 /*   Detect and initialize the driver                                       */
 548 /*                                                                          */
 549 /* NOTE: this routine is called under the io_request_lock spinlock          */
 550 /*                                                                          */
 551 /****************************************************************************/
 552 static int
 553 ips_detect(struct scsi_host_template * SHT)
 554 {
 555         int i;
 556
 557         METHOD_TRACE("ips_detect", 1);
 558
 559 #ifdef MODULE
 560         if (ips)
 561                 ips_setup(ips);
 562 #endif
 563
 564         for (i = 0; i < ips_num_controllers; i++) {
 565                 if (ips_register_scsi(i))
 566                         ips_free(ips_ha[i]);
 567                 ips_released_controllers++;
 568         }
 569         ips_hotplug = 1;
 570         return (ips_num_controllers);
 571 }
 572
 573 /****************************************************************************/
 574 /*   configure the function pointers to use the functions that will work    */
 575 /*   with the found version of the adapter                                  */
 576 /****************************************************************************/
 577 static void
 578 ips_setup_funclist(ips_ha_t * ha)
 579 {
 580
 581         /*
 582          * Setup Functions
 583          */
 584         if (IPS_IS_MORPHEUS(ha) || IPS_IS_MARCO(ha)) {
 585                 /* morpheus / marco / sebring */
 586                 ha->func.isintr = ips_isintr_morpheus;
 587                 ha->func.isinit = ips_isinit_morpheus;
 588                 ha->func.issue = ips_issue_i2o_memio;
 589                 ha->func.init = ips_init_morpheus;
 590                 ha->func.statupd = ips_statupd_morpheus;
 591                 ha->func.reset = ips_reset_morpheus;
 592                 ha->func.intr = ips_intr_morpheus;
 593                 ha->func.enableint = ips_enable_int_morpheus;
 594         } else if (IPS_USE_MEMIO(ha)) {
 595                 /* copperhead w/MEMIO */
 596                 ha->func.isintr = ips_isintr_copperhead_memio;
 597                 ha->func.isinit = ips_isinit_copperhead_memio;
 598                 ha->func.init = ips_init_copperhead_memio;
 599                 ha->func.statupd = ips_statupd_copperhead_memio;
 600                 ha->func.statinit = ips_statinit_memio;
 601                 ha->func.reset = ips_reset_copperhead_memio;
 602                 ha->func.intr = ips_intr_copperhead;
 603                 ha->func.erasebios = ips_erase_bios_memio;
 604                 ha->func.programbios = ips_program_bios_memio;
 605                 ha->func.verifybios = ips_verify_bios_memio;
 606                 ha->func.enableint = ips_enable_int_copperhead_memio;
 607                 if (IPS_USE_I2O_DELIVER(ha))
 608                         ha->func.issue = ips_issue_i2o_memio;
 609                 else
 610                         ha->func.issue = ips_issue_copperhead_memio;
 611         } else {
 612                 /* copperhead */
 613                 ha->func.isintr = ips_isintr_copperhead;
 614                 ha->func.isinit = ips_isinit_copperhead;
 615                 ha->func.init = ips_init_copperhead;
 616                 ha->func.statupd = ips_statupd_copperhead;
 617                 ha->func.statinit = ips_statinit;
 618                 ha->func.reset = ips_reset_copperhead;
 619                 ha->func.intr = ips_intr_copperhead;
 620                 ha->func.erasebios = ips_erase_bios;
 621                 ha->func.programbios = ips_program_bios;
 622                 ha->func.verifybios = ips_verify_bios;
 623                 ha->func.enableint = ips_enable_int_copperhead;
 624
 625                 if (IPS_USE_I2O_DELIVER(ha))
 626                         ha->func.issue = ips_issue_i2o;
 627                 else
 628                         ha->func.issue = ips_issue_copperhead;
 629         }
 630 }
 631
 632 /****************************************************************************/
 633 /*                                                                          */
 634 /* Routine Name: ips_release                                                */
 635 /*                                                                          */
 636 /* Routine Description:                                                     */
 637 /*                                                                          */
 638 /*   Remove a driver                                                        */
 639 /*                                                                          */
 640 /****************************************************************************/
 641 static int
 642 ips_release(struct Scsi_Host *sh)
 643 {
 644         ips_scb_t *scb;
 645         ips_ha_t *ha;
 646         int i;
 647
 648         METHOD_TRACE("ips_release", 1);
 649
 650         scsi_remove_host(sh);
 651
 652         for (i = 0; i < IPS_MAX_ADAPTERS && ips_sh[i] != sh; i++) ;
 653
 654         if (i == IPS_MAX_ADAPTERS) {
 655                 printk(KERN_WARNING
 656                        "(%s) release, invalid Scsi_Host pointer.\n", ips_name);
 657                 BUG();
 658                 return (FALSE);
 659         }
 660
 661         ha = IPS_HA(sh);
 662
 663         if (!ha)
 664                 return (FALSE);
 665
 666         /* flush the cache on the controller */
 667         scb = &ha->scbs[ha->max_cmds - 1];
 668
 669         ips_init_scb(ha, scb);
 670
 671         scb->timeout = ips_cmd_timeout;
 672         scb->cdb[0] = IPS_CMD_FLUSH;
 673
 674         scb->cmd.flush_cache.op_code = IPS_CMD_FLUSH;
 675         scb->cmd.flush_cache.command_id = IPS_COMMAND_ID(ha, scb);
 676         scb->cmd.flush_cache.state = IPS_NORM_STATE;
 677         scb->cmd.flush_cache.reserved = 0;
 678         scb->cmd.flush_cache.reserved2 = 0;
 679         scb->cmd.flush_cache.reserved3 = 0;
 680         scb->cmd.flush_cache.reserved4 = 0;
 681
 682         IPS_PRINTK(KERN_WARNING, ha->pcidev, "Flushing Cache.\n");
 683
 684         /* send command */
 685         if (ips_send_wait(ha, scb, ips_cmd_timeout, IPS_INTR_ON) == IPS_FAILURE)
 686                 IPS_PRINTK(KERN_WARNING, ha->pcidev, "Incomplete Flush.\n");
 687
 688         IPS_PRINTK(KERN_WARNING, ha->pcidev, "Flushing Complete.\n");
 689
 690         ips_sh[i] = NULL;
 691         ips_ha[i] = NULL;
 692
 693         /* free extra memory */
 694         ips_free(ha);
 695
 696         /* free IRQ */
 697         free_irq(ha->pcidev->irq, ha);
 698
 699         scsi_host_put(sh);
 700
 701         ips_released_controllers++;
 702
 703         return (FALSE);
 704 }
 705
 706 /****************************************************************************/
 707 /*                                                                          */
 708 /* Routine Name: ips_halt                                                   */
 709 /*                                                                          */
 710 /* Routine Description:                                                     */
 711 /*                                                                          */
 712 /*   Perform cleanup when the system reboots                                */
 713 /*                                                                          */
 714 /****************************************************************************/
 715 static int
 716 ips_halt(struct notifier_block *nb, ulong event, void *buf)
 717 {
 718         ips_scb_t *scb;
 719         ips_ha_t *ha;
 720         int i;
 721
 722         if ((event != SYS_RESTART) && (event != SYS_HALT) &&
 723             (event != SYS_POWER_OFF))
 724                 return (NOTIFY_DONE);
 725
 726         for (i = 0; i < ips_next_controller; i++) {
 727                 ha = (ips_ha_t *) ips_ha[i];
 728
 729                 if (!ha)
 730                         continue;
 731
 732                 if (!ha->active)
 733                         continue;
 734
 735                 /* flush the cache on the controller */
 736                 scb = &ha->scbs[ha->max_cmds - 1];
 737
 738                 ips_init_scb(ha, scb);
 739
 740                 scb->timeout = ips_cmd_timeout;
 741                 scb->cdb[0] = IPS_CMD_FLUSH;
 742
 743                 scb->cmd.flush_cache.op_code = IPS_CMD_FLUSH;
 744                 scb->cmd.flush_cache.command_id = IPS_COMMAND_ID(ha, scb);
 745                 scb->cmd.flush_cache.state = IPS_NORM_STATE;
 746                 scb->cmd.flush_cache.reserved = 0;
 747                 scb->cmd.flush_cache.reserved2 = 0;
 748                 scb->cmd.flush_cache.reserved3 = 0;
 749                 scb->cmd.flush_cache.reserved4 = 0;
 750
 751                 IPS_PRINTK(KERN_WARNING, ha->pcidev, "Flushing Cache.\n");
 752
 753                 /* send command */
 754                 if (ips_send_wait(ha, scb, ips_cmd_timeout, IPS_INTR_ON) ==
 755                     IPS_FAILURE)
 756                         IPS_PRINTK(KERN_WARNING, ha->pcidev,
 757                                    "Incomplete Flush.\n");
 758                 else
 759                         IPS_PRINTK(KERN_WARNING, ha->pcidev,
 760                                    "Flushing Complete.\n");
 761         }
 762
 763         return (NOTIFY_OK);
 764 }
 765
 766 /****************************************************************************/
 767 /*                                                                          */
 768 /* Routine Name: ips_eh_abort                                               */
 769 /*                                                                          */
 770 /* Routine Description:                                                     */
 771 /*                                                                          */
 772 /*   Abort a command (using the new error code stuff)                       */
 773 /* Note: this routine is called under the io_request_lock                   */
 774 /****************************************************************************/
 775 int ips_eh_abort(struct scsi_cmnd *SC)
 776 {
 777         ips_ha_t *ha;
 778         ips_copp_wait_item_t *item;
 779         int ret;
 780         struct Scsi_Host *host;
 781
 782         METHOD_TRACE("ips_eh_abort", 1);
 783
 784         if (!SC)
 785                 return (FAILED);
 786
 787         host = SC->device->host;
 788         ha = (ips_ha_t *) SC->device->host->hostdata;
 789
 790         if (!ha)
 791                 return (FAILED);
 792
 793         if (!ha->active)
 794                 return (FAILED);
 795
 796         spin_lock(host->host_lock);
 797
 798         /* See if the command is on the copp queue */
 799         item = ha->copp_waitlist.head;
 800         while ((item) && (item->scsi_cmd != SC))
 801                 item = item->next;
 802
 803         if (item) {
 804                 /* Found it */
 805                 ips_removeq_copp(&ha->copp_waitlist, item);
 806                 ret = (SUCCESS);
 807
 808                 /* See if the command is on the wait queue */
 809         } else if (ips_removeq_wait(&ha->scb_waitlist, SC)) {
 810                 /* command not sent yet */
 811                 ret = (SUCCESS);
 812         } else {
 813                 /* command must have already been sent */
 814                 ret = (FAILED);
 815         }
 816
 817         spin_unlock(host->host_lock);
 818         return ret;
 819 }
 820
 821 /****************************************************************************/
 822 /*                                                                          */
 823 /* Routine Name: ips_eh_reset                                               */
 824 /*                                                                          */
 825 /* Routine Description:                                                     */
 826 /*                                                                          */
 827 /*   Reset the controller (with new eh error code)                          */
 828 /*                                                                          */
 829 /* NOTE: this routine is called under the io_request_lock spinlock          */
 830 /*                                                                          */
 831 /****************************************************************************/
 832 static int __ips_eh_reset(struct scsi_cmnd *SC)
 833 {
 834         int ret;
 835         int i;
 836         ips_ha_t *ha;
 837         ips_scb_t *scb;
 838         ips_copp_wait_item_t *item;
 839
 840         METHOD_TRACE("ips_eh_reset", 1);
 841
 842 #ifdef NO_IPS_RESET
 843         return (FAILED);
 844 #else
 845
 846         if (!SC) {
 847                 DEBUG(1, "Reset called with NULL scsi command");
 848
 849                 return (FAILED);
 850         }
 851
 852         ha = (ips_ha_t *) SC->device->host->hostdata;
 853
 854         if (!ha) {
 855                 DEBUG(1, "Reset called with NULL ha struct");
 856
 857                 return (FAILED);
 858         }
 859
 860         if (!ha->active)
 861                 return (FAILED);
 862
 863         /* See if the command is on the copp queue */
 864         item = ha->copp_waitlist.head;
 865         while ((item) && (item->scsi_cmd != SC))
 866                 item = item->next;
 867
 868         if (item) {
 869                 /* Found it */
 870                 ips_removeq_copp(&ha->copp_waitlist, item);
 871                 return (SUCCESS);
 872         }
 873
 874         /* See if the command is on the wait queue */
 875         if (ips_removeq_wait(&ha->scb_waitlist, SC)) {
 876                 /* command not sent yet */
 877                 return (SUCCESS);
 878         }
 879
 880         /* An explanation for the casual observer:                              */
 881         /* Part of the function of a RAID controller is automatic error         */
 882         /* detection and recovery.  As such, the only problem that physically   */
 883         /* resetting an adapter will ever fix is when, for some reason,         */
 884         /* the driver is not successfully communicating with the adapter.       */
 885         /* Therefore, we will attempt to flush this adapter.  If that succeeds, */
 886         /* then there's no real purpose in a physical reset. This will complete */
 887         /* much faster and avoids any problems that might be caused by a        */
 888         /* physical reset ( such as having to fail all the outstanding I/O's ). */
 889
 890         if (ha->ioctl_reset == 0) {     /* IF Not an IOCTL Requested Reset */
 891                 scb = &ha->scbs[ha->max_cmds - 1];
 892
 893                 ips_init_scb(ha, scb);
 894
 895                 scb->timeout = ips_cmd_timeout;
 896                 scb->cdb[0] = IPS_CMD_FLUSH;
 897
 898                 scb->cmd.flush_cache.op_code = IPS_CMD_FLUSH;
 899                 scb->cmd.flush_cache.command_id = IPS_COMMAND_ID(ha, scb);
 900                 scb->cmd.flush_cache.state = IPS_NORM_STATE;
 901                 scb->cmd.flush_cache.reserved = 0;
 902                 scb->cmd.flush_cache.reserved2 = 0;
 903                 scb->cmd.flush_cache.reserved3 = 0;
 904                 scb->cmd.flush_cache.reserved4 = 0;
 905
 906                 /* Attempt the flush command */
 907                 ret = ips_send_wait(ha, scb, ips_cmd_timeout, IPS_INTR_IORL);
 908                 if (ret == IPS_SUCCESS) {
 909                         IPS_PRINTK(KERN_NOTICE, ha->pcidev,
 910                                    "Reset Request - Flushed Cache\n");
 911                         return (SUCCESS);
 912                 }
 913         }
 914
 915         /* Either we can't communicate with the adapter or it's an IOCTL request */
 916         /* from a utility.  A physical reset is needed at this point.            */
 917
 918         ha->ioctl_reset = 0;    /* Reset the IOCTL Requested Reset Flag */
 919
 920         /*
 921          * command must have already been sent
 922          * reset the controller
 923          */
 924         IPS_PRINTK(KERN_NOTICE, ha->pcidev, "Resetting controller.\n");
 925         ret = (*ha->func.reset) (ha);
 926
 927         if (!ret) {
 928                 struct scsi_cmnd *scsi_cmd;
 929
 930                 IPS_PRINTK(KERN_NOTICE, ha->pcidev,
 931                            "Controller reset failed - controller now offline.\n");
 932
 933                 /* Now fail all of the active commands */
 934                 DEBUG_VAR(1, "(%s%d) Failing active commands",
 935                           ips_name, ha->host_num);
 936
 937                 while ((scb = ips_removeq_scb_head(&ha->scb_activelist))) {
 938                         scb->scsi_cmd->result = DID_ERROR << 16;
 939                         scb->scsi_cmd->scsi_done(scb->scsi_cmd);
 940                         ips_freescb(ha, scb);
 941                 }
 942
 943                 /* Now fail all of the pending commands */
 944                 DEBUG_VAR(1, "(%s%d) Failing pending commands",
 945                           ips_name, ha->host_num);
 946
 947                 while ((scsi_cmd = ips_removeq_wait_head(&ha->scb_waitlist))) {
 948                         scsi_cmd->result = DID_ERROR;
 949                         scsi_cmd->scsi_done(scsi_cmd);
 950                 }
 951
 952                 ha->active = FALSE;
 953                 return (FAILED);
 954         }
 955
 956         if (!ips_clear_adapter(ha, IPS_INTR_IORL)) {
 957                 struct scsi_cmnd *scsi_cmd;
 958
 959                 IPS_PRINTK(KERN_NOTICE, ha->pcidev,
 960                            "Controller reset failed - controller now offline.\n");
 961
 962                 /* Now fail all of the active commands */
 963                 DEBUG_VAR(1, "(%s%d) Failing active commands",
 964                           ips_name, ha->host_num);
 965
 966                 while ((scb = ips_removeq_scb_head(&ha->scb_activelist))) {
 967                         scb->scsi_cmd->result = DID_ERROR << 16;
 968                         scb->scsi_cmd->scsi_done(scb->scsi_cmd);
 969                         ips_freescb(ha, scb);
 970                 }
 971
 972                 /* Now fail all of the pending commands */
 973                 DEBUG_VAR(1, "(%s%d) Failing pending commands",
 974                           ips_name, ha->host_num);
 975
 976                 while ((scsi_cmd = ips_removeq_wait_head(&ha->scb_waitlist))) {
 977                         scsi_cmd->result = DID_ERROR << 16;
 978                         scsi_cmd->scsi_done(scsi_cmd);
 979                 }
 980
 981                 ha->active = FALSE;
 982                 return (FAILED);
 983         }
 984
 985         /* FFDC */
 986         if (le32_to_cpu(ha->subsys->param[3]) & 0x300000) {
 987                 ha->last_ffdc = ktime_get_real_seconds();
 988                 ha->reset_count++;
 989                 ips_ffdc_reset(ha, IPS_INTR_IORL);
 990         }
 991
 992         /* Now fail all of the active commands */
 993         DEBUG_VAR(1, "(%s%d) Failing active commands", ips_name, ha->host_num);
 994
 995         while ((scb = ips_removeq_scb_head(&ha->scb_activelist))) {
 996                 scb->scsi_cmd->result = DID_RESET << 16;
 997                 scb->scsi_cmd->scsi_done(scb->scsi_cmd);
 998                 ips_freescb(ha, scb);
 999         }
1000
1001         /* Reset DCDB active command bits */
1002         for (i = 1; i < ha->nbus; i++)
1003                 ha->dcdb_active[i - 1] = 0;
1004
1005         /* Reset the number of active IOCTLs */
1006         ha->num_ioctl = 0;
1007
1008         ips_next(ha, IPS_INTR_IORL);
1009
1010         return (SUCCESS);
1011 #endif                          /* NO_IPS_RESET */
1012
1013 }
1014
1015 static int ips_eh_reset(struct scsi_cmnd *SC)
1016 {
1017         int rc;
1018
1019         spin_lock_irq(SC->device->host->host_lock);
1020         rc = __ips_eh_reset(SC);
1021         spin_unlock_irq(SC->device->host->host_lock);
1022
1023         return rc;
1024 }
1025
1026 /****************************************************************************/
1027 /*                                                                          */
1028 /* Routine Name: ips_queue                                                  */
1029 /*                                                                          */
1030 /* Routine Description:                                                     */
1031 /*                                                                          */
1032 /*   Send a command to the controller                                       */
1033 /*                                                                          */
1034 /* NOTE:                                                                    */
1035 /*    Linux obtains io_request_lock before calling this function            */
1036 /*                                                                          */
1037 /****************************************************************************/
1038 static int ips_queue_lck(struct scsi_cmnd *SC, void (*done) (struct scsi_cmnd *))
1039 {
1040         ips_ha_t *ha;
1041         ips_passthru_t *pt;
1042
1043         METHOD_TRACE("ips_queue", 1);
1044
1045         ha = (ips_ha_t *) SC->device->host->hostdata;
1046
1047         if (!ha)
1048                 goto out_error;
1049
1050         if (!ha->active)
1051                 goto out_error;
1052
1053         if (ips_is_passthru(SC)) {
1054                 if (ha->copp_waitlist.count == IPS_MAX_IOCTL_QUEUE) {
1055                         SC->result = DID_BUS_BUSY << 16;
1056                         done(SC);
1057
1058                         return (0);
1059                 }
1060         } else if (ha->scb_waitlist.count == IPS_MAX_QUEUE) {
1061                 SC->result = DID_BUS_BUSY << 16;
1062                 done(SC);
1063
1064                 return (0);
1065         }
1066
1067         SC->scsi_done = done;
1068
1069         DEBUG_VAR(2, "(%s%d): ips_queue: cmd 0x%X (%d %d %d)",
1070                   ips_name,
1071                   ha->host_num,
1072                   SC->cmnd[0],
1073                   SC->device->channel, SC->device->id, SC->device->lun);
1074
1075         /* Check for command to initiator IDs */
1076         if ((scmd_channel(SC) > 0)
1077             && (scmd_id(SC) == ha->ha_id[scmd_channel(SC)])) {
1078                 SC->result = DID_NO_CONNECT << 16;
1079                 done(SC);
1080
1081                 return (0);
1082         }
1083
1084         if (ips_is_passthru(SC)) {
1085
1086                 ips_copp_wait_item_t *scratch;
1087
1088                 /* A Reset IOCTL is only sent by the boot CD in extreme cases.           */
1089                 /* There can never be any system activity ( network or disk ), but check */
1090                 /* anyway just as a good practice.                                       */
1091                 pt = (ips_passthru_t *) scsi_sglist(SC);
1092                 if ((pt->CoppCP.cmd.reset.op_code == IPS_CMD_RESET_CHANNEL) &&
1093                     (pt->CoppCP.cmd.reset.adapter_flag == 1)) {
1094                         if (ha->scb_activelist.count != 0) {
1095                                 SC->result = DID_BUS_BUSY << 16;
1096                                 done(SC);
1097                                 return (0);
1098                         }
1099                         ha->ioctl_reset = 1;    /* This reset request is from an IOCTL */
1100                         __ips_eh_reset(SC);
1101                         SC->result = DID_OK << 16;
1102                         SC->scsi_done(SC);
1103                         return (0);
1104                 }
1105
1106                 /* allocate space for the scribble */
1107                 scratch = kmalloc(sizeof (ips_copp_wait_item_t), GFP_ATOMIC);
1108
1109                 if (!scratch) {
1110                         SC->result = DID_ERROR << 16;
1111                         done(SC);
1112
1113                         return (0);
1114                 }
1115
1116                 scratch->scsi_cmd = SC;
1117                 scratch->next = NULL;
1118
1119                 ips_putq_copp_tail(&ha->copp_waitlist, scratch);
1120         } else {
1121                 ips_putq_wait_tail(&ha->scb_waitlist, SC);
1122         }
1123
1124         ips_next(ha, IPS_INTR_IORL);
1125
1126         return (0);
1127 out_error:
1128         SC->result = DID_ERROR << 16;
1129         done(SC);
1130
1131         return (0);
1132 }
1133
1134 static DEF_SCSI_QCMD(ips_queue)
1135
1136 /****************************************************************************/
1137 /*                                                                          */
1138 /* Routine Name: ips_biosparam                                              */
1139 /*                                                                          */
1140 /* Routine Description:                                                     */
1141 /*                                                                          */
1142 /*   Set bios geometry for the controller                                   */
1143 /*                                                                          */
1144 /****************************************************************************/
1145 static int ips_biosparam(struct scsi_device *sdev, struct block_device *bdev,
1146                          sector_t capacity, int geom[])
1147 {
1148         ips_ha_t *ha = (ips_ha_t *) sdev->host->hostdata;
1149         int heads;
1150         int sectors;
1151         int cylinders;
1152
1153         METHOD_TRACE("ips_biosparam", 1);
1154
1155         if (!ha)
1156                 /* ?!?! host adater info invalid */
1157                 return (0);
1158
1159         if (!ha->active)
1160                 return (0);
1161
1162         if (!ips_read_adapter_status(ha, IPS_INTR_ON))
1163                 /* ?!?! Enquiry command failed */
1164                 return (0);
1165
1166         if ((capacity > 0x400000) && ((ha->enq->ucMiscFlag & 0x8) == 0)) {
1167                 heads = IPS_NORM_HEADS;
1168                 sectors = IPS_NORM_SECTORS;
1169         } else {
1170                 heads = IPS_COMP_HEADS;
1171                 sectors = IPS_COMP_SECTORS;
1172         }
1173
1174         cylinders = (unsigned long) capacity / (heads * sectors);
1175
1176         DEBUG_VAR(2, "Geometry: heads: %d, sectors: %d, cylinders: %d",
1177                   heads, sectors, cylinders);
1178
1179         geom[0] = heads;
1180         geom[1] = sectors;
1181         geom[2] = cylinders;
1182
1183         return (0);
1184 }
1185
1186 /****************************************************************************/
1187 /*                                                                          */
1188 /* Routine Name: ips_slave_configure                                        */
1189 /*                                                                          */
1190 /* Routine Description:                                                     */
1191 /*                                                                          */
1192 /*   Set queue depths on devices once scan is complete                      */
1193 /*                                                                          */
1194 /****************************************************************************/
1195 static int
1196 ips_slave_configure(struct scsi_device * SDptr)
1197 {
1198         ips_ha_t *ha;
1199         int min;
1200
1201         ha = IPS_HA(SDptr->host);
1202         if (SDptr->tagged_supported && SDptr->type == TYPE_DISK) {
1203                 min = ha->max_cmds / 2;
1204                 if (ha->enq->ucLogDriveCount <= 2)
1205                         min = ha->max_cmds - 1;
1206                 scsi_change_queue_depth(SDptr, min);
1207         }
1208
1209         SDptr->skip_ms_page_8 = 1;
1210         SDptr->skip_ms_page_3f = 1;
1211         return 0;
1212 }
1213
1214 /****************************************************************************/
1215 /*                                                                          */
1216 /* Routine Name: do_ipsintr                                                 */
1217 /*                                                                          */
1218 /* Routine Description:                                                     */
1219 /*                                                                          */
1220 /*   Wrapper for the interrupt handler                                      */
1221 /*                                                                          */
1222 /****************************************************************************/
1223 static irqreturn_t
1224 do_ipsintr(int irq, void *dev_id)
1225 {
1226         ips_ha_t *ha;
1227         struct Scsi_Host *host;
1228         int irqstatus;
1229
1230         METHOD_TRACE("do_ipsintr", 2);
1231
1232         ha = (ips_ha_t *) dev_id;
1233         if (!ha)
1234                 return IRQ_NONE;
1235         host = ips_sh[ha->host_num];
1236         /* interrupt during initialization */
1237         if (!host) {
1238                 (*ha->func.intr) (ha);
1239                 return IRQ_HANDLED;
1240         }
1241
1242         spin_lock(host->host_lock);
1243
1244         if (!ha->active) {
1245                 spin_unlock(host->host_lock);
1246                 return IRQ_HANDLED;
1247         }
1248
1249         irqstatus = (*ha->func.intr) (ha);
1250
1251         spin_unlock(host->host_lock);
1252
1253         /* start the next command */
1254         ips_next(ha, IPS_INTR_ON);
1255         return IRQ_RETVAL(irqstatus);
1256 }
1257
1258 /****************************************************************************/
1259 /*                                                                          */
1260 /* Routine Name: ips_intr_copperhead                                        */
1261 /*                                                                          */
1262 /* Routine Description:                                                     */
1263 /*                                                                          */
1264 /*   Polling interrupt handler                                              */
1265 /*                                                                          */
1266 /*   ASSUMES interrupts are disabled                                        */
1267 /*                                                                          */
1268 /****************************************************************************/
1269 int
1270 ips_intr_copperhead(ips_ha_t * ha)
1271 {
1272         ips_stat_t *sp;
1273         ips_scb_t *scb;
1274         IPS_STATUS cstatus;
1275         int intrstatus;
1276
1277         METHOD_TRACE("ips_intr", 2);
1278
1279         if (!ha)
1280                 return 0;
1281
1282         if (!ha->active)
1283                 return 0;
1284
1285         intrstatus = (*ha->func.isintr) (ha);
1286
1287         if (!intrstatus) {
1288                 /*
1289                  * Unexpected/Shared interrupt
1290                  */
1291
1292                 return 0;
1293         }
1294
1295         while (TRUE) {
1296                 sp = &ha->sp;
1297
1298                 intrstatus = (*ha->func.isintr) (ha);
1299
1300                 if (!intrstatus)
1301                         break;
1302                 else
1303                         cstatus.value = (*ha->func.statupd) (ha);
1304
1305                 if (cstatus.fields.command_id > (IPS_MAX_CMDS - 1)) {
1306                         /* Spurious Interrupt ? */
1307                         continue;
1308                 }
1309
1310                 ips_chkstatus(ha, &cstatus);
1311                 scb = (ips_scb_t *) sp->scb_addr;
1312
1313                 /*
1314                  * use the callback function to finish things up
1315                  * NOTE: interrupts are OFF for this
1316                  */
1317                 (*scb->callback) (ha, scb);
1318         }                       /* end while */
1319         return 1;
1320 }
1321
1322 /****************************************************************************/
1323 /*                                                                          */
1324 /* Routine Name: ips_intr_morpheus                                          */
1325 /*                                                                          */
1326 /* Routine Description:                                                     */
1327 /*                                                                          */
1328 /*   Polling interrupt handler                                              */
1329 /*                                                                          */
1330 /*   ASSUMES interrupts are disabled                                        */
1331 /*                                                                          */
1332 /****************************************************************************/
1333 int
1334 ips_intr_morpheus(ips_ha_t * ha)
1335 {
1336         ips_stat_t *sp;
1337         ips_scb_t *scb;
1338         IPS_STATUS cstatus;
1339         int intrstatus;
1340
1341         METHOD_TRACE("ips_intr_morpheus", 2);
1342
1343         if (!ha)
1344                 return 0;
1345
1346         if (!ha->active)
1347                 return 0;
1348
1349         intrstatus = (*ha->func.isintr) (ha);
1350
1351         if (!intrstatus) {
1352                 /*
1353                  * Unexpected/Shared interrupt
1354                  */
1355
1356                 return 0;
1357         }
1358
1359         while (TRUE) {
1360                 sp = &ha->sp;
1361
1362                 intrstatus = (*ha->func.isintr) (ha);
1363
1364                 if (!intrstatus)
1365                         break;
1366                 else
1367                         cstatus.value = (*ha->func.statupd) (ha);
1368
1369                 if (cstatus.value == 0xffffffff)
1370                         /* No more to process */
1371                         break;
1372
1373                 if (cstatus.fields.command_id > (IPS_MAX_CMDS - 1)) {
1374                         IPS_PRINTK(KERN_WARNING, ha->pcidev,
1375                                    "Spurious interrupt; no ccb.\n");
1376
1377                         continue;
1378                 }
1379
1380                 ips_chkstatus(ha, &cstatus);
1381                 scb = (ips_scb_t *) sp->scb_addr;
1382
1383                 /*
1384                  * use the callback function to finish things up
1385                  * NOTE: interrupts are OFF for this
1386                  */
1387                 (*scb->callback) (ha, scb);
1388         }                       /* end while */
1389         return 1;
1390 }
1391
1392 /****************************************************************************/
1393 /*                                                                          */
1394 /* Routine Name: ips_info                                                   */
1395 /*                                                                          */
1396 /* Routine Description:                                                     */
1397 /*                                                                          */
1398 /*   Return info about the driver                                           */
1399 /*                                                                          */
1400 /****************************************************************************/
1401 static const char *
1402 ips_info(struct Scsi_Host *SH)
1403 {
1404         static char buffer[256];
1405         char *bp;
1406         ips_ha_t *ha;
1407
1408         METHOD_TRACE("ips_info", 1);
1409
1410         ha = IPS_HA(SH);
1411
1412         if (!ha)
1413                 return (NULL);
1414
1415         bp = &buffer[0];
1416         memset(bp, 0, sizeof (buffer));
1417
1418         sprintf(bp, "%s%s%s Build %d", "IBM PCI ServeRAID ",
1419                 IPS_VERSION_HIGH, IPS_VERSION_LOW, IPS_BUILD_IDENT);
1420
1421         if (ha->ad_type > 0 && ha->ad_type <= MAX_ADAPTER_NAME) {
1422                 strcat(bp, " <");
1423                 strcat(bp, ips_adapter_name[ha->ad_type - 1]);
1424                 strcat(bp, ">");
1425         }
1426
1427         return (bp);
1428 }
1429
1430 static int
1431 ips_write_info(struct Scsi_Host *host, char *buffer, int length)
1432 {
1433         int i;
1434         ips_ha_t *ha = NULL;
1435
1436         /* Find our host structure */
1437         for (i = 0; i < ips_next_controller; i++) {
1438                 if (ips_sh[i]) {
1439                         if (ips_sh[i] == host) {
1440                                 ha = (ips_ha_t *) ips_sh[i]->hostdata;
1441                                 break;
1442                         }
1443                 }
1444         }
1445
1446         if (!ha)
1447                 return (-EINVAL);
1448
1449         return 0;
1450 }
1451
1452 static int
1453 ips_show_info(struct seq_file *m, struct Scsi_Host *host)
1454 {
1455         int i;
1456         ips_ha_t *ha = NULL;
1457
1458         /* Find our host structure */
1459         for (i = 0; i < ips_next_controller; i++) {
1460                 if (ips_sh[i]) {
1461                         if (ips_sh[i] == host) {
1462                                 ha = (ips_ha_t *) ips_sh[i]->hostdata;
1463                                 break;
1464                         }
1465                 }
1466         }
1467
1468         if (!ha)
1469                 return (-EINVAL);
1470
1471         return ips_host_info(ha, m);
1472 }
1473
1474 /*--------------------------------------------------------------------------*/
1475 /* Helper Functions                                                         */
1476 /*--------------------------------------------------------------------------*/
1477
1478 /****************************************************************************/
1479 /*                                                                          */
1480 /* Routine Name: ips_is_passthru                                            */
1481 /*                                                                          */
1482 /* Routine Description:                                                     */
1483 /*                                                                          */
1484 /*   Determine if the specified SCSI command is really a passthru command   */
1485 /*                                                                          */
1486 /****************************************************************************/
1487 static int ips_is_passthru(struct scsi_cmnd *SC)
1488 {
1489         unsigned long flags;
1490
1491         METHOD_TRACE("ips_is_passthru", 1);
1492
1493         if (!SC)
1494                 return (0);
1495
1496         if ((SC->cmnd[0] == IPS_IOCTL_COMMAND) &&
1497             (SC->device->channel == 0) &&
1498             (SC->device->id == IPS_ADAPTER_ID) &&
1499             (SC->device->lun == 0) && scsi_sglist(SC)) {
1500                 struct scatterlist *sg = scsi_sglist(SC);
1501                 char  *buffer;
1502
1503                 /* kmap_atomic() ensures addressability of the user buffer.*/
1504                 /* local_irq_save() protects the KM_IRQ0 address slot.     */
1505                 local_irq_save(flags);
1506                 buffer = kmap_atomic(sg_page(sg)) + sg->offset;
1507                 if (buffer && buffer[0] == 'C' && buffer[1] == 'O' &&
1508                     buffer[2] == 'P' && buffer[3] == 'P') {
1509                         kunmap_atomic(buffer - sg->offset);
1510                         local_irq_restore(flags);
1511                         return 1;
1512                 }
1513                 kunmap_atomic(buffer - sg->offset);
1514                 local_irq_restore(flags);
1515         }
1516         return 0;
1517 }
1518
1519 /****************************************************************************/
1520 /*                                                                          */
1521 /* Routine Name: ips_alloc_passthru_buffer                                  */
1522 /*                                                                          */
1523 /* Routine Description:                                                     */
1524 /*   allocate a buffer large enough for the ioctl data if the ioctl buffer  */
1525 /*   is too small or doesn't exist                                          */
1526 /****************************************************************************/
1527 static int
1528 ips_alloc_passthru_buffer(ips_ha_t * ha, int length)
1529 {
1530         void *bigger_buf;
1531         dma_addr_t dma_busaddr;
1532
1533         if (ha->ioctl_data && length <= ha->ioctl_len)
1534                 return 0;
1535         /* there is no buffer or it's not big enough, allocate a new one */
1536         bigger_buf = dma_alloc_coherent(&ha->pcidev->dev, length, &dma_busaddr,
1537                         GFP_KERNEL);
1538         if (bigger_buf) {
1539                 /* free the old memory */
1540                 dma_free_coherent(&ha->pcidev->dev, ha->ioctl_len,
1541                                   ha->ioctl_data, ha->ioctl_busaddr);
1542                 /* use the new memory */
1543                 ha->ioctl_data = (char *) bigger_buf;
1544                 ha->ioctl_len = length;
1545                 ha->ioctl_busaddr = dma_busaddr;
1546         } else {
1547                 return -1;
1548         }
1549         return 0;
1550 }
1551
1552 /****************************************************************************/
1553 /*                                                                          */
1554 /* Routine Name: ips_make_passthru                                          */
1555 /*                                                                          */
1556 /* Routine Description:                                                     */
1557 /*                                                                          */
1558 /*   Make a passthru command out of the info in the Scsi block              */
1559 /*                                                                          */
1560 /****************************************************************************/
1561 static int
1562 ips_make_passthru(ips_ha_t *ha, struct scsi_cmnd *SC, ips_scb_t *scb, int intr)
1563 {
1564         ips_passthru_t *pt;
1565         int length = 0;
1566         int i, ret;
1567         struct scatterlist *sg = scsi_sglist(SC);
1568
1569         METHOD_TRACE("ips_make_passthru", 1);
1570
1571         scsi_for_each_sg(SC, sg, scsi_sg_count(SC), i)
1572                 length += sg->length;
1573
1574         if (length < sizeof (ips_passthru_t)) {
1575                 /* wrong size */
1576                 DEBUG_VAR(1, "(%s%d) Passthru structure wrong size",
1577                           ips_name, ha->host_num);
1578                 return (IPS_FAILURE);
1579         }
1580         if (ips_alloc_passthru_buffer(ha, length)) {
1581                 /* allocation failure!  If ha->ioctl_data exists, use it to return
1582                    some error codes.  Return a failed command to the scsi layer. */
1583                 if (ha->ioctl_data) {
1584                         pt = (ips_passthru_t *) ha->ioctl_data;
1585                         ips_scmd_buf_read(SC, pt, sizeof (ips_passthru_t));
1586                         pt->BasicStatus = 0x0B;
1587                         pt->ExtendedStatus = 0x00;
1588                         ips_scmd_buf_write(SC, pt, sizeof (ips_passthru_t));
1589                 }
1590                 return IPS_FAILURE;
1591         }
1592         ha->ioctl_datasize = length;
1593
1594         ips_scmd_buf_read(SC, ha->ioctl_data, ha->ioctl_datasize);
1595         pt = (ips_passthru_t *) ha->ioctl_data;
1596
1597         /*
1598          * Some notes about the passthru interface used
1599          *
1600          * IF the scsi op_code == 0x0d then we assume
1601          * that the data came along with/goes with the
1602          * packet we received from the sg driver. In this
1603          * case the CmdBSize field of the pt structure is
1604          * used for the size of the buffer.
1605          */
1606
1607         switch (pt->CoppCmd) {
1608         case IPS_NUMCTRLS:
1609                 memcpy(ha->ioctl_data + sizeof (ips_passthru_t),
1610                        &ips_num_controllers, sizeof (int));
1611                 ips_scmd_buf_write(SC, ha->ioctl_data,
1612                                    sizeof (ips_passthru_t) + sizeof (int));
1613                 SC->result = DID_OK << 16;
1614
1615                 return (IPS_SUCCESS_IMM);
1616
1617         case IPS_COPPUSRCMD:
1618         case IPS_COPPIOCCMD:
1619                 if (SC->cmnd[0] == IPS_IOCTL_COMMAND) {
1620                         if (length < (sizeof (ips_passthru_t) + pt->CmdBSize)) {
1621                                 /* wrong size */
1622                                 DEBUG_VAR(1,
1623                                           "(%s%d) Passthru structure wrong size",
1624                                           ips_name, ha->host_num);
1625
1626                                 return (IPS_FAILURE);
1627                         }
1628
1629                         if (ha->pcidev->device == IPS_DEVICEID_COPPERHEAD &&
1630                             pt->CoppCP.cmd.flashfw.op_code ==
1631                             IPS_CMD_RW_BIOSFW) {
1632                                 ret = ips_flash_copperhead(ha, pt, scb);
1633                                 ips_scmd_buf_write(SC, ha->ioctl_data,
1634                                                    sizeof (ips_passthru_t));
1635                                 return ret;
1636                         }
1637                         if (ips_usrcmd(ha, pt, scb))
1638                                 return (IPS_SUCCESS);
1639                         else
1640                                 return (IPS_FAILURE);
1641                 }
1642
1643                 break;
1644
1645         }                       /* end switch */
1646
1647         return (IPS_FAILURE);
1648 }
1649
1650 /****************************************************************************/
1651 /* Routine Name: ips_flash_copperhead                                       */
1652 /* Routine Description:                                                     */
1653 /*   Flash the BIOS/FW on a Copperhead style controller                     */
1654 /****************************************************************************/
1655 static int
1656 ips_flash_copperhead(ips_ha_t * ha, ips_passthru_t * pt, ips_scb_t * scb)
1657 {
1658         int datasize;
1659
1660         /* Trombone is the only copperhead that can do packet flash, but only
1661          * for firmware. No one said it had to make sense. */
1662         if (IPS_IS_TROMBONE(ha) && pt->CoppCP.cmd.flashfw.type == IPS_FW_IMAGE) {
1663                 if (ips_usrcmd(ha, pt, scb))
1664                         return IPS_SUCCESS;
1665                 else
1666                         return IPS_FAILURE;
1667         }
1668         pt->BasicStatus = 0x0B;
1669         pt->ExtendedStatus = 0;
1670         scb->scsi_cmd->result = DID_OK << 16;
1671         /* IF it's OK to Use the "CD BOOT" Flash Buffer, then you can     */
1672         /* avoid allocating a huge buffer per adapter ( which can fail ). */
1673         if (pt->CoppCP.cmd.flashfw.type == IPS_BIOS_IMAGE &&
1674             pt->CoppCP.cmd.flashfw.direction == IPS_ERASE_BIOS) {
1675                 pt->BasicStatus = 0;
1676                 return ips_flash_bios(ha, pt, scb);
1677         } else if (pt->CoppCP.cmd.flashfw.packet_num == 0) {
1678                 if (ips_FlashData && !test_and_set_bit(0, &ips_FlashDataInUse)){
1679                         ha->flash_data = ips_FlashData;
1680                         ha->flash_busaddr = ips_flashbusaddr;
1681                         ha->flash_len = PAGE_SIZE << 7;
1682                         ha->flash_datasize = 0;
1683                 } else if (!ha->flash_data) {
1684                         datasize = pt->CoppCP.cmd.flashfw.total_packets *
1685                             pt->CoppCP.cmd.flashfw.count;
1686                         ha->flash_data = dma_alloc_coherent(&ha->pcidev->dev,
1687                                         datasize, &ha->flash_busaddr, GFP_KERNEL);
1688                         if (!ha->flash_data){
1689                                 printk(KERN_WARNING "Unable to allocate a flash buffer\n");
1690                                 return IPS_FAILURE;
1691                         }
1692                         ha->flash_datasize = 0;
1693                         ha->flash_len = datasize;
1694                 } else
1695                         return IPS_FAILURE;
1696         } else {
1697                 if (pt->CoppCP.cmd.flashfw.count + ha->flash_datasize >
1698                     ha->flash_len) {
1699                         ips_free_flash_copperhead(ha);
1700                         IPS_PRINTK(KERN_WARNING, ha->pcidev,
1701                                    "failed size sanity check\n");
1702                         return IPS_FAILURE;
1703                 }
1704         }
1705         if (!ha->flash_data)
1706                 return IPS_FAILURE;
1707         pt->BasicStatus = 0;
1708         memcpy(&ha->flash_data[ha->flash_datasize], pt + 1,
1709                pt->CoppCP.cmd.flashfw.count);
1710         ha->flash_datasize += pt->CoppCP.cmd.flashfw.count;
1711         if (pt->CoppCP.cmd.flashfw.packet_num ==
1712             pt->CoppCP.cmd.flashfw.total_packets - 1) {
1713                 if (pt->CoppCP.cmd.flashfw.type == IPS_BIOS_IMAGE)
1714                         return ips_flash_bios(ha, pt, scb);
1715                 else if (pt->CoppCP.cmd.flashfw.type == IPS_FW_IMAGE)
1716                         return ips_flash_firmware(ha, pt, scb);
1717         }
1718         return IPS_SUCCESS_IMM;
1719 }
1720
1721 /****************************************************************************/
1722 /* Routine Name: ips_flash_bios                                             */
1723 /* Routine Description:                                                     */
1724 /*   flashes the bios of a copperhead adapter                               */
1725 /****************************************************************************/
1726 static int
1727 ips_flash_bios(ips_ha_t * ha, ips_passthru_t * pt, ips_scb_t * scb)
1728 {
1729
1730         if (pt->CoppCP.cmd.flashfw.type == IPS_BIOS_IMAGE &&
1731             pt->CoppCP.cmd.flashfw.direction == IPS_WRITE_BIOS) {
1732                 if ((!ha->func.programbios) || (!ha->func.erasebios) ||
1733                     (!ha->func.verifybios))
1734                         goto error;
1735                 if ((*ha->func.erasebios) (ha)) {
1736                         DEBUG_VAR(1,
1737                                   "(%s%d) flash bios failed - unable to erase flash",
1738                                   ips_name, ha->host_num);
1739                         goto error;
1740                 } else
1741                     if ((*ha->func.programbios) (ha,
1742                                                  ha->flash_data +
1743                                                  IPS_BIOS_HEADER,
1744                                                  ha->flash_datasize -
1745                                                  IPS_BIOS_HEADER, 0)) {
1746                         DEBUG_VAR(1,
1747                                   "(%s%d) flash bios failed - unable to flash",
1748                                   ips_name, ha->host_num);
1749                         goto error;
1750                 } else
1751                     if ((*ha->func.verifybios) (ha,
1752                                                 ha->flash_data +
1753                                                 IPS_BIOS_HEADER,
1754                                                 ha->flash_datasize -
1755                                                 IPS_BIOS_HEADER, 0)) {
1756                         DEBUG_VAR(1,
1757                                   "(%s%d) flash bios failed - unable to verify flash",
1758                                   ips_name, ha->host_num);
1759                         goto error;
1760                 }
1761                 ips_free_flash_copperhead(ha);
1762                 return IPS_SUCCESS_IMM;
1763         } else if (pt->CoppCP.cmd.flashfw.type == IPS_BIOS_IMAGE &&
1764                    pt->CoppCP.cmd.flashfw.direction == IPS_ERASE_BIOS) {
1765                 if (!ha->func.erasebios)
1766                         goto error;
1767                 if ((*ha->func.erasebios) (ha)) {
1768                         DEBUG_VAR(1,
1769                                   "(%s%d) flash bios failed - unable to erase flash",
1770                                   ips_name, ha->host_num);
1771                         goto error;
1772                 }
1773                 return IPS_SUCCESS_IMM;
1774         }
1775       error:
1776         pt->BasicStatus = 0x0B;
1777         pt->ExtendedStatus = 0x00;
1778         ips_free_flash_copperhead(ha);
1779         return IPS_FAILURE;
1780 }
1781
1782 /****************************************************************************/
1783 /*                                                                          */
1784 /* Routine Name: ips_fill_scb_sg_single                                     */
1785 /*                                                                          */
1786 /* Routine Description:                                                     */
1787 /*   Fill in a single scb sg_list element from an address                   */
1788 /*   return a -1 if a breakup occurred                                      */
1789 /****************************************************************************/
1790 static int
1791 ips_fill_scb_sg_single(ips_ha_t * ha, dma_addr_t busaddr,
1792                        ips_scb_t * scb, int indx, unsigned int e_len)
1793 {
1794
1795         int ret_val = 0;
1796
1797         if ((scb->data_len + e_len) > ha->max_xfer) {
1798                 e_len = ha->max_xfer - scb->data_len;
1799                 scb->breakup = indx;
1800                 ++scb->sg_break;
1801                 ret_val = -1;
1802         } else {
1803                 scb->breakup = 0;
1804                 scb->sg_break = 0;
1805         }
1806         if (IPS_USE_ENH_SGLIST(ha)) {
1807                 scb->sg_list.enh_list[indx].address_lo =
1808                     cpu_to_le32(lower_32_bits(busaddr));
1809                 scb->sg_list.enh_list[indx].address_hi =
1810                     cpu_to_le32(upper_32_bits(busaddr));
1811                 scb->sg_list.enh_list[indx].length = cpu_to_le32(e_len);
1812         } else {
1813                 scb->sg_list.std_list[indx].address =
1814                     cpu_to_le32(lower_32_bits(busaddr));
1815                 scb->sg_list.std_list[indx].length = cpu_to_le32(e_len);
1816         }
1817
1818         ++scb->sg_len;
1819         scb->data_len += e_len;
1820         return ret_val;
1821 }
1822
1823 /****************************************************************************/
1824 /* Routine Name: ips_flash_firmware                                         */
1825 /* Routine Description:                                                     */
1826 /*   flashes the firmware of a copperhead adapter                           */
1827 /****************************************************************************/
1828 static int
1829 ips_flash_firmware(ips_ha_t * ha, ips_passthru_t * pt, ips_scb_t * scb)
1830 {
1831         IPS_SG_LIST sg_list;
1832         uint32_t cmd_busaddr;
1833
1834         if (pt->CoppCP.cmd.flashfw.type == IPS_FW_IMAGE &&
1835             pt->CoppCP.cmd.flashfw.direction == IPS_WRITE_FW) {
1836                 memset(&pt->CoppCP.cmd, 0, sizeof (IPS_HOST_COMMAND));
1837                 pt->CoppCP.cmd.flashfw.op_code = IPS_CMD_DOWNLOAD;
1838                 pt->CoppCP.cmd.flashfw.count = cpu_to_le32(ha->flash_datasize);
1839         } else {
1840                 pt->BasicStatus = 0x0B;
1841                 pt->ExtendedStatus = 0x00;
1842                 ips_free_flash_copperhead(ha);
1843                 return IPS_FAILURE;
1844         }
1845         /* Save the S/G list pointer so it doesn't get clobbered */
1846         sg_list.list = scb->sg_list.list;
1847         cmd_busaddr = scb->scb_busaddr;
1848         /* copy in the CP */
1849         memcpy(&scb->cmd, &pt->CoppCP.cmd, sizeof (IPS_IOCTL_CMD));
1850         /* FIX stuff that might be wrong */
1851         scb->sg_list.list = sg_list.list;
1852         scb->scb_busaddr = cmd_busaddr;
1853         scb->bus = scb->scsi_cmd->device->channel;
1854         scb->target_id = scb->scsi_cmd->device->id;
1855         scb->lun = scb->scsi_cmd->device->lun;
1856         scb->sg_len = 0;
1857         scb->data_len = 0;
1858         scb->flags = 0;
1859         scb->op_code = 0;
1860         scb->callback = ipsintr_done;
1861         scb->timeout = ips_cmd_timeout;
1862
1863         scb->data_len = ha->flash_datasize;
1864         scb->data_busaddr =
1865             dma_map_single(&ha->pcidev->dev, ha->flash_data, scb->data_len,
1866                            IPS_DMA_DIR(scb));
1867         scb->flags |= IPS_SCB_MAP_SINGLE;
1868         scb->cmd.flashfw.command_id = IPS_COMMAND_ID(ha, scb);
1869         scb->cmd.flashfw.buffer_addr = cpu_to_le32(scb->data_busaddr);
1870         if (pt->TimeOut)
1871                 scb->timeout = pt->TimeOut;
1872         scb->scsi_cmd->result = DID_OK << 16;
1873         return IPS_SUCCESS;
1874 }
1875
1876 /****************************************************************************/
1877 /* Routine Name: ips_free_flash_copperhead                                  */
1878 /* Routine Description:                                                     */
1879 /*   release the memory resources used to hold the flash image              */
1880 /****************************************************************************/
1881 static void
1882 ips_free_flash_copperhead(ips_ha_t * ha)
1883 {
1884         if (ha->flash_data == ips_FlashData)
1885                 test_and_clear_bit(0, &ips_FlashDataInUse);
1886         else if (ha->flash_data)
1887                 dma_free_coherent(&ha->pcidev->dev, ha->flash_len,
1888                                   ha->flash_data, ha->flash_busaddr);
1889         ha->flash_data = NULL;
1890 }
1891
1892 /****************************************************************************/
1893 /*                                                                          */
1894 /* Routine Name: ips_usrcmd                                                 */
1895 /*                                                                          */
1896 /* Routine Description:                                                     */
1897 /*                                                                          */
1898 /*   Process a user command and make it ready to send                       */
1899 /*                                                                          */
1900 /****************************************************************************/
1901 static int
1902 ips_usrcmd(ips_ha_t * ha, ips_passthru_t * pt, ips_scb_t * scb)
1903 {
1904         IPS_SG_LIST sg_list;
1905         uint32_t cmd_busaddr;
1906
1907         METHOD_TRACE("ips_usrcmd", 1);
1908
1909         if ((!scb) || (!pt) || (!ha))
1910                 return (0);
1911
1912         /* Save the S/G list pointer so it doesn't get clobbered */
1913         sg_list.list = scb->sg_list.list;
1914         cmd_busaddr = scb->scb_busaddr;
1915         /* copy in the CP */
1916         memcpy(&scb->cmd, &pt->CoppCP.cmd, sizeof (IPS_IOCTL_CMD));
1917         memcpy(&scb->dcdb, &pt->CoppCP.dcdb, sizeof (IPS_DCDB_TABLE));
1918
1919         /* FIX stuff that might be wrong */
1920         scb->sg_list.list = sg_list.list;
1921         scb->scb_busaddr = cmd_busaddr;
1922         scb->bus = scb->scsi_cmd->device->channel;
1923         scb->target_id = scb->scsi_cmd->device->id;
1924         scb->lun = scb->scsi_cmd->device->lun;
1925         scb->sg_len = 0;
1926         scb->data_len = 0;
1927         scb->flags = 0;
1928         scb->op_code = 0;
1929         scb->callback = ipsintr_done;
1930         scb->timeout = ips_cmd_timeout;
1931         scb->cmd.basic_io.command_id = IPS_COMMAND_ID(ha, scb);
1932
1933         /* we don't support DCDB/READ/WRITE Scatter Gather */
1934         if ((scb->cmd.basic_io.op_code == IPS_CMD_READ_SG) ||
1935             (scb->cmd.basic_io.op_code == IPS_CMD_WRITE_SG) ||
1936             (scb->cmd.basic_io.op_code == IPS_CMD_DCDB_SG))
1937                 return (0);
1938
1939         if (pt->CmdBSize) {
1940                 scb->data_len = pt->CmdBSize;
1941                 scb->data_busaddr = ha->ioctl_busaddr + sizeof (ips_passthru_t);
1942         } else {
1943                 scb->data_busaddr = 0L;
1944         }
1945
1946         if (scb->cmd.dcdb.op_code == IPS_CMD_DCDB)
1947                 scb->cmd.dcdb.dcdb_address = cpu_to_le32(scb->scb_busaddr +
1948                                                          (unsigned long) &scb->
1949                                                          dcdb -
1950                                                          (unsigned long) scb);
1951
1952         if (pt->CmdBSize) {
1953                 if (scb->cmd.dcdb.op_code == IPS_CMD_DCDB)
1954                         scb->dcdb.buffer_pointer =
1955                             cpu_to_le32(scb->data_busaddr);
1956                 else
1957                         scb->cmd.basic_io.sg_addr =
1958                             cpu_to_le32(scb->data_busaddr);
1959         }
1960
1961         /* set timeouts */
1962         if (pt->TimeOut) {
1963                 scb->timeout = pt->TimeOut;
1964
1965                 if (pt->TimeOut <= 10)
1966                         scb->dcdb.cmd_attribute |= IPS_TIMEOUT10;
1967                 else if (pt->TimeOut <= 60)
1968                         scb->dcdb.cmd_attribute |= IPS_TIMEOUT60;
1969                 else
1970                         scb->dcdb.cmd_attribute |= IPS_TIMEOUT20M;
1971         }
1972
1973         /* assume success */
1974         scb->scsi_cmd->result = DID_OK << 16;
1975
1976         /* success */
1977         return (1);
1978 }
1979
1980 /****************************************************************************/
1981 /*                                                                          */
1982 /* Routine Name: ips_cleanup_passthru                                       */
1983 /*                                                                          */
1984 /* Routine Description:                                                     */
1985 /*                                                                          */
1986 /*   Cleanup after a passthru command                                       */
1987 /*                                                                          */
1988 /****************************************************************************/
1989 static void
1990 ips_cleanup_passthru(ips_ha_t * ha, ips_scb_t * scb)
1991 {
1992         ips_passthru_t *pt;
1993
1994         METHOD_TRACE("ips_cleanup_passthru", 1);
1995
1996         if ((!scb) || (!scb->scsi_cmd) || (!scsi_sglist(scb->scsi_cmd))) {
1997                 DEBUG_VAR(1, "(%s%d) couldn't cleanup after passthru",
1998                           ips_name, ha->host_num);
1999
2000                 return;
2001         }
2002         pt = (ips_passthru_t *) ha->ioctl_data;
2003
2004         /* Copy data back to the user */
2005         if (scb->cmd.dcdb.op_code == IPS_CMD_DCDB)      /* Copy DCDB Back to Caller's Area */
2006                 memcpy(&pt->CoppCP.dcdb, &scb->dcdb, sizeof (IPS_DCDB_TABLE));
2007
2008         pt->BasicStatus = scb->basic_status;
2009         pt->ExtendedStatus = scb->extended_status;
2010         pt->AdapterType = ha->ad_type;
2011
2012         if (ha->pcidev->device == IPS_DEVICEID_COPPERHEAD &&
2013             (scb->cmd.flashfw.op_code == IPS_CMD_DOWNLOAD ||
2014              scb->cmd.flashfw.op_code == IPS_CMD_RW_BIOSFW))
2015                 ips_free_flash_copperhead(ha);
2016
2017         ips_scmd_buf_write(scb->scsi_cmd, ha->ioctl_data, ha->ioctl_datasize);
2018 }
2019
2020 /****************************************************************************/
2021 /*                                                                          */
2022 /* Routine Name: ips_host_info                                              */
2023 /*                                                                          */
2024 /* Routine Description:                                                     */
2025 /*                                                                          */
2026 /*   The passthru interface for the driver                                  */
2027 /*                                                                          */
2028 /****************************************************************************/
2029 static int
2030 ips_host_info(ips_ha_t *ha, struct seq_file *m)
2031 {
2032         METHOD_TRACE("ips_host_info", 1);
2033
2034         seq_puts(m, "\nIBM ServeRAID General Information:\n\n");
2035
2036         if ((le32_to_cpu(ha->nvram->signature) == IPS_NVRAM_P5_SIG) &&
2037             (le16_to_cpu(ha->nvram->adapter_type) != 0))
2038                 seq_printf(m, "\tController Type                   : %s\n",
2039                           ips_adapter_name[ha->ad_type - 1]);
2040         else
2041                 seq_puts(m, "\tController Type                   : Unknown\n");
2042
2043         if (ha->io_addr)
2044                 seq_printf(m,
2045                           "\tIO region                         : 0x%x (%d bytes)\n",
2046                           ha->io_addr, ha->io_len);
2047
2048         if (ha->mem_addr) {
2049                 seq_printf(m,
2050                           "\tMemory region                     : 0x%x (%d bytes)\n",
2051                           ha->mem_addr, ha->mem_len);
2052                 seq_printf(m,
2053                           "\tShared memory address             : 0x%lx\n",
2054                           (unsigned long)ha->mem_ptr);
2055         }
2056
2057         seq_printf(m, "\tIRQ number                        : %d\n", ha->pcidev->irq);
2058
2059     /* For the Next 3 lines Check for Binary 0 at the end and don't include it if it's there. */
2060     /* That keeps everything happy for "text" operations on the proc file.                    */
2061
2062         if (le32_to_cpu(ha->nvram->signature) == IPS_NVRAM_P5_SIG) {
2063         if (ha->nvram->bios_low[3] == 0) {
2064                 seq_printf(m,
2065                           "\tBIOS Version                      : %c%c%c%c%c%c%c\n",
2066                           ha->nvram->bios_high[0], ha->nvram->bios_high[1],
2067                           ha->nvram->bios_high[2], ha->nvram->bios_high[3],
2068                           ha->nvram->bios_low[0], ha->nvram->bios_low[1],
2069                           ha->nvram->bios_low[2]);
2070
2071         } else {
2072                 seq_printf(m,
2073                           "\tBIOS Version                      : %c%c%c%c%c%c%c%c\n",
2074                           ha->nvram->bios_high[0], ha->nvram->bios_high[1],
2075                           ha->nvram->bios_high[2], ha->nvram->bios_high[3],
2076                           ha->nvram->bios_low[0], ha->nvram->bios_low[1],
2077                           ha->nvram->bios_low[2], ha->nvram->bios_low[3]);
2078         }
2079
2080     }
2081
2082     if (ha->enq->CodeBlkVersion[7] == 0) {
2083         seq_printf(m,
2084                   "\tFirmware Version                  : %c%c%c%c%c%c%c\n",
2085                   ha->enq->CodeBlkVersion[0], ha->enq->CodeBlkVersion[1],
2086                   ha->enq->CodeBlkVersion[2], ha->enq->CodeBlkVersion[3],
2087                   ha->enq->CodeBlkVersion[4], ha->enq->CodeBlkVersion[5],
2088                   ha->enq->CodeBlkVersion[6]);
2089     } else {
2090         seq_printf(m,
2091                   "\tFirmware Version                  : %c%c%c%c%c%c%c%c\n",
2092                   ha->enq->CodeBlkVersion[0], ha->enq->CodeBlkVersion[1],
2093                   ha->enq->CodeBlkVersion[2], ha->enq->CodeBlkVersion[3],
2094                   ha->enq->CodeBlkVersion[4], ha->enq->CodeBlkVersion[5],
2095                   ha->enq->CodeBlkVersion[6], ha->enq->CodeBlkVersion[7]);
2096     }
2097
2098     if (ha->enq->BootBlkVersion[7] == 0) {
2099         seq_printf(m,
2100                   "\tBoot Block Version                : %c%c%c%c%c%c%c\n",
2101                   ha->enq->BootBlkVersion[0], ha->enq->BootBlkVersion[1],
2102                   ha->enq->BootBlkVersion[2], ha->enq->BootBlkVersion[3],
2103                   ha->enq->BootBlkVersion[4], ha->enq->BootBlkVersion[5],
2104                   ha->enq->BootBlkVersion[6]);
2105     } else {
2106         seq_printf(m,
2107                   "\tBoot Block Version                : %c%c%c%c%c%c%c%c\n",
2108                   ha->enq->BootBlkVersion[0], ha->enq->BootBlkVersion[1],
2109                   ha->enq->BootBlkVersion[2], ha->enq->BootBlkVersion[3],
2110                   ha->enq->BootBlkVersion[4], ha->enq->BootBlkVersion[5],
2111                   ha->enq->BootBlkVersion[6], ha->enq->BootBlkVersion[7]);
2112     }
2113
2114         seq_printf(m, "\tDriver Version                    : %s%s\n",
2115                   IPS_VERSION_HIGH, IPS_VERSION_LOW);
2116
2117         seq_printf(m, "\tDriver Build                      : %d\n",
2118                   IPS_BUILD_IDENT);
2119
2120         seq_printf(m, "\tMax Physical Devices              : %d\n",
2121                   ha->enq->ucMaxPhysicalDevices);
2122         seq_printf(m, "\tMax Active Commands               : %d\n",
2123                   ha->max_cmds);
2124         seq_printf(m, "\tCurrent Queued Commands           : %d\n",
2125                   ha->scb_waitlist.count);
2126         seq_printf(m, "\tCurrent Active Commands           : %d\n",
2127                   ha->scb_activelist.count - ha->num_ioctl);
2128         seq_printf(m, "\tCurrent Queued PT Commands        : %d\n",
2129                   ha->copp_waitlist.count);
2130         seq_printf(m, "\tCurrent Active PT Commands        : %d\n",
2131                   ha->num_ioctl);
2132
2133         seq_putc(m, '\n');
2134
2135         return 0;
2136 }
2137
2138 /****************************************************************************/
2139 /*                                                                          */
2140 /* Routine Name: ips_identify_controller                                    */
2141 /*                                                                          */
2142 /* Routine Description:                                                     */
2143 /*                                                                          */
2144 /*   Identify this controller                                               */
2145 /*                                                                          */
2146 /****************************************************************************/
2147 static void
2148 ips_identify_controller(ips_ha_t * ha)
2149 {
2150         METHOD_TRACE("ips_identify_controller", 1);
2151
2152         switch (ha->pcidev->device) {
2153         case IPS_DEVICEID_COPPERHEAD:
2154                 if (ha->pcidev->revision <= IPS_REVID_SERVERAID) {
2155                         ha->ad_type = IPS_ADTYPE_SERVERAID;
2156                 } else if (ha->pcidev->revision == IPS_REVID_SERVERAID2) {
2157                         ha->ad_type = IPS_ADTYPE_SERVERAID2;
2158                 } else if (ha->pcidev->revision == IPS_REVID_NAVAJO) {
2159                         ha->ad_type = IPS_ADTYPE_NAVAJO;
2160                 } else if ((ha->pcidev->revision == IPS_REVID_SERVERAID2)
2161                            && (ha->slot_num == 0)) {
2162                         ha->ad_type = IPS_ADTYPE_KIOWA;
2163                 } else if ((ha->pcidev->revision >= IPS_REVID_CLARINETP1) &&
2164                            (ha->pcidev->revision <= IPS_REVID_CLARINETP3)) {
2165                         if (ha->enq->ucMaxPhysicalDevices == 15)
2166                                 ha->ad_type = IPS_ADTYPE_SERVERAID3L;
2167                         else
2168                                 ha->ad_type = IPS_ADTYPE_SERVERAID3;
2169                 } else if ((ha->pcidev->revision >= IPS_REVID_TROMBONE32) &&
2170                            (ha->pcidev->revision <= IPS_REVID_TROMBONE64)) {
2171                         ha->ad_type = IPS_ADTYPE_SERVERAID4H;
2172                 }
2173                 break;
2174
2175         case IPS_DEVICEID_MORPHEUS:
2176                 switch (ha->pcidev->subsystem_device) {
2177                 case IPS_SUBDEVICEID_4L:
2178                         ha->ad_type = IPS_ADTYPE_SERVERAID4L;
2179                         break;
2180
2181                 case IPS_SUBDEVICEID_4M:
2182                         ha->ad_type = IPS_ADTYPE_SERVERAID4M;
2183                         break;
2184
2185                 case IPS_SUBDEVICEID_4MX:
2186                         ha->ad_type = IPS_ADTYPE_SERVERAID4MX;
2187                         break;
2188
2189                 case IPS_SUBDEVICEID_4LX:
2190                         ha->ad_type = IPS_ADTYPE_SERVERAID4LX;
2191                         break;
2192
2193                 case IPS_SUBDEVICEID_5I2:
2194                         ha->ad_type = IPS_ADTYPE_SERVERAID5I2;
2195                         break;
2196
2197                 case IPS_SUBDEVICEID_5I1:
2198                         ha->ad_type = IPS_ADTYPE_SERVERAID5I1;
2199                         break;
2200                 }
2201
2202                 break;
2203
2204         case IPS_DEVICEID_MARCO:
2205                 switch (ha->pcidev->subsystem_device) {
2206                 case IPS_SUBDEVICEID_6M:
2207                         ha->ad_type = IPS_ADTYPE_SERVERAID6M;
2208                         break;
2209                 case IPS_SUBDEVICEID_6I:
2210                         ha->ad_type = IPS_ADTYPE_SERVERAID6I;
2211                         break;
2212                 case IPS_SUBDEVICEID_7k:
2213                         ha->ad_type = IPS_ADTYPE_SERVERAID7k;
2214                         break;
2215                 case IPS_SUBDEVICEID_7M:
2216                         ha->ad_type = IPS_ADTYPE_SERVERAID7M;
2217                         break;
2218                 }
2219                 break;
2220         }
2221 }
2222
2223 /****************************************************************************/
2224 /*                                                                          */
2225 /* Routine Name: ips_get_bios_version                                       */
2226 /*                                                                          */
2227 /* Routine Description:                                                     */
2228 /*                                                                          */
2229 /*   Get the BIOS revision number                                           */
2230 /*                                                                          */
2231 /****************************************************************************/
2232 static void
2233 ips_get_bios_version(ips_ha_t * ha, int intr)
2234 {
2235         ips_scb_t *scb;
2236         int ret;
2237         uint8_t major;
2238         uint8_t minor;
2239         uint8_t subminor;
2240         uint8_t *buffer;
2241
2242         METHOD_TRACE("ips_get_bios_version", 1);
2243
2244         major = 0;
2245         minor = 0;
2246
2247         memcpy(ha->bios_version, "       ?", 8);
2248
2249         if (ha->pcidev->device == IPS_DEVICEID_COPPERHEAD) {
2250                 if (IPS_USE_MEMIO(ha)) {
2251                         /* Memory Mapped I/O */
2252
2253                         /* test 1st byte */
2254                         writel(0, ha->mem_ptr + IPS_REG_FLAP);
2255                         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
2256                                 udelay(25);     /* 25 us */
2257
2258                         if (readb(ha->mem_ptr + IPS_REG_FLDP) != 0x55)
2259                                 return;
2260
2261                         writel(1, ha->mem_ptr + IPS_REG_FLAP);
2262                         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
2263                                 udelay(25);     /* 25 us */
2264
2265                         if (readb(ha->mem_ptr + IPS_REG_FLDP) != 0xAA)
2266                                 return;
2267
2268                         /* Get Major version */
2269                         writel(0x1FF, ha->mem_ptr + IPS_REG_FLAP);
2270                         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
2271                                 udelay(25);     /* 25 us */
2272
2273                         major = readb(ha->mem_ptr + IPS_REG_FLDP);
2274
2275                         /* Get Minor version */
2276                         writel(0x1FE, ha->mem_ptr + IPS_REG_FLAP);
2277                         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
2278                                 udelay(25);     /* 25 us */
2279                         minor = readb(ha->mem_ptr + IPS_REG_FLDP);
2280
2281                         /* Get SubMinor version */
2282                         writel(0x1FD, ha->mem_ptr + IPS_REG_FLAP);
2283                         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
2284                                 udelay(25);     /* 25 us */
2285                         subminor = readb(ha->mem_ptr + IPS_REG_FLDP);
2286
2287                 } else {
2288                         /* Programmed I/O */
2289
2290                         /* test 1st byte */
2291                         outl(0, ha->io_addr + IPS_REG_FLAP);
2292                         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
2293                                 udelay(25);     /* 25 us */
2294
2295                         if (inb(ha->io_addr + IPS_REG_FLDP) != 0x55)
2296                                 return;
2297
2298                         outl(1, ha->io_addr + IPS_REG_FLAP);
2299                         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
2300                                 udelay(25);     /* 25 us */
2301
2302                         if (inb(ha->io_addr + IPS_REG_FLDP) != 0xAA)
2303                                 return;
2304
2305                         /* Get Major version */
2306                         outl(0x1FF, ha->io_addr + IPS_REG_FLAP);
2307                         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
2308                                 udelay(25);     /* 25 us */
2309
2310                         major = inb(ha->io_addr + IPS_REG_FLDP);
2311
2312                         /* Get Minor version */
2313                         outl(0x1FE, ha->io_addr + IPS_REG_FLAP);
2314                         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
2315                                 udelay(25);     /* 25 us */
2316
2317                         minor = inb(ha->io_addr + IPS_REG_FLDP);
2318
2319                         /* Get SubMinor version */
2320                         outl(0x1FD, ha->io_addr + IPS_REG_FLAP);
2321                         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
2322                                 udelay(25);     /* 25 us */
2323
2324                         subminor = inb(ha->io_addr + IPS_REG_FLDP);
2325
2326                 }
2327         } else {
2328                 /* Morpheus Family - Send Command to the card */
2329
2330                 buffer = ha->ioctl_data;
2331
2332                 memset(buffer, 0, 0x1000);
2333
2334                 scb = &ha->scbs[ha->max_cmds - 1];
2335
2336                 ips_init_scb(ha, scb);
2337
2338                 scb->timeout = ips_cmd_timeout;
2339                 scb->cdb[0] = IPS_CMD_RW_BIOSFW;
2340
2341                 scb->cmd.flashfw.op_code = IPS_CMD_RW_BIOSFW;
2342                 scb->cmd.flashfw.command_id = IPS_COMMAND_ID(ha, scb);
2343                 scb->cmd.flashfw.type = 1;
2344                 scb->cmd.flashfw.direction = 0;
2345                 scb->cmd.flashfw.count = cpu_to_le32(0x800);
2346                 scb->cmd.flashfw.total_packets = 1;
2347                 scb->cmd.flashfw.packet_num = 0;
2348                 scb->data_len = 0x1000;
2349                 scb->cmd.flashfw.buffer_addr = ha->ioctl_busaddr;
2350
2351                 /* issue the command */
2352                 if (((ret =
2353                       ips_send_wait(ha, scb, ips_cmd_timeout,
2354                                     intr)) == IPS_FAILURE)
2355                     || (ret == IPS_SUCCESS_IMM)
2356                     || ((scb->basic_status & IPS_GSC_STATUS_MASK) > 1)) {
2357                         /* Error occurred */
2358
2359                         return;
2360                 }
2361
2362                 if ((buffer[0xC0] == 0x55) && (buffer[0xC1] == 0xAA)) {
2363                         major = buffer[0x1ff + 0xC0];   /* Offset 0x1ff after the header (0xc0) */
2364                         minor = buffer[0x1fe + 0xC0];   /* Offset 0x1fe after the header (0xc0) */
2365                         subminor = buffer[0x1fd + 0xC0];        /* Offset 0x1fd after the header (0xc0) */
2366                 } else {
2367                         return;
2368                 }
2369         }
2370
2371         ha->bios_version[0] = hex_asc_upper_hi(major);
2372         ha->bios_version[1] = '.';
2373         ha->bios_version[2] = hex_asc_upper_lo(major);
2374         ha->bios_version[3] = hex_asc_upper_lo(subminor);
2375         ha->bios_version[4] = '.';
2376         ha->bios_version[5] = hex_asc_upper_hi(minor);
2377         ha->bios_version[6] = hex_asc_upper_lo(minor);
2378         ha->bios_version[7] = 0;
2379 }
2380
2381 /****************************************************************************/
2382 /*                                                                          */
2383 /* Routine Name: ips_hainit                                                 */
2384 /*                                                                          */
2385 /* Routine Description:                                                     */
2386 /*                                                                          */
2387 /*   Initialize the controller                                              */
2388 /*                                                                          */
2389 /* NOTE: Assumes to be called from with a lock                              */
2390 /*                                                                          */
2391 /****************************************************************************/
2392 static int
2393 ips_hainit(ips_ha_t * ha)
2394 {
2395         int i;
2396
2397         METHOD_TRACE("ips_hainit", 1);
2398
2399         if (!ha)
2400                 return (0);
2401
2402         if (ha->func.statinit)
2403                 (*ha->func.statinit) (ha);
2404
2405         if (ha->func.enableint)
2406                 (*ha->func.enableint) (ha);
2407
2408         /* Send FFDC */
2409         ha->reset_count = 1;
2410         ha->last_ffdc = ktime_get_real_seconds();
2411         ips_ffdc_reset(ha, IPS_INTR_IORL);
2412
2413         if (!ips_read_config(ha, IPS_INTR_IORL)) {
2414                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
2415                            "unable to read config from controller.\n");
2416
2417                 return (0);
2418         }
2419         /* end if */
2420         if (!ips_read_adapter_status(ha, IPS_INTR_IORL)) {
2421                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
2422                            "unable to read controller status.\n");
2423
2424                 return (0);
2425         }
2426
2427         /* Identify this controller */
2428         ips_identify_controller(ha);
2429
2430         if (!ips_read_subsystem_parameters(ha, IPS_INTR_IORL)) {
2431                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
2432                            "unable to read subsystem parameters.\n");
2433
2434                 return (0);
2435         }
2436
2437         /* write nvram user page 5 */
2438         if (!ips_write_driver_status(ha, IPS_INTR_IORL)) {
2439                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
2440                            "unable to write driver info to controller.\n");
2441
2442                 return (0);
2443         }
2444
2445         /* If there are Logical Drives and a Reset Occurred, then an EraseStripeLock is Needed */
2446         if ((ha->conf->ucLogDriveCount > 0) && (ha->requires_esl == 1))
2447                 ips_clear_adapter(ha, IPS_INTR_IORL);
2448
2449         /* set limits on SID, LUN, BUS */
2450         ha->ntargets = IPS_MAX_TARGETS + 1;
2451         ha->nlun = 1;
2452         ha->nbus = (ha->enq->ucMaxPhysicalDevices / IPS_MAX_TARGETS) + 1;
2453
2454         switch (ha->conf->logical_drive[0].ucStripeSize) {
2455         case 4:
2456                 ha->max_xfer = 0x10000;
2457                 break;
2458
2459         case 5:
2460                 ha->max_xfer = 0x20000;
2461                 break;
2462
2463         case 6:
2464                 ha->max_xfer = 0x40000;
2465                 break;
2466
2467         case 7:
2468         default:
2469                 ha->max_xfer = 0x80000;
2470                 break;
2471         }
2472
2473         /* setup max concurrent commands */
2474         if (le32_to_cpu(ha->subsys->param[4]) & 0x1) {
2475                 /* Use the new method */
2476                 ha->max_cmds = ha->enq->ucConcurrentCmdCount;
2477         } else {
2478                 /* use the old method */
2479                 switch (ha->conf->logical_drive[0].ucStripeSize) {
2480                 case 4:
2481                         ha->max_cmds = 32;
2482                         break;
2483
2484                 case 5:
2485                         ha->max_cmds = 16;
2486                         break;
2487
2488                 case 6:
2489                         ha->max_cmds = 8;
2490                         break;
2491
2492                 case 7:
2493                 default:
2494                         ha->max_cmds = 4;
2495                         break;
2496                 }
2497         }
2498
2499         /* Limit the Active Commands on a Lite Adapter */
2500         if ((ha->ad_type == IPS_ADTYPE_SERVERAID3L) ||
2501             (ha->ad_type == IPS_ADTYPE_SERVERAID4L) ||
2502             (ha->ad_type == IPS_ADTYPE_SERVERAID4LX)) {
2503                 if ((ha->max_cmds > MaxLiteCmds) && (MaxLiteCmds))
2504                         ha->max_cmds = MaxLiteCmds;
2505         }
2506
2507         /* set controller IDs */
2508         ha->ha_id[0] = IPS_ADAPTER_ID;
2509         for (i = 1; i < ha->nbus; i++) {
2510                 ha->ha_id[i] = ha->conf->init_id[i - 1] & 0x1f;
2511                 ha->dcdb_active[i - 1] = 0;
2512         }
2513
2514         return (1);
2515 }
2516
2517 /****************************************************************************/
2518 /*                                                                          */
2519 /* Routine Name: ips_next                                                   */
2520 /*                                                                          */
2521 /* Routine Description:                                                     */
2522 /*                                                                          */
2523 /*   Take the next command off the queue and send it to the controller      */
2524 /*                                                                          */
2525 /****************************************************************************/
2526 static void
2527 ips_next(ips_ha_t * ha, int intr)
2528 {
2529         ips_scb_t *scb;
2530         struct scsi_cmnd *SC;
2531         struct scsi_cmnd *p;
2532         struct scsi_cmnd *q;
2533         ips_copp_wait_item_t *item;
2534         int ret;
2535         struct Scsi_Host *host;
2536         METHOD_TRACE("ips_next", 1);
2537
2538         if (!ha)
2539                 return;
2540         host = ips_sh[ha->host_num];
2541         /*
2542          * Block access to the queue function so
2543          * this command won't time out
2544          */
2545         if (intr == IPS_INTR_ON)
2546                 spin_lock(host->host_lock);
2547
2548         if ((ha->subsys->param[3] & 0x300000)
2549             && (ha->scb_activelist.count == 0)) {
2550                 time64_t now = ktime_get_real_seconds();
2551                 if (now - ha->last_ffdc > IPS_SECS_8HOURS) {
2552                         ha->last_ffdc = now;
2553                         ips_ffdc_time(ha);
2554                 }
2555         }
2556
2557         /*
2558          * Send passthru commands
2559          * These have priority over normal I/O
2560          * but shouldn't affect performance too much
2561          * since we limit the number that can be active
2562          * on the card at any one time
2563          */
2564         while ((ha->num_ioctl < IPS_MAX_IOCTL) &&
2565                (ha->copp_waitlist.head) && (scb = ips_getscb(ha))) {
2566
2567                 item = ips_removeq_copp_head(&ha->copp_waitlist);
2568                 ha->num_ioctl++;
2569                 if (intr == IPS_INTR_ON)
2570                         spin_unlock(host->host_lock);
2571                 scb->scsi_cmd = item->scsi_cmd;
2572                 kfree(item);
2573
2574                 ret = ips_make_passthru(ha, scb->scsi_cmd, scb, intr);
2575
2576                 if (intr == IPS_INTR_ON)
2577                         spin_lock(host->host_lock);
2578                 switch (ret) {
2579                 case IPS_FAILURE:
2580                         if (scb->scsi_cmd) {
2581                                 scb->scsi_cmd->result = DID_ERROR << 16;
2582                                 scb->scsi_cmd->scsi_done(scb->scsi_cmd);
2583                         }
2584
2585                         ips_freescb(ha, scb);
2586                         break;
2587                 case IPS_SUCCESS_IMM:
2588                         if (scb->scsi_cmd) {
2589                                 scb->scsi_cmd->result = DID_OK << 16;
2590                                 scb->scsi_cmd->scsi_done(scb->scsi_cmd);
2591                         }
2592
2593                         ips_freescb(ha, scb);
2594                         break;
2595                 default:
2596                         break;
2597                 }               /* end case */
2598
2599                 if (ret != IPS_SUCCESS) {
2600                         ha->num_ioctl--;
2601                         continue;
2602                 }
2603
2604                 ret = ips_send_cmd(ha, scb);
2605
2606                 if (ret == IPS_SUCCESS)
2607                         ips_putq_scb_head(&ha->scb_activelist, scb);
2608                 else
2609                         ha->num_ioctl--;
2610
2611                 switch (ret) {
2612                 case IPS_FAILURE:
2613                         if (scb->scsi_cmd) {
2614                                 scb->scsi_cmd->result = DID_ERROR << 16;
2615                         }
2616
2617                         ips_freescb(ha, scb);
2618                         break;
2619                 case IPS_SUCCESS_IMM:
2620                         ips_freescb(ha, scb);
2621                         break;
2622                 default:
2623                         break;
2624                 }               /* end case */
2625
2626         }
2627
2628         /*
2629          * Send "Normal" I/O commands
2630          */
2631
2632         p = ha->scb_waitlist.head;
2633         while ((p) && (scb = ips_getscb(ha))) {
2634                 if ((scmd_channel(p) > 0)
2635                     && (ha->
2636                         dcdb_active[scmd_channel(p) -
2637                                     1] & (1 << scmd_id(p)))) {
2638                         ips_freescb(ha, scb);
2639                         p = (struct scsi_cmnd *) p->host_scribble;
2640                         continue;
2641                 }
2642
2643                 q = p;
2644                 SC = ips_removeq_wait(&ha->scb_waitlist, q);
2645
2646                 if (intr == IPS_INTR_ON)
2647                         spin_unlock(host->host_lock);   /* Unlock HA after command is taken off queue */
2648
2649                 SC->result = DID_OK;
2650                 SC->host_scribble = NULL;
2651
2652                 scb->target_id = SC->device->id;
2653                 scb->lun = SC->device->lun;
2654                 scb->bus = SC->device->channel;
2655                 scb->scsi_cmd = SC;
2656                 scb->breakup = 0;
2657                 scb->data_len = 0;
2658                 scb->callback = ipsintr_done;
2659                 scb->timeout = ips_cmd_timeout;
2660                 memset(&scb->cmd, 0, 16);
2661
2662                 /* copy in the CDB */
2663                 memcpy(scb->cdb, SC->cmnd, SC->cmd_len);
2664
2665                 scb->sg_count = scsi_dma_map(SC);
2666                 BUG_ON(scb->sg_count < 0);
2667                 if (scb->sg_count) {
2668                         struct scatterlist *sg;
2669                         int i;
2670
2671                         scb->flags |= IPS_SCB_MAP_SG;
2672
2673                         scsi_for_each_sg(SC, sg, scb->sg_count, i) {
2674                                 if (ips_fill_scb_sg_single
2675                                     (ha, sg_dma_address(sg), scb, i,
2676                                      sg_dma_len(sg)) < 0)
2677                                         break;
2678                         }
2679                         scb->dcdb.transfer_length = scb->data_len;
2680                 } else {
2681                         scb->data_busaddr = 0L;
2682                         scb->sg_len = 0;
2683                         scb->data_len = 0;
2684                         scb->dcdb.transfer_length = 0;
2685                 }
2686
2687                 scb->dcdb.cmd_attribute =
2688                     ips_command_direction[scb->scsi_cmd->cmnd[0]];
2689
2690                 /* Allow a WRITE BUFFER Command to Have no Data */
2691                 /* This is Used by Tape Flash Utilites          */
2692                 if ((scb->scsi_cmd->cmnd[0] == WRITE_BUFFER) &&
2693                                 (scb->data_len == 0))
2694                         scb->dcdb.cmd_attribute = 0;
2695
2696                 if (!(scb->dcdb.cmd_attribute & 0x3))
2697                         scb->dcdb.transfer_length = 0;
2698
2699                 if (scb->data_len >= IPS_MAX_XFER) {
2700                         scb->dcdb.cmd_attribute |= IPS_TRANSFER64K;
2701                         scb->dcdb.transfer_length = 0;
2702                 }
2703                 if (intr == IPS_INTR_ON)
2704                         spin_lock(host->host_lock);
2705
2706                 ret = ips_send_cmd(ha, scb);
2707
2708                 switch (ret) {
2709                 case IPS_SUCCESS:
2710                         ips_putq_scb_head(&ha->scb_activelist, scb);
2711                         break;
2712                 case IPS_FAILURE:
2713                         if (scb->scsi_cmd) {
2714                                 scb->scsi_cmd->result = DID_ERROR << 16;
2715                                 scb->scsi_cmd->scsi_done(scb->scsi_cmd);
2716                         }
2717
2718                         if (scb->bus)
2719                                 ha->dcdb_active[scb->bus - 1] &=
2720                                     ~(1 << scb->target_id);
2721
2722                         ips_freescb(ha, scb);
2723                         break;
2724                 case IPS_SUCCESS_IMM:
2725                         if (scb->scsi_cmd)
2726                                 scb->scsi_cmd->scsi_done(scb->scsi_cmd);
2727
2728                         if (scb->bus)
2729                                 ha->dcdb_active[scb->bus - 1] &=
2730                                     ~(1 << scb->target_id);
2731
2732                         ips_freescb(ha, scb);
2733                         break;
2734                 default:
2735                         break;
2736                 }               /* end case */
2737
2738                 p = (struct scsi_cmnd *) p->host_scribble;
2739
2740         }                       /* end while */
2741
2742         if (intr == IPS_INTR_ON)
2743                 spin_unlock(host->host_lock);
2744 }
2745
2746 /****************************************************************************/
2747 /*                                                                          */
2748 /* Routine Name: ips_putq_scb_head                                          */
2749 /*                                                                          */
2750 /* Routine Description:                                                     */
2751 /*                                                                          */
2752 /*   Add an item to the head of the queue                                   */
2753 /*                                                                          */
2754 /* ASSUMED to be called from within the HA lock                             */
2755 /*                                                                          */
2756 /****************************************************************************/
2757 static void
2758 ips_putq_scb_head(ips_scb_queue_t * queue, ips_scb_t * item)
2759 {
2760         METHOD_TRACE("ips_putq_scb_head", 1);
2761
2762         if (!item)
2763                 return;
2764
2765         item->q_next = queue->head;
2766         queue->head = item;
2767
2768         if (!queue->tail)
2769                 queue->tail = item;
2770
2771         queue->count++;
2772 }
2773
2774 /****************************************************************************/
2775 /*                                                                          */
2776 /* Routine Name: ips_removeq_scb_head                                       */
2777 /*                                                                          */
2778 /* Routine Description:                                                     */
2779 /*                                                                          */
2780 /*   Remove the head of the queue                                           */
2781 /*                                                                          */
2782 /* ASSUMED to be called from within the HA lock                             */
2783 /*                                                                          */
2784 /****************************************************************************/
2785 static ips_scb_t *
2786 ips_removeq_scb_head(ips_scb_queue_t * queue)
2787 {
2788         ips_scb_t *item;
2789
2790         METHOD_TRACE("ips_removeq_scb_head", 1);
2791
2792         item = queue->head;
2793
2794         if (!item) {
2795                 return (NULL);
2796         }
2797
2798         queue->head = item->q_next;
2799         item->q_next = NULL;
2800
2801         if (queue->tail == item)
2802                 queue->tail = NULL;
2803
2804         queue->count--;
2805
2806         return (item);
2807 }
2808
2809 /****************************************************************************/
2810 /*                                                                          */
2811 /* Routine Name: ips_removeq_scb                                            */
2812 /*                                                                          */
2813 /* Routine Description:                                                     */
2814 /*                                                                          */
2815 /*   Remove an item from a queue                                            */
2816 /*                                                                          */
2817 /* ASSUMED to be called from within the HA lock                             */
2818 /*                                                                          */
2819 /****************************************************************************/
2820 static ips_scb_t *
2821 ips_removeq_scb(ips_scb_queue_t * queue, ips_scb_t * item)
2822 {
2823         ips_scb_t *p;
2824
2825         METHOD_TRACE("ips_removeq_scb", 1);
2826
2827         if (!item)
2828                 return (NULL);
2829
2830         if (item == queue->head) {
2831                 return (ips_removeq_scb_head(queue));
2832         }
2833
2834         p = queue->head;
2835
2836         while ((p) && (item != p->q_next))
2837                 p = p->q_next;
2838
2839         if (p) {
2840                 /* found a match */
2841                 p->q_next = item->q_next;
2842
2843                 if (!item->q_next)
2844                         queue->tail = p;
2845
2846                 item->q_next = NULL;
2847                 queue->count--;
2848
2849                 return (item);
2850         }
2851
2852         return (NULL);
2853 }
2854
2855 /****************************************************************************/
2856 /*                                                                          */
2857 /* Routine Name: ips_putq_wait_tail                                         */
2858 /*                                                                          */
2859 /* Routine Description:                                                     */
2860 /*                                                                          */
2861 /*   Add an item to the tail of the queue                                   */
2862 /*                                                                          */
2863 /* ASSUMED to be called from within the HA lock                             */
2864 /*                                                                          */
2865 /****************************************************************************/
2866 static void ips_putq_wait_tail(ips_wait_queue_entry_t *queue, struct scsi_cmnd *item)
2867 {
2868         METHOD_TRACE("ips_putq_wait_tail", 1);
2869
2870         if (!item)
2871                 return;
2872
2873         item->host_scribble = NULL;
2874
2875         if (queue->tail)
2876                 queue->tail->host_scribble = (char *) item;
2877
2878         queue->tail = item;
2879
2880         if (!queue->head)
2881                 queue->head = item;
2882
2883         queue->count++;
2884 }
2885
2886 /****************************************************************************/
2887 /*                                                                          */
2888 /* Routine Name: ips_removeq_wait_head                                      */
2889 /*                                                                          */
2890 /* Routine Description:                                                     */
2891 /*                                                                          */
2892 /*   Remove the head of the queue                                           */
2893 /*                                                                          */
2894 /* ASSUMED to be called from within the HA lock                             */
2895 /*                                                                          */
2896 /****************************************************************************/
2897 static struct scsi_cmnd *ips_removeq_wait_head(ips_wait_queue_entry_t *queue)
2898 {
2899         struct scsi_cmnd *item;
2900
2901         METHOD_TRACE("ips_removeq_wait_head", 1);
2902
2903         item = queue->head;
2904
2905         if (!item) {
2906                 return (NULL);
2907         }
2908
2909         queue->head = (struct scsi_cmnd *) item->host_scribble;
2910         item->host_scribble = NULL;
2911
2912         if (queue->tail == item)
2913                 queue->tail = NULL;
2914
2915         queue->count--;
2916
2917         return (item);
2918 }
2919
2920 /****************************************************************************/
2921 /*                                                                          */
2922 /* Routine Name: ips_removeq_wait                                           */
2923 /*                                                                          */
2924 /* Routine Description:                                                     */
2925 /*                                                                          */
2926 /*   Remove an item from a queue                                            */
2927 /*                                                                          */
2928 /* ASSUMED to be called from within the HA lock                             */
2929 /*                                                                          */
2930 /****************************************************************************/
2931 static struct scsi_cmnd *ips_removeq_wait(ips_wait_queue_entry_t *queue,
2932                                           struct scsi_cmnd *item)
2933 {
2934         struct scsi_cmnd *p;
2935
2936         METHOD_TRACE("ips_removeq_wait", 1);
2937
2938         if (!item)
2939                 return (NULL);
2940
2941         if (item == queue->head) {
2942                 return (ips_removeq_wait_head(queue));
2943         }
2944
2945         p = queue->head;
2946
2947         while ((p) && (item != (struct scsi_cmnd *) p->host_scribble))
2948                 p = (struct scsi_cmnd *) p->host_scribble;
2949
2950         if (p) {
2951                 /* found a match */
2952                 p->host_scribble = item->host_scribble;
2953
2954                 if (!item->host_scribble)
2955                         queue->tail = p;
2956
2957                 item->host_scribble = NULL;
2958                 queue->count--;
2959
2960                 return (item);
2961         }
2962
2963         return (NULL);
2964 }
2965
2966 /****************************************************************************/
2967 /*                                                                          */
2968 /* Routine Name: ips_putq_copp_tail                                         */
2969 /*                                                                          */
2970 /* Routine Description:                                                     */
2971 /*                                                                          */
2972 /*   Add an item to the tail of the queue                                   */
2973 /*                                                                          */
2974 /* ASSUMED to be called from within the HA lock                             */
2975 /*                                                                          */
2976 /****************************************************************************/
2977 static void
2978 ips_putq_copp_tail(ips_copp_queue_t * queue, ips_copp_wait_item_t * item)
2979 {
2980         METHOD_TRACE("ips_putq_copp_tail", 1);
2981
2982         if (!item)
2983                 return;
2984
2985         item->next = NULL;
2986
2987         if (queue->tail)
2988                 queue->tail->next = item;
2989
2990         queue->tail = item;
2991
2992         if (!queue->head)
2993                 queue->head = item;
2994
2995         queue->count++;
2996 }
2997
2998 /****************************************************************************/
2999 /*                                                                          */
3000 /* Routine Name: ips_removeq_copp_head                                      */
3001 /*                                                                          */
3002 /* Routine Description:                                                     */
3003 /*                                                                          */
3004 /*   Remove the head of the queue                                           */
3005 /*                                                                          */
3006 /* ASSUMED to be called from within the HA lock                             */
3007 /*                                                                          */
3008 /****************************************************************************/
3009 static ips_copp_wait_item_t *
3010 ips_removeq_copp_head(ips_copp_queue_t * queue)
3011 {
3012         ips_copp_wait_item_t *item;
3013
3014         METHOD_TRACE("ips_removeq_copp_head", 1);
3015
3016         item = queue->head;
3017
3018         if (!item) {
3019                 return (NULL);
3020         }
3021
3022         queue->head = item->next;
3023         item->next = NULL;
3024
3025         if (queue->tail == item)
3026                 queue->tail = NULL;
3027
3028         queue->count--;
3029
3030         return (item);
3031 }
3032
3033 /****************************************************************************/
3034 /*                                                                          */
3035 /* Routine Name: ips_removeq_copp                                           */
3036 /*                                                                          */
3037 /* Routine Description:                                                     */
3038 /*                                                                          */
3039 /*   Remove an item from a queue                                            */
3040 /*                                                                          */
3041 /* ASSUMED to be called from within the HA lock                             */
3042 /*                                                                          */
3043 /****************************************************************************/
3044 static ips_copp_wait_item_t *
3045 ips_removeq_copp(ips_copp_queue_t * queue, ips_copp_wait_item_t * item)
3046 {
3047         ips_copp_wait_item_t *p;
3048
3049         METHOD_TRACE("ips_removeq_copp", 1);
3050
3051         if (!item)
3052                 return (NULL);
3053
3054         if (item == queue->head) {
3055                 return (ips_removeq_copp_head(queue));
3056         }
3057
3058         p = queue->head;
3059
3060         while ((p) && (item != p->next))
3061                 p = p->next;
3062
3063         if (p) {
3064                 /* found a match */
3065                 p->next = item->next;
3066
3067                 if (!item->next)
3068                         queue->tail = p;
3069
3070                 item->next = NULL;
3071                 queue->count--;
3072
3073                 return (item);
3074         }
3075
3076         return (NULL);
3077 }
3078
3079 /****************************************************************************/
3080 /*                                                                          */
3081 /* Routine Name: ipsintr_blocking                                           */
3082 /*                                                                          */
3083 /* Routine Description:                                                     */
3084 /*                                                                          */
3085 /*   Finalize an interrupt for internal commands                            */
3086 /*                                                                          */
3087 /****************************************************************************/
3088 static void
3089 ipsintr_blocking(ips_ha_t * ha, ips_scb_t * scb)
3090 {
3091         METHOD_TRACE("ipsintr_blocking", 2);
3092
3093         ips_freescb(ha, scb);
3094         if ((ha->waitflag == TRUE) && (ha->cmd_in_progress == scb->cdb[0])) {
3095                 ha->waitflag = FALSE;
3096
3097                 return;
3098         }
3099 }
3100
3101 /****************************************************************************/
3102 /*                                                                          */
3103 /* Routine Name: ipsintr_done                                               */
3104 /*                                                                          */
3105 /* Routine Description:                                                     */
3106 /*                                                                          */
3107 /*   Finalize an interrupt for non-internal commands                        */
3108 /*                                                                          */
3109 /****************************************************************************/
3110 static void
3111 ipsintr_done(ips_ha_t * ha, ips_scb_t * scb)
3112 {
3113         METHOD_TRACE("ipsintr_done", 2);
3114
3115         if (!scb) {
3116                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
3117                            "Spurious interrupt; scb NULL.\n");
3118
3119                 return;
3120         }
3121
3122         if (scb->scsi_cmd == NULL) {
3123                 /* unexpected interrupt */
3124                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
3125                            "Spurious interrupt; scsi_cmd not set.\n");
3126
3127                 return;
3128         }
3129
3130         ips_done(ha, scb);
3131 }
3132
3133 /****************************************************************************/
3134 /*                                                                          */
3135 /* Routine Name: ips_done                                                   */
3136 /*                                                                          */
3137 /* Routine Description:                                                     */
3138 /*                                                                          */
3139 /*   Do housekeeping on completed commands                                  */
3140 /*  ASSUMED to be called form within the request lock                       */
3141 /****************************************************************************/
3142 static void
3143 ips_done(ips_ha_t * ha, ips_scb_t * scb)
3144 {
3145         int ret;
3146
3147         METHOD_TRACE("ips_done", 1);
3148
3149         if (!scb)
3150                 return;
3151
3152         if ((scb->scsi_cmd) && (ips_is_passthru(scb->scsi_cmd))) {
3153                 ips_cleanup_passthru(ha, scb);
3154                 ha->num_ioctl--;
3155         } else {
3156                 /*
3157                  * Check to see if this command had too much
3158                  * data and had to be broke up.  If so, queue
3159                  * the rest of the data and continue.
3160                  */
3161                 if ((scb->breakup) || (scb->sg_break)) {
3162                         struct scatterlist *sg;
3163                         int i, sg_dma_index, ips_sg_index = 0;
3164
3165                         /* we had a data breakup */
3166                         scb->data_len = 0;
3167
3168                         sg = scsi_sglist(scb->scsi_cmd);
3169
3170                         /* Spin forward to last dma chunk */
3171                         sg_dma_index = scb->breakup;
3172                         for (i = 0; i < scb->breakup; i++)
3173                                 sg = sg_next(sg);
3174
3175                         /* Take care of possible partial on last chunk */
3176                         ips_fill_scb_sg_single(ha,
3177                                                sg_dma_address(sg),
3178                                                scb, ips_sg_index++,
3179                                                sg_dma_len(sg));
3180
3181                         for (; sg_dma_index < scsi_sg_count(scb->scsi_cmd);
3182                              sg_dma_index++, sg = sg_next(sg)) {
3183                                 if (ips_fill_scb_sg_single
3184                                     (ha,
3185                                      sg_dma_address(sg),
3186                                      scb, ips_sg_index++,
3187                                      sg_dma_len(sg)) < 0)
3188                                         break;
3189                         }
3190
3191                         scb->dcdb.transfer_length = scb->data_len;
3192                         scb->dcdb.cmd_attribute |=
3193                             ips_command_direction[scb->scsi_cmd->cmnd[0]];
3194
3195                         if (!(scb->dcdb.cmd_attribute & 0x3))
3196                                 scb->dcdb.transfer_length = 0;
3197
3198                         if (scb->data_len >= IPS_MAX_XFER) {
3199                                 scb->dcdb.cmd_attribute |= IPS_TRANSFER64K;
3200                                 scb->dcdb.transfer_length = 0;
3201                         }
3202
3203                         ret = ips_send_cmd(ha, scb);
3204
3205                         switch (ret) {
3206                         case IPS_FAILURE:
3207                                 if (scb->scsi_cmd) {
3208                                         scb->scsi_cmd->result = DID_ERROR << 16;
3209                                         scb->scsi_cmd->scsi_done(scb->scsi_cmd);
3210                                 }
3211
3212                                 ips_freescb(ha, scb);
3213                                 break;
3214                         case IPS_SUCCESS_IMM:
3215                                 if (scb->scsi_cmd) {
3216                                         scb->scsi_cmd->result = DID_ERROR << 16;
3217                                         scb->scsi_cmd->scsi_done(scb->scsi_cmd);
3218                                 }
3219
3220                                 ips_freescb(ha, scb);
3221                                 break;
3222                         default:
3223                                 break;
3224                         }       /* end case */
3225
3226                         return;
3227                 }
3228         }                       /* end if passthru */
3229
3230         if (scb->bus) {
3231                 ha->dcdb_active[scb->bus - 1] &= ~(1 << scb->target_id);
3232         }
3233
3234         scb->scsi_cmd->scsi_done(scb->scsi_cmd);
3235
3236         ips_freescb(ha, scb);
3237 }
3238
3239 /****************************************************************************/
3240 /*                                                                          */
3241 /* Routine Name: ips_map_status                                             */
3242 /*                                                                          */
3243 /* Routine Description:                                                     */
3244 /*                                                                          */
3245 /*   Map Controller Error codes to Linux Error Codes                        */
3246 /*                                                                          */
3247 /****************************************************************************/
3248 static int
3249 ips_map_status(ips_ha_t * ha, ips_scb_t * scb, ips_stat_t * sp)
3250 {
3251         int errcode;
3252         int device_error;
3253         uint32_t transfer_len;
3254         IPS_DCDB_TABLE_TAPE *tapeDCDB;
3255         IPS_SCSI_INQ_DATA inquiryData;
3256
3257         METHOD_TRACE("ips_map_status", 1);
3258
3259         if (scb->bus) {
3260                 DEBUG_VAR(2,
3261                           "(%s%d) Physical device error (%d %d %d): %x %x, Sense Key: %x, ASC: %x, ASCQ: %x",
3262                           ips_name, ha->host_num,
3263                           scb->scsi_cmd->device->channel,
3264                           scb->scsi_cmd->device->id, scb->scsi_cmd->device->lun,
3265                           scb->basic_status, scb->extended_status,
3266                           scb->extended_status ==
3267                           IPS_ERR_CKCOND ? scb->dcdb.sense_info[2] & 0xf : 0,
3268                           scb->extended_status ==
3269                           IPS_ERR_CKCOND ? scb->dcdb.sense_info[12] : 0,
3270                           scb->extended_status ==
3271                           IPS_ERR_CKCOND ? scb->dcdb.sense_info[13] : 0);
3272         }
3273
3274         /* default driver error */
3275         errcode = DID_ERROR;
3276         device_error = 0;
3277
3278         switch (scb->basic_status & IPS_GSC_STATUS_MASK) {
3279         case IPS_CMD_TIMEOUT:
3280                 errcode = DID_TIME_OUT;
3281                 break;
3282
3283         case IPS_INVAL_OPCO:
3284         case IPS_INVAL_CMD_BLK:
3285         case IPS_INVAL_PARM_BLK:
3286         case IPS_LD_ERROR:
3287         case IPS_CMD_CMPLT_WERROR:
3288                 break;
3289
3290         case IPS_PHYS_DRV_ERROR:
3291                 switch (scb->extended_status) {
3292                 case IPS_ERR_SEL_TO:
3293                         if (scb->bus)
3294                                 errcode = DID_NO_CONNECT;
3295
3296                         break;
3297
3298                 case IPS_ERR_OU_RUN:
3299                         if ((scb->cmd.dcdb.op_code == IPS_CMD_EXTENDED_DCDB) ||
3300                             (scb->cmd.dcdb.op_code ==
3301                              IPS_CMD_EXTENDED_DCDB_SG)) {
3302                                 tapeDCDB = (IPS_DCDB_TABLE_TAPE *) & scb->dcdb;
3303                                 transfer_len = tapeDCDB->transfer_length;
3304                         } else {
3305                                 transfer_len =
3306                                     (uint32_t) scb->dcdb.transfer_length;
3307                         }
3308
3309                         if ((scb->bus) && (transfer_len < scb->data_len)) {
3310                                 /* Underrun - set default to no error */
3311                                 errcode = DID_OK;
3312
3313                                 /* Restrict access to physical DASD */
3314                                 if (scb->scsi_cmd->cmnd[0] == INQUIRY) {
3315                                     ips_scmd_buf_read(scb->scsi_cmd,
3316                                       &inquiryData, sizeof (inquiryData));
3317                                     if ((inquiryData.DeviceType & 0x1f) == TYPE_DISK) {
3318                                         errcode = DID_TIME_OUT;
3319                                         break;
3320                                     }
3321                                 }
3322                         } else
3323                                 errcode = DID_ERROR;
3324
3325                         break;
3326
3327                 case IPS_ERR_RECOVERY:
3328                         /* don't fail recovered errors */
3329                         if (scb->bus)
3330                                 errcode = DID_OK;
3331
3332                         break;
3333
3334                 case IPS_ERR_HOST_RESET:
3335                 case IPS_ERR_DEV_RESET:
3336                         errcode = DID_RESET;
3337                         break;
3338
3339                 case IPS_ERR_CKCOND:
3340                         if (scb->bus) {
3341                                 if ((scb->cmd.dcdb.op_code ==
3342                                      IPS_CMD_EXTENDED_DCDB)
3343                                     || (scb->cmd.dcdb.op_code ==
3344                                         IPS_CMD_EXTENDED_DCDB_SG)) {
3345                                         tapeDCDB =
3346                                             (IPS_DCDB_TABLE_TAPE *) & scb->dcdb;
3347                                         memcpy_and_pad(scb->scsi_cmd->sense_buffer,
3348                                                SCSI_SENSE_BUFFERSIZE,
3349                                                tapeDCDB->sense_info,
3350                                                sizeof(tapeDCDB->sense_info), 0);
3351                                 } else {
3352                                         memcpy_and_pad(scb->scsi_cmd->sense_buffer,
3353                                                SCSI_SENSE_BUFFERSIZE,
3354                                                scb->dcdb.sense_info,
3355                                                sizeof(scb->dcdb.sense_info), 0);
3356                                 }
3357                                 device_error = 2;       /* check condition */
3358                         }
3359
3360                         errcode = DID_OK;
3361
3362                         break;
3363
3364                 default:
3365                         errcode = DID_ERROR;
3366                         break;
3367
3368                 }               /* end switch */
3369         }                       /* end switch */
3370
3371         scb->scsi_cmd->result = device_error | (errcode << 16);
3372
3373         return (1);
3374 }
3375
3376 /****************************************************************************/
3377 /*                                                                          */
3378 /* Routine Name: ips_send_wait                                              */
3379 /*                                                                          */
3380 /* Routine Description:                                                     */
3381 /*                                                                          */
3382 /*   Send a command to the controller and wait for it to return             */
3383 /*                                                                          */
3384 /*   The FFDC Time Stamp use this function for the callback, but doesn't    */
3385 /*   actually need to wait.                                                 */
3386 /****************************************************************************/
3387 static int
3388 ips_send_wait(ips_ha_t * ha, ips_scb_t * scb, int timeout, int intr)
3389 {
3390         int ret;
3391
3392         METHOD_TRACE("ips_send_wait", 1);
3393
3394         if (intr != IPS_FFDC) { /* Won't be Waiting if this is a Time Stamp */
3395                 ha->waitflag = TRUE;
3396                 ha->cmd_in_progress = scb->cdb[0];
3397         }
3398         scb->callback = ipsintr_blocking;
3399         ret = ips_send_cmd(ha, scb);
3400
3401         if ((ret == IPS_FAILURE) || (ret == IPS_SUCCESS_IMM))
3402                 return (ret);
3403
3404         if (intr != IPS_FFDC)   /* Don't Wait around if this is a Time Stamp */
3405                 ret = ips_wait(ha, timeout, intr);
3406
3407         return (ret);
3408 }
3409
3410 /****************************************************************************/
3411 /*                                                                          */
3412 /* Routine Name: ips_scmd_buf_write                                         */
3413 /*                                                                          */
3414 /* Routine Description:                                                     */
3415 /*  Write data to struct scsi_cmnd request_buffer at proper offsets         */
3416 /****************************************************************************/
3417 static void
3418 ips_scmd_buf_write(struct scsi_cmnd *scmd, void *data, unsigned int count)
3419 {
3420         unsigned long flags;
3421
3422         local_irq_save(flags);
3423         scsi_sg_copy_from_buffer(scmd, data, count);
3424         local_irq_restore(flags);
3425 }
3426
3427 /****************************************************************************/
3428 /*                                                                          */
3429 /* Routine Name: ips_scmd_buf_read                                          */
3430 /*                                                                          */
3431 /* Routine Description:                                                     */
3432 /*  Copy data from a struct scsi_cmnd to a new, linear buffer               */
3433 /****************************************************************************/
3434 static void
3435 ips_scmd_buf_read(struct scsi_cmnd *scmd, void *data, unsigned int count)
3436 {
3437         unsigned long flags;
3438
3439         local_irq_save(flags);
3440         scsi_sg_copy_to_buffer(scmd, data, count);
3441         local_irq_restore(flags);
3442 }
3443
3444 /****************************************************************************/
3445 /*                                                                          */
3446 /* Routine Name: ips_send_cmd                                               */
3447 /*                                                                          */
3448 /* Routine Description:                                                     */
3449 /*                                                                          */
3450 /*   Map SCSI commands to ServeRAID commands for logical drives             */
3451 /*                                                                          */
3452 /****************************************************************************/
3453 static int
3454 ips_send_cmd(ips_ha_t * ha, ips_scb_t * scb)
3455 {
3456         int ret;
3457         char *sp;
3458         int device_error;
3459         IPS_DCDB_TABLE_TAPE *tapeDCDB;
3460         int TimeOut;
3461
3462         METHOD_TRACE("ips_send_cmd", 1);
3463
3464         ret = IPS_SUCCESS;
3465
3466         if (!scb->scsi_cmd) {
3467                 /* internal command */
3468
3469                 if (scb->bus > 0) {
3470                         /* Controller commands can't be issued */
3471                         /* to real devices -- fail them        */
3472                         if ((ha->waitflag == TRUE) &&
3473                             (ha->cmd_in_progress == scb->cdb[0])) {
3474                                 ha->waitflag = FALSE;
3475                         }
3476
3477                         return (1);
3478                 }
3479         } else if ((scb->bus == 0) && (!ips_is_passthru(scb->scsi_cmd))) {
3480                 /* command to logical bus -- interpret */
3481                 ret = IPS_SUCCESS_IMM;
3482
3483                 switch (scb->scsi_cmd->cmnd[0]) {
3484                 case ALLOW_MEDIUM_REMOVAL:
3485                 case REZERO_UNIT:
3486                 case ERASE:
3487                 case WRITE_FILEMARKS:
3488                 case SPACE:
3489                         scb->scsi_cmd->result = DID_ERROR << 16;
3490                         break;
3491
3492                 case START_STOP:
3493                         scb->scsi_cmd->result = DID_OK << 16;
3494                         break;
3495
3496                 case TEST_UNIT_READY:
3497                 case INQUIRY:
3498                         if (scb->target_id == IPS_ADAPTER_ID) {
3499                                 /*
3500                                  * Either we have a TUR
3501                                  * or we have a SCSI inquiry
3502                                  */
3503                                 if (scb->scsi_cmd->cmnd[0] == TEST_UNIT_READY)
3504                                         scb->scsi_cmd->result = DID_OK << 16;
3505
3506                                 if (scb->scsi_cmd->cmnd[0] == INQUIRY) {
3507                                         IPS_SCSI_INQ_DATA inquiry;
3508
3509                                         memset(&inquiry, 0,
3510                                                sizeof (IPS_SCSI_INQ_DATA));
3511
3512                                         inquiry.DeviceType =
3513                                             IPS_SCSI_INQ_TYPE_PROCESSOR;
3514                                         inquiry.DeviceTypeQualifier =
3515                                             IPS_SCSI_INQ_LU_CONNECTED;
3516                                         inquiry.Version = IPS_SCSI_INQ_REV2;
3517                                         inquiry.ResponseDataFormat =
3518                                             IPS_SCSI_INQ_RD_REV2;
3519                                         inquiry.AdditionalLength = 31;
3520                                         inquiry.Flags[0] =
3521                                             IPS_SCSI_INQ_Address16;
3522                                         inquiry.Flags[1] =
3523                                             IPS_SCSI_INQ_WBus16 |
3524                                             IPS_SCSI_INQ_Sync;
3525                                         memcpy(inquiry.VendorId, "IBM     ",
3526                                                 8);
3527                                         memcpy(inquiry.ProductId,
3528                                                 "SERVERAID       ", 16);
3529                                         memcpy(inquiry.ProductRevisionLevel,
3530                                                 "1.00", 4);
3531
3532                                         ips_scmd_buf_write(scb->scsi_cmd,
3533                                                            &inquiry,
3534                                                            sizeof (inquiry));
3535
3536                                         scb->scsi_cmd->result = DID_OK << 16;
3537                                 }
3538                         } else {
3539                                 scb->cmd.logical_info.op_code = IPS_CMD_GET_LD_INFO;
3540                                 scb->cmd.logical_info.command_id = IPS_COMMAND_ID(ha, scb);
3541                                 scb->cmd.logical_info.reserved = 0;
3542                                 scb->cmd.logical_info.reserved2 = 0;
3543                                 scb->data_len = sizeof (IPS_LD_INFO);
3544                                 scb->data_busaddr = ha->logical_drive_info_dma_addr;
3545                                 scb->flags = 0;
3546                                 scb->cmd.logical_info.buffer_addr = scb->data_busaddr;
3547                                 ret = IPS_SUCCESS;
3548                         }
3549
3550                         break;
3551
3552                 case REQUEST_SENSE:
3553                         ips_reqsen(ha, scb);
3554                         scb->scsi_cmd->result = DID_OK << 16;
3555                         break;
3556
3557                 case READ_6:
3558                 case WRITE_6:
3559                         if (!scb->sg_len) {
3560                                 scb->cmd.basic_io.op_code =
3561                                     (scb->scsi_cmd->cmnd[0] ==
3562                                      READ_6) ? IPS_CMD_READ : IPS_CMD_WRITE;
3563                                 scb->cmd.basic_io.enhanced_sg = 0;
3564                                 scb->cmd.basic_io.sg_addr =
3565                                     cpu_to_le32(scb->data_busaddr);
3566                         } else {
3567                                 scb->cmd.basic_io.op_code =
3568                                     (scb->scsi_cmd->cmnd[0] ==
3569                                      READ_6) ? IPS_CMD_READ_SG :
3570                                     IPS_CMD_WRITE_SG;
3571                                 scb->cmd.basic_io.enhanced_sg =
3572                                     IPS_USE_ENH_SGLIST(ha) ? 0xFF : 0;
3573                                 scb->cmd.basic_io.sg_addr =
3574                                     cpu_to_le32(scb->sg_busaddr);
3575                         }
3576
3577                         scb->cmd.basic_io.segment_4G = 0;
3578                         scb->cmd.basic_io.command_id = IPS_COMMAND_ID(ha, scb);
3579                         scb->cmd.basic_io.log_drv = scb->target_id;
3580                         scb->cmd.basic_io.sg_count = scb->sg_len;
3581
3582                         if (scb->cmd.basic_io.lba)
3583                                 le32_add_cpu(&scb->cmd.basic_io.lba,
3584                                                 le16_to_cpu(scb->cmd.basic_io.
3585                                                             sector_count));
3586                         else
3587                                 scb->cmd.basic_io.lba =
3588                                     (((scb->scsi_cmd->
3589                                        cmnd[1] & 0x1f) << 16) | (scb->scsi_cmd->
3590                                                                  cmnd[2] << 8) |
3591                                      (scb->scsi_cmd->cmnd[3]));
3592
3593                         scb->cmd.basic_io.sector_count =
3594                             cpu_to_le16(scb->data_len / IPS_BLKSIZE);
3595
3596                         if (le16_to_cpu(scb->cmd.basic_io.sector_count) == 0)
3597                                 scb->cmd.basic_io.sector_count =
3598                                     cpu_to_le16(256);
3599
3600                         ret = IPS_SUCCESS;
3601                         break;
3602
3603                 case READ_10:
3604                 case WRITE_10:
3605                         if (!scb->sg_len) {
3606                                 scb->cmd.basic_io.op_code =
3607                                     (scb->scsi_cmd->cmnd[0] ==
3608                                      READ_10) ? IPS_CMD_READ : IPS_CMD_WRITE;
3609                                 scb->cmd.basic_io.enhanced_sg = 0;
3610                                 scb->cmd.basic_io.sg_addr =
3611                                     cpu_to_le32(scb->data_busaddr);
3612                         } else {
3613                                 scb->cmd.basic_io.op_code =
3614                                     (scb->scsi_cmd->cmnd[0] ==
3615                                      READ_10) ? IPS_CMD_READ_SG :
3616                                     IPS_CMD_WRITE_SG;
3617                                 scb->cmd.basic_io.enhanced_sg =
3618                                     IPS_USE_ENH_SGLIST(ha) ? 0xFF : 0;
3619                                 scb->cmd.basic_io.sg_addr =
3620                                     cpu_to_le32(scb->sg_busaddr);
3621                         }
3622
3623                         scb->cmd.basic_io.segment_4G = 0;
3624                         scb->cmd.basic_io.command_id = IPS_COMMAND_ID(ha, scb);
3625                         scb->cmd.basic_io.log_drv = scb->target_id;
3626                         scb->cmd.basic_io.sg_count = scb->sg_len;
3627
3628                         if (scb->cmd.basic_io.lba)
3629                                 le32_add_cpu(&scb->cmd.basic_io.lba,
3630                                                 le16_to_cpu(scb->cmd.basic_io.
3631                                                             sector_count));
3632                         else
3633                                 scb->cmd.basic_io.lba =
3634                                     ((scb->scsi_cmd->cmnd[2] << 24) | (scb->
3635                                                                        scsi_cmd->
3636                                                                        cmnd[3]
3637                                                                        << 16) |
3638                                      (scb->scsi_cmd->cmnd[4] << 8) | scb->
3639                                      scsi_cmd->cmnd[5]);
3640
3641                         scb->cmd.basic_io.sector_count =
3642                             cpu_to_le16(scb->data_len / IPS_BLKSIZE);
3643
3644                         if (cpu_to_le16(scb->cmd.basic_io.sector_count) == 0) {
3645                                 /*
3646                                  * This is a null condition
3647                                  * we don't have to do anything
3648                                  * so just return
3649                                  */
3650                                 scb->scsi_cmd->result = DID_OK << 16;
3651                         } else
3652                                 ret = IPS_SUCCESS;
3653
3654                         break;
3655
3656                 case RESERVE:
3657                 case RELEASE:
3658                         scb->scsi_cmd->result = DID_OK << 16;
3659                         break;
3660
3661                 case MODE_SENSE:
3662                         scb->cmd.basic_io.op_code = IPS_CMD_ENQUIRY;
3663                         scb->cmd.basic_io.command_id = IPS_COMMAND_ID(ha, scb);
3664                         scb->cmd.basic_io.segment_4G = 0;
3665                         scb->cmd.basic_io.enhanced_sg = 0;
3666                         scb->data_len = sizeof (*ha->enq);
3667                         scb->cmd.basic_io.sg_addr = ha->enq_busaddr;
3668                         ret = IPS_SUCCESS;
3669                         break;
3670
3671                 case READ_CAPACITY:
3672                         scb->cmd.logical_info.op_code = IPS_CMD_GET_LD_INFO;
3673                         scb->cmd.logical_info.command_id = IPS_COMMAND_ID(ha, scb);
3674                         scb->cmd.logical_info.reserved = 0;
3675                         scb->cmd.logical_info.reserved2 = 0;
3676                         scb->cmd.logical_info.reserved3 = 0;
3677                         scb->data_len = sizeof (IPS_LD_INFO);
3678                         scb->data_busaddr = ha->logical_drive_info_dma_addr;
3679                         scb->flags = 0;
3680                         scb->cmd.logical_info.buffer_addr = scb->data_busaddr;
3681                         ret = IPS_SUCCESS;
3682                         break;
3683
3684                 case SEND_DIAGNOSTIC:
3685                 case REASSIGN_BLOCKS:
3686                 case FORMAT_UNIT:
3687                 case SEEK_10:
3688                 case VERIFY:
3689                 case READ_DEFECT_DATA:
3690                 case READ_BUFFER:
3691                 case WRITE_BUFFER:
3692                         scb->scsi_cmd->result = DID_OK << 16;
3693                         break;
3694
3695                 default:
3696                         /* Set the Return Info to appear like the Command was */
3697                         /* attempted, a Check Condition occurred, and Sense   */
3698                         /* Data indicating an Invalid CDB OpCode is returned. */
3699                         sp = (char *) scb->scsi_cmd->sense_buffer;
3700
3701                         sp[0] = 0x70;   /* Error Code               */
3702                         sp[2] = ILLEGAL_REQUEST;        /* Sense Key 5 Illegal Req. */
3703                         sp[7] = 0x0A;   /* Additional Sense Length  */
3704                         sp[12] = 0x20;  /* ASC = Invalid OpCode     */
3705                         sp[13] = 0x00;  /* ASCQ                     */
3706
3707                         device_error = 2;       /* Indicate Check Condition */
3708                         scb->scsi_cmd->result = device_error | (DID_OK << 16);
3709                         break;
3710                 }               /* end switch */
3711         }
3712         /* end if */
3713         if (ret == IPS_SUCCESS_IMM)
3714                 return (ret);
3715
3716         /* setup DCDB */
3717         if (scb->bus > 0) {
3718
3719                 /* If we already know the Device is Not there, no need to attempt a Command   */
3720                 /* This also protects an NT FailOver Controller from getting CDB's sent to it */
3721                 if (ha->conf->dev[scb->bus - 1][scb->target_id].ucState == 0) {
3722                         scb->scsi_cmd->result = DID_NO_CONNECT << 16;
3723                         return (IPS_SUCCESS_IMM);
3724                 }
3725
3726                 ha->dcdb_active[scb->bus - 1] |= (1 << scb->target_id);
3727                 scb->cmd.dcdb.command_id = IPS_COMMAND_ID(ha, scb);
3728                 scb->cmd.dcdb.dcdb_address = cpu_to_le32(scb->scb_busaddr +
3729                                                          (unsigned long) &scb->
3730                                                          dcdb -
3731                                                          (unsigned long) scb);
3732                 scb->cmd.dcdb.reserved = 0;
3733                 scb->cmd.dcdb.reserved2 = 0;
3734                 scb->cmd.dcdb.reserved3 = 0;
3735                 scb->cmd.dcdb.segment_4G = 0;
3736                 scb->cmd.dcdb.enhanced_sg = 0;
3737
3738                 TimeOut = scb->scsi_cmd->request->timeout;
3739
3740                 if (ha->subsys->param[4] & 0x00100000) {        /* If NEW Tape DCDB is Supported */
3741                         if (!scb->sg_len) {
3742                                 scb->cmd.dcdb.op_code = IPS_CMD_EXTENDED_DCDB;
3743                         } else {
3744                                 scb->cmd.dcdb.op_code =
3745                                     IPS_CMD_EXTENDED_DCDB_SG;
3746                                 scb->cmd.dcdb.enhanced_sg =
3747                                     IPS_USE_ENH_SGLIST(ha) ? 0xFF : 0;
3748                         }
3749
3750                         tapeDCDB = (IPS_DCDB_TABLE_TAPE *) & scb->dcdb; /* Use Same Data Area as Old DCDB Struct */
3751                         tapeDCDB->device_address =
3752                             ((scb->bus - 1) << 4) | scb->target_id;
3753                         tapeDCDB->cmd_attribute |= IPS_DISCONNECT_ALLOWED;
3754                         tapeDCDB->cmd_attribute &= ~IPS_TRANSFER64K;    /* Always Turn OFF 64K Size Flag */
3755
3756                         if (TimeOut) {
3757                                 if (TimeOut < (10 * HZ))
3758                                         tapeDCDB->cmd_attribute |= IPS_TIMEOUT10;       /* TimeOut is 10 Seconds */
3759                                 else if (TimeOut < (60 * HZ))
3760                                         tapeDCDB->cmd_attribute |= IPS_TIMEOUT60;       /* TimeOut is 60 Seconds */
3761                                 else if (TimeOut < (1200 * HZ))
3762                                         tapeDCDB->cmd_attribute |= IPS_TIMEOUT20M;      /* TimeOut is 20 Minutes */
3763                         }
3764
3765                         tapeDCDB->cdb_length = scb->scsi_cmd->cmd_len;
3766                         tapeDCDB->reserved_for_LUN = 0;
3767                         tapeDCDB->transfer_length = scb->data_len;
3768                         if (scb->cmd.dcdb.op_code == IPS_CMD_EXTENDED_DCDB_SG)
3769                                 tapeDCDB->buffer_pointer =
3770                                     cpu_to_le32(scb->sg_busaddr);
3771                         else
3772                                 tapeDCDB->buffer_pointer =
3773                                     cpu_to_le32(scb->data_busaddr);
3774                         tapeDCDB->sg_count = scb->sg_len;
3775                         tapeDCDB->sense_length = sizeof (tapeDCDB->sense_info);
3776                         tapeDCDB->scsi_status = 0;
3777                         tapeDCDB->reserved = 0;
3778                         memcpy(tapeDCDB->scsi_cdb, scb->scsi_cmd->cmnd,
3779                                scb->scsi_cmd->cmd_len);
3780                 } else {
3781                         if (!scb->sg_len) {
3782                                 scb->cmd.dcdb.op_code = IPS_CMD_DCDB;
3783                         } else {
3784                                 scb->cmd.dcdb.op_code = IPS_CMD_DCDB_SG;
3785                                 scb->cmd.dcdb.enhanced_sg =
3786                                     IPS_USE_ENH_SGLIST(ha) ? 0xFF : 0;
3787                         }
3788
3789                         scb->dcdb.device_address =
3790                             ((scb->bus - 1) << 4) | scb->target_id;
3791                         scb->dcdb.cmd_attribute |= IPS_DISCONNECT_ALLOWED;
3792
3793                         if (TimeOut) {
3794                                 if (TimeOut < (10 * HZ))
3795                                         scb->dcdb.cmd_attribute |= IPS_TIMEOUT10;       /* TimeOut is 10 Seconds */
3796                                 else if (TimeOut < (60 * HZ))
3797                                         scb->dcdb.cmd_attribute |= IPS_TIMEOUT60;       /* TimeOut is 60 Seconds */
3798                                 else if (TimeOut < (1200 * HZ))
3799                                         scb->dcdb.cmd_attribute |= IPS_TIMEOUT20M;      /* TimeOut is 20 Minutes */
3800                         }
3801
3802                         scb->dcdb.transfer_length = scb->data_len;
3803                         if (scb->dcdb.cmd_attribute & IPS_TRANSFER64K)
3804                                 scb->dcdb.transfer_length = 0;
3805                         if (scb->cmd.dcdb.op_code == IPS_CMD_DCDB_SG)
3806                                 scb->dcdb.buffer_pointer =
3807                                     cpu_to_le32(scb->sg_busaddr);
3808                         else
3809                                 scb->dcdb.buffer_pointer =
3810                                     cpu_to_le32(scb->data_busaddr);
3811                         scb->dcdb.cdb_length = scb->scsi_cmd->cmd_len;
3812                         scb->dcdb.sense_length = sizeof (scb->dcdb.sense_info);
3813                         scb->dcdb.sg_count = scb->sg_len;
3814                         scb->dcdb.reserved = 0;
3815                         memcpy(scb->dcdb.scsi_cdb, scb->scsi_cmd->cmnd,
3816                                scb->scsi_cmd->cmd_len);
3817                         scb->dcdb.scsi_status = 0;
3818                         scb->dcdb.reserved2[0] = 0;
3819                         scb->dcdb.reserved2[1] = 0;
3820                         scb->dcdb.reserved2[2] = 0;
3821                 }
3822         }
3823
3824         return ((*ha->func.issue) (ha, scb));
3825 }
3826
3827 /****************************************************************************/
3828 /*                                                                          */
3829 /* Routine Name: ips_chk_status                                             */
3830 /*                                                                          */
3831 /* Routine Description:                                                     */
3832 /*                                                                          */
3833 /*   Check the status of commands to logical drives                         */
3834 /*   Assumed to be called with the HA lock                                  */
3835 /****************************************************************************/
3836 static void
3837 ips_chkstatus(ips_ha_t * ha, IPS_STATUS * pstatus)
3838 {
3839         ips_scb_t *scb;
3840         ips_stat_t *sp;
3841         uint8_t basic_status;
3842         uint8_t ext_status;
3843         int errcode;
3844         IPS_SCSI_INQ_DATA inquiryData;
3845
3846         METHOD_TRACE("ips_chkstatus", 1);
3847
3848         scb = &ha->scbs[pstatus->fields.command_id];
3849         scb->basic_status = basic_status =
3850             pstatus->fields.basic_status & IPS_BASIC_STATUS_MASK;
3851         scb->extended_status = ext_status = pstatus->fields.extended_status;
3852
3853         sp = &ha->sp;
3854         sp->residue_len = 0;
3855         sp->scb_addr = (void *) scb;
3856
3857         /* Remove the item from the active queue */
3858         ips_removeq_scb(&ha->scb_activelist, scb);
3859
3860         if (!scb->scsi_cmd)
3861                 /* internal commands are handled in do_ipsintr */
3862                 return;
3863
3864         DEBUG_VAR(2, "(%s%d) ips_chkstatus: cmd 0x%X id %d (%d %d %d)",
3865                   ips_name,
3866                   ha->host_num,
3867                   scb->cdb[0],
3868                   scb->cmd.basic_io.command_id,
3869                   scb->bus, scb->target_id, scb->lun);
3870
3871         if ((scb->scsi_cmd) && (ips_is_passthru(scb->scsi_cmd)))
3872                 /* passthru - just returns the raw result */
3873                 return;
3874
3875         errcode = DID_OK;
3876
3877         if (((basic_status & IPS_GSC_STATUS_MASK) == IPS_CMD_SUCCESS) ||
3878             ((basic_status & IPS_GSC_STATUS_MASK) == IPS_CMD_RECOVERED_ERROR)) {
3879
3880                 if (scb->bus == 0) {
3881                         if ((basic_status & IPS_GSC_STATUS_MASK) ==
3882                             IPS_CMD_RECOVERED_ERROR) {
3883                                 DEBUG_VAR(1,
3884                                           "(%s%d) Recovered Logical Drive Error OpCode: %x, BSB: %x, ESB: %x",
3885                                           ips_name, ha->host_num,
3886                                           scb->cmd.basic_io.op_code,
3887                                           basic_status, ext_status);
3888                         }
3889
3890                         switch (scb->scsi_cmd->cmnd[0]) {
3891                         case ALLOW_MEDIUM_REMOVAL:
3892                         case REZERO_UNIT:
3893                         case ERASE:
3894                         case WRITE_FILEMARKS:
3895                         case SPACE:
3896                                 errcode = DID_ERROR;
3897                                 break;
3898
3899                         case START_STOP:
3900                                 break;
3901
3902                         case TEST_UNIT_READY:
3903                                 if (!ips_online(ha, scb)) {
3904                                         errcode = DID_TIME_OUT;
3905                                 }
3906                                 break;
3907
3908                         case INQUIRY:
3909                                 if (ips_online(ha, scb)) {
3910                                         ips_inquiry(ha, scb);
3911                                 } else {
3912                                         errcode = DID_TIME_OUT;
3913                                 }
3914                                 break;
3915
3916                         case REQUEST_SENSE:
3917                                 ips_reqsen(ha, scb);
3918                                 break;
3919
3920                         case READ_6:
3921                         case WRITE_6:
3922                         case READ_10:
3923                         case WRITE_10:
3924                         case RESERVE:
3925                         case RELEASE:
3926                                 break;
3927
3928                         case MODE_SENSE:
3929                                 if (!ips_online(ha, scb)
3930                                     || !ips_msense(ha, scb)) {
3931                                         errcode = DID_ERROR;
3932                                 }
3933                                 break;
3934
3935                         case READ_CAPACITY:
3936                                 if (ips_online(ha, scb))
3937                                         ips_rdcap(ha, scb);
3938                                 else {
3939                                         errcode = DID_TIME_OUT;
3940                                 }
3941                                 break;
3942
3943                         case SEND_DIAGNOSTIC:
3944                         case REASSIGN_BLOCKS:
3945                                 break;
3946
3947                         case FORMAT_UNIT:
3948                                 errcode = DID_ERROR;
3949                                 break;
3950
3951                         case SEEK_10:
3952                         case VERIFY:
3953                         case READ_DEFECT_DATA:
3954                         case READ_BUFFER:
3955                         case WRITE_BUFFER:
3956                                 break;
3957
3958                         default:
3959                                 errcode = DID_ERROR;
3960                         }       /* end switch */
3961
3962                         scb->scsi_cmd->result = errcode << 16;
3963                 } else {        /* bus == 0 */
3964                         /* restrict access to physical drives */
3965                         if (scb->scsi_cmd->cmnd[0] == INQUIRY) {
3966                             ips_scmd_buf_read(scb->scsi_cmd,
3967                                   &inquiryData, sizeof (inquiryData));
3968                             if ((inquiryData.DeviceType & 0x1f) == TYPE_DISK)
3969                                 scb->scsi_cmd->result = DID_TIME_OUT << 16;
3970                         }
3971                 }               /* else */
3972         } else {                /* recovered error / success */
3973                 if (scb->bus == 0) {
3974                         DEBUG_VAR(1,
3975                                   "(%s%d) Unrecovered Logical Drive Error OpCode: %x, BSB: %x, ESB: %x",
3976                                   ips_name, ha->host_num,
3977                                   scb->cmd.basic_io.op_code, basic_status,
3978                                   ext_status);
3979                 }
3980
3981                 ips_map_status(ha, scb, sp);
3982         }                       /* else */
3983 }
3984
3985 /****************************************************************************/
3986 /*                                                                          */
3987 /* Routine Name: ips_online                                                 */
3988 /*                                                                          */
3989 /* Routine Description:                                                     */
3990 /*                                                                          */
3991 /*   Determine if a logical drive is online                                 */
3992 /*                                                                          */
3993 /****************************************************************************/
3994 static int
3995 ips_online(ips_ha_t * ha, ips_scb_t * scb)
3996 {
3997         METHOD_TRACE("ips_online", 1);
3998
3999         if (scb->target_id >= IPS_MAX_LD)
4000                 return (0);
4001
4002         if ((scb->basic_status & IPS_GSC_STATUS_MASK) > 1) {
4003                 memset(ha->logical_drive_info, 0, sizeof (IPS_LD_INFO));
4004                 return (0);
4005         }
4006
4007         if (ha->logical_drive_info->drive_info[scb->target_id].state !=
4008             IPS_LD_OFFLINE
4009             && ha->logical_drive_info->drive_info[scb->target_id].state !=
4010             IPS_LD_FREE
4011             && ha->logical_drive_info->drive_info[scb->target_id].state !=
4012             IPS_LD_CRS
4013             && ha->logical_drive_info->drive_info[scb->target_id].state !=
4014             IPS_LD_SYS)
4015                 return (1);
4016         else
4017                 return (0);
4018 }
4019
4020 /****************************************************************************/
4021 /*                                                                          */
4022 /* Routine Name: ips_inquiry                                                */
4023 /*                                                                          */
4024 /* Routine Description:                                                     */
4025 /*                                                                          */
4026 /*   Simulate an inquiry command to a logical drive                         */
4027 /*                                                                          */
4028 /****************************************************************************/
4029 static int
4030 ips_inquiry(ips_ha_t * ha, ips_scb_t * scb)
4031 {
4032         IPS_SCSI_INQ_DATA inquiry;
4033
4034         METHOD_TRACE("ips_inquiry", 1);
4035
4036         memset(&inquiry, 0, sizeof (IPS_SCSI_INQ_DATA));
4037
4038         inquiry.DeviceType = IPS_SCSI_INQ_TYPE_DASD;
4039         inquiry.DeviceTypeQualifier = IPS_SCSI_INQ_LU_CONNECTED;
4040         inquiry.Version = IPS_SCSI_INQ_REV2;
4041         inquiry.ResponseDataFormat = IPS_SCSI_INQ_RD_REV2;
4042         inquiry.AdditionalLength = 31;
4043         inquiry.Flags[0] = IPS_SCSI_INQ_Address16;
4044         inquiry.Flags[1] =
4045             IPS_SCSI_INQ_WBus16 | IPS_SCSI_INQ_Sync | IPS_SCSI_INQ_CmdQue;
4046         memcpy(inquiry.VendorId, "IBM     ", 8);
4047         memcpy(inquiry.ProductId, "SERVERAID       ", 16);
4048         memcpy(inquiry.ProductRevisionLevel, "1.00", 4);
4049
4050         ips_scmd_buf_write(scb->scsi_cmd, &inquiry, sizeof (inquiry));
4051
4052         return (1);
4053 }
4054
4055 /****************************************************************************/
4056 /*                                                                          */
4057 /* Routine Name: ips_rdcap                                                  */
4058 /*                                                                          */
4059 /* Routine Description:                                                     */
4060 /*                                                                          */
4061 /*   Simulate a read capacity command to a logical drive                    */
4062 /*                                                                          */
4063 /****************************************************************************/
4064 static int
4065 ips_rdcap(ips_ha_t * ha, ips_scb_t * scb)
4066 {
4067         IPS_SCSI_CAPACITY cap;
4068
4069         METHOD_TRACE("ips_rdcap", 1);
4070
4071         if (scsi_bufflen(scb->scsi_cmd) < 8)
4072                 return (0);
4073
4074         cap.lba =
4075             cpu_to_be32(le32_to_cpu
4076                         (ha->logical_drive_info->
4077                          drive_info[scb->target_id].sector_count) - 1);
4078         cap.len = cpu_to_be32((uint32_t) IPS_BLKSIZE);
4079
4080         ips_scmd_buf_write(scb->scsi_cmd, &cap, sizeof (cap));
4081
4082         return (1);
4083 }
4084
4085 /****************************************************************************/
4086 /*                                                                          */
4087 /* Routine Name: ips_msense                                                 */
4088 /*                                                                          */
4089 /* Routine Description:                                                     */
4090 /*                                                                          */
4091 /*   Simulate a mode sense command to a logical drive                       */
4092 /*                                                                          */
4093 /****************************************************************************/
4094 static int
4095 ips_msense(ips_ha_t * ha, ips_scb_t * scb)
4096 {
4097         uint16_t heads;
4098         uint16_t sectors;
4099         uint32_t cylinders;
4100         IPS_SCSI_MODE_PAGE_DATA mdata;
4101
4102         METHOD_TRACE("ips_msense", 1);
4103
4104         if (le32_to_cpu(ha->enq->ulDriveSize[scb->target_id]) > 0x400000 &&
4105             (ha->enq->ucMiscFlag & 0x8) == 0) {
4106                 heads = IPS_NORM_HEADS;
4107                 sectors = IPS_NORM_SECTORS;
4108         } else {
4109                 heads = IPS_COMP_HEADS;
4110                 sectors = IPS_COMP_SECTORS;
4111         }
4112
4113         cylinders =
4114             (le32_to_cpu(ha->enq->ulDriveSize[scb->target_id]) -
4115              1) / (heads * sectors);
4116
4117         memset(&mdata, 0, sizeof (IPS_SCSI_MODE_PAGE_DATA));
4118
4119         mdata.hdr.BlockDescLength = 8;
4120
4121         switch (scb->scsi_cmd->cmnd[2] & 0x3f) {
4122         case 0x03:              /* page 3 */
4123                 mdata.pdata.pg3.PageCode = 3;
4124                 mdata.pdata.pg3.PageLength = sizeof (IPS_SCSI_MODE_PAGE3);
4125                 mdata.hdr.DataLength =
4126                     3 + mdata.hdr.BlockDescLength + mdata.pdata.pg3.PageLength;
4127                 mdata.pdata.pg3.TracksPerZone = 0;
4128                 mdata.pdata.pg3.AltSectorsPerZone = 0;
4129                 mdata.pdata.pg3.AltTracksPerZone = 0;
4130                 mdata.pdata.pg3.AltTracksPerVolume = 0;
4131                 mdata.pdata.pg3.SectorsPerTrack = cpu_to_be16(sectors);
4132                 mdata.pdata.pg3.BytesPerSector = cpu_to_be16(IPS_BLKSIZE);
4133                 mdata.pdata.pg3.Interleave = cpu_to_be16(1);
4134                 mdata.pdata.pg3.TrackSkew = 0;
4135                 mdata.pdata.pg3.CylinderSkew = 0;
4136                 mdata.pdata.pg3.flags = IPS_SCSI_MP3_SoftSector;
4137                 break;
4138
4139         case 0x4:
4140                 mdata.pdata.pg4.PageCode = 4;
4141                 mdata.pdata.pg4.PageLength = sizeof (IPS_SCSI_MODE_PAGE4);
4142                 mdata.hdr.DataLength =
4143                     3 + mdata.hdr.BlockDescLength + mdata.pdata.pg4.PageLength;
4144                 mdata.pdata.pg4.CylindersHigh =
4145                     cpu_to_be16((cylinders >> 8) & 0xFFFF);
4146                 mdata.pdata.pg4.CylindersLow = (cylinders & 0xFF);
4147                 mdata.pdata.pg4.Heads = heads;
4148                 mdata.pdata.pg4.WritePrecompHigh = 0;
4149                 mdata.pdata.pg4.WritePrecompLow = 0;
4150                 mdata.pdata.pg4.ReducedWriteCurrentHigh = 0;
4151                 mdata.pdata.pg4.ReducedWriteCurrentLow = 0;
4152                 mdata.pdata.pg4.StepRate = cpu_to_be16(1);
4153                 mdata.pdata.pg4.LandingZoneHigh = 0;
4154                 mdata.pdata.pg4.LandingZoneLow = 0;
4155                 mdata.pdata.pg4.flags = 0;
4156                 mdata.pdata.pg4.RotationalOffset = 0;
4157                 mdata.pdata.pg4.MediumRotationRate = 0;
4158                 break;
4159         case 0x8:
4160                 mdata.pdata.pg8.PageCode = 8;
4161                 mdata.pdata.pg8.PageLength = sizeof (IPS_SCSI_MODE_PAGE8);
4162                 mdata.hdr.DataLength =
4163                     3 + mdata.hdr.BlockDescLength + mdata.pdata.pg8.PageLength;
4164                 /* everything else is left set to 0 */
4165                 break;
4166
4167         default:
4168                 return (0);
4169         }                       /* end switch */
4170
4171         ips_scmd_buf_write(scb->scsi_cmd, &mdata, sizeof (mdata));
4172
4173         return (1);
4174 }
4175
4176 /****************************************************************************/
4177 /*                                                                          */
4178 /* Routine Name: ips_reqsen                                                 */
4179 /*                                                                          */
4180 /* Routine Description:                                                     */
4181 /*                                                                          */
4182 /*   Simulate a request sense command to a logical drive                    */
4183 /*                                                                          */
4184 /****************************************************************************/
4185 static int
4186 ips_reqsen(ips_ha_t * ha, ips_scb_t * scb)
4187 {
4188         IPS_SCSI_REQSEN reqsen;
4189
4190         METHOD_TRACE("ips_reqsen", 1);
4191
4192         memset(&reqsen, 0, sizeof (IPS_SCSI_REQSEN));
4193
4194         reqsen.ResponseCode =
4195             IPS_SCSI_REQSEN_VALID | IPS_SCSI_REQSEN_CURRENT_ERR;
4196         reqsen.AdditionalLength = 10;
4197         reqsen.AdditionalSenseCode = IPS_SCSI_REQSEN_NO_SENSE;
4198         reqsen.AdditionalSenseCodeQual = IPS_SCSI_REQSEN_NO_SENSE;
4199
4200         ips_scmd_buf_write(scb->scsi_cmd, &reqsen, sizeof (reqsen));
4201
4202         return (1);
4203 }
4204
4205 /****************************************************************************/
4206 /*                                                                          */
4207 /* Routine Name: ips_free                                                   */
4208 /*                                                                          */
4209 /* Routine Description:                                                     */
4210 /*                                                                          */
4211 /*   Free any allocated space for this controller                           */
4212 /*                                                                          */
4213 /****************************************************************************/
4214 static void
4215 ips_free(ips_ha_t * ha)
4216 {
4217
4218         METHOD_TRACE("ips_free", 1);
4219
4220         if (ha) {
4221                 if (ha->enq) {
4222                         dma_free_coherent(&ha->pcidev->dev, sizeof(IPS_ENQ),
4223                                             ha->enq, ha->enq_busaddr);
4224                         ha->enq = NULL;
4225                 }
4226
4227                 kfree(ha->conf);
4228                 ha->conf = NULL;
4229
4230                 if (ha->adapt) {
4231                         dma_free_coherent(&ha->pcidev->dev,
4232                                             sizeof (IPS_ADAPTER) +
4233                                             sizeof (IPS_IO_CMD), ha->adapt,
4234                                             ha->adapt->hw_status_start);
4235                         ha->adapt = NULL;
4236                 }
4237
4238                 if (ha->logical_drive_info) {
4239                         dma_free_coherent(&ha->pcidev->dev,
4240                                             sizeof (IPS_LD_INFO),
4241                                             ha->logical_drive_info,
4242                                             ha->logical_drive_info_dma_addr);
4243                         ha->logical_drive_info = NULL;
4244                 }
4245
4246                 kfree(ha->nvram);
4247                 ha->nvram = NULL;
4248
4249                 kfree(ha->subsys);
4250                 ha->subsys = NULL;
4251
4252                 if (ha->ioctl_data) {
4253                         dma_free_coherent(&ha->pcidev->dev, ha->ioctl_len,
4254                                             ha->ioctl_data, ha->ioctl_busaddr);
4255                         ha->ioctl_data = NULL;
4256                         ha->ioctl_datasize = 0;
4257                         ha->ioctl_len = 0;
4258                 }
4259                 ips_deallocatescbs(ha, ha->max_cmds);
4260
4261                 /* free memory mapped (if applicable) */
4262                 if (ha->mem_ptr) {
4263                         iounmap(ha->ioremap_ptr);
4264                         ha->ioremap_ptr = NULL;
4265                         ha->mem_ptr = NULL;
4266                 }
4267
4268                 ha->mem_addr = 0;
4269
4270         }
4271 }
4272
4273 /****************************************************************************/
4274 /*                                                                          */
4275 /* Routine Name: ips_deallocatescbs                                         */
4276 /*                                                                          */
4277 /* Routine Description:                                                     */
4278 /*                                                                          */
4279 /*   Free the command blocks                                                */
4280 /*                                                                          */
4281 /****************************************************************************/
4282 static int
4283 ips_deallocatescbs(ips_ha_t * ha, int cmds)
4284 {
4285         if (ha->scbs) {
4286                 dma_free_coherent(&ha->pcidev->dev,
4287                                     IPS_SGLIST_SIZE(ha) * IPS_MAX_SG * cmds,
4288                                     ha->scbs->sg_list.list,
4289                                     ha->scbs->sg_busaddr);
4290                 dma_free_coherent(&ha->pcidev->dev, sizeof (ips_scb_t) * cmds,
4291                                     ha->scbs, ha->scbs->scb_busaddr);
4292                 ha->scbs = NULL;
4293         }                       /* end if */
4294         return 1;
4295 }
4296
4297 /****************************************************************************/
4298 /*                                                                          */
4299 /* Routine Name: ips_allocatescbs                                           */
4300 /*                                                                          */
4301 /* Routine Description:                                                     */
4302 /*                                                                          */
4303 /*   Allocate the command blocks                                            */
4304 /*                                                                          */
4305 /****************************************************************************/
4306 static int
4307 ips_allocatescbs(ips_ha_t * ha)
4308 {
4309         ips_scb_t *scb_p;
4310         IPS_SG_LIST ips_sg;
4311         int i;
4312         dma_addr_t command_dma, sg_dma;
4313
4314         METHOD_TRACE("ips_allocatescbs", 1);
4315
4316         /* Allocate memory for the SCBs */
4317         ha->scbs = dma_alloc_coherent(&ha->pcidev->dev,
4318                         ha->max_cmds * sizeof (ips_scb_t),
4319                         &command_dma, GFP_KERNEL);
4320         if (ha->scbs == NULL)
4321                 return 0;
4322         ips_sg.list = dma_alloc_coherent(&ha->pcidev->dev,
4323                         IPS_SGLIST_SIZE(ha) * IPS_MAX_SG * ha->max_cmds,
4324                         &sg_dma, GFP_KERNEL);
4325         if (ips_sg.list == NULL) {
4326                 dma_free_coherent(&ha->pcidev->dev,
4327                                     ha->max_cmds * sizeof (ips_scb_t), ha->scbs,
4328                                     command_dma);
4329                 return 0;
4330         }
4331
4332         memset(ha->scbs, 0, ha->max_cmds * sizeof (ips_scb_t));
4333
4334         for (i = 0; i < ha->max_cmds; i++) {
4335                 scb_p = &ha->scbs[i];
4336                 scb_p->scb_busaddr = command_dma + sizeof (ips_scb_t) * i;
4337                 /* set up S/G list */
4338                 if (IPS_USE_ENH_SGLIST(ha)) {
4339                         scb_p->sg_list.enh_list =
4340                             ips_sg.enh_list + i * IPS_MAX_SG;
4341                         scb_p->sg_busaddr =
4342                             sg_dma + IPS_SGLIST_SIZE(ha) * IPS_MAX_SG * i;
4343                 } else {
4344                         scb_p->sg_list.std_list =
4345                             ips_sg.std_list + i * IPS_MAX_SG;
4346                         scb_p->sg_busaddr =
4347                             sg_dma + IPS_SGLIST_SIZE(ha) * IPS_MAX_SG * i;
4348                 }
4349
4350                 /* add to the free list */
4351                 if (i < ha->max_cmds - 1) {
4352                         scb_p->q_next = ha->scb_freelist;
4353                         ha->scb_freelist = scb_p;
4354                 }
4355         }
4356
4357         /* success */
4358         return (1);
4359 }
4360
4361 /****************************************************************************/
4362 /*                                                                          */
4363 /* Routine Name: ips_init_scb                                               */
4364 /*                                                                          */
4365 /* Routine Description:                                                     */
4366 /*                                                                          */
4367 /*   Initialize a CCB to default values                                     */
4368 /*                                                                          */
4369 /****************************************************************************/
4370 static void
4371 ips_init_scb(ips_ha_t * ha, ips_scb_t * scb)
4372 {
4373         IPS_SG_LIST sg_list;
4374         uint32_t cmd_busaddr, sg_busaddr;
4375         METHOD_TRACE("ips_init_scb", 1);
4376
4377         if (scb == NULL)
4378                 return;
4379
4380         sg_list.list = scb->sg_list.list;
4381         cmd_busaddr = scb->scb_busaddr;
4382         sg_busaddr = scb->sg_busaddr;
4383         /* zero fill */
4384         memset(scb, 0, sizeof (ips_scb_t));
4385         memset(ha->dummy, 0, sizeof (IPS_IO_CMD));
4386
4387         /* Initialize dummy command bucket */
4388         ha->dummy->op_code = 0xFF;
4389         ha->dummy->ccsar = cpu_to_le32(ha->adapt->hw_status_start
4390                                        + sizeof (IPS_ADAPTER));
4391         ha->dummy->command_id = IPS_MAX_CMDS;
4392
4393         /* set bus address of scb */
4394         scb->scb_busaddr = cmd_busaddr;
4395         scb->sg_busaddr = sg_busaddr;
4396         scb->sg_list.list = sg_list.list;
4397
4398         /* Neptune Fix */
4399         scb->cmd.basic_io.cccr = cpu_to_le32((uint32_t) IPS_BIT_ILE);
4400         scb->cmd.basic_io.ccsar = cpu_to_le32(ha->adapt->hw_status_start
4401                                               + sizeof (IPS_ADAPTER));
4402 }
4403
4404 /****************************************************************************/
4405 /*                                                                          */
4406 /* Routine Name: ips_get_scb                                                */
4407 /*                                                                          */
4408 /* Routine Description:                                                     */
4409 /*                                                                          */
4410 /*   Initialize a CCB to default values                                     */
4411 /*                                                                          */
4412 /* ASSUMED to be called from within a lock                                 */
4413 /*                                                                          */
4414 /****************************************************************************/
4415 static ips_scb_t *
4416 ips_getscb(ips_ha_t * ha)
4417 {
4418         ips_scb_t *scb;
4419
4420         METHOD_TRACE("ips_getscb", 1);
4421
4422         if ((scb = ha->scb_freelist) == NULL) {
4423
4424                 return (NULL);
4425         }
4426
4427         ha->scb_freelist = scb->q_next;
4428         scb->flags = 0;
4429         scb->q_next = NULL;
4430
4431         ips_init_scb(ha, scb);
4432
4433         return (scb);
4434 }
4435
4436 /****************************************************************************/
4437 /*                                                                          */
4438 /* Routine Name: ips_free_scb                                               */
4439 /*                                                                          */
4440 /* Routine Description:                                                     */
4441 /*                                                                          */
4442 /*   Return an unused CCB back to the free list                             */
4443 /*                                                                          */
4444 /* ASSUMED to be called from within a lock                                  */
4445 /*                                                                          */
4446 /****************************************************************************/
4447 static void
4448 ips_freescb(ips_ha_t * ha, ips_scb_t * scb)
4449 {
4450
4451         METHOD_TRACE("ips_freescb", 1);
4452         if (scb->flags & IPS_SCB_MAP_SG)
4453                 scsi_dma_unmap(scb->scsi_cmd);
4454         else if (scb->flags & IPS_SCB_MAP_SINGLE)
4455                 dma_unmap_single(&ha->pcidev->dev, scb->data_busaddr,
4456                                  scb->data_len, IPS_DMA_DIR(scb));
4457
4458         /* check to make sure this is not our "special" scb */
4459         if (IPS_COMMAND_ID(ha, scb) < (ha->max_cmds - 1)) {
4460                 scb->q_next = ha->scb_freelist;
4461                 ha->scb_freelist = scb;
4462         }
4463 }
4464
4465 /****************************************************************************/
4466 /*                                                                          */
4467 /* Routine Name: ips_isinit_copperhead                                      */
4468 /*                                                                          */
4469 /* Routine Description:                                                     */
4470 /*                                                                          */
4471 /*   Is controller initialized ?                                            */
4472 /*                                                                          */
4473 /****************************************************************************/
4474 static int
4475 ips_isinit_copperhead(ips_ha_t * ha)
4476 {
4477         uint8_t scpr;
4478         uint8_t isr;
4479
4480         METHOD_TRACE("ips_isinit_copperhead", 1);
4481
4482         isr = inb(ha->io_addr + IPS_REG_HISR);
4483         scpr = inb(ha->io_addr + IPS_REG_SCPR);
4484
4485         if (((isr & IPS_BIT_EI) == 0) && ((scpr & IPS_BIT_EBM) == 0))
4486                 return (0);
4487         else
4488                 return (1);
4489 }
4490
4491 /****************************************************************************/
4492 /*                                                                          */
4493 /* Routine Name: ips_isinit_copperhead_memio                                */
4494 /*                                                                          */
4495 /* Routine Description:                                                     */
4496 /*                                                                          */
4497 /*   Is controller initialized ?                                            */
4498 /*                                                                          */
4499 /****************************************************************************/
4500 static int
4501 ips_isinit_copperhead_memio(ips_ha_t * ha)
4502 {
4503         uint8_t isr = 0;
4504         uint8_t scpr;
4505
4506         METHOD_TRACE("ips_is_init_copperhead_memio", 1);
4507
4508         isr = readb(ha->mem_ptr + IPS_REG_HISR);
4509         scpr = readb(ha->mem_ptr + IPS_REG_SCPR);
4510
4511         if (((isr & IPS_BIT_EI) == 0) && ((scpr & IPS_BIT_EBM) == 0))
4512                 return (0);
4513         else
4514                 return (1);
4515 }
4516
4517 /****************************************************************************/
4518 /*                                                                          */
4519 /* Routine Name: ips_isinit_morpheus                                        */
4520 /*                                                                          */
4521 /* Routine Description:                                                     */
4522 /*                                                                          */
4523 /*   Is controller initialized ?                                            */
4524 /*                                                                          */
4525 /****************************************************************************/
4526 static int
4527 ips_isinit_morpheus(ips_ha_t * ha)
4528 {
4529         uint32_t post;
4530         uint32_t bits;
4531
4532         METHOD_TRACE("ips_is_init_morpheus", 1);
4533
4534         if (ips_isintr_morpheus(ha))
4535             ips_flush_and_reset(ha);
4536
4537         post = readl(ha->mem_ptr + IPS_REG_I960_MSG0);
4538         bits = readl(ha->mem_ptr + IPS_REG_I2O_HIR);
4539
4540         if (post == 0)
4541                 return (0);
4542         else if (bits & 0x3)
4543                 return (0);
4544         else
4545                 return (1);
4546 }
4547
4548 /****************************************************************************/
4549 /*                                                                          */
4550 /* Routine Name: ips_flush_and_reset                                        */
4551 /*                                                                          */
4552 /* Routine Description:                                                     */
4553 /*                                                                          */
4554 /*   Perform cleanup ( FLUSH and RESET ) when the adapter is in an unknown  */
4555 /*   state ( was trying to INIT and an interrupt was already pending ) ...  */
4556 /*                                                                          */
4557 /****************************************************************************/
4558 static void
4559 ips_flush_and_reset(ips_ha_t *ha)
4560 {
4561         ips_scb_t *scb;
4562         int  ret;
4563         int  time;
4564         int  done;
4565         dma_addr_t command_dma;
4566
4567         /* Create a usuable SCB */
4568         scb = dma_alloc_coherent(&ha->pcidev->dev, sizeof(ips_scb_t),
4569                         &command_dma, GFP_KERNEL);
4570         if (scb) {
4571             memset(scb, 0, sizeof(ips_scb_t));
4572             ips_init_scb(ha, scb);
4573             scb->scb_busaddr = command_dma;
4574
4575             scb->timeout = ips_cmd_timeout;
4576             scb->cdb[0] = IPS_CMD_FLUSH;
4577
4578             scb->cmd.flush_cache.op_code = IPS_CMD_FLUSH;
4579             scb->cmd.flush_cache.command_id = IPS_MAX_CMDS;   /* Use an ID that would otherwise not exist */
4580             scb->cmd.flush_cache.state = IPS_NORM_STATE;
4581             scb->cmd.flush_cache.reserved = 0;
4582             scb->cmd.flush_cache.reserved2 = 0;
4583             scb->cmd.flush_cache.reserved3 = 0;
4584             scb->cmd.flush_cache.reserved4 = 0;
4585
4586             ret = ips_send_cmd(ha, scb);                      /* Send the Flush Command */
4587
4588             if (ret == IPS_SUCCESS) {
4589                 time = 60 * IPS_ONE_SEC;                      /* Max Wait time is 60 seconds */
4590                 done = 0;
4591
4592                 while ((time > 0) && (!done)) {
4593                    done = ips_poll_for_flush_complete(ha);
4594                    /* This may look evil, but it's only done during extremely rare start-up conditions ! */
4595                    udelay(1000);
4596                    time--;
4597                 }
4598         }
4599         }
4600
4601         /* Now RESET and INIT the adapter */
4602         (*ha->func.reset) (ha);
4603
4604         dma_free_coherent(&ha->pcidev->dev, sizeof(ips_scb_t), scb, command_dma);
4605         return;
4606 }
4607
4608 /****************************************************************************/
4609 /*                                                                          */
4610 /* Routine Name: ips_poll_for_flush_complete                                */
4611 /*                                                                          */
4612 /* Routine Description:                                                     */
4613 /*                                                                          */
4614 /*   Poll for the Flush Command issued by ips_flush_and_reset() to complete */
4615 /*   All other responses are just taken off the queue and ignored           */
4616 /*                                                                          */
4617 /****************************************************************************/
4618 static int
4619 ips_poll_for_flush_complete(ips_ha_t * ha)
4620 {
4621         IPS_STATUS cstatus;
4622
4623         while (TRUE) {
4624             cstatus.value = (*ha->func.statupd) (ha);
4625
4626             if (cstatus.value == 0xffffffff)      /* If No Interrupt to process */
4627                         break;
4628
4629             /* Success is when we see the Flush Command ID */
4630             if (cstatus.fields.command_id == IPS_MAX_CMDS)
4631                 return 1;
4632          }
4633
4634         return 0;
4635 }
4636
4637 /****************************************************************************/
4638 /*                                                                          */
4639 /* Routine Name: ips_enable_int_copperhead                                  */
4640 /*                                                                          */
4641 /* Routine Description:                                                     */
4642 /*   Turn on interrupts                                                     */
4643 /*                                                                          */
4644 /****************************************************************************/
4645 static void
4646 ips_enable_int_copperhead(ips_ha_t * ha)
4647 {
4648         METHOD_TRACE("ips_enable_int_copperhead", 1);
4649
4650         outb(ha->io_addr + IPS_REG_HISR, IPS_BIT_EI);
4651         inb(ha->io_addr + IPS_REG_HISR);        /*Ensure PCI Posting Completes*/
4652 }
4653
4654 /****************************************************************************/
4655 /*                                                                          */
4656 /* Routine Name: ips_enable_int_copperhead_memio                            */
4657 /*                                                                          */
4658 /* Routine Description:                                                     */
4659 /*   Turn on interrupts                                                     */
4660 /*                                                                          */
4661 /****************************************************************************/
4662 static void
4663 ips_enable_int_copperhead_memio(ips_ha_t * ha)
4664 {
4665         METHOD_TRACE("ips_enable_int_copperhead_memio", 1);
4666
4667         writeb(IPS_BIT_EI, ha->mem_ptr + IPS_REG_HISR);
4668         readb(ha->mem_ptr + IPS_REG_HISR);      /*Ensure PCI Posting Completes*/
4669 }
4670
4671 /****************************************************************************/
4672 /*                                                                          */
4673 /* Routine Name: ips_enable_int_morpheus                                    */
4674 /*                                                                          */
4675 /* Routine Description:                                                     */
4676 /*   Turn on interrupts                                                     */
4677 /*                                                                          */
4678 /****************************************************************************/
4679 static void
4680 ips_enable_int_morpheus(ips_ha_t * ha)
4681 {
4682         uint32_t Oimr;
4683
4684         METHOD_TRACE("ips_enable_int_morpheus", 1);
4685
4686         Oimr = readl(ha->mem_ptr + IPS_REG_I960_OIMR);
4687         Oimr &= ~0x08;
4688         writel(Oimr, ha->mem_ptr + IPS_REG_I960_OIMR);
4689         readl(ha->mem_ptr + IPS_REG_I960_OIMR); /*Ensure PCI Posting Completes*/
4690 }
4691
4692 /****************************************************************************/
4693 /*                                                                          */
4694 /* Routine Name: ips_init_copperhead                                        */
4695 /*                                                                          */
4696 /* Routine Description:                                                     */
4697 /*                                                                          */
4698 /*   Initialize a copperhead controller                                     */
4699 /*                                                                          */
4700 /****************************************************************************/
4701 static int
4702 ips_init_copperhead(ips_ha_t * ha)
4703 {
4704         uint8_t Isr;
4705         uint8_t Cbsp;
4706         uint8_t PostByte[IPS_MAX_POST_BYTES];
4707         int i, j;
4708
4709         METHOD_TRACE("ips_init_copperhead", 1);
4710
4711         for (i = 0; i < IPS_MAX_POST_BYTES; i++) {
4712                 for (j = 0; j < 45; j++) {
4713                         Isr = inb(ha->io_addr + IPS_REG_HISR);
4714                         if (Isr & IPS_BIT_GHI)
4715                                 break;
4716
4717                         /* Delay for 1 Second */
4718                         MDELAY(IPS_ONE_SEC);
4719                 }
4720
4721                 if (j >= 45)
4722                         /* error occurred */
4723                         return (0);
4724
4725                 PostByte[i] = inb(ha->io_addr + IPS_REG_ISPR);
4726                 outb(Isr, ha->io_addr + IPS_REG_HISR);
4727         }
4728
4729         if (PostByte[0] < IPS_GOOD_POST_STATUS) {
4730                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
4731                            "reset controller fails (post status %x %x).\n",
4732                            PostByte[0], PostByte[1]);
4733
4734                 return (0);
4735         }
4736
4737         for (i = 0; i < IPS_MAX_CONFIG_BYTES; i++) {
4738                 for (j = 0; j < 240; j++) {
4739                         Isr = inb(ha->io_addr + IPS_REG_HISR);
4740                         if (Isr & IPS_BIT_GHI)
4741                                 break;
4742
4743                         /* Delay for 1 Second */
4744                         MDELAY(IPS_ONE_SEC);
4745                 }
4746
4747                 if (j >= 240)
4748                         /* error occurred */
4749                         return (0);
4750
4751                 inb(ha->io_addr + IPS_REG_ISPR);
4752                 outb(Isr, ha->io_addr + IPS_REG_HISR);
4753         }
4754
4755         for (i = 0; i < 240; i++) {
4756                 Cbsp = inb(ha->io_addr + IPS_REG_CBSP);
4757
4758                 if ((Cbsp & IPS_BIT_OP) == 0)
4759                         break;
4760
4761                 /* Delay for 1 Second */
4762                 MDELAY(IPS_ONE_SEC);
4763         }
4764
4765         if (i >= 240)
4766                 /* reset failed */
4767                 return (0);
4768
4769         /* setup CCCR */
4770         outl(0x1010, ha->io_addr + IPS_REG_CCCR);
4771
4772         /* Enable busmastering */
4773         outb(IPS_BIT_EBM, ha->io_addr + IPS_REG_SCPR);
4774
4775         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
4776                 /* fix for anaconda64 */
4777                 outl(0, ha->io_addr + IPS_REG_NDAE);
4778
4779         /* Enable interrupts */
4780         outb(IPS_BIT_EI, ha->io_addr + IPS_REG_HISR);
4781
4782         return (1);
4783 }
4784
4785 /****************************************************************************/
4786 /*                                                                          */
4787 /* Routine Name: ips_init_copperhead_memio                                  */
4788 /*                                                                          */
4789 /* Routine Description:                                                     */
4790 /*                                                                          */
4791 /*   Initialize a copperhead controller with memory mapped I/O              */
4792 /*                                                                          */
4793 /****************************************************************************/
4794 static int
4795 ips_init_copperhead_memio(ips_ha_t * ha)
4796 {
4797         uint8_t Isr = 0;
4798         uint8_t Cbsp;
4799         uint8_t PostByte[IPS_MAX_POST_BYTES];
4800         int i, j;
4801
4802         METHOD_TRACE("ips_init_copperhead_memio", 1);
4803
4804         for (i = 0; i < IPS_MAX_POST_BYTES; i++) {
4805                 for (j = 0; j < 45; j++) {
4806                         Isr = readb(ha->mem_ptr + IPS_REG_HISR);
4807                         if (Isr & IPS_BIT_GHI)
4808                                 break;
4809
4810                         /* Delay for 1 Second */
4811                         MDELAY(IPS_ONE_SEC);
4812                 }
4813
4814                 if (j >= 45)
4815                         /* error occurred */
4816                         return (0);
4817
4818                 PostByte[i] = readb(ha->mem_ptr + IPS_REG_ISPR);
4819                 writeb(Isr, ha->mem_ptr + IPS_REG_HISR);
4820         }
4821
4822         if (PostByte[0] < IPS_GOOD_POST_STATUS) {
4823                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
4824                            "reset controller fails (post status %x %x).\n",
4825                            PostByte[0], PostByte[1]);
4826
4827                 return (0);
4828         }
4829
4830         for (i = 0; i < IPS_MAX_CONFIG_BYTES; i++) {
4831                 for (j = 0; j < 240; j++) {
4832                         Isr = readb(ha->mem_ptr + IPS_REG_HISR);
4833                         if (Isr & IPS_BIT_GHI)
4834                                 break;
4835
4836                         /* Delay for 1 Second */
4837                         MDELAY(IPS_ONE_SEC);
4838                 }
4839
4840                 if (j >= 240)
4841                         /* error occurred */
4842                         return (0);
4843
4844                 readb(ha->mem_ptr + IPS_REG_ISPR);
4845                 writeb(Isr, ha->mem_ptr + IPS_REG_HISR);
4846         }
4847
4848         for (i = 0; i < 240; i++) {
4849                 Cbsp = readb(ha->mem_ptr + IPS_REG_CBSP);
4850
4851                 if ((Cbsp & IPS_BIT_OP) == 0)
4852                         break;
4853
4854                 /* Delay for 1 Second */
4855                 MDELAY(IPS_ONE_SEC);
4856         }
4857
4858         if (i >= 240)
4859                 /* error occurred */
4860                 return (0);
4861
4862         /* setup CCCR */
4863         writel(0x1010, ha->mem_ptr + IPS_REG_CCCR);
4864
4865         /* Enable busmastering */
4866         writeb(IPS_BIT_EBM, ha->mem_ptr + IPS_REG_SCPR);
4867
4868         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
4869                 /* fix for anaconda64 */
4870                 writel(0, ha->mem_ptr + IPS_REG_NDAE);
4871
4872         /* Enable interrupts */
4873         writeb(IPS_BIT_EI, ha->mem_ptr + IPS_REG_HISR);
4874
4875         /* if we get here then everything went OK */
4876         return (1);
4877 }
4878
4879 /****************************************************************************/
4880 /*                                                                          */
4881 /* Routine Name: ips_init_morpheus                                          */
4882 /*                                                                          */
4883 /* Routine Description:                                                     */
4884 /*                                                                          */
4885 /*   Initialize a morpheus controller                                       */
4886 /*                                                                          */
4887 /****************************************************************************/
4888 static int
4889 ips_init_morpheus(ips_ha_t * ha)
4890 {
4891         uint32_t Post;
4892         uint32_t Config;
4893         uint32_t Isr;
4894         uint32_t Oimr;
4895         int i;
4896
4897         METHOD_TRACE("ips_init_morpheus", 1);
4898
4899         /* Wait up to 45 secs for Post */
4900         for (i = 0; i < 45; i++) {
4901                 Isr = readl(ha->mem_ptr + IPS_REG_I2O_HIR);
4902
4903                 if (Isr & IPS_BIT_I960_MSG0I)
4904                         break;
4905
4906                 /* Delay for 1 Second */
4907                 MDELAY(IPS_ONE_SEC);
4908         }
4909
4910         if (i >= 45) {
4911                 /* error occurred */
4912                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
4913                            "timeout waiting for post.\n");
4914
4915                 return (0);
4916         }
4917
4918         Post = readl(ha->mem_ptr + IPS_REG_I960_MSG0);
4919
4920         if (Post == 0x4F00) {   /* If Flashing the Battery PIC         */
4921                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
4922                            "Flashing Battery PIC, Please wait ...\n");
4923
4924                 /* Clear the interrupt bit */
4925                 Isr = (uint32_t) IPS_BIT_I960_MSG0I;
4926                 writel(Isr, ha->mem_ptr + IPS_REG_I2O_HIR);
4927
4928                 for (i = 0; i < 120; i++) {     /*    Wait Up to 2 Min. for Completion */
4929                         Post = readl(ha->mem_ptr + IPS_REG_I960_MSG0);
4930                         if (Post != 0x4F00)
4931                                 break;
4932                         /* Delay for 1 Second */
4933                         MDELAY(IPS_ONE_SEC);
4934                 }
4935
4936                 if (i >= 120) {
4937                         IPS_PRINTK(KERN_WARNING, ha->pcidev,
4938                                    "timeout waiting for Battery PIC Flash\n");
4939                         return (0);
4940                 }
4941
4942         }
4943
4944         /* Clear the interrupt bit */
4945         Isr = (uint32_t) IPS_BIT_I960_MSG0I;
4946         writel(Isr, ha->mem_ptr + IPS_REG_I2O_HIR);
4947
4948         if (Post < (IPS_GOOD_POST_STATUS << 8)) {
4949                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
4950                            "reset controller fails (post status %x).\n", Post);
4951
4952                 return (0);
4953         }
4954
4955         /* Wait up to 240 secs for config bytes */
4956         for (i = 0; i < 240; i++) {
4957                 Isr = readl(ha->mem_ptr + IPS_REG_I2O_HIR);
4958
4959                 if (Isr & IPS_BIT_I960_MSG1I)
4960                         break;
4961
4962                 /* Delay for 1 Second */
4963                 MDELAY(IPS_ONE_SEC);
4964         }
4965
4966         if (i >= 240) {
4967                 /* error occurred */
4968                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
4969                            "timeout waiting for config.\n");
4970
4971                 return (0);
4972         }
4973
4974         Config = readl(ha->mem_ptr + IPS_REG_I960_MSG1);
4975
4976         /* Clear interrupt bit */
4977         Isr = (uint32_t) IPS_BIT_I960_MSG1I;
4978         writel(Isr, ha->mem_ptr + IPS_REG_I2O_HIR);
4979
4980         /* Turn on the interrupts */
4981         Oimr = readl(ha->mem_ptr + IPS_REG_I960_OIMR);
4982         Oimr &= ~0x8;
4983         writel(Oimr, ha->mem_ptr + IPS_REG_I960_OIMR);
4984
4985         /* if we get here then everything went OK */
4986
4987         /* Since we did a RESET, an EraseStripeLock may be needed */
4988         if (Post == 0xEF10) {
4989                 if ((Config == 0x000F) || (Config == 0x0009))
4990                         ha->requires_esl = 1;
4991         }
4992
4993         return (1);
4994 }
4995
4996 /****************************************************************************/
4997 /*                                                                          */
4998 /* Routine Name: ips_reset_copperhead                                       */
4999 /*                                                                          */
5000 /* Routine Description:                                                     */
5001 /*                                                                          */
5002 /*   Reset the controller                                                   */
5003 /*                                                                          */
5004 /****************************************************************************/
5005 static int
5006 ips_reset_copperhead(ips_ha_t * ha)
5007 {
5008         int reset_counter;
5009
5010         METHOD_TRACE("ips_reset_copperhead", 1);
5011
5012         DEBUG_VAR(1, "(%s%d) ips_reset_copperhead: io addr: %x, irq: %d",
5013                   ips_name, ha->host_num, ha->io_addr, ha->pcidev->irq);
5014
5015         reset_counter = 0;
5016
5017         while (reset_counter < 2) {
5018                 reset_counter++;
5019
5020                 outb(IPS_BIT_RST, ha->io_addr + IPS_REG_SCPR);
5021
5022                 /* Delay for 1 Second */
5023                 MDELAY(IPS_ONE_SEC);
5024
5025                 outb(0, ha->io_addr + IPS_REG_SCPR);
5026
5027                 /* Delay for 1 Second */
5028                 MDELAY(IPS_ONE_SEC);
5029
5030                 if ((*ha->func.init) (ha))
5031                         break;
5032                 else if (reset_counter >= 2) {
5033
5034                         return (0);
5035                 }
5036         }
5037
5038         return (1);
5039 }
5040
5041 /****************************************************************************/
5042 /*                                                                          */
5043 /* Routine Name: ips_reset_copperhead_memio                                 */
5044 /*                                                                          */
5045 /* Routine Description:                                                     */
5046 /*                                                                          */
5047 /*   Reset the controller                                                   */
5048 /*                                                                          */
5049 /****************************************************************************/
5050 static int
5051 ips_reset_copperhead_memio(ips_ha_t * ha)
5052 {
5053         int reset_counter;
5054
5055         METHOD_TRACE("ips_reset_copperhead_memio", 1);
5056
5057         DEBUG_VAR(1, "(%s%d) ips_reset_copperhead_memio: mem addr: %x, irq: %d",
5058                   ips_name, ha->host_num, ha->mem_addr, ha->pcidev->irq);
5059
5060         reset_counter = 0;
5061
5062         while (reset_counter < 2) {
5063                 reset_counter++;
5064
5065                 writeb(IPS_BIT_RST, ha->mem_ptr + IPS_REG_SCPR);
5066
5067                 /* Delay for 1 Second */
5068                 MDELAY(IPS_ONE_SEC);
5069
5070                 writeb(0, ha->mem_ptr + IPS_REG_SCPR);
5071
5072                 /* Delay for 1 Second */
5073                 MDELAY(IPS_ONE_SEC);
5074
5075                 if ((*ha->func.init) (ha))
5076                         break;
5077                 else if (reset_counter >= 2) {
5078
5079                         return (0);
5080                 }
5081         }
5082
5083         return (1);
5084 }
5085
5086 /****************************************************************************/
5087 /*                                                                          */
5088 /* Routine Name: ips_reset_morpheus                                         */
5089 /*                                                                          */
5090 /* Routine Description:                                                     */
5091 /*                                                                          */
5092 /*   Reset the controller                                                   */
5093 /*                                                                          */
5094 /****************************************************************************/
5095 static int
5096 ips_reset_morpheus(ips_ha_t * ha)
5097 {
5098         int reset_counter;
5099         uint8_t junk;
5100
5101         METHOD_TRACE("ips_reset_morpheus", 1);
5102
5103         DEBUG_VAR(1, "(%s%d) ips_reset_morpheus: mem addr: %x, irq: %d",
5104                   ips_name, ha->host_num, ha->mem_addr, ha->pcidev->irq);
5105
5106         reset_counter = 0;
5107
5108         while (reset_counter < 2) {
5109                 reset_counter++;
5110
5111                 writel(0x80000000, ha->mem_ptr + IPS_REG_I960_IDR);
5112
5113                 /* Delay for 5 Seconds */
5114                 MDELAY(5 * IPS_ONE_SEC);
5115
5116                 /* Do a PCI config read to wait for adapter */
5117                 pci_read_config_byte(ha->pcidev, 4, &junk);
5118
5119                 if ((*ha->func.init) (ha))
5120                         break;
5121                 else if (reset_counter >= 2) {
5122
5123                         return (0);
5124                 }
5125         }
5126
5127         return (1);
5128 }
5129
5130 /****************************************************************************/
5131 /*                                                                          */
5132 /* Routine Name: ips_statinit                                               */
5133 /*                                                                          */
5134 /* Routine Description:                                                     */
5135 /*                                                                          */
5136 /*   Initialize the status queues on the controller                         */
5137 /*                                                                          */
5138 /****************************************************************************/
5139 static void
5140 ips_statinit(ips_ha_t * ha)
5141 {
5142         uint32_t phys_status_start;
5143
5144         METHOD_TRACE("ips_statinit", 1);
5145
5146         ha->adapt->p_status_start = ha->adapt->status;
5147         ha->adapt->p_status_end = ha->adapt->status + IPS_MAX_CMDS;
5148         ha->adapt->p_status_tail = ha->adapt->status;
5149
5150         phys_status_start = ha->adapt->hw_status_start;
5151         outl(phys_status_start, ha->io_addr + IPS_REG_SQSR);
5152         outl(phys_status_start + IPS_STATUS_Q_SIZE,
5153              ha->io_addr + IPS_REG_SQER);
5154         outl(phys_status_start + IPS_STATUS_SIZE,
5155              ha->io_addr + IPS_REG_SQHR);
5156         outl(phys_status_start, ha->io_addr + IPS_REG_SQTR);
5157
5158         ha->adapt->hw_status_tail = phys_status_start;
5159 }
5160
5161 /****************************************************************************/
5162 /*                                                                          */
5163 /* Routine Name: ips_statinit_memio                                         */
5164 /*                                                                          */
5165 /* Routine Description:                                                     */
5166 /*                                                                          */
5167 /*   Initialize the status queues on the controller                         */
5168 /*                                                                          */
5169 /****************************************************************************/
5170 static void
5171 ips_statinit_memio(ips_ha_t * ha)
5172 {
5173         uint32_t phys_status_start;
5174
5175         METHOD_TRACE("ips_statinit_memio", 1);
5176
5177         ha->adapt->p_status_start = ha->adapt->status;
5178         ha->adapt->p_status_end = ha->adapt->status + IPS_MAX_CMDS;
5179         ha->adapt->p_status_tail = ha->adapt->status;
5180
5181         phys_status_start = ha->adapt->hw_status_start;
5182         writel(phys_status_start, ha->mem_ptr + IPS_REG_SQSR);
5183         writel(phys_status_start + IPS_STATUS_Q_SIZE,
5184                ha->mem_ptr + IPS_REG_SQER);
5185         writel(phys_status_start + IPS_STATUS_SIZE, ha->mem_ptr + IPS_REG_SQHR);
5186         writel(phys_status_start, ha->mem_ptr + IPS_REG_SQTR);
5187
5188         ha->adapt->hw_status_tail = phys_status_start;
5189 }
5190
5191 /****************************************************************************/
5192 /*                                                                          */
5193 /* Routine Name: ips_statupd_copperhead                                     */
5194 /*                                                                          */
5195 /* Routine Description:                                                     */
5196 /*                                                                          */
5197 /*   Remove an element from the status queue                                */
5198 /*                                                                          */
5199 /****************************************************************************/
5200 static uint32_t
5201 ips_statupd_copperhead(ips_ha_t * ha)
5202 {
5203         METHOD_TRACE("ips_statupd_copperhead", 1);
5204
5205         if (ha->adapt->p_status_tail != ha->adapt->p_status_end) {
5206                 ha->adapt->p_status_tail++;
5207                 ha->adapt->hw_status_tail += sizeof (IPS_STATUS);
5208         } else {
5209                 ha->adapt->p_status_tail = ha->adapt->p_status_start;
5210                 ha->adapt->hw_status_tail = ha->adapt->hw_status_start;
5211         }
5212
5213         outl(ha->adapt->hw_status_tail,
5214              ha->io_addr + IPS_REG_SQTR);
5215
5216         return (ha->adapt->p_status_tail->value);
5217 }
5218
5219 /****************************************************************************/
5220 /*                                                                          */
5221 /* Routine Name: ips_statupd_copperhead_memio                               */
5222 /*                                                                          */
5223 /* Routine Description:                                                     */
5224 /*                                                                          */
5225 /*   Remove an element from the status queue                                */
5226 /*                                                                          */
5227 /****************************************************************************/
5228 static uint32_t
5229 ips_statupd_copperhead_memio(ips_ha_t * ha)
5230 {
5231         METHOD_TRACE("ips_statupd_copperhead_memio", 1);
5232
5233         if (ha->adapt->p_status_tail != ha->adapt->p_status_end) {
5234                 ha->adapt->p_status_tail++;
5235                 ha->adapt->hw_status_tail += sizeof (IPS_STATUS);
5236         } else {
5237                 ha->adapt->p_status_tail = ha->adapt->p_status_start;
5238                 ha->adapt->hw_status_tail = ha->adapt->hw_status_start;
5239         }
5240
5241         writel(ha->adapt->hw_status_tail, ha->mem_ptr + IPS_REG_SQTR);
5242
5243         return (ha->adapt->p_status_tail->value);
5244 }
5245
5246 /****************************************************************************/
5247 /*                                                                          */
5248 /* Routine Name: ips_statupd_morpheus                                       */
5249 /*                                                                          */
5250 /* Routine Description:                                                     */
5251 /*                                                                          */
5252 /*   Remove an element from the status queue                                */
5253 /*                                                                          */
5254 /****************************************************************************/
5255 static uint32_t
5256 ips_statupd_morpheus(ips_ha_t * ha)
5257 {
5258         uint32_t val;
5259
5260         METHOD_TRACE("ips_statupd_morpheus", 1);
5261
5262         val = readl(ha->mem_ptr + IPS_REG_I2O_OUTMSGQ);
5263
5264         return (val);
5265 }
5266
5267 /****************************************************************************/
5268 /*                                                                          */
5269 /* Routine Name: ips_issue_copperhead                                       */
5270 /*                                                                          */
5271 /* Routine Description:                                                     */
5272 /*                                                                          */
5273 /*   Send a command down to the controller                                  */
5274 /*                                                                          */
5275 /****************************************************************************/
5276 static int
5277 ips_issue_copperhead(ips_ha_t * ha, ips_scb_t * scb)
5278 {
5279         uint32_t TimeOut;
5280         uint32_t val;
5281
5282         METHOD_TRACE("ips_issue_copperhead", 1);
5283
5284         if (scb->scsi_cmd) {
5285                 DEBUG_VAR(2, "(%s%d) ips_issue: cmd 0x%X id %d (%d %d %d)",
5286                           ips_name,
5287                           ha->host_num,
5288                           scb->cdb[0],
5289                           scb->cmd.basic_io.command_id,
5290                           scb->bus, scb->target_id, scb->lun);
5291         } else {
5292                 DEBUG_VAR(2, KERN_NOTICE "(%s%d) ips_issue: logical cmd id %d",
5293                           ips_name, ha->host_num, scb->cmd.basic_io.command_id);
5294         }
5295
5296         TimeOut = 0;
5297
5298         while ((val =
5299                 le32_to_cpu(inl(ha->io_addr + IPS_REG_CCCR))) & IPS_BIT_SEM) {
5300                 udelay(1000);
5301
5302                 if (++TimeOut >= IPS_SEM_TIMEOUT) {
5303                         if (!(val & IPS_BIT_START_STOP))
5304                                 break;
5305
5306                         IPS_PRINTK(KERN_WARNING, ha->pcidev,
5307                                    "ips_issue val [0x%x].\n", val);
5308                         IPS_PRINTK(KERN_WARNING, ha->pcidev,
5309                                    "ips_issue semaphore chk timeout.\n");
5310
5311                         return (IPS_FAILURE);
5312                 }               /* end if */
5313         }                       /* end while */
5314
5315         outl(scb->scb_busaddr, ha->io_addr + IPS_REG_CCSAR);
5316         outw(IPS_BIT_START_CMD, ha->io_addr + IPS_REG_CCCR);
5317
5318         return (IPS_SUCCESS);
5319 }
5320
5321 /****************************************************************************/
5322 /*                                                                          */
5323 /* Routine Name: ips_issue_copperhead_memio                                 */
5324 /*                                                                          */
5325 /* Routine Description:                                                     */
5326 /*                                                                          */
5327 /*   Send a command down to the controller                                  */
5328 /*                                                                          */
5329 /****************************************************************************/
5330 static int
5331 ips_issue_copperhead_memio(ips_ha_t * ha, ips_scb_t * scb)
5332 {
5333         uint32_t TimeOut;
5334         uint32_t val;
5335
5336         METHOD_TRACE("ips_issue_copperhead_memio", 1);
5337
5338         if (scb->scsi_cmd) {
5339                 DEBUG_VAR(2, "(%s%d) ips_issue: cmd 0x%X id %d (%d %d %d)",
5340                           ips_name,
5341                           ha->host_num,
5342                           scb->cdb[0],
5343                           scb->cmd.basic_io.command_id,
5344                           scb->bus, scb->target_id, scb->lun);
5345         } else {
5346                 DEBUG_VAR(2, "(%s%d) ips_issue: logical cmd id %d",
5347                           ips_name, ha->host_num, scb->cmd.basic_io.command_id);
5348         }
5349
5350         TimeOut = 0;
5351
5352         while ((val = readl(ha->mem_ptr + IPS_REG_CCCR)) & IPS_BIT_SEM) {
5353                 udelay(1000);
5354
5355                 if (++TimeOut >= IPS_SEM_TIMEOUT) {
5356                         if (!(val & IPS_BIT_START_STOP))
5357                                 break;
5358
5359                         IPS_PRINTK(KERN_WARNING, ha->pcidev,
5360                                    "ips_issue val [0x%x].\n", val);
5361                         IPS_PRINTK(KERN_WARNING, ha->pcidev,
5362                                    "ips_issue semaphore chk timeout.\n");
5363
5364                         return (IPS_FAILURE);
5365                 }               /* end if */
5366         }                       /* end while */
5367
5368         writel(scb->scb_busaddr, ha->mem_ptr + IPS_REG_CCSAR);
5369         writel(IPS_BIT_START_CMD, ha->mem_ptr + IPS_REG_CCCR);
5370
5371         return (IPS_SUCCESS);
5372 }
5373
5374 /****************************************************************************/
5375 /*                                                                          */
5376 /* Routine Name: ips_issue_i2o                                              */
5377 /*                                                                          */
5378 /* Routine Description:                                                     */
5379 /*                                                                          */
5380 /*   Send a command down to the controller                                  */
5381 /*                                                                          */
5382 /****************************************************************************/
5383 static int
5384 ips_issue_i2o(ips_ha_t * ha, ips_scb_t * scb)
5385 {
5386
5387         METHOD_TRACE("ips_issue_i2o", 1);
5388
5389         if (scb->scsi_cmd) {
5390                 DEBUG_VAR(2, "(%s%d) ips_issue: cmd 0x%X id %d (%d %d %d)",
5391                           ips_name,
5392                           ha->host_num,
5393                           scb->cdb[0],
5394                           scb->cmd.basic_io.command_id,
5395                           scb->bus, scb->target_id, scb->lun);
5396         } else {
5397                 DEBUG_VAR(2, "(%s%d) ips_issue: logical cmd id %d",
5398                           ips_name, ha->host_num, scb->cmd.basic_io.command_id);
5399         }
5400
5401         outl(scb->scb_busaddr, ha->io_addr + IPS_REG_I2O_INMSGQ);
5402
5403         return (IPS_SUCCESS);
5404 }
5405
5406 /****************************************************************************/
5407 /*                                                                          */
5408 /* Routine Name: ips_issue_i2o_memio                                        */
5409 /*                                                                          */
5410 /* Routine Description:                                                     */
5411 /*                                                                          */
5412 /*   Send a command down to the controller                                  */
5413 /*                                                                          */
5414 /****************************************************************************/
5415 static int
5416 ips_issue_i2o_memio(ips_ha_t * ha, ips_scb_t * scb)
5417 {
5418
5419         METHOD_TRACE("ips_issue_i2o_memio", 1);
5420
5421         if (scb->scsi_cmd) {
5422                 DEBUG_VAR(2, "(%s%d) ips_issue: cmd 0x%X id %d (%d %d %d)",
5423                           ips_name,
5424                           ha->host_num,
5425                           scb->cdb[0],
5426                           scb->cmd.basic_io.command_id,
5427                           scb->bus, scb->target_id, scb->lun);
5428         } else {
5429                 DEBUG_VAR(2, "(%s%d) ips_issue: logical cmd id %d",
5430                           ips_name, ha->host_num, scb->cmd.basic_io.command_id);
5431         }
5432
5433         writel(scb->scb_busaddr, ha->mem_ptr + IPS_REG_I2O_INMSGQ);
5434
5435         return (IPS_SUCCESS);
5436 }
5437
5438 /****************************************************************************/
5439 /*                                                                          */
5440 /* Routine Name: ips_isintr_copperhead                                      */
5441 /*                                                                          */
5442 /* Routine Description:                                                     */
5443 /*                                                                          */
5444 /*   Test to see if an interrupt is for us                                  */
5445 /*                                                                          */
5446 /****************************************************************************/
5447 static int
5448 ips_isintr_copperhead(ips_ha_t * ha)
5449 {
5450         uint8_t Isr;
5451
5452         METHOD_TRACE("ips_isintr_copperhead", 2);
5453
5454         Isr = inb(ha->io_addr + IPS_REG_HISR);
5455
5456         if (Isr == 0xFF)
5457                 /* ?!?! Nothing really there */
5458                 return (0);
5459
5460         if (Isr & IPS_BIT_SCE)
5461                 return (1);
5462         else if (Isr & (IPS_BIT_SQO | IPS_BIT_GHI)) {
5463                 /* status queue overflow or GHI */
5464                 /* just clear the interrupt */
5465                 outb(Isr, ha->io_addr + IPS_REG_HISR);
5466         }
5467
5468         return (0);
5469 }
5470
5471 /****************************************************************************/
5472 /*                                                                          */
5473 /* Routine Name: ips_isintr_copperhead_memio                                */
5474 /*                                                                          */
5475 /* Routine Description:                                                     */
5476 /*                                                                          */
5477 /*   Test to see if an interrupt is for us                                  */
5478 /*                                                                          */
5479 /****************************************************************************/
5480 static int
5481 ips_isintr_copperhead_memio(ips_ha_t * ha)
5482 {
5483         uint8_t Isr;
5484
5485         METHOD_TRACE("ips_isintr_memio", 2);
5486
5487         Isr = readb(ha->mem_ptr + IPS_REG_HISR);
5488
5489         if (Isr == 0xFF)
5490                 /* ?!?! Nothing really there */
5491                 return (0);
5492
5493         if (Isr & IPS_BIT_SCE)
5494                 return (1);
5495         else if (Isr & (IPS_BIT_SQO | IPS_BIT_GHI)) {
5496                 /* status queue overflow or GHI */
5497                 /* just clear the interrupt */
5498                 writeb(Isr, ha->mem_ptr + IPS_REG_HISR);
5499         }
5500
5501         return (0);
5502 }
5503
5504 /****************************************************************************/
5505 /*                                                                          */
5506 /* Routine Name: ips_isintr_morpheus                                        */
5507 /*                                                                          */
5508 /* Routine Description:                                                     */
5509 /*                                                                          */
5510 /*   Test to see if an interrupt is for us                                  */
5511 /*                                                                          */
5512 /****************************************************************************/
5513 static int
5514 ips_isintr_morpheus(ips_ha_t * ha)
5515 {
5516         uint32_t Isr;
5517
5518         METHOD_TRACE("ips_isintr_morpheus", 2);
5519
5520         Isr = readl(ha->mem_ptr + IPS_REG_I2O_HIR);
5521
5522         if (Isr & IPS_BIT_I2O_OPQI)
5523                 return (1);
5524         else
5525                 return (0);
5526 }
5527
5528 /****************************************************************************/
5529 /*                                                                          */
5530 /* Routine Name: ips_wait                                                   */
5531 /*                                                                          */
5532 /* Routine Description:                                                     */
5533 /*                                                                          */
5534 /*   Wait for a command to complete                                         */
5535 /*                                                                          */
5536 /****************************************************************************/
5537 static int
5538 ips_wait(ips_ha_t * ha, int time, int intr)
5539 {
5540         int ret;
5541         int done;
5542
5543         METHOD_TRACE("ips_wait", 1);
5544
5545         ret = IPS_FAILURE;
5546         done = FALSE;
5547
5548         time *= IPS_ONE_SEC;    /* convert seconds */
5549
5550         while ((time > 0) && (!done)) {
5551                 if (intr == IPS_INTR_ON) {
5552                         if (ha->waitflag == FALSE) {
5553                                 ret = IPS_SUCCESS;
5554                                 done = TRUE;
5555                                 break;
5556                         }
5557                 } else if (intr == IPS_INTR_IORL) {
5558                         if (ha->waitflag == FALSE) {
5559                                 /*
5560                                  * controller generated an interrupt to
5561                                  * acknowledge completion of the command
5562                                  * and ips_intr() has serviced the interrupt.
5563                                  */
5564                                 ret = IPS_SUCCESS;
5565                                 done = TRUE;
5566                                 break;
5567                         }
5568
5569                         /*
5570                          * NOTE: we already have the io_request_lock so
5571                          * even if we get an interrupt it won't get serviced
5572                          * until after we finish.
5573                          */
5574
5575                         (*ha->func.intr) (ha);
5576                 }
5577
5578                 /* This looks like a very evil loop, but it only does this during start-up */
5579                 udelay(1000);
5580                 time--;
5581         }
5582
5583         return (ret);
5584 }
5585
5586 /****************************************************************************/
5587 /*                                                                          */
5588 /* Routine Name: ips_write_driver_status                                    */
5589 /*                                                                          */
5590 /* Routine Description:                                                     */
5591 /*                                                                          */
5592 /*   Write OS/Driver version to Page 5 of the nvram on the controller       */
5593 /*                                                                          */
5594 /****************************************************************************/
5595 static int
5596 ips_write_driver_status(ips_ha_t * ha, int intr)
5597 {
5598         METHOD_TRACE("ips_write_driver_status", 1);
5599
5600         if (!ips_readwrite_page5(ha, FALSE, intr)) {
5601                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
5602                            "unable to read NVRAM page 5.\n");
5603
5604                 return (0);
5605         }
5606
5607         /* check to make sure the page has a valid */
5608         /* signature */
5609         if (le32_to_cpu(ha->nvram->signature) != IPS_NVRAM_P5_SIG) {
5610                 DEBUG_VAR(1,
5611                           "(%s%d) NVRAM page 5 has an invalid signature: %X.",
5612                           ips_name, ha->host_num, ha->nvram->signature);
5613                 ha->nvram->signature = IPS_NVRAM_P5_SIG;
5614         }
5615
5616         DEBUG_VAR(2,
5617                   "(%s%d) Ad Type: %d, Ad Slot: %d, BIOS: %c%c%c%c %c%c%c%c.",
5618                   ips_name, ha->host_num, le16_to_cpu(ha->nvram->adapter_type),
5619                   ha->nvram->adapter_slot, ha->nvram->bios_high[0],
5620                   ha->nvram->bios_high[1], ha->nvram->bios_high[2],
5621                   ha->nvram->bios_high[3], ha->nvram->bios_low[0],
5622                   ha->nvram->bios_low[1], ha->nvram->bios_low[2],
5623                   ha->nvram->bios_low[3]);
5624
5625         ips_get_bios_version(ha, intr);
5626
5627         /* change values (as needed) */
5628         ha->nvram->operating_system = IPS_OS_LINUX;
5629         ha->nvram->adapter_type = ha->ad_type;
5630         memcpy((char *) ha->nvram->driver_high, IPS_VERSION_HIGH, 4);
5631         memcpy((char *) ha->nvram->driver_low, IPS_VERSION_LOW, 4);
5632         memcpy((char *) ha->nvram->bios_high, ha->bios_version, 4);
5633         memcpy((char *) ha->nvram->bios_low, ha->bios_version + 4, 4);
5634
5635         ha->nvram->versioning = 0;      /* Indicate the Driver Does Not Support Versioning */
5636
5637         /* now update the page */
5638         if (!ips_readwrite_page5(ha, TRUE, intr)) {
5639                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
5640                            "unable to write NVRAM page 5.\n");
5641
5642                 return (0);
5643         }
5644
5645         /* IF NVRAM Page 5 is OK, Use it for Slot Number Info Because Linux Doesn't Do Slots */
5646         ha->slot_num = ha->nvram->adapter_slot;
5647
5648         return (1);
5649 }
5650
5651 /****************************************************************************/
5652 /*                                                                          */
5653 /* Routine Name: ips_read_adapter_status                                    */
5654 /*                                                                          */
5655 /* Routine Description:                                                     */
5656 /*                                                                          */
5657 /*   Do an Inquiry command to the adapter                                   */
5658 /*                                                                          */
5659 /****************************************************************************/
5660 static int
5661 ips_read_adapter_status(ips_ha_t * ha, int intr)
5662 {
5663         ips_scb_t *scb;
5664         int ret;
5665
5666         METHOD_TRACE("ips_read_adapter_status", 1);
5667
5668         scb = &ha->scbs[ha->max_cmds - 1];
5669
5670         ips_init_scb(ha, scb);
5671
5672         scb->timeout = ips_cmd_timeout;
5673         scb->cdb[0] = IPS_CMD_ENQUIRY;
5674
5675         scb->cmd.basic_io.op_code = IPS_CMD_ENQUIRY;
5676         scb->cmd.basic_io.command_id = IPS_COMMAND_ID(ha, scb);
5677         scb->cmd.basic_io.sg_count = 0;
5678         scb->cmd.basic_io.lba = 0;
5679         scb->cmd.basic_io.sector_count = 0;
5680         scb->cmd.basic_io.log_drv = 0;
5681         scb->data_len = sizeof (*ha->enq);
5682         scb->cmd.basic_io.sg_addr = ha->enq_busaddr;
5683
5684         /* send command */
5685         if (((ret =
5686               ips_send_wait(ha, scb, ips_cmd_timeout, intr)) == IPS_FAILURE)
5687             || (ret == IPS_SUCCESS_IMM)
5688             || ((scb->basic_status & IPS_GSC_STATUS_MASK) > 1))
5689                 return (0);
5690
5691         return (1);
5692 }
5693
5694 /****************************************************************************/
5695 /*                                                                          */
5696 /* Routine Name: ips_read_subsystem_parameters                              */
5697 /*                                                                          */
5698 /* Routine Description:                                                     */
5699 /*                                                                          */
5700 /*   Read subsystem parameters from the adapter                             */
5701 /*                                                                          */
5702 /****************************************************************************/
5703 static int
5704 ips_read_subsystem_parameters(ips_ha_t * ha, int intr)
5705 {
5706         ips_scb_t *scb;
5707         int ret;
5708
5709         METHOD_TRACE("ips_read_subsystem_parameters", 1);
5710
5711         scb = &ha->scbs[ha->max_cmds - 1];
5712
5713         ips_init_scb(ha, scb);
5714
5715         scb->timeout = ips_cmd_timeout;
5716         scb->cdb[0] = IPS_CMD_GET_SUBSYS;
5717
5718         scb->cmd.basic_io.op_code = IPS_CMD_GET_SUBSYS;
5719         scb->cmd.basic_io.command_id = IPS_COMMAND_ID(ha, scb);
5720         scb->cmd.basic_io.sg_count = 0;
5721         scb->cmd.basic_io.lba = 0;
5722         scb->cmd.basic_io.sector_count = 0;
5723         scb->cmd.basic_io.log_drv = 0;
5724         scb->data_len = sizeof (*ha->subsys);
5725         scb->cmd.basic_io.sg_addr = ha->ioctl_busaddr;
5726
5727         /* send command */
5728         if (((ret =
5729               ips_send_wait(ha, scb, ips_cmd_timeout, intr)) == IPS_FAILURE)
5730             || (ret == IPS_SUCCESS_IMM)
5731             || ((scb->basic_status & IPS_GSC_STATUS_MASK) > 1))
5732                 return (0);
5733
5734         memcpy(ha->subsys, ha->ioctl_data, sizeof(*ha->subsys));
5735         return (1);
5736 }
5737
5738 /****************************************************************************/
5739 /*                                                                          */
5740 /* Routine Name: ips_read_config                                            */
5741 /*                                                                          */
5742 /* Routine Description:                                                     */
5743 /*                                                                          */
5744 /*   Read the configuration on the adapter                                  */
5745 /*                                                                          */
5746 /****************************************************************************/
5747 static int
5748 ips_read_config(ips_ha_t * ha, int intr)
5749 {
5750         ips_scb_t *scb;
5751         int i;
5752         int ret;
5753
5754         METHOD_TRACE("ips_read_config", 1);
5755
5756         /* set defaults for initiator IDs */
5757         for (i = 0; i < 4; i++)
5758                 ha->conf->init_id[i] = 7;
5759
5760         scb = &ha->scbs[ha->max_cmds - 1];
5761
5762         ips_init_scb(ha, scb);
5763
5764         scb->timeout = ips_cmd_timeout;
5765         scb->cdb[0] = IPS_CMD_READ_CONF;
5766
5767         scb->cmd.basic_io.op_code = IPS_CMD_READ_CONF;
5768         scb->cmd.basic_io.command_id = IPS_COMMAND_ID(ha, scb);
5769         scb->data_len = sizeof (*ha->conf);
5770         scb->cmd.basic_io.sg_addr = ha->ioctl_busaddr;
5771
5772         /* send command */
5773         if (((ret =
5774               ips_send_wait(ha, scb, ips_cmd_timeout, intr)) == IPS_FAILURE)
5775             || (ret == IPS_SUCCESS_IMM)
5776             || ((scb->basic_status & IPS_GSC_STATUS_MASK) > 1)) {
5777
5778                 memset(ha->conf, 0, sizeof (IPS_CONF));
5779
5780                 /* reset initiator IDs */
5781                 for (i = 0; i < 4; i++)
5782                         ha->conf->init_id[i] = 7;
5783
5784                 /* Allow Completed with Errors, so JCRM can access the Adapter to fix the problems */
5785                 if ((scb->basic_status & IPS_GSC_STATUS_MASK) ==
5786                     IPS_CMD_CMPLT_WERROR)
5787                         return (1);
5788
5789                 return (0);
5790         }
5791
5792         memcpy(ha->conf, ha->ioctl_data, sizeof(*ha->conf));
5793         return (1);
5794 }
5795
5796 /****************************************************************************/
5797 /*                                                                          */
5798 /* Routine Name: ips_readwrite_page5                                        */
5799 /*                                                                          */
5800 /* Routine Description:                                                     */
5801 /*                                                                          */
5802 /*   Read nvram page 5 from the adapter                                     */
5803 /*                                                                          */
5804 /****************************************************************************/
5805 static int
5806 ips_readwrite_page5(ips_ha_t * ha, int write, int intr)
5807 {
5808         ips_scb_t *scb;
5809         int ret;
5810
5811         METHOD_TRACE("ips_readwrite_page5", 1);
5812
5813         scb = &ha->scbs[ha->max_cmds - 1];
5814
5815         ips_init_scb(ha, scb);
5816
5817         scb->timeout = ips_cmd_timeout;
5818         scb->cdb[0] = IPS_CMD_RW_NVRAM_PAGE;
5819
5820         scb->cmd.nvram.op_code = IPS_CMD_RW_NVRAM_PAGE;
5821         scb->cmd.nvram.command_id = IPS_COMMAND_ID(ha, scb);
5822         scb->cmd.nvram.page = 5;
5823         scb->cmd.nvram.write = write;
5824         scb->cmd.nvram.reserved = 0;
5825         scb->cmd.nvram.reserved2 = 0;
5826         scb->data_len = sizeof (*ha->nvram);
5827         scb->cmd.nvram.buffer_addr = ha->ioctl_busaddr;
5828         if (write)
5829                 memcpy(ha->ioctl_data, ha->nvram, sizeof(*ha->nvram));
5830
5831         /* issue the command */
5832         if (((ret =
5833               ips_send_wait(ha, scb, ips_cmd_timeout, intr)) == IPS_FAILURE)
5834             || (ret == IPS_SUCCESS_IMM)
5835             || ((scb->basic_status & IPS_GSC_STATUS_MASK) > 1)) {
5836
5837                 memset(ha->nvram, 0, sizeof (IPS_NVRAM_P5));
5838
5839                 return (0);
5840         }
5841         if (!write)
5842                 memcpy(ha->nvram, ha->ioctl_data, sizeof(*ha->nvram));
5843         return (1);
5844 }
5845
5846 /****************************************************************************/
5847 /*                                                                          */
5848 /* Routine Name: ips_clear_adapter                                          */
5849 /*                                                                          */
5850 /* Routine Description:                                                     */
5851 /*                                                                          */
5852 /*   Clear the stripe lock tables                                           */
5853 /*                                                                          */
5854 /****************************************************************************/
5855 static int
5856 ips_clear_adapter(ips_ha_t * ha, int intr)
5857 {
5858         ips_scb_t *scb;
5859         int ret;
5860
5861         METHOD_TRACE("ips_clear_adapter", 1);
5862
5863         scb = &ha->scbs[ha->max_cmds - 1];
5864
5865         ips_init_scb(ha, scb);
5866
5867         scb->timeout = ips_reset_timeout;
5868         scb->cdb[0] = IPS_CMD_CONFIG_SYNC;
5869
5870         scb->cmd.config_sync.op_code = IPS_CMD_CONFIG_SYNC;
5871         scb->cmd.config_sync.command_id = IPS_COMMAND_ID(ha, scb);
5872         scb->cmd.config_sync.channel = 0;
5873         scb->cmd.config_sync.source_target = IPS_POCL;
5874         scb->cmd.config_sync.reserved = 0;
5875         scb->cmd.config_sync.reserved2 = 0;
5876         scb->cmd.config_sync.reserved3 = 0;
5877
5878         /* issue command */
5879         if (((ret =
5880               ips_send_wait(ha, scb, ips_reset_timeout, intr)) == IPS_FAILURE)
5881             || (ret == IPS_SUCCESS_IMM)
5882             || ((scb->basic_status & IPS_GSC_STATUS_MASK) > 1))
5883                 return (0);
5884
5885         /* send unlock stripe command */
5886         ips_init_scb(ha, scb);
5887
5888         scb->cdb[0] = IPS_CMD_ERROR_TABLE;
5889         scb->timeout = ips_reset_timeout;
5890
5891         scb->cmd.unlock_stripe.op_code = IPS_CMD_ERROR_TABLE;
5892         scb->cmd.unlock_stripe.command_id = IPS_COMMAND_ID(ha, scb);
5893         scb->cmd.unlock_stripe.log_drv = 0;
5894         scb->cmd.unlock_stripe.control = IPS_CSL;
5895         scb->cmd.unlock_stripe.reserved = 0;
5896         scb->cmd.unlock_stripe.reserved2 = 0;
5897         scb->cmd.unlock_stripe.reserved3 = 0;
5898
5899         /* issue command */
5900         if (((ret =
5901               ips_send_wait(ha, scb, ips_cmd_timeout, intr)) == IPS_FAILURE)
5902             || (ret == IPS_SUCCESS_IMM)
5903             || ((scb->basic_status & IPS_GSC_STATUS_MASK) > 1))
5904                 return (0);
5905
5906         return (1);
5907 }
5908
5909 /****************************************************************************/
5910 /*                                                                          */
5911 /* Routine Name: ips_ffdc_reset                                             */
5912 /*                                                                          */
5913 /* Routine Description:                                                     */
5914 /*                                                                          */
5915 /*   FFDC: write reset info                                                 */
5916 /*                                                                          */
5917 /****************************************************************************/
5918 static void
5919 ips_ffdc_reset(ips_ha_t * ha, int intr)
5920 {
5921         ips_scb_t *scb;
5922
5923         METHOD_TRACE("ips_ffdc_reset", 1);
5924
5925         scb = &ha->scbs[ha->max_cmds - 1];
5926
5927         ips_init_scb(ha, scb);
5928
5929         scb->timeout = ips_cmd_timeout;
5930         scb->cdb[0] = IPS_CMD_FFDC;
5931         scb->cmd.ffdc.op_code = IPS_CMD_FFDC;
5932         scb->cmd.ffdc.command_id = IPS_COMMAND_ID(ha, scb);
5933         scb->cmd.ffdc.reset_count = ha->reset_count;
5934         scb->cmd.ffdc.reset_type = 0x80;
5935
5936         /* convert time to what the card wants */
5937         ips_fix_ffdc_time(ha, scb, ha->last_ffdc);
5938
5939         /* issue command */
5940         ips_send_wait(ha, scb, ips_cmd_timeout, intr);
5941 }
5942
5943 /****************************************************************************/
5944 /*                                                                          */
5945 /* Routine Name: ips_ffdc_time                                              */
5946 /*                                                                          */
5947 /* Routine Description:                                                     */
5948 /*                                                                          */
5949 /*   FFDC: write time info                                                  */
5950 /*                                                                          */
5951 /****************************************************************************/
5952 static void
5953 ips_ffdc_time(ips_ha_t * ha)
5954 {
5955         ips_scb_t *scb;
5956
5957         METHOD_TRACE("ips_ffdc_time", 1);
5958
5959         DEBUG_VAR(1, "(%s%d) Sending time update.", ips_name, ha->host_num);
5960
5961         scb = &ha->scbs[ha->max_cmds - 1];
5962
5963         ips_init_scb(ha, scb);
5964
5965         scb->timeout = ips_cmd_timeout;
5966         scb->cdb[0] = IPS_CMD_FFDC;
5967         scb->cmd.ffdc.op_code = IPS_CMD_FFDC;
5968         scb->cmd.ffdc.command_id = IPS_COMMAND_ID(ha, scb);
5969         scb->cmd.ffdc.reset_count = 0;
5970         scb->cmd.ffdc.reset_type = 0;
5971
5972         /* convert time to what the card wants */
5973         ips_fix_ffdc_time(ha, scb, ha->last_ffdc);
5974
5975         /* issue command */
5976         ips_send_wait(ha, scb, ips_cmd_timeout, IPS_FFDC);
5977 }
5978
5979 /****************************************************************************/
5980 /*                                                                          */
5981 /* Routine Name: ips_fix_ffdc_time                                          */
5982 /*                                                                          */
5983 /* Routine Description:                                                     */
5984 /*   Adjust time_t to what the card wants                                   */
5985 /*                                                                          */
5986 /****************************************************************************/
5987 static void
5988 ips_fix_ffdc_time(ips_ha_t * ha, ips_scb_t * scb, time64_t current_time)
5989 {
5990         struct tm tm;
5991
5992         METHOD_TRACE("ips_fix_ffdc_time", 1);
5993
5994         time64_to_tm(current_time, 0, &tm);
5995
5996         scb->cmd.ffdc.hour   = tm.tm_hour;
5997         scb->cmd.ffdc.minute = tm.tm_min;
5998         scb->cmd.ffdc.second = tm.tm_sec;
5999         scb->cmd.ffdc.yearH  = (tm.tm_year + 1900) / 100;
6000         scb->cmd.ffdc.yearL  = tm.tm_year % 100;
6001         scb->cmd.ffdc.month  = tm.tm_mon + 1;
6002         scb->cmd.ffdc.day    = tm.tm_mday;
6003 }
6004
6005 /****************************************************************************
6006  * BIOS Flash Routines                                                      *
6007  ****************************************************************************/
6008
6009 /****************************************************************************/
6010 /*                                                                          */
6011 /* Routine Name: ips_erase_bios                                             */
6012 /*                                                                          */
6013 /* Routine Description:                                                     */
6014 /*   Erase the BIOS on the adapter                                          */
6015 /*                                                                          */
6016 /****************************************************************************/
6017 static int
6018 ips_erase_bios(ips_ha_t * ha)
6019 {
6020         int timeout;
6021         uint8_t status = 0;
6022
6023         METHOD_TRACE("ips_erase_bios", 1);
6024
6025         status = 0;
6026
6027         /* Clear the status register */
6028         outl(0, ha->io_addr + IPS_REG_FLAP);
6029         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6030                 udelay(25);     /* 25 us */
6031
6032         outb(0x50, ha->io_addr + IPS_REG_FLDP);
6033         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6034                 udelay(25);     /* 25 us */
6035
6036         /* Erase Setup */
6037         outb(0x20, ha->io_addr + IPS_REG_FLDP);
6038         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6039                 udelay(25);     /* 25 us */
6040
6041         /* Erase Confirm */
6042         outb(0xD0, ha->io_addr + IPS_REG_FLDP);
6043         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6044                 udelay(25);     /* 25 us */
6045
6046         /* Erase Status */
6047         outb(0x70, ha->io_addr + IPS_REG_FLDP);
6048         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6049                 udelay(25);     /* 25 us */
6050
6051         timeout = 80000;        /* 80 seconds */
6052
6053         while (timeout > 0) {
6054                 if (ha->pcidev->revision == IPS_REVID_TROMBONE64) {
6055                         outl(0, ha->io_addr + IPS_REG_FLAP);
6056                         udelay(25);     /* 25 us */
6057                 }
6058
6059                 status = inb(ha->io_addr + IPS_REG_FLDP);
6060
6061                 if (status & 0x80)
6062                         break;
6063
6064                 MDELAY(1);
6065                 timeout--;
6066         }
6067
6068         /* check for timeout */
6069         if (timeout <= 0) {
6070                 /* timeout */
6071
6072                 /* try to suspend the erase */
6073                 outb(0xB0, ha->io_addr + IPS_REG_FLDP);
6074                 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6075                         udelay(25);     /* 25 us */
6076
6077                 /* wait for 10 seconds */
6078                 timeout = 10000;
6079                 while (timeout > 0) {
6080                         if (ha->pcidev->revision == IPS_REVID_TROMBONE64) {
6081                                 outl(0, ha->io_addr + IPS_REG_FLAP);
6082                                 udelay(25);     /* 25 us */
6083                         }
6084
6085                         status = inb(ha->io_addr + IPS_REG_FLDP);
6086
6087                         if (status & 0xC0)
6088                                 break;
6089
6090                         MDELAY(1);
6091                         timeout--;
6092                 }
6093
6094                 return (1);
6095         }
6096
6097         /* check for valid VPP */
6098         if (status & 0x08)
6099                 /* VPP failure */
6100                 return (1);
6101
6102         /* check for successful flash */
6103         if (status & 0x30)
6104                 /* sequence error */
6105                 return (1);
6106
6107         /* Otherwise, we were successful */
6108         /* clear status */
6109         outb(0x50, ha->io_addr + IPS_REG_FLDP);
6110         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6111                 udelay(25);     /* 25 us */
6112
6113         /* enable reads */
6114         outb(0xFF, ha->io_addr + IPS_REG_FLDP);
6115         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6116                 udelay(25);     /* 25 us */
6117
6118         return (0);
6119 }
6120
6121 /****************************************************************************/
6122 /*                                                                          */
6123 /* Routine Name: ips_erase_bios_memio                                       */
6124 /*                                                                          */
6125 /* Routine Description:                                                     */
6126 /*   Erase the BIOS on the adapter                                          */
6127 /*                                                                          */
6128 /****************************************************************************/
6129 static int
6130 ips_erase_bios_memio(ips_ha_t * ha)
6131 {
6132         int timeout;
6133         uint8_t status;
6134
6135         METHOD_TRACE("ips_erase_bios_memio", 1);
6136
6137         status = 0;
6138
6139         /* Clear the status register */
6140         writel(0, ha->mem_ptr + IPS_REG_FLAP);
6141         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6142                 udelay(25);     /* 25 us */
6143
6144         writeb(0x50, ha->mem_ptr + IPS_REG_FLDP);
6145         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6146                 udelay(25);     /* 25 us */
6147
6148         /* Erase Setup */
6149         writeb(0x20, ha->mem_ptr + IPS_REG_FLDP);
6150         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6151                 udelay(25);     /* 25 us */
6152
6153         /* Erase Confirm */
6154         writeb(0xD0, ha->mem_ptr + IPS_REG_FLDP);
6155         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6156                 udelay(25);     /* 25 us */
6157
6158         /* Erase Status */
6159         writeb(0x70, ha->mem_ptr + IPS_REG_FLDP);
6160         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6161                 udelay(25);     /* 25 us */
6162
6163         timeout = 80000;        /* 80 seconds */
6164
6165         while (timeout > 0) {
6166                 if (ha->pcidev->revision == IPS_REVID_TROMBONE64) {
6167                         writel(0, ha->mem_ptr + IPS_REG_FLAP);
6168                         udelay(25);     /* 25 us */
6169                 }
6170
6171                 status = readb(ha->mem_ptr + IPS_REG_FLDP);
6172
6173                 if (status & 0x80)
6174                         break;
6175
6176                 MDELAY(1);
6177                 timeout--;
6178         }
6179
6180         /* check for timeout */
6181         if (timeout <= 0) {
6182                 /* timeout */
6183
6184                 /* try to suspend the erase */
6185                 writeb(0xB0, ha->mem_ptr + IPS_REG_FLDP);
6186                 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6187                         udelay(25);     /* 25 us */
6188
6189                 /* wait for 10 seconds */
6190                 timeout = 10000;
6191                 while (timeout > 0) {
6192                         if (ha->pcidev->revision == IPS_REVID_TROMBONE64) {
6193                                 writel(0, ha->mem_ptr + IPS_REG_FLAP);
6194                                 udelay(25);     /* 25 us */
6195                         }
6196
6197                         status = readb(ha->mem_ptr + IPS_REG_FLDP);
6198
6199                         if (status & 0xC0)
6200                                 break;
6201
6202                         MDELAY(1);
6203                         timeout--;
6204                 }
6205
6206                 return (1);
6207         }
6208
6209         /* check for valid VPP */
6210         if (status & 0x08)
6211                 /* VPP failure */
6212                 return (1);
6213
6214         /* check for successful flash */
6215         if (status & 0x30)
6216                 /* sequence error */
6217                 return (1);
6218
6219         /* Otherwise, we were successful */
6220         /* clear status */
6221         writeb(0x50, ha->mem_ptr + IPS_REG_FLDP);
6222         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6223                 udelay(25);     /* 25 us */
6224
6225         /* enable reads */
6226         writeb(0xFF, ha->mem_ptr + IPS_REG_FLDP);
6227         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6228                 udelay(25);     /* 25 us */
6229
6230         return (0);
6231 }
6232
6233 /****************************************************************************/
6234 /*                                                                          */
6235 /* Routine Name: ips_program_bios                                           */
6236 /*                                                                          */
6237 /* Routine Description:                                                     */
6238 /*   Program the BIOS on the adapter                                        */
6239 /*                                                                          */
6240 /****************************************************************************/
6241 static int
6242 ips_program_bios(ips_ha_t * ha, char *buffer, uint32_t buffersize,
6243                  uint32_t offset)
6244 {
6245         int i;
6246         int timeout;
6247         uint8_t status = 0;
6248
6249         METHOD_TRACE("ips_program_bios", 1);
6250
6251         status = 0;
6252
6253         for (i = 0; i < buffersize; i++) {
6254                 /* write a byte */
6255                 outl(i + offset, ha->io_addr + IPS_REG_FLAP);
6256                 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6257                         udelay(25);     /* 25 us */
6258
6259                 outb(0x40, ha->io_addr + IPS_REG_FLDP);
6260                 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6261                         udelay(25);     /* 25 us */
6262
6263                 outb(buffer[i], ha->io_addr + IPS_REG_FLDP);
6264                 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6265                         udelay(25);     /* 25 us */
6266
6267                 /* wait up to one second */
6268                 timeout = 1000;
6269                 while (timeout > 0) {
6270                         if (ha->pcidev->revision == IPS_REVID_TROMBONE64) {
6271                                 outl(0, ha->io_addr + IPS_REG_FLAP);
6272                                 udelay(25);     /* 25 us */
6273                         }
6274
6275                         status = inb(ha->io_addr + IPS_REG_FLDP);
6276
6277                         if (status & 0x80)
6278                                 break;
6279
6280                         MDELAY(1);
6281                         timeout--;
6282                 }
6283
6284                 if (timeout == 0) {
6285                         /* timeout error */
6286                         outl(0, ha->io_addr + IPS_REG_FLAP);
6287                         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6288                                 udelay(25);     /* 25 us */
6289
6290                         outb(0xFF, ha->io_addr + IPS_REG_FLDP);
6291                         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6292                                 udelay(25);     /* 25 us */
6293
6294                         return (1);
6295                 }
6296
6297                 /* check the status */
6298                 if (status & 0x18) {
6299                         /* programming error */
6300                         outl(0, ha->io_addr + IPS_REG_FLAP);
6301                         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6302                                 udelay(25);     /* 25 us */
6303
6304                         outb(0xFF, ha->io_addr + IPS_REG_FLDP);
6305                         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6306                                 udelay(25);     /* 25 us */
6307
6308                         return (1);
6309                 }
6310         }                       /* end for */
6311
6312         /* Enable reading */
6313         outl(0, ha->io_addr + IPS_REG_FLAP);
6314         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6315                 udelay(25);     /* 25 us */
6316
6317         outb(0xFF, ha->io_addr + IPS_REG_FLDP);
6318         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6319                 udelay(25);     /* 25 us */
6320
6321         return (0);
6322 }
6323
6324 /****************************************************************************/
6325 /*                                                                          */
6326 /* Routine Name: ips_program_bios_memio                                     */
6327 /*                                                                          */
6328 /* Routine Description:                                                     */
6329 /*   Program the BIOS on the adapter                                        */
6330 /*                                                                          */
6331 /****************************************************************************/
6332 static int
6333 ips_program_bios_memio(ips_ha_t * ha, char *buffer, uint32_t buffersize,
6334                        uint32_t offset)
6335 {
6336         int i;
6337         int timeout;
6338         uint8_t status = 0;
6339
6340         METHOD_TRACE("ips_program_bios_memio", 1);
6341
6342         status = 0;
6343
6344         for (i = 0; i < buffersize; i++) {
6345                 /* write a byte */
6346                 writel(i + offset, ha->mem_ptr + IPS_REG_FLAP);
6347                 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6348                         udelay(25);     /* 25 us */
6349
6350                 writeb(0x40, ha->mem_ptr + IPS_REG_FLDP);
6351                 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6352                         udelay(25);     /* 25 us */
6353
6354                 writeb(buffer[i], ha->mem_ptr + IPS_REG_FLDP);
6355                 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6356                         udelay(25);     /* 25 us */
6357
6358                 /* wait up to one second */
6359                 timeout = 1000;
6360                 while (timeout > 0) {
6361                         if (ha->pcidev->revision == IPS_REVID_TROMBONE64) {
6362                                 writel(0, ha->mem_ptr + IPS_REG_FLAP);
6363                                 udelay(25);     /* 25 us */
6364                         }
6365
6366                         status = readb(ha->mem_ptr + IPS_REG_FLDP);
6367
6368                         if (status & 0x80)
6369                                 break;
6370
6371                         MDELAY(1);
6372                         timeout--;
6373                 }
6374
6375                 if (timeout == 0) {
6376                         /* timeout error */
6377                         writel(0, ha->mem_ptr + IPS_REG_FLAP);
6378                         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6379                                 udelay(25);     /* 25 us */
6380
6381                         writeb(0xFF, ha->mem_ptr + IPS_REG_FLDP);
6382                         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6383                                 udelay(25);     /* 25 us */
6384
6385                         return (1);
6386                 }
6387
6388                 /* check the status */
6389                 if (status & 0x18) {
6390                         /* programming error */
6391                         writel(0, ha->mem_ptr + IPS_REG_FLAP);
6392                         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6393                                 udelay(25);     /* 25 us */
6394
6395                         writeb(0xFF, ha->mem_ptr + IPS_REG_FLDP);
6396                         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6397                                 udelay(25);     /* 25 us */
6398
6399                         return (1);
6400                 }
6401         }                       /* end for */
6402
6403         /* Enable reading */
6404         writel(0, ha->mem_ptr + IPS_REG_FLAP);
6405         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6406                 udelay(25);     /* 25 us */
6407
6408         writeb(0xFF, ha->mem_ptr + IPS_REG_FLDP);
6409         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6410                 udelay(25);     /* 25 us */
6411
6412         return (0);
6413 }
6414
6415 /****************************************************************************/
6416 /*                                                                          */
6417 /* Routine Name: ips_verify_bios                                            */
6418 /*                                                                          */
6419 /* Routine Description:                                                     */
6420 /*   Verify the BIOS on the adapter                                         */
6421 /*                                                                          */
6422 /****************************************************************************/
6423 static int
6424 ips_verify_bios(ips_ha_t * ha, char *buffer, uint32_t buffersize,
6425                 uint32_t offset)
6426 {
6427         uint8_t checksum;
6428         int i;
6429
6430         METHOD_TRACE("ips_verify_bios", 1);
6431
6432         /* test 1st byte */
6433         outl(0, ha->io_addr + IPS_REG_FLAP);
6434         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6435                 udelay(25);     /* 25 us */
6436
6437         if (inb(ha->io_addr + IPS_REG_FLDP) != 0x55)
6438                 return (1);
6439
6440         outl(1, ha->io_addr + IPS_REG_FLAP);
6441         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6442                 udelay(25);     /* 25 us */
6443         if (inb(ha->io_addr + IPS_REG_FLDP) != 0xAA)
6444                 return (1);
6445
6446         checksum = 0xff;
6447         for (i = 2; i < buffersize; i++) {
6448
6449                 outl(i + offset, ha->io_addr + IPS_REG_FLAP);
6450                 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6451                         udelay(25);     /* 25 us */
6452
6453                 checksum = (uint8_t) checksum + inb(ha->io_addr + IPS_REG_FLDP);
6454         }
6455
6456         if (checksum != 0)
6457                 /* failure */
6458                 return (1);
6459         else
6460                 /* success */
6461                 return (0);
6462 }
6463
6464 /****************************************************************************/
6465 /*                                                                          */
6466 /* Routine Name: ips_verify_bios_memio                                      */
6467 /*                                                                          */
6468 /* Routine Description:                                                     */
6469 /*   Verify the BIOS on the adapter                                         */
6470 /*                                                                          */
6471 /****************************************************************************/
6472 static int
6473 ips_verify_bios_memio(ips_ha_t * ha, char *buffer, uint32_t buffersize,
6474                       uint32_t offset)
6475 {
6476         uint8_t checksum;
6477         int i;
6478
6479         METHOD_TRACE("ips_verify_bios_memio", 1);
6480
6481         /* test 1st byte */
6482         writel(0, ha->mem_ptr + IPS_REG_FLAP);
6483         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6484                 udelay(25);     /* 25 us */
6485
6486         if (readb(ha->mem_ptr + IPS_REG_FLDP) != 0x55)
6487                 return (1);
6488
6489         writel(1, ha->mem_ptr + IPS_REG_FLAP);
6490         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6491                 udelay(25);     /* 25 us */
6492         if (readb(ha->mem_ptr + IPS_REG_FLDP) != 0xAA)
6493                 return (1);
6494
6495         checksum = 0xff;
6496         for (i = 2; i < buffersize; i++) {
6497
6498                 writel(i + offset, ha->mem_ptr + IPS_REG_FLAP);
6499                 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6500                         udelay(25);     /* 25 us */
6501
6502                 checksum =
6503                     (uint8_t) checksum + readb(ha->mem_ptr + IPS_REG_FLDP);
6504         }
6505
6506         if (checksum != 0)
6507                 /* failure */
6508                 return (1);
6509         else
6510                 /* success */
6511                 return (0);
6512 }
6513
6514 /****************************************************************************/
6515 /*                                                                          */
6516 /* Routine Name: ips_abort_init                                             */
6517 /*                                                                          */
6518 /* Routine Description:                                                     */
6519 /*   cleanup routine for a failed adapter initialization                    */
6520 /****************************************************************************/
6521 static int
6522 ips_abort_init(ips_ha_t * ha, int index)
6523 {
6524         ha->active = 0;
6525         ips_free(ha);
6526         ips_ha[index] = NULL;
6527         ips_sh[index] = NULL;
6528         return -1;
6529 }
6530
6531 /****************************************************************************/
6532 /*                                                                          */
6533 /* Routine Name: ips_shift_controllers                                      */
6534 /*                                                                          */
6535 /* Routine Description:                                                     */
6536 /*   helper function for ordering adapters                                  */
6537 /****************************************************************************/
6538 static void
6539 ips_shift_controllers(int lowindex, int highindex)
6540 {
6541         ips_ha_t *ha_sav = ips_ha[highindex];
6542         struct Scsi_Host *sh_sav = ips_sh[highindex];
6543         int i;
6544
6545         for (i = highindex; i > lowindex; i--) {
6546                 ips_ha[i] = ips_ha[i - 1];
6547                 ips_sh[i] = ips_sh[i - 1];
6548                 ips_ha[i]->host_num = i;
6549         }
6550         ha_sav->host_num = lowindex;
6551         ips_ha[lowindex] = ha_sav;
6552         ips_sh[lowindex] = sh_sav;
6553 }
6554
6555 /****************************************************************************/
6556 /*                                                                          */
6557 /* Routine Name: ips_order_controllers                                      */
6558 /*                                                                          */
6559 /* Routine Description:                                                     */
6560 /*   place controllers is the "proper" boot order                           */
6561 /****************************************************************************/
6562 static void
6563 ips_order_controllers(void)
6564 {
6565         int i, j, tmp, position = 0;
6566         IPS_NVRAM_P5 *nvram;
6567         if (!ips_ha[0])
6568                 return;
6569         nvram = ips_ha[0]->nvram;
6570
6571         if (nvram->adapter_order[0]) {
6572                 for (i = 1; i <= nvram->adapter_order[0]; i++) {
6573                         for (j = position; j < ips_num_controllers; j++) {
6574                                 switch (ips_ha[j]->ad_type) {
6575                                 case IPS_ADTYPE_SERVERAID6M:
6576                                 case IPS_ADTYPE_SERVERAID7M:
6577                                         if (nvram->adapter_order[i] == 'M') {
6578                                                 ips_shift_controllers(position,
6579                                                                       j);
6580                                                 position++;
6581                                         }
6582                                         break;
6583                                 case IPS_ADTYPE_SERVERAID4L:
6584                                 case IPS_ADTYPE_SERVERAID4M:
6585                                 case IPS_ADTYPE_SERVERAID4MX:
6586                                 case IPS_ADTYPE_SERVERAID4LX:
6587                                         if (nvram->adapter_order[i] == 'N') {
6588                                                 ips_shift_controllers(position,
6589                                                                       j);
6590                                                 position++;
6591                                         }
6592                                         break;
6593                                 case IPS_ADTYPE_SERVERAID6I:
6594                                 case IPS_ADTYPE_SERVERAID5I2:
6595                                 case IPS_ADTYPE_SERVERAID5I1:
6596                                 case IPS_ADTYPE_SERVERAID7k:
6597                                         if (nvram->adapter_order[i] == 'S') {
6598                                                 ips_shift_controllers(position,
6599                                                                       j);
6600                                                 position++;
6601                                         }
6602                                         break;
6603                                 case IPS_ADTYPE_SERVERAID:
6604                                 case IPS_ADTYPE_SERVERAID2:
6605                                 case IPS_ADTYPE_NAVAJO:
6606                                 case IPS_ADTYPE_KIOWA:
6607                                 case IPS_ADTYPE_SERVERAID3L:
6608                                 case IPS_ADTYPE_SERVERAID3:
6609                                 case IPS_ADTYPE_SERVERAID4H:
6610                                         if (nvram->adapter_order[i] == 'A') {
6611                                                 ips_shift_controllers(position,
6612                                                                       j);
6613                                                 position++;
6614                                         }
6615                                         break;
6616                                 default:
6617                                         break;
6618                                 }
6619                         }
6620                 }
6621                 /* if adapter_order[0], then ordering is complete */
6622                 return;
6623         }
6624         /* old bios, use older ordering */
6625         tmp = 0;
6626         for (i = position; i < ips_num_controllers; i++) {
6627                 if (ips_ha[i]->ad_type == IPS_ADTYPE_SERVERAID5I2 ||
6628                     ips_ha[i]->ad_type == IPS_ADTYPE_SERVERAID5I1) {
6629                         ips_shift_controllers(position, i);
6630                         position++;
6631                         tmp = 1;
6632                 }
6633         }
6634         /* if there were no 5I cards, then don't do any extra ordering */
6635         if (!tmp)
6636                 return;
6637         for (i = position; i < ips_num_controllers; i++) {
6638                 if (ips_ha[i]->ad_type == IPS_ADTYPE_SERVERAID4L ||
6639                     ips_ha[i]->ad_type == IPS_ADTYPE_SERVERAID4M ||
6640                     ips_ha[i]->ad_type == IPS_ADTYPE_SERVERAID4LX ||
6641                     ips_ha[i]->ad_type == IPS_ADTYPE_SERVERAID4MX) {
6642                         ips_shift_controllers(position, i);
6643                         position++;
6644                 }
6645         }
6646
6647         return;
6648 }
6649
6650 /****************************************************************************/
6651 /*                                                                          */
6652 /* Routine Name: ips_register_scsi                                          */
6653 /*                                                                          */
6654 /* Routine Description:                                                     */
6655 /*   perform any registration and setup with the scsi layer                 */
6656 /****************************************************************************/
6657 static int
6658 ips_register_scsi(int index)
6659 {
6660         struct Scsi_Host *sh;
6661         ips_ha_t *ha, *oldha = ips_ha[index];
6662         sh = scsi_host_alloc(&ips_driver_template, sizeof (ips_ha_t));
6663         if (!sh) {
6664                 IPS_PRINTK(KERN_WARNING, oldha->pcidev,
6665                            "Unable to register controller with SCSI subsystem\n");
6666                 return -1;
6667         }
6668         ha = IPS_HA(sh);
6669         memcpy(ha, oldha, sizeof (ips_ha_t));
6670         free_irq(oldha->pcidev->irq, oldha);
6671         /* Install the interrupt handler with the new ha */
6672         if (request_irq(ha->pcidev->irq, do_ipsintr, IRQF_SHARED, ips_name, ha)) {
6673                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
6674                            "Unable to install interrupt handler\n");
6675                 goto err_out_sh;
6676         }
6677
6678         kfree(oldha);
6679
6680         /* Store away needed values for later use */
6681         sh->unique_id = (ha->io_addr) ? ha->io_addr : ha->mem_addr;
6682         sh->sg_tablesize = sh->hostt->sg_tablesize;
6683         sh->can_queue = sh->hostt->can_queue;
6684         sh->cmd_per_lun = sh->hostt->cmd_per_lun;
6685         sh->max_sectors = 128;
6686
6687         sh->max_id = ha->ntargets;
6688         sh->max_lun = ha->nlun;
6689         sh->max_channel = ha->nbus - 1;
6690         sh->can_queue = ha->max_cmds - 1;
6691
6692         if (scsi_add_host(sh, &ha->pcidev->dev))
6693                 goto err_out;
6694
6695         ips_sh[index] = sh;
6696         ips_ha[index] = ha;
6697
6698         scsi_scan_host(sh);
6699
6700         return 0;
6701
6702 err_out:
6703         free_irq(ha->pcidev->irq, ha);
6704 err_out_sh:
6705         scsi_host_put(sh);
6706         return -1;
6707 }
6708
6709 /*---------------------------------------------------------------------------*/
6710 /*   Routine Name: ips_remove_device                                         */
6711 /*                                                                           */
6712 /*   Routine Description:                                                    */
6713 /*     Remove one Adapter ( Hot Plugging )                                   */
6714 /*---------------------------------------------------------------------------*/
6715 static void
6716 ips_remove_device(struct pci_dev *pci_dev)
6717 {
6718         struct Scsi_Host *sh = pci_get_drvdata(pci_dev);
6719
6720         pci_set_drvdata(pci_dev, NULL);
6721
6722         ips_release(sh);
6723
6724         pci_release_regions(pci_dev);
6725         pci_disable_device(pci_dev);
6726 }
6727
6728 /****************************************************************************/
6729 /*                                                                          */
6730 /* Routine Name: ips_module_init                                            */
6731 /*                                                                          */
6732 /* Routine Description:                                                     */
6733 /*   function called on module load                                         */
6734 /****************************************************************************/
6735 static int __init
6736 ips_module_init(void)
6737 {
6738 #if !defined(__i386__) && !defined(__ia64__) && !defined(__x86_64__)
6739         printk(KERN_ERR "ips: This driver has only been tested on the x86/ia64/x86_64 platforms\n");
6740         add_taint(TAINT_CPU_OUT_OF_SPEC, LOCKDEP_STILL_OK);
6741 #endif
6742
6743         if (pci_register_driver(&ips_pci_driver) < 0)
6744                 return -ENODEV;
6745         ips_driver_template.module = THIS_MODULE;
6746         ips_order_controllers();
6747         if (!ips_detect(&ips_driver_template)) {
6748                 pci_unregister_driver(&ips_pci_driver);
6749                 return -ENODEV;
6750         }
6751         register_reboot_notifier(&ips_notifier);
6752         return 0;
6753 }
6754
6755 /****************************************************************************/
6756 /*                                                                          */
6757 /* Routine Name: ips_module_exit                                            */
6758 /*                                                                          */
6759 /* Routine Description:                                                     */
6760 /*   function called on module unload                                       */
6761 /****************************************************************************/
6762 static void __exit
6763 ips_module_exit(void)
6764 {
6765         pci_unregister_driver(&ips_pci_driver);
6766         unregister_reboot_notifier(&ips_notifier);
6767 }
6768
6769 module_init(ips_module_init);
6770 module_exit(ips_module_exit);
6771
6772 /*---------------------------------------------------------------------------*/
6773 /*   Routine Name: ips_insert_device                                         */
6774 /*                                                                           */
6775 /*   Routine Description:                                                    */
6776 /*     Add One Adapter ( Hot Plug )                                          */
6777 /*                                                                           */
6778 /*   Return Value:                                                           */
6779 /*     0 if Successful, else non-zero                                        */
6780 /*---------------------------------------------------------------------------*/
6781 static int
6782 ips_insert_device(struct pci_dev *pci_dev, const struct pci_device_id *ent)
6783 {
6784         int index = -1;
6785         int rc;
6786
6787         METHOD_TRACE("ips_insert_device", 1);
6788         rc = pci_enable_device(pci_dev);
6789         if (rc)
6790                 return rc;
6791
6792         rc = pci_request_regions(pci_dev, "ips");
6793         if (rc)
6794                 goto err_out;
6795
6796         rc = ips_init_phase1(pci_dev, &index);
6797         if (rc == SUCCESS)
6798                 rc = ips_init_phase2(index);
6799
6800         if (ips_hotplug)
6801                 if (ips_register_scsi(index)) {
6802                         ips_free(ips_ha[index]);
6803                         rc = -1;
6804                 }
6805
6806         if (rc == SUCCESS)
6807                 ips_num_controllers++;
6808
6809         ips_next_controller = ips_num_controllers;
6810
6811         if (rc < 0) {
6812                 rc = -ENODEV;
6813                 goto err_out_regions;
6814         }
6815
6816         pci_set_drvdata(pci_dev, ips_sh[index]);
6817         return 0;
6818
6819 err_out_regions:
6820         pci_release_regions(pci_dev);
6821 err_out:
6822         pci_disable_device(pci_dev);
6823         return rc;
6824 }
6825
6826 /*---------------------------------------------------------------------------*/
6827 /*   Routine Name: ips_init_phase1                                           */
6828 /*                                                                           */
6829 /*   Routine Description:                                                    */
6830 /*     Adapter Initialization                                                */
6831 /*                                                                           */
6832 /*   Return Value:                                                           */
6833 /*     0 if Successful, else non-zero                                        */
6834 /*---------------------------------------------------------------------------*/
6835 static int
6836 ips_init_phase1(struct pci_dev *pci_dev, int *indexPtr)
6837 {
6838         ips_ha_t *ha;
6839         uint32_t io_addr;
6840         uint32_t mem_addr;
6841         uint32_t io_len;
6842         uint32_t mem_len;
6843         int j;
6844         int index;
6845         dma_addr_t dma_address;
6846         char __iomem *ioremap_ptr;
6847         char __iomem *mem_ptr;
6848         uint32_t IsDead;
6849
6850         METHOD_TRACE("ips_init_phase1", 1);
6851         index = IPS_MAX_ADAPTERS;
6852         for (j = 0; j < IPS_MAX_ADAPTERS; j++) {
6853                 if (ips_ha[j] == NULL) {
6854                         index = j;
6855                         break;
6856                 }
6857         }
6858
6859         if (index >= IPS_MAX_ADAPTERS)
6860                 return -1;
6861
6862         /* Init MEM/IO addresses to 0 */
6863         mem_addr = 0;
6864         io_addr = 0;
6865         mem_len = 0;
6866         io_len = 0;
6867
6868         for (j = 0; j < 2; j++) {
6869                 if (!pci_resource_start(pci_dev, j))
6870                         break;
6871
6872                 if (pci_resource_flags(pci_dev, j) & IORESOURCE_IO) {
6873                         io_addr = pci_resource_start(pci_dev, j);
6874                         io_len = pci_resource_len(pci_dev, j);
6875                 } else {
6876                         mem_addr = pci_resource_start(pci_dev, j);
6877                         mem_len = pci_resource_len(pci_dev, j);
6878                 }
6879         }
6880
6881         /* setup memory mapped area (if applicable) */
6882         if (mem_addr) {
6883                 uint32_t base;
6884                 uint32_t offs;
6885
6886                 base = mem_addr & PAGE_MASK;
6887                 offs = mem_addr - base;
6888                 ioremap_ptr = ioremap(base, PAGE_SIZE);
6889                 if (!ioremap_ptr)
6890                         return -1;
6891                 mem_ptr = ioremap_ptr + offs;
6892         } else {
6893                 ioremap_ptr = NULL;
6894                 mem_ptr = NULL;
6895         }
6896
6897         /* found a controller */
6898         ha = kzalloc(sizeof (ips_ha_t), GFP_KERNEL);
6899         if (ha == NULL) {
6900                 IPS_PRINTK(KERN_WARNING, pci_dev,
6901                            "Unable to allocate temporary ha struct\n");
6902                 return -1;
6903         }
6904
6905         ips_sh[index] = NULL;
6906         ips_ha[index] = ha;
6907         ha->active = 1;
6908
6909         /* Store info in HA structure */
6910         ha->io_addr = io_addr;
6911         ha->io_len = io_len;
6912         ha->mem_addr = mem_addr;
6913         ha->mem_len = mem_len;
6914         ha->mem_ptr = mem_ptr;
6915         ha->ioremap_ptr = ioremap_ptr;
6916         ha->host_num = (uint32_t) index;
6917         ha->slot_num = PCI_SLOT(pci_dev->devfn);
6918         ha->pcidev = pci_dev;
6919
6920         /*
6921          * Set the pci_dev's dma_mask.  Not all adapters support 64bit
6922          * addressing so don't enable it if the adapter can't support
6923          * it!  Also, don't use 64bit addressing if dma addresses
6924          * are guaranteed to be < 4G.
6925          */
6926         if (sizeof(dma_addr_t) > 4 && IPS_HAS_ENH_SGLIST(ha) &&
6927             !dma_set_mask(&ha->pcidev->dev, DMA_BIT_MASK(64))) {
6928                 (ha)->flags |= IPS_HA_ENH_SG;
6929         } else {
6930                 if (dma_set_mask(&ha->pcidev->dev, DMA_BIT_MASK(32)) != 0) {
6931                         printk(KERN_WARNING "Unable to set DMA Mask\n");
6932                         return ips_abort_init(ha, index);
6933                 }
6934         }
6935         if(ips_cd_boot && !ips_FlashData){
6936                 ips_FlashData = dma_alloc_coherent(&pci_dev->dev,
6937                                 PAGE_SIZE << 7, &ips_flashbusaddr, GFP_KERNEL);
6938         }
6939
6940         ha->enq = dma_alloc_coherent(&pci_dev->dev, sizeof (IPS_ENQ),
6941                         &ha->enq_busaddr, GFP_KERNEL);
6942         if (!ha->enq) {
6943                 IPS_PRINTK(KERN_WARNING, pci_dev,
6944                            "Unable to allocate host inquiry structure\n");
6945                 return ips_abort_init(ha, index);
6946         }
6947
6948         ha->adapt = dma_alloc_coherent(&pci_dev->dev,
6949                         sizeof (IPS_ADAPTER) + sizeof (IPS_IO_CMD),
6950                         &dma_address, GFP_KERNEL);
6951         if (!ha->adapt) {
6952                 IPS_PRINTK(KERN_WARNING, pci_dev,
6953                            "Unable to allocate host adapt & dummy structures\n");
6954                 return ips_abort_init(ha, index);
6955         }
6956         ha->adapt->hw_status_start = dma_address;
6957         ha->dummy = (void *) (ha->adapt + 1);
6958
6959
6960
6961         ha->logical_drive_info = dma_alloc_coherent(&pci_dev->dev,
6962                         sizeof (IPS_LD_INFO), &dma_address, GFP_KERNEL);
6963         if (!ha->logical_drive_info) {
6964                 IPS_PRINTK(KERN_WARNING, pci_dev,
6965                            "Unable to allocate logical drive info structure\n");
6966                 return ips_abort_init(ha, index);
6967         }
6968         ha->logical_drive_info_dma_addr = dma_address;
6969
6970
6971         ha->conf = kmalloc(sizeof (IPS_CONF), GFP_KERNEL);
6972
6973         if (!ha->conf) {
6974                 IPS_PRINTK(KERN_WARNING, pci_dev,
6975                            "Unable to allocate host conf structure\n");
6976                 return ips_abort_init(ha, index);
6977         }
6978
6979         ha->nvram = kmalloc(sizeof (IPS_NVRAM_P5), GFP_KERNEL);
6980
6981         if (!ha->nvram) {
6982                 IPS_PRINTK(KERN_WARNING, pci_dev,
6983                            "Unable to allocate host NVRAM structure\n");
6984                 return ips_abort_init(ha, index);
6985         }
6986
6987         ha->subsys = kmalloc(sizeof (IPS_SUBSYS), GFP_KERNEL);
6988
6989         if (!ha->subsys) {
6990                 IPS_PRINTK(KERN_WARNING, pci_dev,
6991                            "Unable to allocate host subsystem structure\n");
6992                 return ips_abort_init(ha, index);
6993         }
6994
6995         /* the ioctl buffer is now used during adapter initialization, so its
6996          * successful allocation is now required */
6997         if (ips_ioctlsize < PAGE_SIZE)
6998                 ips_ioctlsize = PAGE_SIZE;
6999
7000         ha->ioctl_data = dma_alloc_coherent(&pci_dev->dev, ips_ioctlsize,
7001                         &ha->ioctl_busaddr, GFP_KERNEL);
7002         ha->ioctl_len = ips_ioctlsize;
7003         if (!ha->ioctl_data) {
7004                 IPS_PRINTK(KERN_WARNING, pci_dev,
7005                            "Unable to allocate IOCTL data\n");
7006                 return ips_abort_init(ha, index);
7007         }
7008
7009         /*
7010          * Setup Functions
7011          */
7012         ips_setup_funclist(ha);
7013
7014         if ((IPS_IS_MORPHEUS(ha)) || (IPS_IS_MARCO(ha))) {
7015                 /* If Morpheus appears dead, reset it */
7016                 IsDead = readl(ha->mem_ptr + IPS_REG_I960_MSG1);
7017                 if (IsDead == 0xDEADBEEF) {
7018                         ips_reset_morpheus(ha);
7019                 }
7020         }
7021
7022         /*
7023          * Initialize the card if it isn't already
7024          */
7025
7026         if (!(*ha->func.isinit) (ha)) {
7027                 if (!(*ha->func.init) (ha)) {
7028                         /*
7029                          * Initialization failed
7030                          */
7031                         IPS_PRINTK(KERN_WARNING, pci_dev,
7032                                    "Unable to initialize controller\n");
7033                         return ips_abort_init(ha, index);
7034                 }
7035         }
7036
7037         *indexPtr = index;
7038         return SUCCESS;
7039 }
7040
7041 /*---------------------------------------------------------------------------*/
7042 /*   Routine Name: ips_init_phase2                                           */
7043 /*                                                                           */
7044 /*   Routine Description:                                                    */
7045 /*     Adapter Initialization Phase 2                                        */
7046 /*                                                                           */
7047 /*   Return Value:                                                           */
7048 /*     0 if Successful, else non-zero                                        */
7049 /*---------------------------------------------------------------------------*/
7050 static int
7051 ips_init_phase2(int index)
7052 {
7053         ips_ha_t *ha;
7054
7055         ha = ips_ha[index];
7056
7057         METHOD_TRACE("ips_init_phase2", 1);
7058         if (!ha->active) {
7059                 ips_ha[index] = NULL;
7060                 return -1;
7061         }
7062
7063         /* Install the interrupt handler */
7064         if (request_irq(ha->pcidev->irq, do_ipsintr, IRQF_SHARED, ips_name, ha)) {
7065                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
7066                            "Unable to install interrupt handler\n");
7067                 return ips_abort_init(ha, index);
7068         }
7069
7070         /*
7071          * Allocate a temporary SCB for initialization
7072          */
7073         ha->max_cmds = 1;
7074         if (!ips_allocatescbs(ha)) {
7075                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
7076                            "Unable to allocate a CCB\n");
7077                 free_irq(ha->pcidev->irq, ha);
7078                 return ips_abort_init(ha, index);
7079         }
7080
7081         if (!ips_hainit(ha)) {
7082                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
7083                            "Unable to initialize controller\n");
7084                 free_irq(ha->pcidev->irq, ha);
7085                 return ips_abort_init(ha, index);
7086         }
7087         /* Free the temporary SCB */
7088         ips_deallocatescbs(ha, 1);
7089
7090         /* allocate CCBs */
7091         if (!ips_allocatescbs(ha)) {
7092                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
7093                            "Unable to allocate CCBs\n");
7094                 free_irq(ha->pcidev->irq, ha);
7095                 return ips_abort_init(ha, index);
7096         }
7097
7098         return SUCCESS;
7099 }
7100
7101 MODULE_LICENSE("GPL");
7102 MODULE_DESCRIPTION("IBM ServeRAID Adapter Driver " IPS_VER_STRING);
7103 MODULE_VERSION(IPS_VER_STRING);