2 * An I2C driver for Ricoh RS5C372, R2025S/D and RV5C38[67] RTCs
5 * Copyright (C) 2006 Tower Technologies
6 * Copyright (C) 2008 Paul Mundt
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <linux/i2c.h>
14 #include <linux/rtc.h>
15 #include <linux/bcd.h>
16 #include <linux/slab.h>
17 #include <linux/module.h>
18 #include <linux/of_device.h>
21 * Ricoh has a family of I2C based RTCs, which differ only slightly from
22 * each other. Differences center on pinout (e.g. how many interrupts,
23 * output clock, etc) and how the control registers are used. The '372
24 * is significant only because that's the one this driver first supported.
26 #define RS5C372_REG_SECS 0
27 #define RS5C372_REG_MINS 1
28 #define RS5C372_REG_HOURS 2
29 #define RS5C372_REG_WDAY 3
30 #define RS5C372_REG_DAY 4
31 #define RS5C372_REG_MONTH 5
32 #define RS5C372_REG_YEAR 6
33 #define RS5C372_REG_TRIM 7
34 # define RS5C372_TRIM_XSL 0x80
35 # define RS5C372_TRIM_MASK 0x7F
37 #define RS5C_REG_ALARM_A_MIN 8 /* or ALARM_W */
38 #define RS5C_REG_ALARM_A_HOURS 9
39 #define RS5C_REG_ALARM_A_WDAY 10
41 #define RS5C_REG_ALARM_B_MIN 11 /* or ALARM_D */
42 #define RS5C_REG_ALARM_B_HOURS 12
43 #define RS5C_REG_ALARM_B_WDAY 13 /* (ALARM_B only) */
45 #define RS5C_REG_CTRL1 14
46 # define RS5C_CTRL1_AALE (1 << 7) /* or WALE */
47 # define RS5C_CTRL1_BALE (1 << 6) /* or DALE */
48 # define RV5C387_CTRL1_24 (1 << 5)
49 # define RS5C372A_CTRL1_SL1 (1 << 5)
50 # define RS5C_CTRL1_CT_MASK (7 << 0)
51 # define RS5C_CTRL1_CT0 (0 << 0) /* no periodic irq */
52 # define RS5C_CTRL1_CT4 (4 << 0) /* 1 Hz level irq */
53 #define RS5C_REG_CTRL2 15
54 # define RS5C372_CTRL2_24 (1 << 5)
55 # define RS5C_CTRL2_XSTP (1 << 4) /* only if !R2x2x */
56 # define R2x2x_CTRL2_VDET (1 << 6) /* only if R2x2x */
57 # define R2x2x_CTRL2_XSTP (1 << 5) /* only if R2x2x */
58 # define R2x2x_CTRL2_PON (1 << 4) /* only if R2x2x */
59 # define RS5C_CTRL2_CTFG (1 << 2)
60 # define RS5C_CTRL2_AAFG (1 << 1) /* or WAFG */
61 # define RS5C_CTRL2_BAFG (1 << 0) /* or DAFG */
64 /* to read (style 1) or write registers starting at R */
65 #define RS5C_ADDR(R) (((R) << 4) | 0)
78 static const struct i2c_device_id rs5c372_id[] = {
79 { "r2025sd", rtc_r2025sd },
80 { "r2221tl", rtc_r2221tl },
81 { "rs5c372a", rtc_rs5c372a },
82 { "rs5c372b", rtc_rs5c372b },
83 { "rv5c386", rtc_rv5c386 },
84 { "rv5c387a", rtc_rv5c387a },
87 MODULE_DEVICE_TABLE(i2c, rs5c372_id);
89 static const struct of_device_id rs5c372_of_match[] = {
91 .compatible = "ricoh,r2025sd",
92 .data = (void *)rtc_r2025sd
95 .compatible = "ricoh,r2221tl",
96 .data = (void *)rtc_r2221tl
99 .compatible = "ricoh,rs5c372a",
100 .data = (void *)rtc_rs5c372a
103 .compatible = "ricoh,rs5c372b",
104 .data = (void *)rtc_rs5c372b
107 .compatible = "ricoh,rv5c386",
108 .data = (void *)rtc_rv5c386
111 .compatible = "ricoh,rv5c387a",
112 .data = (void *)rtc_rv5c387a
116 MODULE_DEVICE_TABLE(of, rs5c372_of_match);
118 /* REVISIT: this assumes that:
119 * - we're in the 21st century, so it's safe to ignore the century
120 * bit for rv5c38[67] (REG_MONTH bit 7);
121 * - we should use ALARM_A not ALARM_B (may be wrong on some boards)
124 struct i2c_client *client;
125 struct rtc_device *rtc;
134 static int rs5c_get_regs(struct rs5c372 *rs5c)
136 struct i2c_client *client = rs5c->client;
137 struct i2c_msg msgs[] = {
139 .addr = client->addr,
141 .len = sizeof(rs5c->buf),
146 /* This implements the third reading method from the datasheet, using
147 * an internal address that's reset after each transaction (by STOP)
148 * to 0x0f ... so we read extra registers, and skip the first one.
150 * The first method doesn't work with the iop3xx adapter driver, on at
151 * least 80219 chips; this works around that bug.
153 * The third method on the other hand doesn't work for the SMBus-only
154 * configurations, so we use the the first method there, stripping off
155 * the extra register in the process.
158 int addr = RS5C_ADDR(RS5C372_REG_SECS);
159 int size = sizeof(rs5c->buf) - 1;
161 if (i2c_smbus_read_i2c_block_data(client, addr, size,
162 rs5c->buf + 1) != size) {
163 dev_warn(&client->dev, "can't read registers\n");
167 if ((i2c_transfer(client->adapter, msgs, 1)) != 1) {
168 dev_warn(&client->dev, "can't read registers\n");
173 dev_dbg(&client->dev,
174 "%3ph (%02x) %3ph (%02x), %3ph, %3ph; %02x %02x\n",
175 rs5c->regs + 0, rs5c->regs[3],
176 rs5c->regs + 4, rs5c->regs[7],
177 rs5c->regs + 8, rs5c->regs + 11,
178 rs5c->regs[14], rs5c->regs[15]);
183 static unsigned rs5c_reg2hr(struct rs5c372 *rs5c, unsigned reg)
188 return bcd2bin(reg & 0x3f);
190 hour = bcd2bin(reg & 0x1f);
198 static unsigned rs5c_hr2reg(struct rs5c372 *rs5c, unsigned hour)
201 return bin2bcd(hour);
204 return 0x20 | bin2bcd(hour - 12);
206 return 0x20 | bin2bcd(12);
209 return bin2bcd(hour);
212 static int rs5c372_rtc_read_time(struct device *dev, struct rtc_time *tm)
214 struct i2c_client *client = to_i2c_client(dev);
215 struct rs5c372 *rs5c = i2c_get_clientdata(client);
216 int status = rs5c_get_regs(rs5c);
217 unsigned char ctrl2 = rs5c->regs[RS5C_REG_CTRL2];
222 switch (rs5c->type) {
225 if ((rs5c->type == rtc_r2025sd && !(ctrl2 & R2x2x_CTRL2_XSTP)) ||
226 (rs5c->type == rtc_r2221tl && (ctrl2 & R2x2x_CTRL2_XSTP))) {
227 dev_warn(&client->dev, "rtc oscillator interruption detected. Please reset the rtc clock.\n");
232 if (ctrl2 & RS5C_CTRL2_XSTP) {
233 dev_warn(&client->dev, "rtc oscillator interruption detected. Please reset the rtc clock.\n");
238 tm->tm_sec = bcd2bin(rs5c->regs[RS5C372_REG_SECS] & 0x7f);
239 tm->tm_min = bcd2bin(rs5c->regs[RS5C372_REG_MINS] & 0x7f);
240 tm->tm_hour = rs5c_reg2hr(rs5c, rs5c->regs[RS5C372_REG_HOURS]);
242 tm->tm_wday = bcd2bin(rs5c->regs[RS5C372_REG_WDAY] & 0x07);
243 tm->tm_mday = bcd2bin(rs5c->regs[RS5C372_REG_DAY] & 0x3f);
245 /* tm->tm_mon is zero-based */
246 tm->tm_mon = bcd2bin(rs5c->regs[RS5C372_REG_MONTH] & 0x1f) - 1;
248 /* year is 1900 + tm->tm_year */
249 tm->tm_year = bcd2bin(rs5c->regs[RS5C372_REG_YEAR]) + 100;
251 dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
252 "mday=%d, mon=%d, year=%d, wday=%d\n",
254 tm->tm_sec, tm->tm_min, tm->tm_hour,
255 tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
260 static int rs5c372_rtc_set_time(struct device *dev, struct rtc_time *tm)
262 struct i2c_client *client = to_i2c_client(dev);
263 struct rs5c372 *rs5c = i2c_get_clientdata(client);
264 unsigned char buf[7];
268 dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d "
269 "mday=%d, mon=%d, year=%d, wday=%d\n",
271 tm->tm_sec, tm->tm_min, tm->tm_hour,
272 tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
274 addr = RS5C_ADDR(RS5C372_REG_SECS);
275 buf[0] = bin2bcd(tm->tm_sec);
276 buf[1] = bin2bcd(tm->tm_min);
277 buf[2] = rs5c_hr2reg(rs5c, tm->tm_hour);
278 buf[3] = bin2bcd(tm->tm_wday);
279 buf[4] = bin2bcd(tm->tm_mday);
280 buf[5] = bin2bcd(tm->tm_mon + 1);
281 buf[6] = bin2bcd(tm->tm_year - 100);
283 if (i2c_smbus_write_i2c_block_data(client, addr, sizeof(buf), buf) < 0) {
284 dev_dbg(&client->dev, "%s: write error in line %i\n",
289 addr = RS5C_ADDR(RS5C_REG_CTRL2);
290 ctrl2 = i2c_smbus_read_byte_data(client, addr);
292 /* clear rtc warning bits */
293 switch (rs5c->type) {
296 ctrl2 &= ~(R2x2x_CTRL2_VDET | R2x2x_CTRL2_PON);
297 if (rs5c->type == rtc_r2025sd)
298 ctrl2 |= R2x2x_CTRL2_XSTP;
300 ctrl2 &= ~R2x2x_CTRL2_XSTP;
303 ctrl2 &= ~RS5C_CTRL2_XSTP;
307 if (i2c_smbus_write_byte_data(client, addr, ctrl2) < 0) {
308 dev_dbg(&client->dev, "%s: write error in line %i\n",
316 #if IS_ENABLED(CONFIG_RTC_INTF_PROC)
320 #if IS_ENABLED(CONFIG_RTC_INTF_SYSFS)
325 static int rs5c372_get_trim(struct i2c_client *client, int *osc, int *trim)
327 struct rs5c372 *rs5c372 = i2c_get_clientdata(client);
328 u8 tmp = rs5c372->regs[RS5C372_REG_TRIM];
331 *osc = (tmp & RS5C372_TRIM_XSL) ? 32000 : 32768;
334 dev_dbg(&client->dev, "%s: raw trim=%x\n", __func__, tmp);
335 tmp &= RS5C372_TRIM_MASK;
340 t = (~t | (s8)0xc0) + 1;
354 static int rs5c_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
356 struct i2c_client *client = to_i2c_client(dev);
357 struct rs5c372 *rs5c = i2c_get_clientdata(client);
361 buf = rs5c->regs[RS5C_REG_CTRL1];
366 status = rs5c_get_regs(rs5c);
370 addr = RS5C_ADDR(RS5C_REG_CTRL1);
372 buf |= RS5C_CTRL1_AALE;
374 buf &= ~RS5C_CTRL1_AALE;
376 if (i2c_smbus_write_byte_data(client, addr, buf) < 0) {
377 dev_warn(dev, "can't update alarm\n");
380 rs5c->regs[RS5C_REG_CTRL1] = buf;
386 /* NOTE: Since RTC_WKALM_{RD,SET} were originally defined for EFI,
387 * which only exposes a polled programming interface; and since
388 * these calls map directly to those EFI requests; we don't demand
389 * we have an IRQ for this chip when we go through this API.
391 * The older x86_pc derived RTC_ALM_{READ,SET} calls require irqs
392 * though, managed through RTC_AIE_{ON,OFF} requests.
395 static int rs5c_read_alarm(struct device *dev, struct rtc_wkalrm *t)
397 struct i2c_client *client = to_i2c_client(dev);
398 struct rs5c372 *rs5c = i2c_get_clientdata(client);
401 status = rs5c_get_regs(rs5c);
405 /* report alarm time */
407 t->time.tm_min = bcd2bin(rs5c->regs[RS5C_REG_ALARM_A_MIN] & 0x7f);
408 t->time.tm_hour = rs5c_reg2hr(rs5c, rs5c->regs[RS5C_REG_ALARM_A_HOURS]);
411 t->enabled = !!(rs5c->regs[RS5C_REG_CTRL1] & RS5C_CTRL1_AALE);
412 t->pending = !!(rs5c->regs[RS5C_REG_CTRL2] & RS5C_CTRL2_AAFG);
417 static int rs5c_set_alarm(struct device *dev, struct rtc_wkalrm *t)
419 struct i2c_client *client = to_i2c_client(dev);
420 struct rs5c372 *rs5c = i2c_get_clientdata(client);
422 unsigned char buf[3];
424 /* only handle up to 24 hours in the future, like RTC_ALM_SET */
425 if (t->time.tm_mday != -1
426 || t->time.tm_mon != -1
427 || t->time.tm_year != -1)
430 /* REVISIT: round up tm_sec */
432 /* if needed, disable irq (clears pending status) */
433 status = rs5c_get_regs(rs5c);
436 if (rs5c->regs[RS5C_REG_CTRL1] & RS5C_CTRL1_AALE) {
437 addr = RS5C_ADDR(RS5C_REG_CTRL1);
438 buf[0] = rs5c->regs[RS5C_REG_CTRL1] & ~RS5C_CTRL1_AALE;
439 if (i2c_smbus_write_byte_data(client, addr, buf[0]) < 0) {
440 dev_dbg(dev, "can't disable alarm\n");
443 rs5c->regs[RS5C_REG_CTRL1] = buf[0];
447 buf[0] = bin2bcd(t->time.tm_min);
448 buf[1] = rs5c_hr2reg(rs5c, t->time.tm_hour);
449 buf[2] = 0x7f; /* any/all days */
451 for (i = 0; i < sizeof(buf); i++) {
452 addr = RS5C_ADDR(RS5C_REG_ALARM_A_MIN + i);
453 if (i2c_smbus_write_byte_data(client, addr, buf[i]) < 0) {
454 dev_dbg(dev, "can't set alarm time\n");
459 /* ... and maybe enable its irq */
461 addr = RS5C_ADDR(RS5C_REG_CTRL1);
462 buf[0] = rs5c->regs[RS5C_REG_CTRL1] | RS5C_CTRL1_AALE;
463 if (i2c_smbus_write_byte_data(client, addr, buf[0]) < 0)
464 dev_warn(dev, "can't enable alarm\n");
465 rs5c->regs[RS5C_REG_CTRL1] = buf[0];
471 #if IS_ENABLED(CONFIG_RTC_INTF_PROC)
473 static int rs5c372_rtc_proc(struct device *dev, struct seq_file *seq)
477 err = rs5c372_get_trim(to_i2c_client(dev), &osc, &trim);
479 seq_printf(seq, "crystal\t\t: %d.%03d KHz\n",
480 osc / 1000, osc % 1000);
481 seq_printf(seq, "trim\t\t: %d\n", trim);
488 #define rs5c372_rtc_proc NULL
491 static const struct rtc_class_ops rs5c372_rtc_ops = {
492 .proc = rs5c372_rtc_proc,
493 .read_time = rs5c372_rtc_read_time,
494 .set_time = rs5c372_rtc_set_time,
495 .read_alarm = rs5c_read_alarm,
496 .set_alarm = rs5c_set_alarm,
497 .alarm_irq_enable = rs5c_rtc_alarm_irq_enable,
500 #if IS_ENABLED(CONFIG_RTC_INTF_SYSFS)
502 static ssize_t rs5c372_sysfs_show_trim(struct device *dev,
503 struct device_attribute *attr, char *buf)
507 err = rs5c372_get_trim(to_i2c_client(dev), NULL, &trim);
511 return sprintf(buf, "%d\n", trim);
513 static DEVICE_ATTR(trim, S_IRUGO, rs5c372_sysfs_show_trim, NULL);
515 static ssize_t rs5c372_sysfs_show_osc(struct device *dev,
516 struct device_attribute *attr, char *buf)
520 err = rs5c372_get_trim(to_i2c_client(dev), &osc, NULL);
524 return sprintf(buf, "%d.%03d KHz\n", osc / 1000, osc % 1000);
526 static DEVICE_ATTR(osc, S_IRUGO, rs5c372_sysfs_show_osc, NULL);
528 static int rs5c_sysfs_register(struct device *dev)
532 err = device_create_file(dev, &dev_attr_trim);
535 err = device_create_file(dev, &dev_attr_osc);
537 device_remove_file(dev, &dev_attr_trim);
542 static void rs5c_sysfs_unregister(struct device *dev)
544 device_remove_file(dev, &dev_attr_trim);
545 device_remove_file(dev, &dev_attr_osc);
549 static int rs5c_sysfs_register(struct device *dev)
554 static void rs5c_sysfs_unregister(struct device *dev)
560 static struct i2c_driver rs5c372_driver;
562 static int rs5c_oscillator_setup(struct rs5c372 *rs5c372)
564 unsigned char buf[2];
565 int addr, i, ret = 0;
567 addr = RS5C_ADDR(RS5C_REG_CTRL1);
568 buf[0] = rs5c372->regs[RS5C_REG_CTRL1];
569 buf[1] = rs5c372->regs[RS5C_REG_CTRL2];
571 switch (rs5c372->type) {
573 if (buf[1] & R2x2x_CTRL2_XSTP)
577 if (!(buf[1] & R2x2x_CTRL2_XSTP))
581 if (!(buf[1] & RS5C_CTRL2_XSTP))
587 switch (rs5c372->type) {
590 buf[1] |= RS5C372_CTRL2_24;
597 buf[0] |= RV5C387_CTRL1_24;
605 for (i = 0; i < sizeof(buf); i++) {
606 addr = RS5C_ADDR(RS5C_REG_CTRL1 + i);
607 ret = i2c_smbus_write_byte_data(rs5c372->client, addr, buf[i]);
608 if (unlikely(ret < 0))
612 rs5c372->regs[RS5C_REG_CTRL1] = buf[0];
613 rs5c372->regs[RS5C_REG_CTRL2] = buf[1];
618 static int rs5c372_probe(struct i2c_client *client,
619 const struct i2c_device_id *id)
623 struct rs5c372 *rs5c372;
625 dev_dbg(&client->dev, "%s\n", __func__);
627 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C |
628 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_I2C_BLOCK)) {
630 * If we don't have any master mode adapter, try breaking
631 * it down in to the barest of capabilities.
633 if (i2c_check_functionality(client->adapter,
634 I2C_FUNC_SMBUS_BYTE_DATA |
635 I2C_FUNC_SMBUS_I2C_BLOCK))
638 /* Still no good, give up */
644 rs5c372 = devm_kzalloc(&client->dev, sizeof(struct rs5c372),
651 rs5c372->client = client;
652 i2c_set_clientdata(client, rs5c372);
653 if (client->dev.of_node)
654 rs5c372->type = (enum rtc_type)
655 of_device_get_match_data(&client->dev);
657 rs5c372->type = id->driver_data;
659 /* we read registers 0x0f then 0x00-0x0f; skip the first one */
660 rs5c372->regs = &rs5c372->buf[1];
661 rs5c372->smbus = smbus_mode;
663 err = rs5c_get_regs(rs5c372);
667 /* clock may be set for am/pm or 24 hr time */
668 switch (rs5c372->type) {
671 /* alarm uses ALARM_A; and nINTRA on 372a, nINTR on 372b.
672 * so does periodic irq, except some 327a modes.
674 if (rs5c372->regs[RS5C_REG_CTRL2] & RS5C372_CTRL2_24)
681 if (rs5c372->regs[RS5C_REG_CTRL1] & RV5C387_CTRL1_24)
683 /* alarm uses ALARM_W; and nINTRB for alarm and periodic
684 * irq, on both 386 and 387
688 dev_err(&client->dev, "unknown RTC type\n");
692 /* if the oscillator lost power and no other software (like
693 * the bootloader) set it up, do it here.
695 * The R2025S/D does this a little differently than the other
696 * parts, so we special case that..
698 err = rs5c_oscillator_setup(rs5c372);
699 if (unlikely(err < 0)) {
700 dev_err(&client->dev, "setup error\n");
704 dev_info(&client->dev, "%s found, %s\n",
705 ({ char *s; switch (rs5c372->type) {
706 case rtc_r2025sd: s = "r2025sd"; break;
707 case rtc_r2221tl: s = "r2221tl"; break;
708 case rtc_rs5c372a: s = "rs5c372a"; break;
709 case rtc_rs5c372b: s = "rs5c372b"; break;
710 case rtc_rv5c386: s = "rv5c386"; break;
711 case rtc_rv5c387a: s = "rv5c387a"; break;
712 default: s = "chip"; break;
714 rs5c372->time24 ? "24hr" : "am/pm"
717 /* REVISIT use client->irq to register alarm irq ... */
718 rs5c372->rtc = devm_rtc_device_register(&client->dev,
719 rs5c372_driver.driver.name,
720 &rs5c372_rtc_ops, THIS_MODULE);
722 if (IS_ERR(rs5c372->rtc)) {
723 err = PTR_ERR(rs5c372->rtc);
727 err = rs5c_sysfs_register(&client->dev);
737 static int rs5c372_remove(struct i2c_client *client)
739 rs5c_sysfs_unregister(&client->dev);
743 static struct i2c_driver rs5c372_driver = {
745 .name = "rtc-rs5c372",
746 .of_match_table = of_match_ptr(rs5c372_of_match),
748 .probe = rs5c372_probe,
749 .remove = rs5c372_remove,
750 .id_table = rs5c372_id,
753 module_i2c_driver(rs5c372_driver);
759 MODULE_DESCRIPTION("Ricoh RS5C372 RTC driver");
760 MODULE_LICENSE("GPL");