2 * Haoyu HYM8563 RTC driver
4 * Copyright (C) 2013 MundoReader S.L.
8 * Copyright (C) 2010 ROCKCHIP, Inc.
10 * This software is licensed under the terms of the GNU General Public
11 * License version 2, as published by the Free Software Foundation, and
12 * may be copied, distributed, and modified under those terms.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
20 #include <linux/module.h>
21 #include <linux/clk-provider.h>
22 #include <linux/i2c.h>
23 #include <linux/bcd.h>
24 #include <linux/rtc.h>
26 #define HYM8563_CTL1 0x00
27 #define HYM8563_CTL1_TEST BIT(7)
28 #define HYM8563_CTL1_STOP BIT(5)
29 #define HYM8563_CTL1_TESTC BIT(3)
31 #define HYM8563_CTL2 0x01
32 #define HYM8563_CTL2_TI_TP BIT(4)
33 #define HYM8563_CTL2_AF BIT(3)
34 #define HYM8563_CTL2_TF BIT(2)
35 #define HYM8563_CTL2_AIE BIT(1)
36 #define HYM8563_CTL2_TIE BIT(0)
38 #define HYM8563_SEC 0x02
39 #define HYM8563_SEC_VL BIT(7)
40 #define HYM8563_SEC_MASK 0x7f
42 #define HYM8563_MIN 0x03
43 #define HYM8563_MIN_MASK 0x7f
45 #define HYM8563_HOUR 0x04
46 #define HYM8563_HOUR_MASK 0x3f
48 #define HYM8563_DAY 0x05
49 #define HYM8563_DAY_MASK 0x3f
51 #define HYM8563_WEEKDAY 0x06
52 #define HYM8563_WEEKDAY_MASK 0x07
54 #define HYM8563_MONTH 0x07
55 #define HYM8563_MONTH_CENTURY BIT(7)
56 #define HYM8563_MONTH_MASK 0x1f
58 #define HYM8563_YEAR 0x08
60 #define HYM8563_ALM_MIN 0x09
61 #define HYM8563_ALM_HOUR 0x0a
62 #define HYM8563_ALM_DAY 0x0b
63 #define HYM8563_ALM_WEEK 0x0c
65 /* Each alarm check can be disabled by setting this bit in the register */
66 #define HYM8563_ALM_BIT_DISABLE BIT(7)
68 #define HYM8563_CLKOUT 0x0d
69 #define HYM8563_CLKOUT_ENABLE BIT(7)
70 #define HYM8563_CLKOUT_32768 0
71 #define HYM8563_CLKOUT_1024 1
72 #define HYM8563_CLKOUT_32 2
73 #define HYM8563_CLKOUT_1 3
74 #define HYM8563_CLKOUT_MASK 3
76 #define HYM8563_TMR_CTL 0x0e
77 #define HYM8563_TMR_CTL_ENABLE BIT(7)
78 #define HYM8563_TMR_CTL_4096 0
79 #define HYM8563_TMR_CTL_64 1
80 #define HYM8563_TMR_CTL_1 2
81 #define HYM8563_TMR_CTL_1_60 3
82 #define HYM8563_TMR_CTL_MASK 3
84 #define HYM8563_TMR_CNT 0x0f
87 struct i2c_client *client;
88 struct rtc_device *rtc;
90 #ifdef CONFIG_COMMON_CLK
91 struct clk_hw clkout_hw;
99 static int hym8563_rtc_read_time(struct device *dev, struct rtc_time *tm)
101 struct i2c_client *client = to_i2c_client(dev);
102 struct hym8563 *hym8563 = i2c_get_clientdata(client);
106 if (!hym8563->valid) {
107 dev_warn(&client->dev, "no valid clock/calendar values available\n");
111 ret = i2c_smbus_read_i2c_block_data(client, HYM8563_SEC, 7, buf);
115 tm->tm_sec = bcd2bin(buf[0] & HYM8563_SEC_MASK);
116 tm->tm_min = bcd2bin(buf[1] & HYM8563_MIN_MASK);
117 tm->tm_hour = bcd2bin(buf[2] & HYM8563_HOUR_MASK);
118 tm->tm_mday = bcd2bin(buf[3] & HYM8563_DAY_MASK);
119 tm->tm_wday = bcd2bin(buf[4] & HYM8563_WEEKDAY_MASK); /* 0 = Sun */
120 tm->tm_mon = bcd2bin(buf[5] & HYM8563_MONTH_MASK) - 1; /* 0 = Jan */
121 tm->tm_year = bcd2bin(buf[6]) + 100;
126 static int hym8563_rtc_set_time(struct device *dev, struct rtc_time *tm)
128 struct i2c_client *client = to_i2c_client(dev);
129 struct hym8563 *hym8563 = i2c_get_clientdata(client);
133 /* Years >= 2100 are to far in the future, 19XX is to early */
134 if (tm->tm_year < 100 || tm->tm_year >= 200)
137 buf[0] = bin2bcd(tm->tm_sec);
138 buf[1] = bin2bcd(tm->tm_min);
139 buf[2] = bin2bcd(tm->tm_hour);
140 buf[3] = bin2bcd(tm->tm_mday);
141 buf[4] = bin2bcd(tm->tm_wday);
142 buf[5] = bin2bcd(tm->tm_mon + 1);
145 * While the HYM8563 has a century flag in the month register,
146 * it does not seem to carry it over a subsequent write/read.
147 * So we'll limit ourself to 100 years, starting at 2000 for now.
149 buf[6] = bin2bcd(tm->tm_year - 100);
152 * CTL1 only contains TEST-mode bits apart from stop,
153 * so no need to read the value first
155 ret = i2c_smbus_write_byte_data(client, HYM8563_CTL1,
160 ret = i2c_smbus_write_i2c_block_data(client, HYM8563_SEC, 7, buf);
164 ret = i2c_smbus_write_byte_data(client, HYM8563_CTL1, 0);
168 hym8563->valid = true;
173 static int hym8563_rtc_alarm_irq_enable(struct device *dev,
174 unsigned int enabled)
176 struct i2c_client *client = to_i2c_client(dev);
179 data = i2c_smbus_read_byte_data(client, HYM8563_CTL2);
184 data |= HYM8563_CTL2_AIE;
186 data &= ~HYM8563_CTL2_AIE;
188 return i2c_smbus_write_byte_data(client, HYM8563_CTL2, data);
191 static int hym8563_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
193 struct i2c_client *client = to_i2c_client(dev);
194 struct rtc_time *alm_tm = &alm->time;
198 ret = i2c_smbus_read_i2c_block_data(client, HYM8563_ALM_MIN, 4, buf);
202 /* The alarm only has a minute accuracy */
205 alm_tm->tm_min = (buf[0] & HYM8563_ALM_BIT_DISABLE) ?
207 bcd2bin(buf[0] & HYM8563_MIN_MASK);
208 alm_tm->tm_hour = (buf[1] & HYM8563_ALM_BIT_DISABLE) ?
210 bcd2bin(buf[1] & HYM8563_HOUR_MASK);
211 alm_tm->tm_mday = (buf[2] & HYM8563_ALM_BIT_DISABLE) ?
213 bcd2bin(buf[2] & HYM8563_DAY_MASK);
214 alm_tm->tm_wday = (buf[3] & HYM8563_ALM_BIT_DISABLE) ?
216 bcd2bin(buf[3] & HYM8563_WEEKDAY_MASK);
218 ret = i2c_smbus_read_byte_data(client, HYM8563_CTL2);
222 if (ret & HYM8563_CTL2_AIE)
228 static int hym8563_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
230 struct i2c_client *client = to_i2c_client(dev);
231 struct rtc_time *alm_tm = &alm->time;
236 * The alarm has no seconds so deal with it
238 if (alm_tm->tm_sec) {
241 if (alm_tm->tm_min >= 60) {
244 if (alm_tm->tm_hour >= 24) {
247 if (alm_tm->tm_mday > 31)
253 ret = i2c_smbus_read_byte_data(client, HYM8563_CTL2);
257 ret &= ~HYM8563_CTL2_AIE;
259 ret = i2c_smbus_write_byte_data(client, HYM8563_CTL2, ret);
263 buf[0] = (alm_tm->tm_min < 60 && alm_tm->tm_min >= 0) ?
264 bin2bcd(alm_tm->tm_min) : HYM8563_ALM_BIT_DISABLE;
266 buf[1] = (alm_tm->tm_hour < 24 && alm_tm->tm_hour >= 0) ?
267 bin2bcd(alm_tm->tm_hour) : HYM8563_ALM_BIT_DISABLE;
269 buf[2] = (alm_tm->tm_mday <= 31 && alm_tm->tm_mday >= 1) ?
270 bin2bcd(alm_tm->tm_mday) : HYM8563_ALM_BIT_DISABLE;
272 buf[3] = (alm_tm->tm_wday < 7 && alm_tm->tm_wday >= 0) ?
273 bin2bcd(alm_tm->tm_wday) : HYM8563_ALM_BIT_DISABLE;
275 ret = i2c_smbus_write_i2c_block_data(client, HYM8563_ALM_MIN, 4, buf);
279 return hym8563_rtc_alarm_irq_enable(dev, alm->enabled);
282 static const struct rtc_class_ops hym8563_rtc_ops = {
283 .read_time = hym8563_rtc_read_time,
284 .set_time = hym8563_rtc_set_time,
285 .alarm_irq_enable = hym8563_rtc_alarm_irq_enable,
286 .read_alarm = hym8563_rtc_read_alarm,
287 .set_alarm = hym8563_rtc_set_alarm,
291 * Handling of the clkout
294 #ifdef CONFIG_COMMON_CLK
295 #define clkout_hw_to_hym8563(_hw) container_of(_hw, struct hym8563, clkout_hw)
297 static int clkout_rates[] = {
304 static unsigned long hym8563_clkout_recalc_rate(struct clk_hw *hw,
305 unsigned long parent_rate)
307 struct hym8563 *hym8563 = clkout_hw_to_hym8563(hw);
308 struct i2c_client *client = hym8563->client;
309 int ret = i2c_smbus_read_byte_data(client, HYM8563_CLKOUT);
314 ret &= HYM8563_CLKOUT_MASK;
315 return clkout_rates[ret];
318 static long hym8563_clkout_round_rate(struct clk_hw *hw, unsigned long rate,
319 unsigned long *prate)
323 for (i = 0; i < ARRAY_SIZE(clkout_rates); i++)
324 if (clkout_rates[i] <= rate)
325 return clkout_rates[i];
330 static int hym8563_clkout_set_rate(struct clk_hw *hw, unsigned long rate,
331 unsigned long parent_rate)
333 struct hym8563 *hym8563 = clkout_hw_to_hym8563(hw);
334 struct i2c_client *client = hym8563->client;
335 int ret = i2c_smbus_read_byte_data(client, HYM8563_CLKOUT);
341 for (i = 0; i < ARRAY_SIZE(clkout_rates); i++)
342 if (clkout_rates[i] == rate) {
343 ret &= ~HYM8563_CLKOUT_MASK;
345 return i2c_smbus_write_byte_data(client,
346 HYM8563_CLKOUT, ret);
352 static int hym8563_clkout_control(struct clk_hw *hw, bool enable)
354 struct hym8563 *hym8563 = clkout_hw_to_hym8563(hw);
355 struct i2c_client *client = hym8563->client;
356 int ret = i2c_smbus_read_byte_data(client, HYM8563_CLKOUT);
362 ret |= HYM8563_CLKOUT_ENABLE;
364 ret &= ~HYM8563_CLKOUT_ENABLE;
366 return i2c_smbus_write_byte_data(client, HYM8563_CLKOUT, ret);
369 static int hym8563_clkout_prepare(struct clk_hw *hw)
371 return hym8563_clkout_control(hw, 1);
374 static void hym8563_clkout_unprepare(struct clk_hw *hw)
376 hym8563_clkout_control(hw, 0);
379 static int hym8563_clkout_is_prepared(struct clk_hw *hw)
381 struct hym8563 *hym8563 = clkout_hw_to_hym8563(hw);
382 struct i2c_client *client = hym8563->client;
383 int ret = i2c_smbus_read_byte_data(client, HYM8563_CLKOUT);
388 return !!(ret & HYM8563_CLKOUT_ENABLE);
391 static const struct clk_ops hym8563_clkout_ops = {
392 .prepare = hym8563_clkout_prepare,
393 .unprepare = hym8563_clkout_unprepare,
394 .is_prepared = hym8563_clkout_is_prepared,
395 .recalc_rate = hym8563_clkout_recalc_rate,
396 .round_rate = hym8563_clkout_round_rate,
397 .set_rate = hym8563_clkout_set_rate,
400 static struct clk *hym8563_clkout_register_clk(struct hym8563 *hym8563)
402 struct i2c_client *client = hym8563->client;
403 struct device_node *node = client->dev.of_node;
405 struct clk_init_data init;
408 ret = i2c_smbus_write_byte_data(client, HYM8563_CLKOUT,
413 init.name = "hym8563-clkout";
414 init.ops = &hym8563_clkout_ops;
416 init.parent_names = NULL;
417 init.num_parents = 0;
418 hym8563->clkout_hw.init = &init;
420 /* optional override of the clockname */
421 of_property_read_string(node, "clock-output-names", &init.name);
423 /* register the clock */
424 clk = clk_register(&client->dev, &hym8563->clkout_hw);
427 of_clk_add_provider(node, of_clk_src_simple_get, clk);
434 * The alarm interrupt is implemented as a level-low interrupt in the
435 * hym8563, while the timer interrupt uses a falling edge.
436 * We don't use the timer at all, so the interrupt is requested to
437 * use the level-low trigger.
439 static irqreturn_t hym8563_irq(int irq, void *dev_id)
441 struct hym8563 *hym8563 = (struct hym8563 *)dev_id;
442 struct i2c_client *client = hym8563->client;
443 struct mutex *lock = &hym8563->rtc->ops_lock;
448 /* Clear the alarm flag */
450 data = i2c_smbus_read_byte_data(client, HYM8563_CTL2);
452 dev_err(&client->dev, "%s: error reading i2c data %d\n",
457 data &= ~HYM8563_CTL2_AF;
459 ret = i2c_smbus_write_byte_data(client, HYM8563_CTL2, data);
461 dev_err(&client->dev, "%s: error writing i2c data %d\n",
470 static int hym8563_init_device(struct i2c_client *client)
474 /* Clear stop flag if present */
475 ret = i2c_smbus_write_byte_data(client, HYM8563_CTL1, 0);
479 ret = i2c_smbus_read_byte_data(client, HYM8563_CTL2);
483 /* Disable alarm and timer interrupts */
484 ret &= ~HYM8563_CTL2_AIE;
485 ret &= ~HYM8563_CTL2_TIE;
487 /* Clear any pending alarm and timer flags */
488 if (ret & HYM8563_CTL2_AF)
489 ret &= ~HYM8563_CTL2_AF;
491 if (ret & HYM8563_CTL2_TF)
492 ret &= ~HYM8563_CTL2_TF;
494 ret &= ~HYM8563_CTL2_TI_TP;
496 return i2c_smbus_write_byte_data(client, HYM8563_CTL2, ret);
499 #ifdef CONFIG_PM_SLEEP
500 static int hym8563_suspend(struct device *dev)
502 struct i2c_client *client = to_i2c_client(dev);
505 if (device_may_wakeup(dev)) {
506 ret = enable_irq_wake(client->irq);
508 dev_err(dev, "enable_irq_wake failed, %d\n", ret);
516 static int hym8563_resume(struct device *dev)
518 struct i2c_client *client = to_i2c_client(dev);
520 if (device_may_wakeup(dev))
521 disable_irq_wake(client->irq);
527 static SIMPLE_DEV_PM_OPS(hym8563_pm_ops, hym8563_suspend, hym8563_resume);
529 static int hym8563_probe(struct i2c_client *client,
530 const struct i2c_device_id *id)
532 struct hym8563 *hym8563;
535 hym8563 = devm_kzalloc(&client->dev, sizeof(*hym8563), GFP_KERNEL);
539 hym8563->client = client;
540 i2c_set_clientdata(client, hym8563);
542 device_set_wakeup_capable(&client->dev, true);
544 ret = hym8563_init_device(client);
546 dev_err(&client->dev, "could not init device, %d\n", ret);
550 if (client->irq > 0) {
551 ret = devm_request_threaded_irq(&client->dev, client->irq,
553 IRQF_TRIGGER_LOW | IRQF_ONESHOT,
554 client->name, hym8563);
556 dev_err(&client->dev, "irq %d request failed, %d\n",
562 /* check state of calendar information */
563 ret = i2c_smbus_read_byte_data(client, HYM8563_SEC);
567 hym8563->valid = !(ret & HYM8563_SEC_VL);
568 dev_dbg(&client->dev, "rtc information is %s\n",
569 hym8563->valid ? "valid" : "invalid");
571 hym8563->rtc = devm_rtc_device_register(&client->dev, client->name,
572 &hym8563_rtc_ops, THIS_MODULE);
573 if (IS_ERR(hym8563->rtc))
574 return PTR_ERR(hym8563->rtc);
576 /* the hym8563 alarm only supports a minute accuracy */
577 hym8563->rtc->uie_unsupported = 1;
579 #ifdef CONFIG_COMMON_CLK
580 hym8563_clkout_register_clk(hym8563);
586 static const struct i2c_device_id hym8563_id[] = {
590 MODULE_DEVICE_TABLE(i2c, hym8563_id);
592 static const struct of_device_id hym8563_dt_idtable[] = {
593 { .compatible = "haoyu,hym8563" },
596 MODULE_DEVICE_TABLE(of, hym8563_dt_idtable);
598 static struct i2c_driver hym8563_driver = {
600 .name = "rtc-hym8563",
601 .pm = &hym8563_pm_ops,
602 .of_match_table = hym8563_dt_idtable,
604 .probe = hym8563_probe,
605 .id_table = hym8563_id,
608 module_i2c_driver(hym8563_driver);
611 MODULE_DESCRIPTION("HYM8563 RTC driver");
612 MODULE_LICENSE("GPL");