1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright IBM Corp. 2012
9 #define KMSG_COMPONENT "zpci"
10 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
12 #include <linux/compat.h>
13 #include <linux/kernel.h>
14 #include <linux/miscdevice.h>
15 #include <linux/slab.h>
16 #include <linux/err.h>
17 #include <linux/delay.h>
18 #include <linux/pci.h>
19 #include <linux/uaccess.h>
20 #include <asm/pci_debug.h>
21 #include <asm/pci_clp.h>
23 #include <uapi/asm/clp.h>
27 void update_uid_checking(bool new)
29 if (zpci_unique_uid != new)
30 zpci_dbg(1, "uid checking:%d\n", new);
32 zpci_unique_uid = new;
35 static inline void zpci_err_clp(unsigned int rsp, int rc)
40 } __packed data = {rsp, rc};
42 zpci_err_hex(&data, sizeof(data));
46 * Call Logical Processor with c=1, lps=0 and command 1
47 * to get the bit mask of installed logical processors
49 static inline int clp_get_ilp(unsigned long *ilp)
55 " .insn rrf,0xb9a00000,%[mask],%[cmd],8,0\n"
60 : [cc] "+d" (cc), [mask] "=d" (mask) : [cmd] "a" (1)
67 * Call Logical Processor with c=0, the give constant lps and an lpcb request.
69 static __always_inline int clp_req(void *data, unsigned int lps)
71 struct { u8 _[CLP_BLK_SIZE]; } *req = data;
76 " .insn rrf,0xb9a00000,%[ign],%[req],0,%[lps]\n"
81 : [cc] "+d" (cc), [ign] "=d" (ignored), "+m" (*req)
82 : [req] "a" (req), [lps] "i" (lps)
87 static void *clp_alloc_block(gfp_t gfp_mask)
89 return (void *) __get_free_pages(gfp_mask, get_order(CLP_BLK_SIZE));
92 static void clp_free_block(void *ptr)
94 free_pages((unsigned long) ptr, get_order(CLP_BLK_SIZE));
97 static void clp_store_query_pci_fngrp(struct zpci_dev *zdev,
98 struct clp_rsp_query_pci_grp *response)
100 zdev->tlb_refresh = response->refresh;
101 zdev->dma_mask = response->dasm;
102 zdev->msi_addr = response->msia;
103 zdev->max_msi = response->noi;
104 zdev->fmb_update = response->mui;
106 switch (response->version) {
108 zdev->max_bus_speed = PCIE_SPEED_5_0GT;
111 zdev->max_bus_speed = PCI_SPEED_UNKNOWN;
116 static int clp_query_pci_fngrp(struct zpci_dev *zdev, u8 pfgid)
118 struct clp_req_rsp_query_pci_grp *rrb;
121 rrb = clp_alloc_block(GFP_KERNEL);
125 memset(rrb, 0, sizeof(*rrb));
126 rrb->request.hdr.len = sizeof(rrb->request);
127 rrb->request.hdr.cmd = CLP_QUERY_PCI_FNGRP;
128 rrb->response.hdr.len = sizeof(rrb->response);
129 rrb->request.pfgid = pfgid;
131 rc = clp_req(rrb, CLP_LPS_PCI);
132 if (!rc && rrb->response.hdr.rsp == CLP_RC_OK)
133 clp_store_query_pci_fngrp(zdev, &rrb->response);
135 zpci_err("Q PCI FGRP:\n");
136 zpci_err_clp(rrb->response.hdr.rsp, rc);
143 static int clp_store_query_pci_fn(struct zpci_dev *zdev,
144 struct clp_rsp_query_pci *response)
148 for (i = 0; i < PCI_STD_NUM_BARS; i++) {
149 zdev->bars[i].val = le32_to_cpu(response->bar[i]);
150 zdev->bars[i].size = response->bar_size[i];
152 zdev->start_dma = response->sdma;
153 zdev->end_dma = response->edma;
154 zdev->pchid = response->pchid;
155 zdev->pfgid = response->pfgid;
156 zdev->pft = response->pft;
157 zdev->vfn = response->vfn;
158 zdev->port = response->port;
159 zdev->uid = response->uid;
160 zdev->fmb_length = sizeof(u32) * response->fmb_len;
161 zdev->rid_available = response->rid_avail;
162 zdev->is_physfn = response->is_physfn;
163 if (!s390_pci_no_rid && zdev->rid_available)
164 zdev->devfn = response->rid & ZPCI_RID_MASK_DEVFN;
166 memcpy(zdev->pfip, response->pfip, sizeof(zdev->pfip));
167 if (response->util_str_avail) {
168 memcpy(zdev->util_str, response->util_str,
169 sizeof(zdev->util_str));
171 zdev->mio_capable = response->mio_addr_avail;
172 for (i = 0; i < PCI_STD_NUM_BARS; i++) {
173 if (!(response->mio.valid & (1 << (PCI_STD_NUM_BARS - i - 1))))
176 zdev->bars[i].mio_wb = (void __iomem *) response->mio.addr[i].wb;
177 zdev->bars[i].mio_wt = (void __iomem *) response->mio.addr[i].wt;
182 static int clp_query_pci_fn(struct zpci_dev *zdev, u32 fh)
184 struct clp_req_rsp_query_pci *rrb;
187 rrb = clp_alloc_block(GFP_KERNEL);
191 memset(rrb, 0, sizeof(*rrb));
192 rrb->request.hdr.len = sizeof(rrb->request);
193 rrb->request.hdr.cmd = CLP_QUERY_PCI_FN;
194 rrb->response.hdr.len = sizeof(rrb->response);
195 rrb->request.fh = fh;
197 rc = clp_req(rrb, CLP_LPS_PCI);
198 if (!rc && rrb->response.hdr.rsp == CLP_RC_OK) {
199 rc = clp_store_query_pci_fn(zdev, &rrb->response);
202 rc = clp_query_pci_fngrp(zdev, rrb->response.pfgid);
204 zpci_err("Q PCI FN:\n");
205 zpci_err_clp(rrb->response.hdr.rsp, rc);
213 int clp_add_pci_device(u32 fid, u32 fh, int configured)
215 struct zpci_dev *zdev;
218 zpci_dbg(3, "add fid:%x, fh:%x, c:%d\n", fid, fh, configured);
219 zdev = kzalloc(sizeof(*zdev), GFP_KERNEL);
226 /* Query function properties and update zdev */
227 rc = clp_query_pci_fn(zdev, fh);
232 zdev->state = ZPCI_FN_STATE_CONFIGURED;
234 zdev->state = ZPCI_FN_STATE_STANDBY;
236 rc = zpci_create_device(zdev);
242 zpci_dbg(0, "add fid:%x, rc:%d\n", fid, rc);
248 * Enable/Disable a given PCI function and update its function handle if
251 static int clp_set_pci_fn(struct zpci_dev *zdev, u8 nr_dma_as, u8 command)
253 struct clp_req_rsp_set_pci *rrb;
254 int rc, retries = 100;
257 rrb = clp_alloc_block(GFP_KERNEL);
262 memset(rrb, 0, sizeof(*rrb));
263 rrb->request.hdr.len = sizeof(rrb->request);
264 rrb->request.hdr.cmd = CLP_SET_PCI_FN;
265 rrb->response.hdr.len = sizeof(rrb->response);
266 rrb->request.fh = zdev->fh;
267 rrb->request.oc = command;
268 rrb->request.ndas = nr_dma_as;
270 rc = clp_req(rrb, CLP_LPS_PCI);
271 if (rrb->response.hdr.rsp == CLP_RC_SETPCIFN_BUSY) {
277 } while (rrb->response.hdr.rsp == CLP_RC_SETPCIFN_BUSY);
279 if (rc || rrb->response.hdr.rsp != CLP_RC_OK) {
280 zpci_err("Set PCI FN:\n");
281 zpci_err_clp(rrb->response.hdr.rsp, rc);
284 if (!rc && rrb->response.hdr.rsp == CLP_RC_OK) {
285 zdev->fh = rrb->response.fh;
286 } else if (!rc && rrb->response.hdr.rsp == CLP_RC_SETPCIFN_ALRDY &&
287 rrb->response.fh == 0) {
288 /* Function is already in desired state - update handle */
289 rc = clp_rescan_pci_devices_simple(&fid);
295 int clp_enable_fh(struct zpci_dev *zdev, u8 nr_dma_as)
299 rc = clp_set_pci_fn(zdev, nr_dma_as, CLP_SET_ENABLE_PCI_FN);
300 zpci_dbg(3, "ena fid:%x, fh:%x, rc:%d\n", zdev->fid, zdev->fh, rc);
304 if (zpci_use_mio(zdev)) {
305 rc = clp_set_pci_fn(zdev, nr_dma_as, CLP_SET_ENABLE_MIO);
306 zpci_dbg(3, "ena mio fid:%x, fh:%x, rc:%d\n",
307 zdev->fid, zdev->fh, rc);
309 clp_disable_fh(zdev);
315 int clp_disable_fh(struct zpci_dev *zdev)
319 if (!zdev_enabled(zdev))
322 rc = clp_set_pci_fn(zdev, 0, CLP_SET_DISABLE_PCI_FN);
323 zpci_dbg(3, "dis fid:%x, fh:%x, rc:%d\n", zdev->fid, zdev->fh, rc);
327 static int clp_list_pci(struct clp_req_rsp_list_pci *rrb, void *data,
328 void (*cb)(struct clp_fh_list_entry *, void *))
330 u64 resume_token = 0;
334 memset(rrb, 0, sizeof(*rrb));
335 rrb->request.hdr.len = sizeof(rrb->request);
336 rrb->request.hdr.cmd = CLP_LIST_PCI;
337 /* store as many entries as possible */
338 rrb->response.hdr.len = CLP_BLK_SIZE - LIST_PCI_HDR_LEN;
339 rrb->request.resume_token = resume_token;
341 /* Get PCI function handle list */
342 rc = clp_req(rrb, CLP_LPS_PCI);
343 if (rc || rrb->response.hdr.rsp != CLP_RC_OK) {
344 zpci_err("List PCI FN:\n");
345 zpci_err_clp(rrb->response.hdr.rsp, rc);
350 update_uid_checking(rrb->response.uid_checking);
351 WARN_ON_ONCE(rrb->response.entry_size !=
352 sizeof(struct clp_fh_list_entry));
354 entries = (rrb->response.hdr.len - LIST_PCI_HDR_LEN) /
355 rrb->response.entry_size;
357 resume_token = rrb->response.resume_token;
358 for (i = 0; i < entries; i++)
359 cb(&rrb->response.fh_list[i], data);
360 } while (resume_token);
365 static void __clp_add(struct clp_fh_list_entry *entry, void *data)
367 struct zpci_dev *zdev;
369 if (!entry->vendor_id)
372 zdev = get_zdev_by_fid(entry->fid);
374 clp_add_pci_device(entry->fid, entry->fh, entry->config_state);
377 static void __clp_update(struct clp_fh_list_entry *entry, void *data)
379 struct zpci_dev *zdev;
382 if (!entry->vendor_id)
385 if (fid && *fid != entry->fid)
388 zdev = get_zdev_by_fid(entry->fid);
392 zdev->fh = entry->fh;
395 int clp_scan_pci_devices(void)
397 struct clp_req_rsp_list_pci *rrb;
400 rrb = clp_alloc_block(GFP_KERNEL);
404 rc = clp_list_pci(rrb, NULL, __clp_add);
410 int clp_rescan_pci_devices(void)
412 struct clp_req_rsp_list_pci *rrb;
415 zpci_remove_reserved_devices();
417 rrb = clp_alloc_block(GFP_KERNEL);
421 rc = clp_list_pci(rrb, NULL, __clp_add);
427 /* Rescan PCI functions and refresh function handles. If fid is non-NULL only
428 * refresh the handle of the function matching @fid
430 int clp_rescan_pci_devices_simple(u32 *fid)
432 struct clp_req_rsp_list_pci *rrb;
435 rrb = clp_alloc_block(GFP_NOWAIT);
439 rc = clp_list_pci(rrb, fid, __clp_update);
445 struct clp_state_data {
447 enum zpci_state state;
450 static void __clp_get_state(struct clp_fh_list_entry *entry, void *data)
452 struct clp_state_data *sd = data;
454 if (entry->fid != sd->fid)
457 sd->state = entry->config_state;
460 int clp_get_state(u32 fid, enum zpci_state *state)
462 struct clp_req_rsp_list_pci *rrb;
463 struct clp_state_data sd = {fid, ZPCI_FN_STATE_RESERVED};
466 rrb = clp_alloc_block(GFP_ATOMIC);
470 rc = clp_list_pci(rrb, &sd, __clp_get_state);
478 static int clp_base_slpc(struct clp_req *req, struct clp_req_rsp_slpc *lpcb)
480 unsigned long limit = PAGE_SIZE - sizeof(lpcb->request);
482 if (lpcb->request.hdr.len != sizeof(lpcb->request) ||
483 lpcb->response.hdr.len > limit)
485 return clp_req(lpcb, CLP_LPS_BASE) ? -EOPNOTSUPP : 0;
488 static int clp_base_command(struct clp_req *req, struct clp_req_hdr *lpcb)
491 case 0x0001: /* store logical-processor characteristics */
492 return clp_base_slpc(req, (void *) lpcb);
498 static int clp_pci_slpc(struct clp_req *req, struct clp_req_rsp_slpc *lpcb)
500 unsigned long limit = PAGE_SIZE - sizeof(lpcb->request);
502 if (lpcb->request.hdr.len != sizeof(lpcb->request) ||
503 lpcb->response.hdr.len > limit)
505 return clp_req(lpcb, CLP_LPS_PCI) ? -EOPNOTSUPP : 0;
508 static int clp_pci_list(struct clp_req *req, struct clp_req_rsp_list_pci *lpcb)
510 unsigned long limit = PAGE_SIZE - sizeof(lpcb->request);
512 if (lpcb->request.hdr.len != sizeof(lpcb->request) ||
513 lpcb->response.hdr.len > limit)
515 if (lpcb->request.reserved2 != 0)
517 return clp_req(lpcb, CLP_LPS_PCI) ? -EOPNOTSUPP : 0;
520 static int clp_pci_query(struct clp_req *req,
521 struct clp_req_rsp_query_pci *lpcb)
523 unsigned long limit = PAGE_SIZE - sizeof(lpcb->request);
525 if (lpcb->request.hdr.len != sizeof(lpcb->request) ||
526 lpcb->response.hdr.len > limit)
528 if (lpcb->request.reserved2 != 0 || lpcb->request.reserved3 != 0)
530 return clp_req(lpcb, CLP_LPS_PCI) ? -EOPNOTSUPP : 0;
533 static int clp_pci_query_grp(struct clp_req *req,
534 struct clp_req_rsp_query_pci_grp *lpcb)
536 unsigned long limit = PAGE_SIZE - sizeof(lpcb->request);
538 if (lpcb->request.hdr.len != sizeof(lpcb->request) ||
539 lpcb->response.hdr.len > limit)
541 if (lpcb->request.reserved2 != 0 || lpcb->request.reserved3 != 0 ||
542 lpcb->request.reserved4 != 0)
544 return clp_req(lpcb, CLP_LPS_PCI) ? -EOPNOTSUPP : 0;
547 static int clp_pci_command(struct clp_req *req, struct clp_req_hdr *lpcb)
550 case 0x0001: /* store logical-processor characteristics */
551 return clp_pci_slpc(req, (void *) lpcb);
552 case 0x0002: /* list PCI functions */
553 return clp_pci_list(req, (void *) lpcb);
554 case 0x0003: /* query PCI function */
555 return clp_pci_query(req, (void *) lpcb);
556 case 0x0004: /* query PCI function group */
557 return clp_pci_query_grp(req, (void *) lpcb);
563 static int clp_normal_command(struct clp_req *req)
565 struct clp_req_hdr *lpcb;
570 if (req->lps != 0 && req->lps != 2)
574 lpcb = clp_alloc_block(GFP_KERNEL);
579 uptr = (void __force __user *)(unsigned long) req->data_p;
580 if (copy_from_user(lpcb, uptr, PAGE_SIZE) != 0)
584 if (lpcb->fmt != 0 || lpcb->reserved1 != 0 || lpcb->reserved2 != 0)
589 rc = clp_base_command(req, lpcb);
592 rc = clp_pci_command(req, lpcb);
599 if (copy_to_user(uptr, lpcb, PAGE_SIZE) != 0)
605 clp_free_block(lpcb);
610 static int clp_immediate_command(struct clp_req *req)
616 if (req->cmd > 1 || clp_get_ilp(&ilp) != 0)
619 uptr = (void __force __user *)(unsigned long) req->data_p;
621 /* Command code 0: test for a specific processor */
622 exists = test_bit_inv(req->lps, &ilp);
623 return put_user(exists, (int __user *) uptr);
625 /* Command code 1: return bit mask of installed processors */
626 return put_user(ilp, (unsigned long __user *) uptr);
629 static long clp_misc_ioctl(struct file *filp, unsigned int cmd,
638 argp = is_compat_task() ? compat_ptr(arg) : (void __user *) arg;
639 if (copy_from_user(&req, argp, sizeof(req)))
643 return req.c ? clp_immediate_command(&req) : clp_normal_command(&req);
646 static int clp_misc_release(struct inode *inode, struct file *filp)
651 static const struct file_operations clp_misc_fops = {
652 .owner = THIS_MODULE,
653 .open = nonseekable_open,
654 .release = clp_misc_release,
655 .unlocked_ioctl = clp_misc_ioctl,
656 .compat_ioctl = clp_misc_ioctl,
660 static struct miscdevice clp_misc_device = {
661 .minor = MISC_DYNAMIC_MINOR,
663 .fops = &clp_misc_fops,
666 static int __init clp_misc_init(void)
668 return misc_register(&clp_misc_device);
671 device_initcall(clp_misc_init);