1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * PowerPC BookIII S hardware breakpoint definitions
5 * Copyright 2010, IBM Corporation.
9 #ifndef _PPC_BOOK3S_64_HW_BREAKPOINT_H
10 #define _PPC_BOOK3S_64_HW_BREAKPOINT_H
12 #include <asm/cpu_has_feature.h>
15 struct arch_hw_breakpoint {
16 unsigned long address;
18 u16 len; /* length of the target data symbol */
19 u16 hw_len; /* length programmed in hw */
22 /* Note: Don't change the first 6 bits below as they are in the same order
23 * as the dabr and dabrx.
25 #define HW_BRK_TYPE_READ 0x01
26 #define HW_BRK_TYPE_WRITE 0x02
27 #define HW_BRK_TYPE_TRANSLATE 0x04
28 #define HW_BRK_TYPE_USER 0x08
29 #define HW_BRK_TYPE_KERNEL 0x10
30 #define HW_BRK_TYPE_HYP 0x20
31 #define HW_BRK_TYPE_EXTRANEOUS_IRQ 0x80
33 /* bits that overlap with the bottom 3 bits of the dabr */
34 #define HW_BRK_TYPE_RDWR (HW_BRK_TYPE_READ | HW_BRK_TYPE_WRITE)
35 #define HW_BRK_TYPE_DABR (HW_BRK_TYPE_RDWR | HW_BRK_TYPE_TRANSLATE)
36 #define HW_BRK_TYPE_PRIV_ALL (HW_BRK_TYPE_USER | HW_BRK_TYPE_KERNEL | \
39 /* Minimum granularity */
41 #define HW_BREAKPOINT_SIZE 0x4
43 #define HW_BREAKPOINT_SIZE 0x8
46 #define DABR_MAX_LEN 8
47 #define DAWR_MAX_LEN 512
49 static inline int nr_wp_slots(void)
51 return cpu_has_feature(CPU_FTR_DAWR1) ? 2 : 1;
54 #ifdef CONFIG_HAVE_HW_BREAKPOINT
55 #include <linux/kdebug.h>
57 #include <asm/debug.h>
59 struct perf_event_attr;
62 struct perf_sample_data;
65 extern int hw_breakpoint_slots(int type);
66 extern int arch_bp_generic_fields(int type, int *gen_bp_type);
67 extern int arch_check_bp_in_kernelspace(struct arch_hw_breakpoint *hw);
68 extern int hw_breakpoint_arch_parse(struct perf_event *bp,
69 const struct perf_event_attr *attr,
70 struct arch_hw_breakpoint *hw);
71 extern int hw_breakpoint_exceptions_notify(struct notifier_block *unused,
72 unsigned long val, void *data);
73 int arch_install_hw_breakpoint(struct perf_event *bp);
74 void arch_uninstall_hw_breakpoint(struct perf_event *bp);
75 void hw_breakpoint_pmu_read(struct perf_event *bp);
76 extern void flush_ptrace_hw_breakpoint(struct task_struct *tsk);
78 extern struct pmu perf_ops_bp;
79 extern void ptrace_triggered(struct perf_event *bp,
80 struct perf_sample_data *data, struct pt_regs *regs);
81 static inline void hw_breakpoint_disable(void)
84 struct arch_hw_breakpoint null_brk = {0};
86 if (!ppc_breakpoint_available())
89 for (i = 0; i < nr_wp_slots(); i++)
90 __set_breakpoint(i, &null_brk);
92 extern void thread_change_pc(struct task_struct *tsk, struct pt_regs *regs);
93 int hw_breakpoint_handler(struct die_args *args);
95 #else /* CONFIG_HAVE_HW_BREAKPOINT */
96 static inline void hw_breakpoint_disable(void) { }
97 static inline void thread_change_pc(struct task_struct *tsk,
98 struct pt_regs *regs) { }
100 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
103 #ifdef CONFIG_PPC_DAWR
104 extern bool dawr_force_enable;
105 static inline bool dawr_enabled(void)
107 return dawr_force_enable;
109 int set_dawr(int nr, struct arch_hw_breakpoint *brk);
111 static inline bool dawr_enabled(void) { return false; }
112 static inline int set_dawr(int nr, struct arch_hw_breakpoint *brk) { return -1; }
115 #endif /* __KERNEL__ */
116 #endif /* _PPC_BOOK3S_64_HW_BREAKPOINT_H */