1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved.
6 #include <linux/delay.h>
7 #include <linux/dma-mapping.h>
8 #include <linux/types.h>
9 #include <linux/init.h>
10 #include <linux/clk.h>
11 #include <linux/irq.h>
12 #include <linux/gpio.h>
13 #include <linux/gpio/machine.h>
14 #include <linux/platform_device.h>
15 #include <linux/mfd/mc13783.h>
16 #include <linux/spi/spi.h>
17 #include <linux/regulator/machine.h>
18 #include <linux/usb/otg.h>
19 #include <linux/usb/ulpi.h>
21 #include <asm/mach-types.h>
22 #include <asm/mach/arch.h>
23 #include <asm/mach/time.h>
24 #include <asm/memory.h>
25 #include <asm/mach/map.h>
27 #include "3ds_debugboard.h"
29 #include "devices-imx31.h"
32 #include "iomux-mx3.h"
35 static int mx31_3ds_pins[] = {
41 IOMUX_MODE(MX31_PIN_GPIO1_1, IOMUX_CONFIG_GPIO),
43 IOMUX_MODE(MX31_PIN_DSR_DCE1, IOMUX_CONFIG_ALT1),
44 IOMUX_MODE(MX31_PIN_RI_DCE1, IOMUX_CONFIG_ALT1),
46 MX31_PIN_CSPI2_SCLK__SCLK,
47 MX31_PIN_CSPI2_MOSI__MOSI,
48 MX31_PIN_CSPI2_MISO__MISO,
49 MX31_PIN_CSPI2_SPI_RDY__SPI_RDY,
50 MX31_PIN_CSPI2_SS0__SS0,
51 MX31_PIN_CSPI2_SS2__SS2, /*CS for MC13783 */
53 IOMUX_MODE(MX31_PIN_GPIO1_3, IOMUX_CONFIG_GPIO),
55 IOMUX_MODE(MX31_PIN_USB_PWR, IOMUX_CONFIG_GPIO),
57 MX31_PIN_USBOTG_DATA0__USBOTG_DATA0,
58 MX31_PIN_USBOTG_DATA1__USBOTG_DATA1,
59 MX31_PIN_USBOTG_DATA2__USBOTG_DATA2,
60 MX31_PIN_USBOTG_DATA3__USBOTG_DATA3,
61 MX31_PIN_USBOTG_DATA4__USBOTG_DATA4,
62 MX31_PIN_USBOTG_DATA5__USBOTG_DATA5,
63 MX31_PIN_USBOTG_DATA6__USBOTG_DATA6,
64 MX31_PIN_USBOTG_DATA7__USBOTG_DATA7,
65 MX31_PIN_USBOTG_CLK__USBOTG_CLK,
66 MX31_PIN_USBOTG_DIR__USBOTG_DIR,
67 MX31_PIN_USBOTG_NXT__USBOTG_NXT,
68 MX31_PIN_USBOTG_STP__USBOTG_STP,
70 MX31_PIN_KEY_ROW0_KEY_ROW0,
71 MX31_PIN_KEY_ROW1_KEY_ROW1,
72 MX31_PIN_KEY_ROW2_KEY_ROW2,
73 MX31_PIN_KEY_COL0_KEY_COL0,
74 MX31_PIN_KEY_COL1_KEY_COL1,
75 MX31_PIN_KEY_COL2_KEY_COL2,
76 MX31_PIN_KEY_COL3_KEY_COL3,
78 IOMUX_MODE(MX31_PIN_USBH2_CLK, IOMUX_CONFIG_FUNC),
79 IOMUX_MODE(MX31_PIN_USBH2_DIR, IOMUX_CONFIG_FUNC),
80 IOMUX_MODE(MX31_PIN_USBH2_NXT, IOMUX_CONFIG_FUNC),
81 IOMUX_MODE(MX31_PIN_USBH2_STP, IOMUX_CONFIG_FUNC),
82 IOMUX_MODE(MX31_PIN_USBH2_DATA0, IOMUX_CONFIG_FUNC),
83 IOMUX_MODE(MX31_PIN_USBH2_DATA1, IOMUX_CONFIG_FUNC),
84 IOMUX_MODE(MX31_PIN_PC_VS2, IOMUX_CONFIG_ALT1),
85 IOMUX_MODE(MX31_PIN_PC_BVD1, IOMUX_CONFIG_ALT1),
86 IOMUX_MODE(MX31_PIN_PC_BVD2, IOMUX_CONFIG_ALT1),
87 IOMUX_MODE(MX31_PIN_PC_RST, IOMUX_CONFIG_ALT1),
88 IOMUX_MODE(MX31_PIN_IOIS16, IOMUX_CONFIG_ALT1),
89 IOMUX_MODE(MX31_PIN_PC_RW_B, IOMUX_CONFIG_ALT1),
91 IOMUX_MODE(MX31_PIN_USB_BYP, IOMUX_CONFIG_GPIO),
93 MX31_PIN_I2C_CLK__I2C1_SCL,
94 MX31_PIN_I2C_DAT__I2C1_SDA,
96 MX31_PIN_SD1_DATA3__SD1_DATA3,
97 MX31_PIN_SD1_DATA2__SD1_DATA2,
98 MX31_PIN_SD1_DATA1__SD1_DATA1,
99 MX31_PIN_SD1_DATA0__SD1_DATA0,
100 MX31_PIN_SD1_CLK__SD1_CLK,
101 MX31_PIN_SD1_CMD__SD1_CMD,
102 MX31_PIN_GPIO3_1__GPIO3_1, /* Card detect */
103 MX31_PIN_GPIO3_0__GPIO3_0, /* OE */
123 MX31_PIN_VSYNC3__VSYNC3,
124 MX31_PIN_HSYNC__HSYNC,
125 MX31_PIN_FPSHIFT__FPSHIFT,
126 MX31_PIN_CONTRAST__CONTRAST,
128 MX31_PIN_STXD4__STXD4,
129 MX31_PIN_SRXD4__SRXD4,
137 static const struct fb_videomode fb_modedb[] = {
138 { /* 480x640 @ 60 Hz */
150 .sync = FB_SYNC_OE_ACT_HIGH | FB_SYNC_CLK_INVERT,
151 .vmode = FB_VMODE_NONINTERLACED,
156 static struct mx3fb_platform_data mx3fb_pdata __initdata = {
159 .num_modes = ARRAY_SIZE(fb_modedb),
163 static struct gpiod_lookup_table mx31_3ds_lcd_gpiod_table = {
164 .dev_id = "spi0.2", /* Bus 0 chipselect 2 */
167 * "reset" has IOMUX_TO_GPIO(IOMUX_PIN(88, 28)).
168 * The macro only shifts 88 to bits 9..16 and then
169 * mask it and shift it back. The GPIO number is 88.
172 GPIO_LOOKUP("imx31-gpio.2", 24, "reset", GPIO_ACTIVE_HIGH),
174 * Same reasoning as above for
175 * IOMUX_TO_GPIO(IOMUX_PIN(89, 27), pin 89 is 2*32+25.
177 GPIO_LOOKUP("imx31-gpio.2", 25, "enable", GPIO_ACTIVE_HIGH),
183 * Support for SD card slot in personality board
185 #define MX31_3DS_GPIO_SDHC1_CD IOMUX_TO_GPIO(MX31_PIN_GPIO3_1)
186 #define MX31_3DS_GPIO_SDHC1_BE IOMUX_TO_GPIO(MX31_PIN_GPIO3_0)
188 static struct gpio mx31_3ds_sdhc1_gpios[] = {
189 { MX31_3DS_GPIO_SDHC1_CD, GPIOF_IN, "sdhc1-card-detect" },
190 { MX31_3DS_GPIO_SDHC1_BE, GPIOF_OUT_INIT_LOW, "sdhc1-bus-en" },
193 static int mx31_3ds_sdhc1_init(struct device *dev,
194 irq_handler_t detect_irq,
199 ret = gpio_request_array(mx31_3ds_sdhc1_gpios,
200 ARRAY_SIZE(mx31_3ds_sdhc1_gpios));
202 pr_warn("Unable to request the SD/MMC GPIOs.\n");
206 ret = request_irq(gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1)),
208 IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
209 "sdhc1-detect", data);
211 pr_warn("Unable to request the SD/MMC card-detect IRQ.\n");
218 gpio_free_array(mx31_3ds_sdhc1_gpios,
219 ARRAY_SIZE(mx31_3ds_sdhc1_gpios));
223 static void mx31_3ds_sdhc1_exit(struct device *dev, void *data)
225 free_irq(gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1)), data);
226 gpio_free_array(mx31_3ds_sdhc1_gpios,
227 ARRAY_SIZE(mx31_3ds_sdhc1_gpios));
230 static void mx31_3ds_sdhc1_setpower(struct device *dev, unsigned int vdd)
233 * While the voltage stuff is done by the driver, activate the
234 * Buffer Enable Pin only if there is a card in slot to fix the card
235 * voltage issue caused by bi-directional chip TXB0108 on 3Stack.
236 * Done here because at this stage we have for sure a debounced value
237 * of the presence of the card, showed by the value of vdd.
238 * 7 == ilog2(MMC_VDD_165_195)
241 gpio_set_value(MX31_3DS_GPIO_SDHC1_BE, 1);
243 gpio_set_value(MX31_3DS_GPIO_SDHC1_BE, 0);
246 static struct imxmmc_platform_data sdhc1_pdata = {
247 .init = mx31_3ds_sdhc1_init,
248 .exit = mx31_3ds_sdhc1_exit,
249 .setpower = mx31_3ds_sdhc1_setpower,
256 static const uint32_t mx31_3ds_keymap[] = {
259 KEY(1, 0, KEY_RIGHT),
261 KEY(1, 2, KEY_ENTER),
268 static const struct matrix_keymap_data mx31_3ds_keymap_data __initconst = {
269 .keymap = mx31_3ds_keymap,
270 .keymap_size = ARRAY_SIZE(mx31_3ds_keymap),
274 static struct regulator_init_data pwgtx_init = {
281 static struct regulator_init_data gpo_init = {
288 static struct regulator_consumer_supply vmmc2_consumers[] = {
289 REGULATOR_SUPPLY("vmmc", "imx31-mmc.0"),
292 static struct regulator_init_data vmmc2_init = {
296 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
297 REGULATOR_CHANGE_STATUS,
299 .num_consumer_supplies = ARRAY_SIZE(vmmc2_consumers),
300 .consumer_supplies = vmmc2_consumers,
303 static struct regulator_consumer_supply vmmc1_consumers[] = {
304 REGULATOR_SUPPLY("vcore", "spi0.0"),
307 static struct regulator_init_data vmmc1_init = {
312 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
313 REGULATOR_CHANGE_STATUS,
315 .num_consumer_supplies = ARRAY_SIZE(vmmc1_consumers),
316 .consumer_supplies = vmmc1_consumers,
319 static struct regulator_consumer_supply vgen_consumers[] = {
320 REGULATOR_SUPPLY("vdd", "spi0.0"),
323 static struct regulator_init_data vgen_init = {
328 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
329 REGULATOR_CHANGE_STATUS,
331 .num_consumer_supplies = ARRAY_SIZE(vgen_consumers),
332 .consumer_supplies = vgen_consumers,
335 static struct mc13xxx_regulator_init_data mx31_3ds_regulators[] = {
337 .id = MC13783_REG_PWGT1SPI, /* Power Gate for ARM core. */
338 .init_data = &pwgtx_init,
340 .id = MC13783_REG_PWGT2SPI, /* Power Gate for L2 Cache. */
341 .init_data = &pwgtx_init,
344 .id = MC13783_REG_GPO1, /* Turn on 1.8V */
345 .init_data = &gpo_init,
347 .id = MC13783_REG_GPO3, /* Turn on 3.3V */
348 .init_data = &gpo_init,
350 .id = MC13783_REG_VMMC2, /* Power MMC/SD, WiFi/Bluetooth. */
351 .init_data = &vmmc2_init,
353 .id = MC13783_REG_VMMC1, /* Power LCD, CMOS, FM, GPS, Accel. */
354 .init_data = &vmmc1_init,
356 .id = MC13783_REG_VGEN, /* Power LCD */
357 .init_data = &vgen_init,
362 static struct mc13xxx_codec_platform_data mx31_3ds_codec = {
363 .dac_ssi_port = MC13783_SSI1_PORT,
364 .adc_ssi_port = MC13783_SSI1_PORT,
367 static struct mc13xxx_platform_data mc13783_pdata = {
369 .regulators = mx31_3ds_regulators,
370 .num_regulators = ARRAY_SIZE(mx31_3ds_regulators),
372 .codec = &mx31_3ds_codec,
373 .flags = MC13XXX_USE_TOUCHSCREEN | MC13XXX_USE_RTC | MC13XXX_USE_CODEC,
377 static struct imx_ssi_platform_data mx31_3ds_ssi_pdata = {
378 .flags = IMX_SSI_DMA | IMX_SSI_NET,
381 static struct spi_board_info mx31_3ds_spi_devs[] __initdata = {
383 .modalias = "mc13783",
384 .max_speed_hz = 1000000,
386 .chip_select = 2, /* SS2 */
387 .platform_data = &mc13783_pdata,
388 /* irq number is run-time assigned */
391 .modalias = "l4f00242t03",
392 .max_speed_hz = 5000000,
394 .chip_select = 2, /* SS2 */
401 static const struct mxc_nand_platform_data
402 mx31_3ds_nand_board_info __initconst = {
405 #ifdef CONFIG_MACH_MX31_3DS_MXC_NAND_USE_BBT
414 #define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
415 PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
417 #define USBOTG_RST_B IOMUX_TO_GPIO(MX31_PIN_USB_PWR)
418 #define USBH2_RST_B IOMUX_TO_GPIO(MX31_PIN_USB_BYP)
420 static int mx31_3ds_usbotg_init(void)
424 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, USB_PAD_CFG);
425 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, USB_PAD_CFG);
426 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, USB_PAD_CFG);
427 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, USB_PAD_CFG);
428 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, USB_PAD_CFG);
429 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, USB_PAD_CFG);
430 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, USB_PAD_CFG);
431 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, USB_PAD_CFG);
432 mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, USB_PAD_CFG);
433 mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, USB_PAD_CFG);
434 mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, USB_PAD_CFG);
435 mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, USB_PAD_CFG);
437 err = gpio_request(USBOTG_RST_B, "otgusb-reset");
439 pr_err("Failed to request the USB OTG reset gpio\n");
443 err = gpio_direction_output(USBOTG_RST_B, 0);
445 pr_err("Failed to drive the USB OTG reset gpio\n");
446 goto usbotg_free_reset;
450 gpio_set_value(USBOTG_RST_B, 1);
454 gpio_free(USBOTG_RST_B);
458 static int mx31_3ds_otg_init(struct platform_device *pdev)
460 return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED);
463 static int mx31_3ds_host2_init(struct platform_device *pdev)
467 mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, USB_PAD_CFG);
468 mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, USB_PAD_CFG);
469 mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, USB_PAD_CFG);
470 mxc_iomux_set_pad(MX31_PIN_USBH2_STP, USB_PAD_CFG);
471 mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, USB_PAD_CFG);
472 mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, USB_PAD_CFG);
473 mxc_iomux_set_pad(MX31_PIN_PC_VS2, USB_PAD_CFG);
474 mxc_iomux_set_pad(MX31_PIN_PC_BVD1, USB_PAD_CFG);
475 mxc_iomux_set_pad(MX31_PIN_PC_BVD2, USB_PAD_CFG);
476 mxc_iomux_set_pad(MX31_PIN_PC_RST, USB_PAD_CFG);
477 mxc_iomux_set_pad(MX31_PIN_IOIS16, USB_PAD_CFG);
478 mxc_iomux_set_pad(MX31_PIN_PC_RW_B, USB_PAD_CFG);
480 err = gpio_request(USBH2_RST_B, "usbh2-reset");
482 pr_err("Failed to request the USB Host 2 reset gpio\n");
486 err = gpio_direction_output(USBH2_RST_B, 0);
488 pr_err("Failed to drive the USB Host 2 reset gpio\n");
489 goto usbotg_free_reset;
493 gpio_set_value(USBH2_RST_B, 1);
497 return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED);
500 gpio_free(USBH2_RST_B);
504 static struct mxc_usbh_platform_data otg_pdata __initdata = {
505 .init = mx31_3ds_otg_init,
506 .portsc = MXC_EHCI_MODE_ULPI,
509 static struct mxc_usbh_platform_data usbh2_pdata __initdata = {
510 .init = mx31_3ds_host2_init,
511 .portsc = MXC_EHCI_MODE_ULPI,
514 static const struct fsl_usb2_platform_data usbotg_pdata __initconst = {
515 .operating_mode = FSL_USB2_DR_DEVICE,
516 .phy_mode = FSL_USB2_PHY_ULPI,
519 static bool otg_mode_host __initdata;
521 static int __init mx31_3ds_otg_mode(char *options)
523 if (!strcmp(options, "host"))
524 otg_mode_host = true;
525 else if (!strcmp(options, "device"))
526 otg_mode_host = false;
528 pr_info("otg_mode neither \"host\" nor \"device\". "
529 "Defaulting to device\n");
532 __setup("otg_mode=", mx31_3ds_otg_mode);
534 static const struct imxuart_platform_data uart_pdata __initconst = {
535 .flags = IMXUART_HAVE_RTSCTS,
538 static const struct imxi2c_platform_data mx31_3ds_i2c0_data __initconst = {
542 static void __init mx31_3ds_init(void)
546 /* Configure SPI1 IOMUX */
547 mxc_iomux_set_gpr(MUX_PGP_CSPI_BB, true);
549 mxc_iomux_setup_multiple_pins(mx31_3ds_pins, ARRAY_SIZE(mx31_3ds_pins),
552 imx31_add_imx_uart0(&uart_pdata);
553 imx31_add_mxc_nand(&mx31_3ds_nand_board_info);
555 imx31_add_spi_imx1(NULL);
557 imx31_add_imx_keypad(&mx31_3ds_keymap_data);
559 imx31_add_imx2_wdt();
560 imx31_add_imx_i2c0(&mx31_3ds_i2c0_data);
562 imx31_add_spi_imx0(NULL);
563 imx31_add_ipu_core();
564 imx31_add_mx3_sdc_fb(&mx3fb_pdata);
566 imx31_add_imx_ssi(0, &mx31_3ds_ssi_pdata);
568 imx_add_platform_device("imx_mc13783", 0, NULL, 0, NULL, 0);
571 static void __init mx31_3ds_late(void)
573 gpiod_add_lookup_table(&mx31_3ds_lcd_gpiod_table);
574 mx31_3ds_spi_devs[0].irq = gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_3));
575 spi_register_board_info(mx31_3ds_spi_devs,
576 ARRAY_SIZE(mx31_3ds_spi_devs));
578 mx31_3ds_usbotg_init();
580 otg_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
581 ULPI_OTG_DRVVBUS_EXT);
583 imx31_add_mxc_ehci_otg(&otg_pdata);
585 usbh2_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
586 ULPI_OTG_DRVVBUS_EXT);
588 imx31_add_mxc_ehci_hs(2, &usbh2_pdata);
591 imx31_add_fsl_usb2_udc(&usbotg_pdata);
593 if (mxc_expio_init(MX31_CS5_BASE_ADDR, IOMUX_TO_GPIO(MX31_PIN_GPIO1_1)))
594 printk(KERN_WARNING "Init of the debug board failed, all "
595 "devices on the debug board are unusable.\n");
597 imx31_add_mxc_mmc(0, &sdhc1_pdata);
600 static void __init mx31_3ds_timer_init(void)
602 mx31_clocks_init(26000000);
605 MACHINE_START(MX31_3DS, "Freescale MX31PDK (3DS)")
606 /* Maintainer: Freescale Semiconductor, Inc. */
607 .atag_offset = 0x100,
608 .map_io = mx31_map_io,
609 .init_early = imx31_init_early,
610 .init_irq = mx31_init_irq,
611 .init_time = mx31_3ds_timer_init,
612 .init_machine = mx31_3ds_init,
613 .init_late = mx31_3ds_late,
614 .restart = mxc_restart,