arch/arm/include/debug/brcmstb.S

   1 /*
   2  * Copyright (C) 2016 Broadcom
   3  *
   4  * This program is free software; you can redistribute it and/or
   5  * modify it under the terms of the GNU General Public License as
   6  * published by the Free Software Foundation version 2.
   7  *
   8  * This program is distributed "as is" WITHOUT ANY WARRANTY of any
   9  * kind, whether express or implied; without even the implied warranty
  10  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  11  * GNU General Public License for more details.
  12  */
  13 #include <linux/serial_reg.h>
  14 #include <asm/cputype.h>
  15
  16 /* Physical register offset and virtual register offset */
  17 #define REG_PHYS_BASE           0xf0000000
  18 #define REG_PHYS_BASE_V7        0x08000000
  19 #define REG_VIRT_BASE           0xfc000000
  20 #define REG_PHYS_ADDR(x)        ((x) + REG_PHYS_BASE)
  21 #define REG_PHYS_ADDR_V7(x)     ((x) + REG_PHYS_BASE_V7)
  22
  23 /* Product id can be read from here */
  24 #define SUN_TOP_CTRL_BASE       REG_PHYS_ADDR(0x404000)
  25 #define SUN_TOP_CTRL_BASE_V7    REG_PHYS_ADDR_V7(0x404000)
  26
  27 #define UARTA_3390              REG_PHYS_ADDR(0x40a900)
  28 #define UARTA_7250              REG_PHYS_ADDR(0x40b400)
  29 #define UARTA_7255              REG_PHYS_ADDR(0x40c000)
  30 #define UARTA_7260              UARTA_7255
  31 #define UARTA_7268              UARTA_7255
  32 #define UARTA_7271              UARTA_7268
  33 #define UARTA_7278              REG_PHYS_ADDR_V7(0x40c000)
  34 #define UARTA_7216              UARTA_7278
  35 #define UARTA_7364              REG_PHYS_ADDR(0x40b000)
  36 #define UARTA_7366              UARTA_7364
  37 #define UARTA_74371             REG_PHYS_ADDR(0x406b00)
  38 #define UARTA_7439              REG_PHYS_ADDR(0x40a900)
  39 #define UARTA_7445              REG_PHYS_ADDR(0x40ab00)
  40
  41 #define UART_SHIFT              2
  42
  43 #define checkuart(rp, rv, family_id, family) \
  44                 /* Load family id */ \
  45                 ldr     rp, =family_id ; \
  46                 /* Compare SUN_TOP_CTRL value against it */ \
  47                 cmp     rp, rv ; \
  48                 /* Passed test, load address */ \
  49                 ldreq   rp, =UARTA_##family ; \
  50                 /* Jump to save UART address */ \
  51                 beq     91f
  52
  53                 .macro  addruart, rp, rv, tmp
  54                 adr     \rp, 99f                @ actual addr of 99f
  55                 ldr     \rv, [\rp]              @ linked addr is stored there
  56                 sub     \rv, \rv, \rp           @ offset between the two
  57                 ldr     \rp, [\rp, #4]          @ linked brcmstb_uart_config
  58                 sub     \tmp, \rp, \rv          @ actual brcmstb_uart_config
  59                 ldr     \rp, [\tmp]             @ Load brcmstb_uart_config
  60                 cmp     \rp, #1                 @ needs initialization?
  61                 bne     100f                    @ no; go load the addresses
  62                 mov     \rv, #0                 @ yes; record init is done
  63                 str     \rv, [\tmp]
  64
  65                 /* Check for V7 memory map if B53 */
  66                 mrc     p15, 0, \rv, c0, c0, 0  @ get Main ID register
  67                 ldr     \rp, =ARM_CPU_PART_MASK
  68                 and     \rv, \rv, \rp
  69                 ldr     \rp, =ARM_CPU_PART_BRAHMA_B53   @ check for B53 CPU
  70                 cmp     \rv, \rp
  71                 bne     10f
  72
  73                 /* if PERIPHBASE doesn't overlap REG_PHYS_BASE use V7 map */
  74                 mrc     p15, 1, \rv, c15, c3, 0 @ get PERIPHBASE from CBAR
  75                 ands    \rv, \rv, #REG_PHYS_BASE
  76                 ldreq   \rp, =SUN_TOP_CTRL_BASE_V7
  77
  78                 /* Check SUN_TOP_CTRL base */
  79 10:             ldrne   \rp, =SUN_TOP_CTRL_BASE @ load SUN_TOP_CTRL PA
  80                 ldr     \rv, [\rp, #0]          @ get register contents
  81 ARM_BE8(        rev     \rv, \rv )
  82                 and     \rv, \rv, #0xffffff00   @ strip revision bits [7:0]
  83
  84                 /* Chip specific detection starts here */
  85 20:             checkuart(\rp, \rv, 0x33900000, 3390)
  86 21:             checkuart(\rp, \rv, 0x72160000, 7216)
  87 22:             checkuart(\rp, \rv, 0x72500000, 7250)
  88 23:             checkuart(\rp, \rv, 0x72550000, 7255)
  89 24:             checkuart(\rp, \rv, 0x72600000, 7260)
  90 25:             checkuart(\rp, \rv, 0x72680000, 7268)
  91 26:             checkuart(\rp, \rv, 0x72710000, 7271)
  92 27:             checkuart(\rp, \rv, 0x72780000, 7278)
  93 28:             checkuart(\rp, \rv, 0x73640000, 7364)
  94 29:             checkuart(\rp, \rv, 0x73660000, 7366)
  95 30:             checkuart(\rp, \rv, 0x07437100, 74371)
  96 31:             checkuart(\rp, \rv, 0x74390000, 7439)
  97 32:             checkuart(\rp, \rv, 0x74450000, 7445)
  98
  99                 /* No valid UART found */
 100 90:             mov     \rp, #0
 101                 /* fall through */
 102
 103                 /* Record whichever UART we chose */
 104 91:             str     \rp, [\tmp, #4]         @ Store in brcmstb_uart_phys
 105                 cmp     \rp, #0                 @ Valid UART address?
 106                 bne     92f                     @ Yes, go process it
 107                 str     \rp, [\tmp, #8]         @ Store 0 in brcmstb_uart_virt
 108                 b       100f                    @ Done
 109 92:             and     \rv, \rp, #0xffffff     @ offset within 16MB section
 110                 add     \rv, \rv, #REG_VIRT_BASE
 111                 str     \rv, [\tmp, #8]         @ Store in brcmstb_uart_virt
 112                 b       100f
 113
 114                 .align
 115 99:             .word   .
 116                 .word   brcmstb_uart_config
 117                 .ltorg
 118
 119                 /* Load previously selected UART address */
 120 100:            ldr     \rp, [\tmp, #4]         @ Load brcmstb_uart_phys
 121                 ldr     \rv, [\tmp, #8]         @ Load brcmstb_uart_virt
 122                 .endm
 123
 124                 .macro  store, rd, rx:vararg
 125 ARM_BE8(        rev     \rd, \rd )
 126                 str     \rd, \rx
 127                 .endm
 128
 129                 .macro  load, rd, rx:vararg
 130                 ldr     \rd, \rx
 131 ARM_BE8(        rev     \rd, \rd )
 132                 .endm
 133
 134                 .macro  senduart,rd,rx
 135                 store   \rd, [\rx, #UART_TX << UART_SHIFT]
 136                 .endm
 137
 138                 .macro  busyuart,rd,rx
 139 1002:           load    \rd, [\rx, #UART_LSR << UART_SHIFT]
 140                 and     \rd, \rd, #UART_LSR_TEMT | UART_LSR_THRE
 141                 teq     \rd, #UART_LSR_TEMT | UART_LSR_THRE
 142                 bne     1002b
 143                 .endm
 144
 145                 .macro  waituart,rd,rx
 146                 .endm
 147
 148 /*
 149  * Storage for the state maintained by the macros above.
 150  *
 151  * In the kernel proper, this data is located in arch/arm/mach-bcm/brcmstb.c.
 152  * That's because this header is included from multiple files, and we only
 153  * want a single copy of the data. In particular, the UART probing code above
 154  * assumes it's running using physical addresses. This is true when this file
 155  * is included from head.o, but not when included from debug.o. So we need
 156  * to share the probe results between the two copies, rather than having
 157  * to re-run the probing again later.
 158  *
 159  * In the decompressor, we put the symbol/storage right here, since common.c
 160  * isn't included in the decompressor build. This symbol gets put in .text
 161  * even though it's really data, since .data is discarded from the
 162  * decompressor. Luckily, .text is writeable in the decompressor, unless
 163  * CONFIG_ZBOOT_ROM. That dependency is handled in arch/arm/Kconfig.debug.
 164  */
 165 #if defined(ZIMAGE)
 166 brcmstb_uart_config:
 167         /* Debug UART initialization required */
 168         .word 1
 169         /* Debug UART physical address */
 170         .word 0
 171         /* Debug UART virtual address */
 172         .word 0
 173 #endif