drivers/gpu/drm/omapdrm/omap_drv.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/
   4  * Author: Rob Clark <[email protected]>
   5  */
   6
   7 #include <linux/dma-mapping.h>
   8 #include <linux/platform_device.h>
   9 #include <linux/sort.h>
  10 #include <linux/sys_soc.h>
  11
  12 #include <drm/drm_atomic.h>
  13 #include <drm/drm_atomic_helper.h>
  14 #include <drm/drm_bridge.h>
  15 #include <drm/drm_bridge_connector.h>
  16 #include <drm/drm_drv.h>
  17 #include <drm/drm_fb_helper.h>
  18 #include <drm/drm_file.h>
  19 #include <drm/drm_ioctl.h>
  20 #include <drm/drm_panel.h>
  21 #include <drm/drm_prime.h>
  22 #include <drm/drm_probe_helper.h>
  23 #include <drm/drm_vblank.h>
  24
  25 #include "omap_dmm_tiler.h"
  26 #include "omap_drv.h"
  27
  28 #define DRIVER_NAME             MODULE_NAME
  29 #define DRIVER_DESC             "OMAP DRM"
  30 #define DRIVER_DATE             "20110917"
  31 #define DRIVER_MAJOR            1
  32 #define DRIVER_MINOR            0
  33 #define DRIVER_PATCHLEVEL       0
  34
  35 /*
  36  * mode config funcs
  37  */
  38
  39 /* Notes about mapping DSS and DRM entities:
  40  *    CRTC:        overlay
  41  *    encoder:     manager.. with some extension to allow one primary CRTC
  42  *                 and zero or more video CRTC's to be mapped to one encoder?
  43  *    connector:   dssdev.. manager can be attached/detached from different
  44  *                 devices
  45  */
  46
  47 static void omap_atomic_wait_for_completion(struct drm_device *dev,
  48                                             struct drm_atomic_state *old_state)
  49 {
  50         struct drm_crtc_state *new_crtc_state;
  51         struct drm_crtc *crtc;
  52         unsigned int i;
  53         int ret;
  54
  55         for_each_new_crtc_in_state(old_state, crtc, new_crtc_state, i) {
  56                 if (!new_crtc_state->active)
  57                         continue;
  58
  59                 ret = omap_crtc_wait_pending(crtc);
  60
  61                 if (!ret)
  62                         dev_warn(dev->dev,
  63                                  "atomic complete timeout (pipe %u)!\n", i);
  64         }
  65 }
  66
  67 static void omap_atomic_commit_tail(struct drm_atomic_state *old_state)
  68 {
  69         struct drm_device *dev = old_state->dev;
  70         struct omap_drm_private *priv = dev->dev_private;
  71
  72         dispc_runtime_get(priv->dispc);
  73
  74         /* Apply the atomic update. */
  75         drm_atomic_helper_commit_modeset_disables(dev, old_state);
  76
  77         if (priv->omaprev != 0x3430) {
  78                 /* With the current dss dispc implementation we have to enable
  79                  * the new modeset before we can commit planes. The dispc ovl
  80                  * configuration relies on the video mode configuration been
  81                  * written into the HW when the ovl configuration is
  82                  * calculated.
  83                  *
  84                  * This approach is not ideal because after a mode change the
  85                  * plane update is executed only after the first vblank
  86                  * interrupt. The dispc implementation should be fixed so that
  87                  * it is able use uncommitted drm state information.
  88                  */
  89                 drm_atomic_helper_commit_modeset_enables(dev, old_state);
  90                 omap_atomic_wait_for_completion(dev, old_state);
  91
  92                 drm_atomic_helper_commit_planes(dev, old_state, 0);
  93
  94                 drm_atomic_helper_commit_hw_done(old_state);
  95         } else {
  96                 /*
  97                  * OMAP3 DSS seems to have issues with the work-around above,
  98                  * resulting in endless sync losts if a crtc is enabled without
  99                  * a plane. For now, skip the WA for OMAP3.
 100                  */
 101                 drm_atomic_helper_commit_planes(dev, old_state, 0);
 102
 103                 drm_atomic_helper_commit_modeset_enables(dev, old_state);
 104
 105                 drm_atomic_helper_commit_hw_done(old_state);
 106         }
 107
 108         /*
 109          * Wait for completion of the page flips to ensure that old buffers
 110          * can't be touched by the hardware anymore before cleaning up planes.
 111          */
 112         omap_atomic_wait_for_completion(dev, old_state);
 113
 114         drm_atomic_helper_cleanup_planes(dev, old_state);
 115
 116         dispc_runtime_put(priv->dispc);
 117 }
 118
 119 static const struct drm_mode_config_helper_funcs omap_mode_config_helper_funcs = {
 120         .atomic_commit_tail = omap_atomic_commit_tail,
 121 };
 122
 123 static const struct drm_mode_config_funcs omap_mode_config_funcs = {
 124         .fb_create = omap_framebuffer_create,
 125         .output_poll_changed = drm_fb_helper_output_poll_changed,
 126         .atomic_check = drm_atomic_helper_check,
 127         .atomic_commit = drm_atomic_helper_commit,
 128 };
 129
 130 static void omap_disconnect_pipelines(struct drm_device *ddev)
 131 {
 132         struct omap_drm_private *priv = ddev->dev_private;
 133         unsigned int i;
 134
 135         for (i = 0; i < priv->num_pipes; i++) {
 136                 struct omap_drm_pipeline *pipe = &priv->pipes[i];
 137
 138                 omapdss_device_disconnect(NULL, pipe->output);
 139
 140                 omapdss_device_put(pipe->output);
 141                 pipe->output = NULL;
 142         }
 143
 144         memset(&priv->channels, 0, sizeof(priv->channels));
 145
 146         priv->num_pipes = 0;
 147 }
 148
 149 static int omap_connect_pipelines(struct drm_device *ddev)
 150 {
 151         struct omap_drm_private *priv = ddev->dev_private;
 152         struct omap_dss_device *output = NULL;
 153         int r;
 154
 155         for_each_dss_output(output) {
 156                 r = omapdss_device_connect(priv->dss, NULL, output);
 157                 if (r == -EPROBE_DEFER) {
 158                         omapdss_device_put(output);
 159                         return r;
 160                 } else if (r) {
 161                         dev_warn(output->dev, "could not connect output %s\n",
 162                                  output->name);
 163                 } else {
 164                         struct omap_drm_pipeline *pipe;
 165
 166                         pipe = &priv->pipes[priv->num_pipes++];
 167                         pipe->output = omapdss_device_get(output);
 168
 169                         if (priv->num_pipes == ARRAY_SIZE(priv->pipes)) {
 170                                 /* To balance the 'for_each_dss_output' loop */
 171                                 omapdss_device_put(output);
 172                                 break;
 173                         }
 174                 }
 175         }
 176
 177         return 0;
 178 }
 179
 180 static int omap_compare_pipelines(const void *a, const void *b)
 181 {
 182         const struct omap_drm_pipeline *pipe1 = a;
 183         const struct omap_drm_pipeline *pipe2 = b;
 184
 185         if (pipe1->alias_id > pipe2->alias_id)
 186                 return 1;
 187         else if (pipe1->alias_id < pipe2->alias_id)
 188                 return -1;
 189         return 0;
 190 }
 191
 192 static int omap_modeset_init_properties(struct drm_device *dev)
 193 {
 194         struct omap_drm_private *priv = dev->dev_private;
 195         unsigned int num_planes = dispc_get_num_ovls(priv->dispc);
 196
 197         priv->zorder_prop = drm_property_create_range(dev, 0, "zorder", 0,
 198                                                       num_planes - 1);
 199         if (!priv->zorder_prop)
 200                 return -ENOMEM;
 201
 202         return 0;
 203 }
 204
 205 static int omap_display_id(struct omap_dss_device *output)
 206 {
 207         struct device_node *node = NULL;
 208
 209         if (output->bridge) {
 210                 struct drm_bridge *bridge = output->bridge;
 211
 212                 while (drm_bridge_get_next_bridge(bridge))
 213                         bridge = drm_bridge_get_next_bridge(bridge);
 214
 215                 node = bridge->of_node;
 216         }
 217
 218         return node ? of_alias_get_id(node, "display") : -ENODEV;
 219 }
 220
 221 static int omap_modeset_init(struct drm_device *dev)
 222 {
 223         struct omap_drm_private *priv = dev->dev_private;
 224         int num_ovls = dispc_get_num_ovls(priv->dispc);
 225         int num_mgrs = dispc_get_num_mgrs(priv->dispc);
 226         unsigned int i;
 227         int ret;
 228         u32 plane_crtc_mask;
 229
 230         if (!omapdss_stack_is_ready())
 231                 return -EPROBE_DEFER;
 232
 233         drm_mode_config_init(dev);
 234
 235         ret = omap_modeset_init_properties(dev);
 236         if (ret < 0)
 237                 return ret;
 238
 239         /*
 240          * This function creates exactly one connector, encoder, crtc,
 241          * and primary plane per each connected dss-device. Each
 242          * connector->encoder->crtc chain is expected to be separate
 243          * and each crtc is connect to a single dss-channel. If the
 244          * configuration does not match the expectations or exceeds
 245          * the available resources, the configuration is rejected.
 246          */
 247         ret = omap_connect_pipelines(dev);
 248         if (ret < 0)
 249                 return ret;
 250
 251         if (priv->num_pipes > num_mgrs || priv->num_pipes > num_ovls) {
 252                 dev_err(dev->dev, "%s(): Too many connected displays\n",
 253                         __func__);
 254                 return -EINVAL;
 255         }
 256
 257         /* Create all planes first. They can all be put to any CRTC. */
 258         plane_crtc_mask = (1 << priv->num_pipes) - 1;
 259
 260         for (i = 0; i < num_ovls; i++) {
 261                 enum drm_plane_type type = i < priv->num_pipes
 262                                          ? DRM_PLANE_TYPE_PRIMARY
 263                                          : DRM_PLANE_TYPE_OVERLAY;
 264                 struct drm_plane *plane;
 265
 266                 if (WARN_ON(priv->num_planes >= ARRAY_SIZE(priv->planes)))
 267                         return -EINVAL;
 268
 269                 plane = omap_plane_init(dev, i, type, plane_crtc_mask);
 270                 if (IS_ERR(plane))
 271                         return PTR_ERR(plane);
 272
 273                 priv->planes[priv->num_planes++] = plane;
 274         }
 275
 276         /*
 277          * Create the encoders, attach the bridges and get the pipeline alias
 278          * IDs.
 279          */
 280         for (i = 0; i < priv->num_pipes; i++) {
 281                 struct omap_drm_pipeline *pipe = &priv->pipes[i];
 282                 int id;
 283
 284                 pipe->encoder = omap_encoder_init(dev, pipe->output);
 285                 if (!pipe->encoder)
 286                         return -ENOMEM;
 287
 288                 if (pipe->output->bridge) {
 289                         ret = drm_bridge_attach(pipe->encoder,
 290                                                 pipe->output->bridge, NULL,
 291                                                 DRM_BRIDGE_ATTACH_NO_CONNECTOR);
 292                         if (ret < 0) {
 293                                 dev_err(priv->dev,
 294                                         "unable to attach bridge %pOF\n",
 295                                         pipe->output->bridge->of_node);
 296                                 return ret;
 297                         }
 298                 }
 299
 300                 id = omap_display_id(pipe->output);
 301                 pipe->alias_id = id >= 0 ? id : i;
 302         }
 303
 304         /* Sort the pipelines by DT aliases. */
 305         sort(priv->pipes, priv->num_pipes, sizeof(priv->pipes[0]),
 306              omap_compare_pipelines, NULL);
 307
 308         /*
 309          * Populate the pipeline lookup table by DISPC channel. Only one display
 310          * is allowed per channel.
 311          */
 312         for (i = 0; i < priv->num_pipes; ++i) {
 313                 struct omap_drm_pipeline *pipe = &priv->pipes[i];
 314                 enum omap_channel channel = pipe->output->dispc_channel;
 315
 316                 if (WARN_ON(priv->channels[channel] != NULL))
 317                         return -EINVAL;
 318
 319                 priv->channels[channel] = pipe;
 320         }
 321
 322         /* Create the connectors and CRTCs. */
 323         for (i = 0; i < priv->num_pipes; i++) {
 324                 struct omap_drm_pipeline *pipe = &priv->pipes[i];
 325                 struct drm_encoder *encoder = pipe->encoder;
 326                 struct drm_crtc *crtc;
 327
 328                 pipe->connector = drm_bridge_connector_init(dev, encoder);
 329                 if (IS_ERR(pipe->connector)) {
 330                         dev_err(priv->dev,
 331                                 "unable to create bridge connector for %s\n",
 332                                 pipe->output->name);
 333                         return PTR_ERR(pipe->connector);
 334                 }
 335
 336                 drm_connector_attach_encoder(pipe->connector, encoder);
 337
 338                 crtc = omap_crtc_init(dev, pipe, priv->planes[i]);
 339                 if (IS_ERR(crtc))
 340                         return PTR_ERR(crtc);
 341
 342                 encoder->possible_crtcs = 1 << i;
 343                 pipe->crtc = crtc;
 344         }
 345
 346         DBG("registered %u planes, %u crtcs/encoders/connectors\n",
 347             priv->num_planes, priv->num_pipes);
 348
 349         dev->mode_config.min_width = 8;
 350         dev->mode_config.min_height = 2;
 351
 352         /*
 353          * Note: these values are used for multiple independent things:
 354          * connector mode filtering, buffer sizes, crtc sizes...
 355          * Use big enough values here to cover all use cases, and do more
 356          * specific checking in the respective code paths.
 357          */
 358         dev->mode_config.max_width = 8192;
 359         dev->mode_config.max_height = 8192;
 360
 361         /* We want the zpos to be normalized */
 362         dev->mode_config.normalize_zpos = true;
 363
 364         dev->mode_config.funcs = &omap_mode_config_funcs;
 365         dev->mode_config.helper_private = &omap_mode_config_helper_funcs;
 366
 367         drm_mode_config_reset(dev);
 368
 369         omap_drm_irq_install(dev);
 370
 371         return 0;
 372 }
 373
 374 static void omap_modeset_fini(struct drm_device *ddev)
 375 {
 376         omap_drm_irq_uninstall(ddev);
 377
 378         drm_mode_config_cleanup(ddev);
 379 }
 380
 381 /*
 382  * Enable the HPD in external components if supported
 383  */
 384 static void omap_modeset_enable_external_hpd(struct drm_device *ddev)
 385 {
 386         struct omap_drm_private *priv = ddev->dev_private;
 387         unsigned int i;
 388
 389         for (i = 0; i < priv->num_pipes; i++) {
 390                 struct drm_connector *connector = priv->pipes[i].connector;
 391
 392                 if (!connector)
 393                         continue;
 394
 395                 if (priv->pipes[i].output->bridge)
 396                         drm_bridge_connector_enable_hpd(connector);
 397         }
 398 }
 399
 400 /*
 401  * Disable the HPD in external components if supported
 402  */
 403 static void omap_modeset_disable_external_hpd(struct drm_device *ddev)
 404 {
 405         struct omap_drm_private *priv = ddev->dev_private;
 406         unsigned int i;
 407
 408         for (i = 0; i < priv->num_pipes; i++) {
 409                 struct drm_connector *connector = priv->pipes[i].connector;
 410
 411                 if (!connector)
 412                         continue;
 413
 414                 if (priv->pipes[i].output->bridge)
 415                         drm_bridge_connector_disable_hpd(connector);
 416         }
 417 }
 418
 419 /*
 420  * drm ioctl funcs
 421  */
 422
 423
 424 static int ioctl_get_param(struct drm_device *dev, void *data,
 425                 struct drm_file *file_priv)
 426 {
 427         struct omap_drm_private *priv = dev->dev_private;
 428         struct drm_omap_param *args = data;
 429
 430         DBG("%p: param=%llu", dev, args->param);
 431
 432         switch (args->param) {
 433         case OMAP_PARAM_CHIPSET_ID:
 434                 args->value = priv->omaprev;
 435                 break;
 436         default:
 437                 DBG("unknown parameter %lld", args->param);
 438                 return -EINVAL;
 439         }
 440
 441         return 0;
 442 }
 443
 444 #define OMAP_BO_USER_MASK       0x00ffffff      /* flags settable by userspace */
 445
 446 static int ioctl_gem_new(struct drm_device *dev, void *data,
 447                 struct drm_file *file_priv)
 448 {
 449         struct drm_omap_gem_new *args = data;
 450         u32 flags = args->flags & OMAP_BO_USER_MASK;
 451
 452         VERB("%p:%p: size=0x%08x, flags=%08x", dev, file_priv,
 453              args->size.bytes, flags);
 454
 455         return omap_gem_new_handle(dev, file_priv, args->size, flags,
 456                                    &args->handle);
 457 }
 458
 459 static int ioctl_gem_info(struct drm_device *dev, void *data,
 460                 struct drm_file *file_priv)
 461 {
 462         struct drm_omap_gem_info *args = data;
 463         struct drm_gem_object *obj;
 464         int ret = 0;
 465
 466         VERB("%p:%p: handle=%d", dev, file_priv, args->handle);
 467
 468         obj = drm_gem_object_lookup(file_priv, args->handle);
 469         if (!obj)
 470                 return -ENOENT;
 471
 472         args->size = omap_gem_mmap_size(obj);
 473         args->offset = omap_gem_mmap_offset(obj);
 474
 475         drm_gem_object_put(obj);
 476
 477         return ret;
 478 }
 479
 480 static const struct drm_ioctl_desc ioctls[DRM_COMMAND_END - DRM_COMMAND_BASE] = {
 481         DRM_IOCTL_DEF_DRV(OMAP_GET_PARAM, ioctl_get_param,
 482                           DRM_RENDER_ALLOW),
 483         DRM_IOCTL_DEF_DRV(OMAP_SET_PARAM, drm_invalid_op,
 484                           DRM_AUTH | DRM_MASTER | DRM_ROOT_ONLY),
 485         DRM_IOCTL_DEF_DRV(OMAP_GEM_NEW, ioctl_gem_new,
 486                           DRM_RENDER_ALLOW),
 487         /* Deprecated, to be removed. */
 488         DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_PREP, drm_noop,
 489                           DRM_RENDER_ALLOW),
 490         /* Deprecated, to be removed. */
 491         DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_FINI, drm_noop,
 492                           DRM_RENDER_ALLOW),
 493         DRM_IOCTL_DEF_DRV(OMAP_GEM_INFO, ioctl_gem_info,
 494                           DRM_RENDER_ALLOW),
 495 };
 496
 497 /*
 498  * drm driver funcs
 499  */
 500
 501 static int dev_open(struct drm_device *dev, struct drm_file *file)
 502 {
 503         file->driver_priv = NULL;
 504
 505         DBG("open: dev=%p, file=%p", dev, file);
 506
 507         return 0;
 508 }
 509
 510 static const struct file_operations omapdriver_fops = {
 511         .owner = THIS_MODULE,
 512         .open = drm_open,
 513         .unlocked_ioctl = drm_ioctl,
 514         .compat_ioctl = drm_compat_ioctl,
 515         .release = drm_release,
 516         .mmap = omap_gem_mmap,
 517         .poll = drm_poll,
 518         .read = drm_read,
 519         .llseek = noop_llseek,
 520 };
 521
 522 static const struct drm_driver omap_drm_driver = {
 523         .driver_features = DRIVER_MODESET | DRIVER_GEM  |
 524                 DRIVER_ATOMIC | DRIVER_RENDER,
 525         .open = dev_open,
 526         .lastclose = drm_fb_helper_lastclose,
 527 #ifdef CONFIG_DEBUG_FS
 528         .debugfs_init = omap_debugfs_init,
 529 #endif
 530         .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
 531         .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
 532         .gem_prime_import = omap_gem_prime_import,
 533         .dumb_create = omap_gem_dumb_create,
 534         .dumb_map_offset = omap_gem_dumb_map_offset,
 535         .ioctls = ioctls,
 536         .num_ioctls = DRM_OMAP_NUM_IOCTLS,
 537         .fops = &omapdriver_fops,
 538         .name = DRIVER_NAME,
 539         .desc = DRIVER_DESC,
 540         .date = DRIVER_DATE,
 541         .major = DRIVER_MAJOR,
 542         .minor = DRIVER_MINOR,
 543         .patchlevel = DRIVER_PATCHLEVEL,
 544 };
 545
 546 static const struct soc_device_attribute omapdrm_soc_devices[] = {
 547         { .family = "OMAP3", .data = (void *)0x3430 },
 548         { .family = "OMAP4", .data = (void *)0x4430 },
 549         { .family = "OMAP5", .data = (void *)0x5430 },
 550         { .family = "DRA7",  .data = (void *)0x0752 },
 551         { /* sentinel */ }
 552 };
 553
 554 static int omapdrm_init(struct omap_drm_private *priv, struct device *dev)
 555 {
 556         const struct soc_device_attribute *soc;
 557         struct dss_pdata *pdata = dev->platform_data;
 558         struct drm_device *ddev;
 559         int ret;
 560
 561         DBG("%s", dev_name(dev));
 562
 563         /* Allocate and initialize the DRM device. */
 564         ddev = drm_dev_alloc(&omap_drm_driver, dev);
 565         if (IS_ERR(ddev))
 566                 return PTR_ERR(ddev);
 567
 568         priv->ddev = ddev;
 569         ddev->dev_private = priv;
 570
 571         priv->dev = dev;
 572         priv->dss = pdata->dss;
 573         priv->dispc = dispc_get_dispc(priv->dss);
 574
 575         priv->dss->mgr_ops_priv = priv;
 576
 577         soc = soc_device_match(omapdrm_soc_devices);
 578         priv->omaprev = soc ? (unsigned int)soc->data : 0;
 579         priv->wq = alloc_ordered_workqueue("omapdrm", 0);
 580
 581         mutex_init(&priv->list_lock);
 582         INIT_LIST_HEAD(&priv->obj_list);
 583
 584         /* Get memory bandwidth limits */
 585         priv->max_bandwidth = dispc_get_memory_bandwidth_limit(priv->dispc);
 586
 587         omap_gem_init(ddev);
 588
 589         ret = omap_modeset_init(ddev);
 590         if (ret) {
 591                 dev_err(priv->dev, "omap_modeset_init failed: ret=%d\n", ret);
 592                 goto err_gem_deinit;
 593         }
 594
 595         /* Initialize vblank handling, start with all CRTCs disabled. */
 596         ret = drm_vblank_init(ddev, priv->num_pipes);
 597         if (ret) {
 598                 dev_err(priv->dev, "could not init vblank\n");
 599                 goto err_cleanup_modeset;
 600         }
 601
 602         omap_fbdev_init(ddev);
 603
 604         drm_kms_helper_poll_init(ddev);
 605         omap_modeset_enable_external_hpd(ddev);
 606
 607         /*
 608          * Register the DRM device with the core and the connectors with
 609          * sysfs.
 610          */
 611         ret = drm_dev_register(ddev, 0);
 612         if (ret)
 613                 goto err_cleanup_helpers;
 614
 615         return 0;
 616
 617 err_cleanup_helpers:
 618         omap_modeset_disable_external_hpd(ddev);
 619         drm_kms_helper_poll_fini(ddev);
 620
 621         omap_fbdev_fini(ddev);
 622 err_cleanup_modeset:
 623         omap_modeset_fini(ddev);
 624 err_gem_deinit:
 625         omap_gem_deinit(ddev);
 626         destroy_workqueue(priv->wq);
 627         omap_disconnect_pipelines(ddev);
 628         drm_dev_put(ddev);
 629         return ret;
 630 }
 631
 632 static void omapdrm_cleanup(struct omap_drm_private *priv)
 633 {
 634         struct drm_device *ddev = priv->ddev;
 635
 636         DBG("");
 637
 638         drm_dev_unregister(ddev);
 639
 640         omap_modeset_disable_external_hpd(ddev);
 641         drm_kms_helper_poll_fini(ddev);
 642
 643         omap_fbdev_fini(ddev);
 644
 645         drm_atomic_helper_shutdown(ddev);
 646
 647         omap_modeset_fini(ddev);
 648         omap_gem_deinit(ddev);
 649
 650         destroy_workqueue(priv->wq);
 651
 652         omap_disconnect_pipelines(ddev);
 653
 654         drm_dev_put(ddev);
 655 }
 656
 657 static int pdev_probe(struct platform_device *pdev)
 658 {
 659         struct omap_drm_private *priv;
 660         int ret;
 661
 662         ret = dma_coerce_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
 663         if (ret) {
 664                 dev_err(&pdev->dev, "Failed to set the DMA mask\n");
 665                 return ret;
 666         }
 667
 668         /* Allocate and initialize the driver private structure. */
 669         priv = kzalloc(sizeof(*priv), GFP_KERNEL);
 670         if (!priv)
 671                 return -ENOMEM;
 672
 673         platform_set_drvdata(pdev, priv);
 674
 675         ret = omapdrm_init(priv, &pdev->dev);
 676         if (ret < 0)
 677                 kfree(priv);
 678
 679         return ret;
 680 }
 681
 682 static int pdev_remove(struct platform_device *pdev)
 683 {
 684         struct omap_drm_private *priv = platform_get_drvdata(pdev);
 685
 686         omapdrm_cleanup(priv);
 687         kfree(priv);
 688
 689         return 0;
 690 }
 691
 692 #ifdef CONFIG_PM_SLEEP
 693 static int omap_drm_suspend(struct device *dev)
 694 {
 695         struct omap_drm_private *priv = dev_get_drvdata(dev);
 696         struct drm_device *drm_dev = priv->ddev;
 697
 698         return drm_mode_config_helper_suspend(drm_dev);
 699 }
 700
 701 static int omap_drm_resume(struct device *dev)
 702 {
 703         struct omap_drm_private *priv = dev_get_drvdata(dev);
 704         struct drm_device *drm_dev = priv->ddev;
 705
 706         drm_mode_config_helper_resume(drm_dev);
 707
 708         return omap_gem_resume(drm_dev);
 709 }
 710 #endif
 711
 712 static SIMPLE_DEV_PM_OPS(omapdrm_pm_ops, omap_drm_suspend, omap_drm_resume);
 713
 714 static struct platform_driver pdev = {
 715         .driver = {
 716                 .name = "omapdrm",
 717                 .pm = &omapdrm_pm_ops,
 718         },
 719         .probe = pdev_probe,
 720         .remove = pdev_remove,
 721 };
 722
 723 static struct platform_driver * const drivers[] = {
 724         &omap_dmm_driver,
 725         &pdev,
 726 };
 727
 728 static int __init omap_drm_init(void)
 729 {
 730         int r;
 731
 732         DBG("init");
 733
 734         r = omap_dss_init();
 735         if (r)
 736                 return r;
 737
 738         r = platform_register_drivers(drivers, ARRAY_SIZE(drivers));
 739         if (r) {
 740                 omap_dss_exit();
 741                 return r;
 742         }
 743
 744         return 0;
 745 }
 746
 747 static void __exit omap_drm_fini(void)
 748 {
 749         DBG("fini");
 750
 751         platform_unregister_drivers(drivers, ARRAY_SIZE(drivers));
 752
 753         omap_dss_exit();
 754 }
 755
 756 module_init(omap_drm_init);
 757 module_exit(omap_drm_fini);
 758
 759 MODULE_AUTHOR("Rob Clark <[email protected]>");
 760 MODULE_AUTHOR("Tomi Valkeinen <[email protected]>");
 761 MODULE_DESCRIPTION("OMAP DRM Display Driver");
 762 MODULE_ALIAS("platform:" DRIVER_NAME);
 763 MODULE_LICENSE("GPL v2");