drivers/gpu/drm/imx/imx-ldb.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * i.MX drm driver - LVDS display bridge
   4  *
   5  * Copyright (C) 2012 Sascha Hauer, Pengutronix
   6  */
   7
   8 #include <linux/clk.h>
   9 #include <linux/component.h>
  10 #include <linux/mfd/syscon.h>
  11 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
  12 #include <linux/module.h>
  13 #include <linux/of_device.h>
  14 #include <linux/of_graph.h>
  15 #include <linux/regmap.h>
  16 #include <linux/videodev2.h>
  17
  18 #include <video/of_display_timing.h>
  19 #include <video/of_videomode.h>
  20
  21 #include <drm/drm_atomic.h>
  22 #include <drm/drm_atomic_helper.h>
  23 #include <drm/drm_bridge.h>
  24 #include <drm/drm_fb_helper.h>
  25 #include <drm/drm_managed.h>
  26 #include <drm/drm_of.h>
  27 #include <drm/drm_panel.h>
  28 #include <drm/drm_print.h>
  29 #include <drm/drm_probe_helper.h>
  30 #include <drm/drm_simple_kms_helper.h>
  31
  32 #include "imx-drm.h"
  33
  34 #define DRIVER_NAME "imx-ldb"
  35
  36 #define LDB_CH0_MODE_EN_TO_DI0          (1 << 0)
  37 #define LDB_CH0_MODE_EN_TO_DI1          (3 << 0)
  38 #define LDB_CH0_MODE_EN_MASK            (3 << 0)
  39 #define LDB_CH1_MODE_EN_TO_DI0          (1 << 2)
  40 #define LDB_CH1_MODE_EN_TO_DI1          (3 << 2)
  41 #define LDB_CH1_MODE_EN_MASK            (3 << 2)
  42 #define LDB_SPLIT_MODE_EN               (1 << 4)
  43 #define LDB_DATA_WIDTH_CH0_24           (1 << 5)
  44 #define LDB_BIT_MAP_CH0_JEIDA           (1 << 6)
  45 #define LDB_DATA_WIDTH_CH1_24           (1 << 7)
  46 #define LDB_BIT_MAP_CH1_JEIDA           (1 << 8)
  47 #define LDB_DI0_VS_POL_ACT_LOW          (1 << 9)
  48 #define LDB_DI1_VS_POL_ACT_LOW          (1 << 10)
  49 #define LDB_BGREF_RMODE_INT             (1 << 15)
  50
  51 struct imx_ldb_channel;
  52
  53 struct imx_ldb_encoder {
  54         struct drm_connector connector;
  55         struct drm_encoder encoder;
  56         struct imx_ldb_channel *channel;
  57 };
  58
  59 struct imx_ldb;
  60
  61 struct imx_ldb_channel {
  62         struct imx_ldb *ldb;
  63
  64         /* Defines what is connected to the ldb, only one at a time */
  65         struct drm_panel *panel;
  66         struct drm_bridge *bridge;
  67
  68         struct device_node *child;
  69         struct i2c_adapter *ddc;
  70         int chno;
  71         void *edid;
  72         struct drm_display_mode mode;
  73         int mode_valid;
  74         u32 bus_format;
  75         u32 bus_flags;
  76 };
  77
  78 static inline struct imx_ldb_channel *con_to_imx_ldb_ch(struct drm_connector *c)
  79 {
  80         return container_of(c, struct imx_ldb_encoder, connector)->channel;
  81 }
  82
  83 static inline struct imx_ldb_channel *enc_to_imx_ldb_ch(struct drm_encoder *e)
  84 {
  85         return container_of(e, struct imx_ldb_encoder, encoder)->channel;
  86 }
  87
  88 struct bus_mux {
  89         int reg;
  90         int shift;
  91         int mask;
  92 };
  93
  94 struct imx_ldb {
  95         struct regmap *regmap;
  96         struct device *dev;
  97         struct imx_ldb_channel channel[2];
  98         struct clk *clk[2]; /* our own clock */
  99         struct clk *clk_sel[4]; /* parent of display clock */
 100         struct clk *clk_parent[4]; /* original parent of clk_sel */
 101         struct clk *clk_pll[2]; /* upstream clock we can adjust */
 102         u32 ldb_ctrl;
 103         const struct bus_mux *lvds_mux;
 104 };
 105
 106 static void imx_ldb_ch_set_bus_format(struct imx_ldb_channel *imx_ldb_ch,
 107                                       u32 bus_format)
 108 {
 109         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 110         int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;
 111
 112         switch (bus_format) {
 113         case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG:
 114                 break;
 115         case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG:
 116                 if (imx_ldb_ch->chno == 0 || dual)
 117                         ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH0_24;
 118                 if (imx_ldb_ch->chno == 1 || dual)
 119                         ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH1_24;
 120                 break;
 121         case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA:
 122                 if (imx_ldb_ch->chno == 0 || dual)
 123                         ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH0_24 |
 124                                          LDB_BIT_MAP_CH0_JEIDA;
 125                 if (imx_ldb_ch->chno == 1 || dual)
 126                         ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH1_24 |
 127                                          LDB_BIT_MAP_CH1_JEIDA;
 128                 break;
 129         }
 130 }
 131
 132 static int imx_ldb_connector_get_modes(struct drm_connector *connector)
 133 {
 134         struct imx_ldb_channel *imx_ldb_ch = con_to_imx_ldb_ch(connector);
 135         int num_modes;
 136
 137         num_modes = drm_panel_get_modes(imx_ldb_ch->panel, connector);
 138         if (num_modes > 0)
 139                 return num_modes;
 140
 141         if (!imx_ldb_ch->edid && imx_ldb_ch->ddc)
 142                 imx_ldb_ch->edid = drm_get_edid(connector, imx_ldb_ch->ddc);
 143
 144         if (imx_ldb_ch->edid) {
 145                 drm_connector_update_edid_property(connector,
 146                                                         imx_ldb_ch->edid);
 147                 num_modes = drm_add_edid_modes(connector, imx_ldb_ch->edid);
 148         }
 149
 150         if (imx_ldb_ch->mode_valid) {
 151                 struct drm_display_mode *mode;
 152
 153                 mode = drm_mode_create(connector->dev);
 154                 if (!mode)
 155                         return -EINVAL;
 156                 drm_mode_copy(mode, &imx_ldb_ch->mode);
 157                 mode->type |= DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
 158                 drm_mode_probed_add(connector, mode);
 159                 num_modes++;
 160         }
 161
 162         return num_modes;
 163 }
 164
 165 static void imx_ldb_set_clock(struct imx_ldb *ldb, int mux, int chno,
 166                 unsigned long serial_clk, unsigned long di_clk)
 167 {
 168         int ret;
 169
 170         dev_dbg(ldb->dev, "%s: now: %ld want: %ld\n", __func__,
 171                         clk_get_rate(ldb->clk_pll[chno]), serial_clk);
 172         clk_set_rate(ldb->clk_pll[chno], serial_clk);
 173
 174         dev_dbg(ldb->dev, "%s after: %ld\n", __func__,
 175                         clk_get_rate(ldb->clk_pll[chno]));
 176
 177         dev_dbg(ldb->dev, "%s: now: %ld want: %ld\n", __func__,
 178                         clk_get_rate(ldb->clk[chno]),
 179                         (long int)di_clk);
 180         clk_set_rate(ldb->clk[chno], di_clk);
 181
 182         dev_dbg(ldb->dev, "%s after: %ld\n", __func__,
 183                         clk_get_rate(ldb->clk[chno]));
 184
 185         /* set display clock mux to LDB input clock */
 186         ret = clk_set_parent(ldb->clk_sel[mux], ldb->clk[chno]);
 187         if (ret)
 188                 dev_err(ldb->dev,
 189                         "unable to set di%d parent clock to ldb_di%d\n", mux,
 190                         chno);
 191 }
 192
 193 static void imx_ldb_encoder_enable(struct drm_encoder *encoder)
 194 {
 195         struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
 196         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 197         int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;
 198         int mux = drm_of_encoder_active_port_id(imx_ldb_ch->child, encoder);
 199
 200         drm_panel_prepare(imx_ldb_ch->panel);
 201
 202         if (dual) {
 203                 clk_set_parent(ldb->clk_sel[mux], ldb->clk[0]);
 204                 clk_set_parent(ldb->clk_sel[mux], ldb->clk[1]);
 205
 206                 clk_prepare_enable(ldb->clk[0]);
 207                 clk_prepare_enable(ldb->clk[1]);
 208         } else {
 209                 clk_set_parent(ldb->clk_sel[mux], ldb->clk[imx_ldb_ch->chno]);
 210         }
 211
 212         if (imx_ldb_ch == &ldb->channel[0] || dual) {
 213                 ldb->ldb_ctrl &= ~LDB_CH0_MODE_EN_MASK;
 214                 if (mux == 0 || ldb->lvds_mux)
 215                         ldb->ldb_ctrl |= LDB_CH0_MODE_EN_TO_DI0;
 216                 else if (mux == 1)
 217                         ldb->ldb_ctrl |= LDB_CH0_MODE_EN_TO_DI1;
 218         }
 219         if (imx_ldb_ch == &ldb->channel[1] || dual) {
 220                 ldb->ldb_ctrl &= ~LDB_CH1_MODE_EN_MASK;
 221                 if (mux == 1 || ldb->lvds_mux)
 222                         ldb->ldb_ctrl |= LDB_CH1_MODE_EN_TO_DI1;
 223                 else if (mux == 0)
 224                         ldb->ldb_ctrl |= LDB_CH1_MODE_EN_TO_DI0;
 225         }
 226
 227         if (ldb->lvds_mux) {
 228                 const struct bus_mux *lvds_mux = NULL;
 229
 230                 if (imx_ldb_ch == &ldb->channel[0])
 231                         lvds_mux = &ldb->lvds_mux[0];
 232                 else if (imx_ldb_ch == &ldb->channel[1])
 233                         lvds_mux = &ldb->lvds_mux[1];
 234
 235                 regmap_update_bits(ldb->regmap, lvds_mux->reg, lvds_mux->mask,
 236                                    mux << lvds_mux->shift);
 237         }
 238
 239         regmap_write(ldb->regmap, IOMUXC_GPR2, ldb->ldb_ctrl);
 240
 241         drm_panel_enable(imx_ldb_ch->panel);
 242 }
 243
 244 static void
 245 imx_ldb_encoder_atomic_mode_set(struct drm_encoder *encoder,
 246                                 struct drm_crtc_state *crtc_state,
 247                                 struct drm_connector_state *connector_state)
 248 {
 249         struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
 250         struct drm_display_mode *mode = &crtc_state->adjusted_mode;
 251         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 252         int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;
 253         unsigned long serial_clk;
 254         unsigned long di_clk = mode->clock * 1000;
 255         int mux = drm_of_encoder_active_port_id(imx_ldb_ch->child, encoder);
 256         u32 bus_format = imx_ldb_ch->bus_format;
 257
 258         if (mode->clock > 170000) {
 259                 dev_warn(ldb->dev,
 260                          "%s: mode exceeds 170 MHz pixel clock\n", __func__);
 261         }
 262         if (mode->clock > 85000 && !dual) {
 263                 dev_warn(ldb->dev,
 264                          "%s: mode exceeds 85 MHz pixel clock\n", __func__);
 265         }
 266
 267         if (dual) {
 268                 serial_clk = 3500UL * mode->clock;
 269                 imx_ldb_set_clock(ldb, mux, 0, serial_clk, di_clk);
 270                 imx_ldb_set_clock(ldb, mux, 1, serial_clk, di_clk);
 271         } else {
 272                 serial_clk = 7000UL * mode->clock;
 273                 imx_ldb_set_clock(ldb, mux, imx_ldb_ch->chno, serial_clk,
 274                                   di_clk);
 275         }
 276
 277         /* FIXME - assumes straight connections DI0 --> CH0, DI1 --> CH1 */
 278         if (imx_ldb_ch == &ldb->channel[0] || dual) {
 279                 if (mode->flags & DRM_MODE_FLAG_NVSYNC)
 280                         ldb->ldb_ctrl |= LDB_DI0_VS_POL_ACT_LOW;
 281                 else if (mode->flags & DRM_MODE_FLAG_PVSYNC)
 282                         ldb->ldb_ctrl &= ~LDB_DI0_VS_POL_ACT_LOW;
 283         }
 284         if (imx_ldb_ch == &ldb->channel[1] || dual) {
 285                 if (mode->flags & DRM_MODE_FLAG_NVSYNC)
 286                         ldb->ldb_ctrl |= LDB_DI1_VS_POL_ACT_LOW;
 287                 else if (mode->flags & DRM_MODE_FLAG_PVSYNC)
 288                         ldb->ldb_ctrl &= ~LDB_DI1_VS_POL_ACT_LOW;
 289         }
 290
 291         if (!bus_format) {
 292                 struct drm_connector *connector = connector_state->connector;
 293                 struct drm_display_info *di = &connector->display_info;
 294
 295                 if (di->num_bus_formats)
 296                         bus_format = di->bus_formats[0];
 297         }
 298         imx_ldb_ch_set_bus_format(imx_ldb_ch, bus_format);
 299 }
 300
 301 static void imx_ldb_encoder_disable(struct drm_encoder *encoder)
 302 {
 303         struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
 304         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 305         int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;
 306         int mux, ret;
 307
 308         drm_panel_disable(imx_ldb_ch->panel);
 309
 310         if (imx_ldb_ch == &ldb->channel[0] || dual)
 311                 ldb->ldb_ctrl &= ~LDB_CH0_MODE_EN_MASK;
 312         if (imx_ldb_ch == &ldb->channel[1] || dual)
 313                 ldb->ldb_ctrl &= ~LDB_CH1_MODE_EN_MASK;
 314
 315         regmap_write(ldb->regmap, IOMUXC_GPR2, ldb->ldb_ctrl);
 316
 317         if (dual) {
 318                 clk_disable_unprepare(ldb->clk[0]);
 319                 clk_disable_unprepare(ldb->clk[1]);
 320         }
 321
 322         if (ldb->lvds_mux) {
 323                 const struct bus_mux *lvds_mux = NULL;
 324
 325                 if (imx_ldb_ch == &ldb->channel[0])
 326                         lvds_mux = &ldb->lvds_mux[0];
 327                 else if (imx_ldb_ch == &ldb->channel[1])
 328                         lvds_mux = &ldb->lvds_mux[1];
 329
 330                 regmap_read(ldb->regmap, lvds_mux->reg, &mux);
 331                 mux &= lvds_mux->mask;
 332                 mux >>= lvds_mux->shift;
 333         } else {
 334                 mux = (imx_ldb_ch == &ldb->channel[0]) ? 0 : 1;
 335         }
 336
 337         /* set display clock mux back to original input clock */
 338         ret = clk_set_parent(ldb->clk_sel[mux], ldb->clk_parent[mux]);
 339         if (ret)
 340                 dev_err(ldb->dev,
 341                         "unable to set di%d parent clock to original parent\n",
 342                         mux);
 343
 344         drm_panel_unprepare(imx_ldb_ch->panel);
 345 }
 346
 347 static int imx_ldb_encoder_atomic_check(struct drm_encoder *encoder,
 348                                         struct drm_crtc_state *crtc_state,
 349                                         struct drm_connector_state *conn_state)
 350 {
 351         struct imx_crtc_state *imx_crtc_state = to_imx_crtc_state(crtc_state);
 352         struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
 353         struct drm_display_info *di = &conn_state->connector->display_info;
 354         u32 bus_format = imx_ldb_ch->bus_format;
 355
 356         /* Bus format description in DT overrides connector display info. */
 357         if (!bus_format && di->num_bus_formats) {
 358                 bus_format = di->bus_formats[0];
 359                 imx_crtc_state->bus_flags = di->bus_flags;
 360         } else {
 361                 bus_format = imx_ldb_ch->bus_format;
 362                 imx_crtc_state->bus_flags = imx_ldb_ch->bus_flags;
 363         }
 364         switch (bus_format) {
 365         case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG:
 366                 imx_crtc_state->bus_format = MEDIA_BUS_FMT_RGB666_1X18;
 367                 break;
 368         case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG:
 369         case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA:
 370                 imx_crtc_state->bus_format = MEDIA_BUS_FMT_RGB888_1X24;
 371                 break;
 372         default:
 373                 return -EINVAL;
 374         }
 375
 376         imx_crtc_state->di_hsync_pin = 2;
 377         imx_crtc_state->di_vsync_pin = 3;
 378
 379         return 0;
 380 }
 381
 382
 383 static const struct drm_connector_funcs imx_ldb_connector_funcs = {
 384         .fill_modes = drm_helper_probe_single_connector_modes,
 385         .destroy = imx_drm_connector_destroy,
 386         .reset = drm_atomic_helper_connector_reset,
 387         .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
 388         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
 389 };
 390
 391 static const struct drm_connector_helper_funcs imx_ldb_connector_helper_funcs = {
 392         .get_modes = imx_ldb_connector_get_modes,
 393 };
 394
 395 static const struct drm_encoder_helper_funcs imx_ldb_encoder_helper_funcs = {
 396         .atomic_mode_set = imx_ldb_encoder_atomic_mode_set,
 397         .enable = imx_ldb_encoder_enable,
 398         .disable = imx_ldb_encoder_disable,
 399         .atomic_check = imx_ldb_encoder_atomic_check,
 400 };
 401
 402 static int imx_ldb_get_clk(struct imx_ldb *ldb, int chno)
 403 {
 404         char clkname[16];
 405
 406         snprintf(clkname, sizeof(clkname), "di%d", chno);
 407         ldb->clk[chno] = devm_clk_get(ldb->dev, clkname);
 408         if (IS_ERR(ldb->clk[chno]))
 409                 return PTR_ERR(ldb->clk[chno]);
 410
 411         snprintf(clkname, sizeof(clkname), "di%d_pll", chno);
 412         ldb->clk_pll[chno] = devm_clk_get(ldb->dev, clkname);
 413
 414         return PTR_ERR_OR_ZERO(ldb->clk_pll[chno]);
 415 }
 416
 417 static int imx_ldb_register(struct drm_device *drm,
 418         struct imx_ldb_channel *imx_ldb_ch)
 419 {
 420         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 421         struct imx_ldb_encoder *ldb_encoder;
 422         struct drm_connector *connector;
 423         struct drm_encoder *encoder;
 424         int ret;
 425
 426         ldb_encoder = drmm_simple_encoder_alloc(drm, struct imx_ldb_encoder,
 427                                                 encoder, DRM_MODE_ENCODER_LVDS);
 428         if (IS_ERR(ldb_encoder))
 429                 return PTR_ERR(ldb_encoder);
 430
 431         ldb_encoder->channel = imx_ldb_ch;
 432         connector = &ldb_encoder->connector;
 433         encoder = &ldb_encoder->encoder;
 434
 435         ret = imx_drm_encoder_parse_of(drm, encoder, imx_ldb_ch->child);
 436         if (ret)
 437                 return ret;
 438
 439         ret = imx_ldb_get_clk(ldb, imx_ldb_ch->chno);
 440         if (ret)
 441                 return ret;
 442
 443         if (ldb->ldb_ctrl & LDB_SPLIT_MODE_EN) {
 444                 ret = imx_ldb_get_clk(ldb, 1);
 445                 if (ret)
 446                         return ret;
 447         }
 448
 449         drm_encoder_helper_add(encoder, &imx_ldb_encoder_helper_funcs);
 450
 451         if (imx_ldb_ch->bridge) {
 452                 ret = drm_bridge_attach(encoder, imx_ldb_ch->bridge, NULL, 0);
 453                 if (ret) {
 454                         DRM_ERROR("Failed to initialize bridge with drm\n");
 455                         return ret;
 456                 }
 457         } else {
 458                 /*
 459                  * We want to add the connector whenever there is no bridge
 460                  * that brings its own, not only when there is a panel. For
 461                  * historical reasons, the ldb driver can also work without
 462                  * a panel.
 463                  */
 464                 drm_connector_helper_add(connector,
 465                                          &imx_ldb_connector_helper_funcs);
 466                 drm_connector_init_with_ddc(drm, connector,
 467                                             &imx_ldb_connector_funcs,
 468                                             DRM_MODE_CONNECTOR_LVDS,
 469                                             imx_ldb_ch->ddc);
 470                 drm_connector_attach_encoder(connector, encoder);
 471         }
 472
 473         return 0;
 474 }
 475
 476 struct imx_ldb_bit_mapping {
 477         u32 bus_format;
 478         u32 datawidth;
 479         const char * const mapping;
 480 };
 481
 482 static const struct imx_ldb_bit_mapping imx_ldb_bit_mappings[] = {
 483         { MEDIA_BUS_FMT_RGB666_1X7X3_SPWG,  18, "spwg" },
 484         { MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,  24, "spwg" },
 485         { MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA, 24, "jeida" },
 486 };
 487
 488 static u32 of_get_bus_format(struct device *dev, struct device_node *np)
 489 {
 490         const char *bm;
 491         u32 datawidth = 0;
 492         int ret, i;
 493
 494         ret = of_property_read_string(np, "fsl,data-mapping", &bm);
 495         if (ret < 0)
 496                 return ret;
 497
 498         of_property_read_u32(np, "fsl,data-width", &datawidth);
 499
 500         for (i = 0; i < ARRAY_SIZE(imx_ldb_bit_mappings); i++) {
 501                 if (!strcasecmp(bm, imx_ldb_bit_mappings[i].mapping) &&
 502                     datawidth == imx_ldb_bit_mappings[i].datawidth)
 503                         return imx_ldb_bit_mappings[i].bus_format;
 504         }
 505
 506         dev_err(dev, "invalid data mapping: %d-bit \"%s\"\n", datawidth, bm);
 507
 508         return -ENOENT;
 509 }
 510
 511 static struct bus_mux imx6q_lvds_mux[2] = {
 512         {
 513                 .reg = IOMUXC_GPR3,
 514                 .shift = 6,
 515                 .mask = IMX6Q_GPR3_LVDS0_MUX_CTL_MASK,
 516         }, {
 517                 .reg = IOMUXC_GPR3,
 518                 .shift = 8,
 519                 .mask = IMX6Q_GPR3_LVDS1_MUX_CTL_MASK,
 520         }
 521 };
 522
 523 /*
 524  * For a device declaring compatible = "fsl,imx6q-ldb", "fsl,imx53-ldb",
 525  * of_match_device will walk through this list and take the first entry
 526  * matching any of its compatible values. Therefore, the more generic
 527  * entries (in this case fsl,imx53-ldb) need to be ordered last.
 528  */
 529 static const struct of_device_id imx_ldb_dt_ids[] = {
 530         { .compatible = "fsl,imx6q-ldb", .data = imx6q_lvds_mux, },
 531         { .compatible = "fsl,imx53-ldb", .data = NULL, },
 532         { }
 533 };
 534 MODULE_DEVICE_TABLE(of, imx_ldb_dt_ids);
 535
 536 static int imx_ldb_panel_ddc(struct device *dev,
 537                 struct imx_ldb_channel *channel, struct device_node *child)
 538 {
 539         struct device_node *ddc_node;
 540         const u8 *edidp;
 541         int ret;
 542
 543         ddc_node = of_parse_phandle(child, "ddc-i2c-bus", 0);
 544         if (ddc_node) {
 545                 channel->ddc = of_find_i2c_adapter_by_node(ddc_node);
 546                 of_node_put(ddc_node);
 547                 if (!channel->ddc) {
 548                         dev_warn(dev, "failed to get ddc i2c adapter\n");
 549                         return -EPROBE_DEFER;
 550                 }
 551         }
 552
 553         if (!channel->ddc) {
 554                 int edid_len;
 555
 556                 /* if no DDC available, fallback to hardcoded EDID */
 557                 dev_dbg(dev, "no ddc available\n");
 558
 559                 edidp = of_get_property(child, "edid", &edid_len);
 560                 if (edidp) {
 561                         channel->edid = kmemdup(edidp, edid_len, GFP_KERNEL);
 562                 } else if (!channel->panel) {
 563                         /* fallback to display-timings node */
 564                         ret = of_get_drm_display_mode(child,
 565                                                       &channel->mode,
 566                                                       &channel->bus_flags,
 567                                                       OF_USE_NATIVE_MODE);
 568                         if (!ret)
 569                                 channel->mode_valid = 1;
 570                 }
 571         }
 572         return 0;
 573 }
 574
 575 static int imx_ldb_bind(struct device *dev, struct device *master, void *data)
 576 {
 577         struct drm_device *drm = data;
 578         struct imx_ldb *imx_ldb = dev_get_drvdata(dev);
 579         int ret;
 580         int i;
 581
 582         for (i = 0; i < 2; i++) {
 583                 struct imx_ldb_channel *channel = &imx_ldb->channel[i];
 584
 585                 if (!channel->ldb)
 586                         break;
 587
 588                 ret = imx_ldb_register(drm, channel);
 589                 if (ret)
 590                         return ret;
 591         }
 592
 593         return 0;
 594 }
 595
 596 static const struct component_ops imx_ldb_ops = {
 597         .bind   = imx_ldb_bind,
 598 };
 599
 600 static int imx_ldb_probe(struct platform_device *pdev)
 601 {
 602         struct device *dev = &pdev->dev;
 603         struct device_node *np = dev->of_node;
 604         const struct of_device_id *of_id = of_match_device(imx_ldb_dt_ids, dev);
 605         struct device_node *child;
 606         struct imx_ldb *imx_ldb;
 607         int dual;
 608         int ret;
 609         int i;
 610
 611         imx_ldb = devm_kzalloc(dev, sizeof(*imx_ldb), GFP_KERNEL);
 612         if (!imx_ldb)
 613                 return -ENOMEM;
 614
 615         imx_ldb->regmap = syscon_regmap_lookup_by_phandle(np, "gpr");
 616         if (IS_ERR(imx_ldb->regmap)) {
 617                 dev_err(dev, "failed to get parent regmap\n");
 618                 return PTR_ERR(imx_ldb->regmap);
 619         }
 620
 621         /* disable LDB by resetting the control register to POR default */
 622         regmap_write(imx_ldb->regmap, IOMUXC_GPR2, 0);
 623
 624         imx_ldb->dev = dev;
 625
 626         if (of_id)
 627                 imx_ldb->lvds_mux = of_id->data;
 628
 629         dual = of_property_read_bool(np, "fsl,dual-channel");
 630         if (dual)
 631                 imx_ldb->ldb_ctrl |= LDB_SPLIT_MODE_EN;
 632
 633         /*
 634          * There are three different possible clock mux configurations:
 635          * i.MX53:  ipu1_di0_sel, ipu1_di1_sel
 636          * i.MX6q:  ipu1_di0_sel, ipu1_di1_sel, ipu2_di0_sel, ipu2_di1_sel
 637          * i.MX6dl: ipu1_di0_sel, ipu1_di1_sel, lcdif_sel
 638          * Map them all to di0_sel...di3_sel.
 639          */
 640         for (i = 0; i < 4; i++) {
 641                 char clkname[16];
 642
 643                 sprintf(clkname, "di%d_sel", i);
 644                 imx_ldb->clk_sel[i] = devm_clk_get(imx_ldb->dev, clkname);
 645                 if (IS_ERR(imx_ldb->clk_sel[i])) {
 646                         ret = PTR_ERR(imx_ldb->clk_sel[i]);
 647                         imx_ldb->clk_sel[i] = NULL;
 648                         break;
 649                 }
 650
 651                 imx_ldb->clk_parent[i] = clk_get_parent(imx_ldb->clk_sel[i]);
 652         }
 653         if (i == 0)
 654                 return ret;
 655
 656         for_each_child_of_node(np, child) {
 657                 struct imx_ldb_channel *channel;
 658                 int bus_format;
 659
 660                 ret = of_property_read_u32(child, "reg", &i);
 661                 if (ret || i < 0 || i > 1) {
 662                         ret = -EINVAL;
 663                         goto free_child;
 664                 }
 665
 666                 if (!of_device_is_available(child))
 667                         continue;
 668
 669                 if (dual && i > 0) {
 670                         dev_warn(dev, "dual-channel mode, ignoring second output\n");
 671                         continue;
 672                 }
 673
 674                 channel = &imx_ldb->channel[i];
 675                 channel->ldb = imx_ldb;
 676                 channel->chno = i;
 677
 678                 /*
 679                  * The output port is port@4 with an external 4-port mux or
 680                  * port@2 with the internal 2-port mux.
 681                  */
 682                 ret = drm_of_find_panel_or_bridge(child,
 683                                                   imx_ldb->lvds_mux ? 4 : 2, 0,
 684                                                   &channel->panel, &channel->bridge);
 685                 if (ret && ret != -ENODEV)
 686                         goto free_child;
 687
 688                 /* panel ddc only if there is no bridge */
 689                 if (!channel->bridge) {
 690                         ret = imx_ldb_panel_ddc(dev, channel, child);
 691                         if (ret)
 692                                 goto free_child;
 693                 }
 694
 695                 bus_format = of_get_bus_format(dev, child);
 696                 if (bus_format == -EINVAL) {
 697                         /*
 698                          * If no bus format was specified in the device tree,
 699                          * we can still get it from the connected panel later.
 700                          */
 701                         if (channel->panel && channel->panel->funcs &&
 702                             channel->panel->funcs->get_modes)
 703                                 bus_format = 0;
 704                 }
 705                 if (bus_format < 0) {
 706                         dev_err(dev, "could not determine data mapping: %d\n",
 707                                 bus_format);
 708                         ret = bus_format;
 709                         goto free_child;
 710                 }
 711                 channel->bus_format = bus_format;
 712                 channel->child = child;
 713         }
 714
 715         platform_set_drvdata(pdev, imx_ldb);
 716
 717         return component_add(&pdev->dev, &imx_ldb_ops);
 718
 719 free_child:
 720         of_node_put(child);
 721         return ret;
 722 }
 723
 724 static int imx_ldb_remove(struct platform_device *pdev)
 725 {
 726         struct imx_ldb *imx_ldb = platform_get_drvdata(pdev);
 727         int i;
 728
 729         for (i = 0; i < 2; i++) {
 730                 struct imx_ldb_channel *channel = &imx_ldb->channel[i];
 731
 732                 kfree(channel->edid);
 733                 i2c_put_adapter(channel->ddc);
 734         }
 735
 736         component_del(&pdev->dev, &imx_ldb_ops);
 737         return 0;
 738 }
 739
 740 static struct platform_driver imx_ldb_driver = {
 741         .probe          = imx_ldb_probe,
 742         .remove         = imx_ldb_remove,
 743         .driver         = {
 744                 .of_match_table = imx_ldb_dt_ids,
 745                 .name   = DRIVER_NAME,
 746         },
 747 };
 748
 749 module_platform_driver(imx_ldb_driver);
 750
 751 MODULE_DESCRIPTION("i.MX LVDS driver");
 752 MODULE_AUTHOR("Sascha Hauer, Pengutronix");
 753 MODULE_LICENSE("GPL");
 754 MODULE_ALIAS("platform:" DRIVER_NAME);