1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Thunderbolt control channel messages
6 * Copyright (C) 2017, Intel Corporation
12 #include <linux/types.h>
13 #include <linux/uuid.h>
23 TB_CFG_ERROR_PORT_NOT_CONNECTED = 0,
24 TB_CFG_ERROR_LINK_ERROR = 1,
25 TB_CFG_ERROR_INVALID_CONFIG_SPACE = 2,
26 TB_CFG_ERROR_NO_SUCH_PORT = 4,
27 TB_CFG_ERROR_ACK_PLUG_EVENT = 7, /* send as reply to TB_CFG_PKG_EVENT */
28 TB_CFG_ERROR_LOOP = 8,
29 TB_CFG_ERROR_HEC_ERROR_DETECTED = 12,
30 TB_CFG_ERROR_FLOW_CONTROL_ERROR = 13,
31 TB_CFG_ERROR_LOCK = 15,
35 struct tb_cfg_header {
37 u32 unknown:10; /* highest order bit is set on replies */
41 /* additional header for read/write packets */
42 struct tb_cfg_address {
43 u32 offset:13; /* in dwords */
44 u32 length:6; /* in dwords */
46 enum tb_cfg_space space:2;
47 u32 seq:2; /* sequence number */
51 /* TB_CFG_PKG_READ, response for TB_CFG_PKG_WRITE */
53 struct tb_cfg_header header;
54 struct tb_cfg_address addr;
57 /* TB_CFG_PKG_WRITE, response for TB_CFG_PKG_READ */
58 struct cfg_write_pkg {
59 struct tb_cfg_header header;
60 struct tb_cfg_address addr;
61 u32 data[64]; /* maximum size, tb_cfg_address.length has 6 bits */
64 /* TB_CFG_PKG_ERROR */
65 struct cfg_error_pkg {
66 struct tb_cfg_header header;
67 enum tb_cfg_error error:4;
70 u32 zero2:2; /* Both should be zero, still they are different fields. */
75 #define TB_CFG_ERROR_PG_HOT_PLUG 0x2
76 #define TB_CFG_ERROR_PG_HOT_UNPLUG 0x3
78 /* TB_CFG_PKG_EVENT */
79 struct cfg_event_pkg {
80 struct tb_cfg_header header;
86 /* TB_CFG_PKG_RESET */
87 struct cfg_reset_pkg {
88 struct tb_cfg_header header;
91 /* TB_CFG_PKG_PREPARE_TO_SLEEP */
93 struct tb_cfg_header header;
100 ICM_GET_TOPOLOGY = 0x1,
101 ICM_DRIVER_READY = 0x3,
102 ICM_APPROVE_DEVICE = 0x4,
103 ICM_CHALLENGE_DEVICE = 0x5,
104 ICM_ADD_DEVICE_KEY = 0x6,
106 ICM_APPROVE_XDOMAIN = 0x10,
107 ICM_DISCONNECT_XDOMAIN = 0x11,
108 ICM_PREBOOT_ACL = 0x18,
111 enum icm_event_code {
112 ICM_EVENT_DEVICE_CONNECTED = 0x3,
113 ICM_EVENT_DEVICE_DISCONNECTED = 0x4,
114 ICM_EVENT_XDOMAIN_CONNECTED = 0x6,
115 ICM_EVENT_XDOMAIN_DISCONNECTED = 0x7,
116 ICM_EVENT_RTD3_VETO = 0xa,
119 struct icm_pkg_header {
126 #define ICM_FLAGS_ERROR BIT(0)
127 #define ICM_FLAGS_NO_KEY BIT(1)
128 #define ICM_FLAGS_SLEVEL_SHIFT 3
129 #define ICM_FLAGS_SLEVEL_MASK GENMASK(4, 3)
130 #define ICM_FLAGS_DUAL_LANE BIT(5)
131 #define ICM_FLAGS_SPEED_GEN3 BIT(7)
132 #define ICM_FLAGS_WRITE BIT(7)
134 struct icm_pkg_driver_ready {
135 struct icm_pkg_header hdr;
138 /* Falcon Ridge only messages */
140 struct icm_fr_pkg_driver_ready_response {
141 struct icm_pkg_header hdr;
147 #define ICM_FR_SLEVEL_MASK 0xf
149 /* Falcon Ridge & Alpine Ridge common messages */
151 struct icm_fr_pkg_get_topology {
152 struct icm_pkg_header hdr;
155 #define ICM_GET_TOPOLOGY_PACKETS 14
157 struct icm_fr_pkg_get_topology_response {
158 struct icm_pkg_header hdr;
163 u8 drom_i2c_address_index;
167 u32 port_hop_info[16];
170 #define ICM_SWITCH_USED BIT(0)
171 #define ICM_SWITCH_UPSTREAM_PORT_MASK GENMASK(7, 1)
172 #define ICM_SWITCH_UPSTREAM_PORT_SHIFT 1
174 #define ICM_PORT_TYPE_MASK GENMASK(23, 0)
175 #define ICM_PORT_INDEX_SHIFT 24
176 #define ICM_PORT_INDEX_MASK GENMASK(31, 24)
178 struct icm_fr_event_device_connected {
179 struct icm_pkg_header hdr;
187 #define ICM_LINK_INFO_LINK_MASK 0x7
188 #define ICM_LINK_INFO_DEPTH_SHIFT 4
189 #define ICM_LINK_INFO_DEPTH_MASK GENMASK(7, 4)
190 #define ICM_LINK_INFO_APPROVED BIT(8)
191 #define ICM_LINK_INFO_REJECTED BIT(9)
192 #define ICM_LINK_INFO_BOOT BIT(10)
194 struct icm_fr_pkg_approve_device {
195 struct icm_pkg_header hdr;
202 struct icm_fr_event_device_disconnected {
203 struct icm_pkg_header hdr;
208 struct icm_fr_event_xdomain_connected {
209 struct icm_pkg_header hdr;
220 struct icm_fr_event_xdomain_disconnected {
221 struct icm_pkg_header hdr;
227 struct icm_fr_pkg_add_device_key {
228 struct icm_pkg_header hdr;
236 struct icm_fr_pkg_add_device_key_response {
237 struct icm_pkg_header hdr;
244 struct icm_fr_pkg_challenge_device {
245 struct icm_pkg_header hdr;
253 struct icm_fr_pkg_challenge_device_response {
254 struct icm_pkg_header hdr;
263 struct icm_fr_pkg_approve_xdomain {
264 struct icm_pkg_header hdr;
274 struct icm_fr_pkg_approve_xdomain_response {
275 struct icm_pkg_header hdr;
285 /* Alpine Ridge only messages */
287 struct icm_ar_pkg_driver_ready_response {
288 struct icm_pkg_header hdr;
294 #define ICM_AR_FLAGS_RTD3 BIT(6)
296 #define ICM_AR_INFO_SLEVEL_MASK GENMASK(3, 0)
297 #define ICM_AR_INFO_BOOT_ACL_SHIFT 7
298 #define ICM_AR_INFO_BOOT_ACL_MASK GENMASK(11, 7)
299 #define ICM_AR_INFO_BOOT_ACL_SUPPORTED BIT(13)
301 struct icm_ar_pkg_get_route {
302 struct icm_pkg_header hdr;
307 struct icm_ar_pkg_get_route_response {
308 struct icm_pkg_header hdr;
315 struct icm_ar_boot_acl_entry {
320 #define ICM_AR_PREBOOT_ACL_ENTRIES 16
322 struct icm_ar_pkg_preboot_acl {
323 struct icm_pkg_header hdr;
324 struct icm_ar_boot_acl_entry acl[ICM_AR_PREBOOT_ACL_ENTRIES];
327 struct icm_ar_pkg_preboot_acl_response {
328 struct icm_pkg_header hdr;
329 struct icm_ar_boot_acl_entry acl[ICM_AR_PREBOOT_ACL_ENTRIES];
332 /* Titan Ridge messages */
334 struct icm_tr_pkg_driver_ready_response {
335 struct icm_pkg_header hdr;
343 #define ICM_TR_FLAGS_RTD3 BIT(6)
345 #define ICM_TR_INFO_SLEVEL_MASK GENMASK(2, 0)
346 #define ICM_TR_INFO_BOOT_ACL_SHIFT 7
347 #define ICM_TR_INFO_BOOT_ACL_MASK GENMASK(12, 7)
349 struct icm_tr_event_device_connected {
350 struct icm_pkg_header hdr;
360 struct icm_tr_event_device_disconnected {
361 struct icm_pkg_header hdr;
366 struct icm_tr_event_xdomain_connected {
367 struct icm_pkg_header hdr;
378 struct icm_tr_event_xdomain_disconnected {
379 struct icm_pkg_header hdr;
385 struct icm_tr_pkg_approve_device {
386 struct icm_pkg_header hdr;
394 struct icm_tr_pkg_add_device_key {
395 struct icm_pkg_header hdr;
404 struct icm_tr_pkg_challenge_device {
405 struct icm_pkg_header hdr;
414 struct icm_tr_pkg_approve_xdomain {
415 struct icm_pkg_header hdr;
425 struct icm_tr_pkg_disconnect_xdomain {
426 struct icm_pkg_header hdr;
434 struct icm_tr_pkg_challenge_device_response {
435 struct icm_pkg_header hdr;
445 struct icm_tr_pkg_add_device_key_response {
446 struct icm_pkg_header hdr;
454 struct icm_tr_pkg_approve_xdomain_response {
455 struct icm_pkg_header hdr;
465 struct icm_tr_pkg_disconnect_xdomain_response {
466 struct icm_pkg_header hdr;
474 /* Ice Lake messages */
476 struct icm_icl_event_rtd3_veto {
477 struct icm_pkg_header hdr;
481 /* XDomain messages */
483 struct tb_xdomain_header {
489 #define TB_XDOMAIN_LENGTH_MASK GENMASK(5, 0)
490 #define TB_XDOMAIN_SN_MASK GENMASK(28, 27)
491 #define TB_XDOMAIN_SN_SHIFT 27
494 UUID_REQUEST_OLD = 1,
498 PROPERTIES_CHANGED_REQUEST,
499 PROPERTIES_CHANGED_RESPONSE,
504 struct tb_xdp_header {
505 struct tb_xdomain_header xd_hdr;
511 struct tb_xdp_header hdr;
514 struct tb_xdp_uuid_response {
515 struct tb_xdp_header hdr;
521 struct tb_xdp_properties {
522 struct tb_xdp_header hdr;
529 struct tb_xdp_properties_response {
530 struct tb_xdp_header hdr;
540 * Max length of data array single XDomain property response is allowed
543 #define TB_XDP_PROPERTIES_MAX_DATA_LENGTH \
544 (((256 - 4 - sizeof(struct tb_xdp_properties_response))) / 4)
546 /* Maximum size of the total property block in dwords we allow */
547 #define TB_XDP_PROPERTIES_MAX_LENGTH 500
549 struct tb_xdp_properties_changed {
550 struct tb_xdp_header hdr;
554 struct tb_xdp_properties_changed_response {
555 struct tb_xdp_header hdr;
560 ERROR_UNKNOWN_PACKET,
561 ERROR_UNKNOWN_DOMAIN,
566 struct tb_xdp_error_response {
567 struct tb_xdp_header hdr;