1 // SPDX-License-Identifier: GPL-2.0
3 * AD7746 capacitive sensor driver supporting AD7745, AD7746 and AD7747
5 * Copyright 2011 Analog Devices Inc.
8 #include <linux/delay.h>
9 #include <linux/device.h>
10 #include <linux/i2c.h>
11 #include <linux/interrupt.h>
12 #include <linux/kernel.h>
13 #include <linux/module.h>
14 #include <linux/slab.h>
15 #include <linux/stat.h>
16 #include <linux/sysfs.h>
18 #include <linux/iio/iio.h>
19 #include <linux/iio/sysfs.h>
24 * AD7746 Register Definition
27 #define AD7746_REG_STATUS 0
28 #define AD7746_REG_CAP_DATA_HIGH 1
29 #define AD7746_REG_VT_DATA_HIGH 4
30 #define AD7746_REG_CAP_SETUP 7
31 #define AD7746_REG_VT_SETUP 8
32 #define AD7746_REG_EXC_SETUP 9
33 #define AD7746_REG_CFG 10
34 #define AD7746_REG_CAPDACA 11
35 #define AD7746_REG_CAPDACB 12
36 #define AD7746_REG_CAP_OFFH 13
37 #define AD7746_REG_CAP_GAINH 15
38 #define AD7746_REG_VOLT_GAINH 17
40 /* Status Register Bit Designations (AD7746_REG_STATUS) */
41 #define AD7746_STATUS_EXCERR BIT(3)
42 #define AD7746_STATUS_RDY BIT(2)
43 #define AD7746_STATUS_RDYVT BIT(1)
44 #define AD7746_STATUS_RDYCAP BIT(0)
46 /* Capacitive Channel Setup Register Bit Designations (AD7746_REG_CAP_SETUP) */
47 #define AD7746_CAPSETUP_CAPEN BIT(7)
48 #define AD7746_CAPSETUP_CIN2 BIT(6) /* AD7746 only */
49 #define AD7746_CAPSETUP_CAPDIFF BIT(5)
50 #define AD7746_CAPSETUP_CACHOP BIT(0)
52 /* Voltage/Temperature Setup Register Bit Designations (AD7746_REG_VT_SETUP) */
53 #define AD7746_VTSETUP_VTEN (1 << 7)
54 #define AD7746_VTSETUP_VTMD_INT_TEMP (0 << 5)
55 #define AD7746_VTSETUP_VTMD_EXT_TEMP (1 << 5)
56 #define AD7746_VTSETUP_VTMD_VDD_MON (2 << 5)
57 #define AD7746_VTSETUP_VTMD_EXT_VIN (3 << 5)
58 #define AD7746_VTSETUP_EXTREF BIT(4)
59 #define AD7746_VTSETUP_VTSHORT BIT(1)
60 #define AD7746_VTSETUP_VTCHOP BIT(0)
62 /* Excitation Setup Register Bit Designations (AD7746_REG_EXC_SETUP) */
63 #define AD7746_EXCSETUP_CLKCTRL BIT(7)
64 #define AD7746_EXCSETUP_EXCON BIT(6)
65 #define AD7746_EXCSETUP_EXCB BIT(5)
66 #define AD7746_EXCSETUP_NEXCB BIT(4)
67 #define AD7746_EXCSETUP_EXCA BIT(3)
68 #define AD7746_EXCSETUP_NEXCA BIT(2)
69 #define AD7746_EXCSETUP_EXCLVL(x) (((x) & 0x3) << 0)
71 /* Config Register Bit Designations (AD7746_REG_CFG) */
72 #define AD7746_CONF_VTFS_SHIFT 6
73 #define AD7746_CONF_CAPFS_SHIFT 3
74 #define AD7746_CONF_VTFS_MASK GENMASK(7, 6)
75 #define AD7746_CONF_CAPFS_MASK GENMASK(5, 3)
76 #define AD7746_CONF_MODE_IDLE (0 << 0)
77 #define AD7746_CONF_MODE_CONT_CONV (1 << 0)
78 #define AD7746_CONF_MODE_SINGLE_CONV (2 << 0)
79 #define AD7746_CONF_MODE_PWRDN (3 << 0)
80 #define AD7746_CONF_MODE_OFFS_CAL (5 << 0)
81 #define AD7746_CONF_MODE_GAIN_CAL (6 << 0)
83 /* CAPDAC Register Bit Designations (AD7746_REG_CAPDACx) */
84 #define AD7746_CAPDAC_DACEN BIT(7)
85 #define AD7746_CAPDAC_DACP(x) ((x) & 0x7F)
88 * struct ad7746_chip_info - chip specific information
91 struct ad7746_chip_info {
92 struct i2c_client *client;
93 struct mutex lock; /* protect sensor state */
95 * Capacitive channel digital filter setup;
96 * conversion time/update rate setup per channel
107 } data ____cacheline_aligned;
121 static const struct iio_chan_spec ad7746_channels[] = {
126 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
127 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) |
128 BIT(IIO_CHAN_INFO_SAMP_FREQ),
129 .address = AD7746_REG_VT_DATA_HIGH << 8 |
130 AD7746_VTSETUP_VTMD_EXT_VIN,
136 .extend_name = "supply",
137 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
138 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) |
139 BIT(IIO_CHAN_INFO_SAMP_FREQ),
140 .address = AD7746_REG_VT_DATA_HIGH << 8 |
141 AD7746_VTSETUP_VTMD_VDD_MON,
147 .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED),
148 .address = AD7746_REG_VT_DATA_HIGH << 8 |
149 AD7746_VTSETUP_VTMD_INT_TEMP,
155 .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED),
156 .address = AD7746_REG_VT_DATA_HIGH << 8 |
157 AD7746_VTSETUP_VTMD_EXT_TEMP,
160 .type = IIO_CAPACITANCE,
163 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
164 BIT(IIO_CHAN_INFO_CALIBSCALE) | BIT(IIO_CHAN_INFO_OFFSET),
165 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_CALIBBIAS) |
166 BIT(IIO_CHAN_INFO_SCALE) | BIT(IIO_CHAN_INFO_SAMP_FREQ),
167 .address = AD7746_REG_CAP_DATA_HIGH << 8,
170 .type = IIO_CAPACITANCE,
175 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
176 BIT(IIO_CHAN_INFO_CALIBSCALE) | BIT(IIO_CHAN_INFO_OFFSET),
177 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_CALIBBIAS) |
178 BIT(IIO_CHAN_INFO_SCALE) | BIT(IIO_CHAN_INFO_SAMP_FREQ),
179 .address = AD7746_REG_CAP_DATA_HIGH << 8 |
180 AD7746_CAPSETUP_CAPDIFF
183 .type = IIO_CAPACITANCE,
186 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
187 BIT(IIO_CHAN_INFO_CALIBSCALE) | BIT(IIO_CHAN_INFO_OFFSET),
188 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_CALIBBIAS) |
189 BIT(IIO_CHAN_INFO_SCALE) | BIT(IIO_CHAN_INFO_SAMP_FREQ),
190 .address = AD7746_REG_CAP_DATA_HIGH << 8 |
191 AD7746_CAPSETUP_CIN2,
194 .type = IIO_CAPACITANCE,
199 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
200 BIT(IIO_CHAN_INFO_CALIBSCALE) | BIT(IIO_CHAN_INFO_OFFSET),
201 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_CALIBBIAS) |
202 BIT(IIO_CHAN_INFO_SCALE) | BIT(IIO_CHAN_INFO_SAMP_FREQ),
203 .address = AD7746_REG_CAP_DATA_HIGH << 8 |
204 AD7746_CAPSETUP_CAPDIFF | AD7746_CAPSETUP_CIN2,
208 /* Values are Update Rate (Hz), Conversion Time (ms) + 1*/
209 static const unsigned char ad7746_vt_filter_rate_table[][2] = {
210 {50, 20 + 1}, {31, 32 + 1}, {16, 62 + 1}, {8, 122 + 1},
213 static const unsigned char ad7746_cap_filter_rate_table[][2] = {
214 {91, 11 + 1}, {84, 12 + 1}, {50, 20 + 1}, {26, 38 + 1},
215 {16, 62 + 1}, {13, 77 + 1}, {11, 92 + 1}, {9, 110 + 1},
218 static int ad7746_select_channel(struct iio_dev *indio_dev,
219 struct iio_chan_spec const *chan)
221 struct ad7746_chip_info *chip = iio_priv(indio_dev);
222 u8 vt_setup, cap_setup;
225 switch (chan->type) {
226 case IIO_CAPACITANCE:
227 cap_setup = (chan->address & 0xFF) | AD7746_CAPSETUP_CAPEN;
228 vt_setup = chip->vt_setup & ~AD7746_VTSETUP_VTEN;
229 idx = (chip->config & AD7746_CONF_CAPFS_MASK) >>
230 AD7746_CONF_CAPFS_SHIFT;
231 delay = ad7746_cap_filter_rate_table[idx][1];
233 if (chip->capdac_set != chan->channel) {
234 ret = i2c_smbus_write_byte_data(chip->client,
236 chip->capdac[chan->channel][0]);
239 ret = i2c_smbus_write_byte_data(chip->client,
241 chip->capdac[chan->channel][1]);
245 chip->capdac_set = chan->channel;
250 vt_setup = (chan->address & 0xFF) | AD7746_VTSETUP_VTEN;
251 cap_setup = chip->cap_setup & ~AD7746_CAPSETUP_CAPEN;
252 idx = (chip->config & AD7746_CONF_VTFS_MASK) >>
253 AD7746_CONF_VTFS_SHIFT;
254 delay = ad7746_cap_filter_rate_table[idx][1];
260 if (chip->cap_setup != cap_setup) {
261 ret = i2c_smbus_write_byte_data(chip->client,
262 AD7746_REG_CAP_SETUP,
267 chip->cap_setup = cap_setup;
270 if (chip->vt_setup != vt_setup) {
271 ret = i2c_smbus_write_byte_data(chip->client,
277 chip->vt_setup = vt_setup;
283 static inline ssize_t ad7746_start_calib(struct device *dev,
284 struct device_attribute *attr,
289 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
290 struct ad7746_chip_info *chip = iio_priv(indio_dev);
291 int ret, timeout = 10;
294 ret = strtobool(buf, &doit);
301 mutex_lock(&chip->lock);
302 regval |= chip->config;
303 ret = i2c_smbus_write_byte_data(chip->client, AD7746_REG_CFG, regval);
309 ret = i2c_smbus_read_byte_data(chip->client, AD7746_REG_CFG);
313 } while ((ret == regval) && timeout--);
315 mutex_unlock(&chip->lock);
320 mutex_unlock(&chip->lock);
324 static ssize_t ad7746_start_offset_calib(struct device *dev,
325 struct device_attribute *attr,
329 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
330 int ret = ad7746_select_channel(indio_dev,
331 &ad7746_channels[to_iio_dev_attr(attr)->address]);
335 return ad7746_start_calib(dev, attr, buf, len,
336 AD7746_CONF_MODE_OFFS_CAL);
339 static ssize_t ad7746_start_gain_calib(struct device *dev,
340 struct device_attribute *attr,
344 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
345 int ret = ad7746_select_channel(indio_dev,
346 &ad7746_channels[to_iio_dev_attr(attr)->address]);
350 return ad7746_start_calib(dev, attr, buf, len,
351 AD7746_CONF_MODE_GAIN_CAL);
354 static IIO_DEVICE_ATTR(in_capacitance0_calibbias_calibration,
355 0200, NULL, ad7746_start_offset_calib, CIN1);
356 static IIO_DEVICE_ATTR(in_capacitance1_calibbias_calibration,
357 0200, NULL, ad7746_start_offset_calib, CIN2);
358 static IIO_DEVICE_ATTR(in_capacitance0_calibscale_calibration,
359 0200, NULL, ad7746_start_gain_calib, CIN1);
360 static IIO_DEVICE_ATTR(in_capacitance1_calibscale_calibration,
361 0200, NULL, ad7746_start_gain_calib, CIN2);
362 static IIO_DEVICE_ATTR(in_voltage0_calibscale_calibration,
363 0200, NULL, ad7746_start_gain_calib, VIN);
365 static int ad7746_store_cap_filter_rate_setup(struct ad7746_chip_info *chip,
370 for (i = 0; i < ARRAY_SIZE(ad7746_cap_filter_rate_table); i++)
371 if (val >= ad7746_cap_filter_rate_table[i][0])
374 if (i >= ARRAY_SIZE(ad7746_cap_filter_rate_table))
375 i = ARRAY_SIZE(ad7746_cap_filter_rate_table) - 1;
377 chip->config &= ~AD7746_CONF_CAPFS_MASK;
378 chip->config |= i << AD7746_CONF_CAPFS_SHIFT;
383 static int ad7746_store_vt_filter_rate_setup(struct ad7746_chip_info *chip,
388 for (i = 0; i < ARRAY_SIZE(ad7746_vt_filter_rate_table); i++)
389 if (val >= ad7746_vt_filter_rate_table[i][0])
392 if (i >= ARRAY_SIZE(ad7746_vt_filter_rate_table))
393 i = ARRAY_SIZE(ad7746_vt_filter_rate_table) - 1;
395 chip->config &= ~AD7746_CONF_VTFS_MASK;
396 chip->config |= i << AD7746_CONF_VTFS_SHIFT;
401 static IIO_CONST_ATTR(in_voltage_sampling_frequency_available, "50 31 16 8");
402 static IIO_CONST_ATTR(in_capacitance_sampling_frequency_available,
403 "91 84 50 26 16 13 11 9");
405 static struct attribute *ad7746_attributes[] = {
406 &iio_dev_attr_in_capacitance0_calibbias_calibration.dev_attr.attr,
407 &iio_dev_attr_in_capacitance0_calibscale_calibration.dev_attr.attr,
408 &iio_dev_attr_in_capacitance1_calibscale_calibration.dev_attr.attr,
409 &iio_dev_attr_in_capacitance1_calibbias_calibration.dev_attr.attr,
410 &iio_dev_attr_in_voltage0_calibscale_calibration.dev_attr.attr,
411 &iio_const_attr_in_voltage_sampling_frequency_available.dev_attr.attr,
412 &iio_const_attr_in_capacitance_sampling_frequency_available.dev_attr.attr,
416 static const struct attribute_group ad7746_attribute_group = {
417 .attrs = ad7746_attributes,
420 static int ad7746_write_raw(struct iio_dev *indio_dev,
421 struct iio_chan_spec const *chan,
426 struct ad7746_chip_info *chip = iio_priv(indio_dev);
429 mutex_lock(&chip->lock);
432 case IIO_CHAN_INFO_CALIBSCALE:
438 val = (val2 * 1024) / 15625;
440 switch (chan->type) {
441 case IIO_CAPACITANCE:
442 reg = AD7746_REG_CAP_GAINH;
445 reg = AD7746_REG_VOLT_GAINH;
452 ret = i2c_smbus_write_word_swapped(chip->client, reg, val);
458 case IIO_CHAN_INFO_CALIBBIAS:
459 if (val < 0 || val > 0xFFFF) {
463 ret = i2c_smbus_write_word_swapped(chip->client,
464 AD7746_REG_CAP_OFFH, val);
470 case IIO_CHAN_INFO_OFFSET:
471 if (val < 0 || val > 43008000) { /* 21pF */
477 * CAPDAC Scale = 21pF_typ / 127
478 * CIN Scale = 8.192pF / 2^24
479 * Offset Scale = CAPDAC Scale / CIN Scale = 338646
484 chip->capdac[chan->channel][chan->differential] = val > 0 ?
485 AD7746_CAPDAC_DACP(val) | AD7746_CAPDAC_DACEN : 0;
487 ret = i2c_smbus_write_byte_data(chip->client,
489 chip->capdac[chan->channel][0]);
492 ret = i2c_smbus_write_byte_data(chip->client,
494 chip->capdac[chan->channel][1]);
498 chip->capdac_set = chan->channel;
502 case IIO_CHAN_INFO_SAMP_FREQ:
508 switch (chan->type) {
509 case IIO_CAPACITANCE:
510 ret = ad7746_store_cap_filter_rate_setup(chip, val);
513 ret = ad7746_store_vt_filter_rate_setup(chip, val);
524 mutex_unlock(&chip->lock);
528 static int ad7746_read_raw(struct iio_dev *indio_dev,
529 struct iio_chan_spec const *chan,
533 struct ad7746_chip_info *chip = iio_priv(indio_dev);
537 mutex_lock(&chip->lock);
540 case IIO_CHAN_INFO_RAW:
541 case IIO_CHAN_INFO_PROCESSED:
542 ret = ad7746_select_channel(indio_dev, chan);
547 regval = chip->config | AD7746_CONF_MODE_SINGLE_CONV;
548 ret = i2c_smbus_write_byte_data(chip->client, AD7746_REG_CFG,
554 /* Now read the actual register */
556 ret = i2c_smbus_read_i2c_block_data(chip->client,
557 chan->address >> 8, 3,
563 *val = (be32_to_cpu(chip->data.d32) & 0xFFFFFF) - 0x800000;
565 switch (chan->type) {
568 * temperature in milli degrees Celsius
569 * T = ((*val / 2048) - 4096) * 1000
571 *val = (*val * 125) / 256;
574 if (chan->channel == 1) /* supply_raw*/
583 case IIO_CHAN_INFO_CALIBSCALE:
584 switch (chan->type) {
585 case IIO_CAPACITANCE:
586 reg = AD7746_REG_CAP_GAINH;
589 reg = AD7746_REG_VOLT_GAINH;
596 ret = i2c_smbus_read_word_swapped(chip->client, reg);
599 /* 1 + gain_val / 2^16 */
601 *val2 = (15625 * ret) / 1024;
603 ret = IIO_VAL_INT_PLUS_MICRO;
605 case IIO_CHAN_INFO_CALIBBIAS:
606 ret = i2c_smbus_read_word_swapped(chip->client,
607 AD7746_REG_CAP_OFFH);
614 case IIO_CHAN_INFO_OFFSET:
615 *val = AD7746_CAPDAC_DACP(chip->capdac[chan->channel]
616 [chan->differential]) * 338646;
620 case IIO_CHAN_INFO_SCALE:
621 switch (chan->type) {
622 case IIO_CAPACITANCE:
626 ret = IIO_VAL_INT_PLUS_NANO;
632 ret = IIO_VAL_FRACTIONAL_LOG2;
640 case IIO_CHAN_INFO_SAMP_FREQ:
641 switch (chan->type) {
642 case IIO_CAPACITANCE:
643 idx = (chip->config & AD7746_CONF_CAPFS_MASK) >>
644 AD7746_CONF_CAPFS_SHIFT;
645 *val = ad7746_cap_filter_rate_table[idx][0];
649 idx = (chip->config & AD7746_CONF_VTFS_MASK) >>
650 AD7746_CONF_VTFS_SHIFT;
651 *val = ad7746_vt_filter_rate_table[idx][0];
662 mutex_unlock(&chip->lock);
666 static const struct iio_info ad7746_info = {
667 .attrs = &ad7746_attribute_group,
668 .read_raw = ad7746_read_raw,
669 .write_raw = ad7746_write_raw,
673 * device probe and remove
676 static int ad7746_probe(struct i2c_client *client,
677 const struct i2c_device_id *id)
679 struct ad7746_platform_data *pdata = client->dev.platform_data;
680 struct ad7746_chip_info *chip;
681 struct iio_dev *indio_dev;
682 unsigned char regval = 0;
685 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*chip));
688 chip = iio_priv(indio_dev);
689 mutex_init(&chip->lock);
690 /* this is only used for device removal purposes */
691 i2c_set_clientdata(client, indio_dev);
693 chip->client = client;
694 chip->capdac_set = -1;
696 indio_dev->name = id->name;
697 indio_dev->info = &ad7746_info;
698 indio_dev->channels = ad7746_channels;
699 if (id->driver_data == 7746)
700 indio_dev->num_channels = ARRAY_SIZE(ad7746_channels);
702 indio_dev->num_channels = ARRAY_SIZE(ad7746_channels) - 2;
703 indio_dev->num_channels = ARRAY_SIZE(ad7746_channels);
704 indio_dev->modes = INDIO_DIRECT_MODE;
707 if (pdata->exca_en) {
708 if (pdata->exca_inv_en)
709 regval |= AD7746_EXCSETUP_NEXCA;
711 regval |= AD7746_EXCSETUP_EXCA;
714 if (pdata->excb_en) {
715 if (pdata->excb_inv_en)
716 regval |= AD7746_EXCSETUP_NEXCB;
718 regval |= AD7746_EXCSETUP_EXCB;
721 regval |= AD7746_EXCSETUP_EXCLVL(pdata->exclvl);
723 dev_warn(&client->dev, "No platform data? using default\n");
724 regval = AD7746_EXCSETUP_EXCA | AD7746_EXCSETUP_EXCB |
725 AD7746_EXCSETUP_EXCLVL(3);
728 ret = i2c_smbus_write_byte_data(chip->client,
729 AD7746_REG_EXC_SETUP, regval);
733 ret = devm_iio_device_register(indio_dev->dev.parent, indio_dev);
740 static const struct i2c_device_id ad7746_id[] = {
747 MODULE_DEVICE_TABLE(i2c, ad7746_id);
749 static const struct of_device_id ad7746_of_match[] = {
750 { .compatible = "adi,ad7745" },
751 { .compatible = "adi,ad7746" },
752 { .compatible = "adi,ad7747" },
756 MODULE_DEVICE_TABLE(of, ad7746_of_match);
758 static struct i2c_driver ad7746_driver = {
760 .name = KBUILD_MODNAME,
761 .of_match_table = ad7746_of_match,
763 .probe = ad7746_probe,
764 .id_table = ad7746_id,
766 module_i2c_driver(ad7746_driver);
769 MODULE_DESCRIPTION("Analog Devices AD7746/5/7 capacitive sensor driver");
770 MODULE_LICENSE("GPL v2");