1 // SPDX-License-Identifier: GPL-2.0-only
2 #include <linux/kvm_host.h>
4 #include <asm/irq_remapping.h>
9 #include "posted_intr.h"
14 * Maintain a per-CPU list of vCPUs that need to be awakened by wakeup_handler()
15 * when a WAKEUP_VECTOR interrupted is posted. vCPUs are added to the list when
16 * the vCPU is scheduled out and is blocking (e.g. in HLT) with IRQs enabled.
17 * The vCPUs posted interrupt descriptor is updated at the same time to set its
18 * notification vector to WAKEUP_VECTOR, so that posted interrupt from devices
19 * wake the target vCPUs. vCPUs are removed from the list and the notification
20 * vector is reset when the vCPU is scheduled in.
22 static DEFINE_PER_CPU(struct list_head, wakeup_vcpus_on_cpu);
24 * Protect the per-CPU list with a per-CPU spinlock to handle task migration.
25 * When a blocking vCPU is awakened _and_ migrated to a different pCPU, the
26 * ->sched_in() path will need to take the vCPU off the list of the _previous_
27 * CPU. IRQs must be disabled when taking this lock, otherwise deadlock will
28 * occur if a wakeup IRQ arrives and attempts to acquire the lock.
30 static DEFINE_PER_CPU(raw_spinlock_t, wakeup_vcpus_on_cpu_lock);
32 static inline struct pi_desc *vcpu_to_pi_desc(struct kvm_vcpu *vcpu)
34 return &(to_vmx(vcpu)->pi_desc);
37 static int pi_try_set_control(struct pi_desc *pi_desc, u64 old, u64 new)
40 * PID.ON can be set at any time by a different vCPU or by hardware,
41 * e.g. a device. PID.control must be written atomically, and the
42 * update must be retried with a fresh snapshot an ON change causes
43 * the cmpxchg to fail.
45 if (cmpxchg64(&pi_desc->control, old, new) != old)
51 void vmx_vcpu_pi_load(struct kvm_vcpu *vcpu, int cpu)
53 struct pi_desc *pi_desc = vcpu_to_pi_desc(vcpu);
54 struct vcpu_vmx *vmx = to_vmx(vcpu);
55 struct pi_desc old, new;
60 * To simplify hot-plug and dynamic toggling of APICv, keep PI.NDST and
61 * PI.SN up-to-date even if there is no assigned device or if APICv is
62 * deactivated due to a dynamic inhibit bit, e.g. for Hyper-V's SyncIC.
64 if (!enable_apicv || !lapic_in_kernel(vcpu))
68 * If the vCPU wasn't on the wakeup list and wasn't migrated, then the
69 * full update can be skipped as neither the vector nor the destination
70 * needs to be changed.
72 if (pi_desc->nv != POSTED_INTR_WAKEUP_VECTOR && vcpu->cpu == cpu) {
74 * Clear SN if it was set due to being preempted. Again, do
75 * this even if there is no assigned device for simplicity.
77 if (pi_test_and_clear_sn(pi_desc))
82 local_irq_save(flags);
85 * If the vCPU was waiting for wakeup, remove the vCPU from the wakeup
86 * list of the _previous_ pCPU, which will not be the same as the
87 * current pCPU if the task was migrated.
89 if (pi_desc->nv == POSTED_INTR_WAKEUP_VECTOR) {
90 raw_spin_lock(&per_cpu(wakeup_vcpus_on_cpu_lock, vcpu->cpu));
91 list_del(&vmx->pi_wakeup_list);
92 raw_spin_unlock(&per_cpu(wakeup_vcpus_on_cpu_lock, vcpu->cpu));
95 dest = cpu_physical_id(cpu);
97 dest = (dest << 8) & 0xFF00;
100 old.control = new.control = READ_ONCE(pi_desc->control);
103 * Clear SN (as above) and refresh the destination APIC ID to
104 * handle task migration (@cpu != vcpu->cpu).
110 * Restore the notification vector; in the blocking case, the
111 * descriptor was modified on "put" to use the wakeup vector.
113 new.nv = POSTED_INTR_VECTOR;
114 } while (pi_try_set_control(pi_desc, old.control, new.control));
116 local_irq_restore(flags);
121 * Clear SN before reading the bitmap. The VT-d firmware
122 * writes the bitmap and reads SN atomically (5.2.3 in the
123 * spec), so it doesn't really have a memory barrier that
124 * pairs with this, but we cannot do that and we need one.
126 smp_mb__after_atomic();
128 if (!pi_is_pir_empty(pi_desc))
132 static bool vmx_can_use_vtd_pi(struct kvm *kvm)
134 return irqchip_in_kernel(kvm) && enable_apicv &&
135 kvm_arch_has_assigned_device(kvm) &&
136 irq_remapping_cap(IRQ_POSTING_CAP);
140 * Put the vCPU on this pCPU's list of vCPUs that needs to be awakened and set
141 * WAKEUP as the notification vector in the PI descriptor.
143 static void pi_enable_wakeup_handler(struct kvm_vcpu *vcpu)
145 struct pi_desc *pi_desc = vcpu_to_pi_desc(vcpu);
146 struct vcpu_vmx *vmx = to_vmx(vcpu);
147 struct pi_desc old, new;
150 local_irq_save(flags);
152 raw_spin_lock(&per_cpu(wakeup_vcpus_on_cpu_lock, vcpu->cpu));
153 list_add_tail(&vmx->pi_wakeup_list,
154 &per_cpu(wakeup_vcpus_on_cpu, vcpu->cpu));
155 raw_spin_unlock(&per_cpu(wakeup_vcpus_on_cpu_lock, vcpu->cpu));
157 WARN(pi_desc->sn, "PI descriptor SN field set before blocking");
160 old.control = new.control = READ_ONCE(pi_desc->control);
162 /* set 'NV' to 'wakeup vector' */
163 new.nv = POSTED_INTR_WAKEUP_VECTOR;
164 } while (pi_try_set_control(pi_desc, old.control, new.control));
167 * Send a wakeup IPI to this CPU if an interrupt may have been posted
168 * before the notification vector was updated, in which case the IRQ
169 * will arrive on the non-wakeup vector. An IPI is needed as calling
170 * try_to_wake_up() from ->sched_out() isn't allowed (IRQs are not
171 * enabled until it is safe to call try_to_wake_up() on the task being
174 if (pi_test_on(&new))
175 apic->send_IPI_self(POSTED_INTR_WAKEUP_VECTOR);
177 local_irq_restore(flags);
180 void vmx_vcpu_pi_put(struct kvm_vcpu *vcpu)
182 struct pi_desc *pi_desc = vcpu_to_pi_desc(vcpu);
184 if (!vmx_can_use_vtd_pi(vcpu->kvm))
187 if (kvm_vcpu_is_blocking(vcpu) && !vmx_interrupt_blocked(vcpu))
188 pi_enable_wakeup_handler(vcpu);
191 * Set SN when the vCPU is preempted. Note, the vCPU can both be seen
192 * as blocking and preempted, e.g. if it's preempted between setting
193 * its wait state and manually scheduling out.
200 * Handler for POSTED_INTERRUPT_WAKEUP_VECTOR.
202 void pi_wakeup_handler(void)
204 int cpu = smp_processor_id();
205 struct vcpu_vmx *vmx;
207 raw_spin_lock(&per_cpu(wakeup_vcpus_on_cpu_lock, cpu));
208 list_for_each_entry(vmx, &per_cpu(wakeup_vcpus_on_cpu, cpu),
211 if (pi_test_on(&vmx->pi_desc))
212 kvm_vcpu_wake_up(&vmx->vcpu);
214 raw_spin_unlock(&per_cpu(wakeup_vcpus_on_cpu_lock, cpu));
217 void __init pi_init_cpu(int cpu)
219 INIT_LIST_HEAD(&per_cpu(wakeup_vcpus_on_cpu, cpu));
220 raw_spin_lock_init(&per_cpu(wakeup_vcpus_on_cpu_lock, cpu));
223 bool pi_has_pending_interrupt(struct kvm_vcpu *vcpu)
225 struct pi_desc *pi_desc = vcpu_to_pi_desc(vcpu);
227 return pi_test_on(pi_desc) ||
228 (pi_test_sn(pi_desc) && !pi_is_pir_empty(pi_desc));
233 * Bail out of the block loop if the VM has an assigned
234 * device, but the blocking vCPU didn't reconfigure the
235 * PI.NV to the wakeup vector, i.e. the assigned device
236 * came along after the initial check in vmx_vcpu_pi_put().
238 void vmx_pi_start_assignment(struct kvm *kvm)
240 if (!irq_remapping_cap(IRQ_POSTING_CAP))
243 kvm_make_all_cpus_request(kvm, KVM_REQ_UNBLOCK);
247 * pi_update_irte - set IRTE for Posted-Interrupts
250 * @host_irq: host irq of the interrupt
251 * @guest_irq: gsi of the interrupt
252 * @set: set or unset PI
253 * returns 0 on success, < 0 on failure
255 int pi_update_irte(struct kvm *kvm, unsigned int host_irq, uint32_t guest_irq,
258 struct kvm_kernel_irq_routing_entry *e;
259 struct kvm_irq_routing_table *irq_rt;
260 struct kvm_lapic_irq irq;
261 struct kvm_vcpu *vcpu;
262 struct vcpu_data vcpu_info;
265 if (!vmx_can_use_vtd_pi(kvm))
268 idx = srcu_read_lock(&kvm->irq_srcu);
269 irq_rt = srcu_dereference(kvm->irq_routing, &kvm->irq_srcu);
270 if (guest_irq >= irq_rt->nr_rt_entries ||
271 hlist_empty(&irq_rt->map[guest_irq])) {
272 pr_warn_once("no route for guest_irq %u/%u (broken user space?)\n",
273 guest_irq, irq_rt->nr_rt_entries);
277 hlist_for_each_entry(e, &irq_rt->map[guest_irq], link) {
278 if (e->type != KVM_IRQ_ROUTING_MSI)
281 * VT-d PI cannot support posting multicast/broadcast
282 * interrupts to a vCPU, we still use interrupt remapping
283 * for these kind of interrupts.
285 * For lowest-priority interrupts, we only support
286 * those with single CPU as the destination, e.g. user
287 * configures the interrupts via /proc/irq or uses
288 * irqbalance to make the interrupts single-CPU.
290 * We will support full lowest-priority interrupt later.
292 * In addition, we can only inject generic interrupts using
293 * the PI mechanism, refuse to route others through it.
296 kvm_set_msi_irq(kvm, e, &irq);
297 if (!kvm_intr_is_single_vcpu(kvm, &irq, &vcpu) ||
298 !kvm_irq_is_postable(&irq)) {
300 * Make sure the IRTE is in remapped mode if
301 * we don't handle it in posted mode.
303 ret = irq_set_vcpu_affinity(host_irq, NULL);
306 "failed to back to remapped mode, irq: %u\n",
314 vcpu_info.pi_desc_addr = __pa(&to_vmx(vcpu)->pi_desc);
315 vcpu_info.vector = irq.vector;
317 trace_kvm_pi_irte_update(host_irq, vcpu->vcpu_id, e->gsi,
318 vcpu_info.vector, vcpu_info.pi_desc_addr, set);
321 ret = irq_set_vcpu_affinity(host_irq, &vcpu_info);
323 ret = irq_set_vcpu_affinity(host_irq, NULL);
326 printk(KERN_INFO "%s: failed to update PI IRTE\n",
334 srcu_read_unlock(&kvm->irq_srcu, idx);