drivers/gpu/drm/v3d/v3d_drv.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /* Copyright (C) 2014-2018 Broadcom */
   3
   4 /**
   5  * DOC: Broadcom V3D Graphics Driver
   6  *
   7  * This driver supports the Broadcom V3D 3.3 and 4.1 OpenGL ES GPUs.
   8  * For V3D 2.x support, see the VC4 driver.
   9  *
  10  * The V3D GPU includes a tiled render (composed of a bin and render
  11  * pipelines), the TFU (texture formatting unit), and the CSD (compute
  12  * shader dispatch).
  13  */
  14
  15 #include <linux/clk.h>
  16 #include <linux/device.h>
  17 #include <linux/dma-mapping.h>
  18 #include <linux/io.h>
  19 #include <linux/module.h>
  20 #include <linux/of_platform.h>
  21 #include <linux/platform_device.h>
  22 #include <linux/pm_runtime.h>
  23 #include <linux/reset.h>
  24
  25 #include <drm/drm_drv.h>
  26 #include <drm/drm_fb_cma_helper.h>
  27 #include <drm/drm_fb_helper.h>
  28 #include <drm/drm_managed.h>
  29 #include <uapi/drm/v3d_drm.h>
  30
  31 #include "v3d_drv.h"
  32 #include "v3d_regs.h"
  33
  34 #define DRIVER_NAME "v3d"
  35 #define DRIVER_DESC "Broadcom V3D graphics"
  36 #define DRIVER_DATE "20180419"
  37 #define DRIVER_MAJOR 1
  38 #define DRIVER_MINOR 0
  39 #define DRIVER_PATCHLEVEL 0
  40
  41 #ifdef CONFIG_PM
  42 static int v3d_runtime_suspend(struct device *dev)
  43 {
  44         struct drm_device *drm = dev_get_drvdata(dev);
  45         struct v3d_dev *v3d = to_v3d_dev(drm);
  46
  47         v3d_irq_disable(v3d);
  48
  49         clk_disable_unprepare(v3d->clk);
  50
  51         return 0;
  52 }
  53
  54 static int v3d_runtime_resume(struct device *dev)
  55 {
  56         struct drm_device *drm = dev_get_drvdata(dev);
  57         struct v3d_dev *v3d = to_v3d_dev(drm);
  58         int ret;
  59
  60         ret = clk_prepare_enable(v3d->clk);
  61         if (ret != 0)
  62                 return ret;
  63
  64         /* XXX: VPM base */
  65
  66         v3d_mmu_set_page_table(v3d);
  67         v3d_irq_enable(v3d);
  68
  69         return 0;
  70 }
  71 #endif
  72
  73 static const struct dev_pm_ops v3d_v3d_pm_ops = {
  74         SET_RUNTIME_PM_OPS(v3d_runtime_suspend, v3d_runtime_resume, NULL)
  75 };
  76
  77 static int v3d_get_param_ioctl(struct drm_device *dev, void *data,
  78                                struct drm_file *file_priv)
  79 {
  80         struct v3d_dev *v3d = to_v3d_dev(dev);
  81         struct drm_v3d_get_param *args = data;
  82         int ret;
  83         static const u32 reg_map[] = {
  84                 [DRM_V3D_PARAM_V3D_UIFCFG] = V3D_HUB_UIFCFG,
  85                 [DRM_V3D_PARAM_V3D_HUB_IDENT1] = V3D_HUB_IDENT1,
  86                 [DRM_V3D_PARAM_V3D_HUB_IDENT2] = V3D_HUB_IDENT2,
  87                 [DRM_V3D_PARAM_V3D_HUB_IDENT3] = V3D_HUB_IDENT3,
  88                 [DRM_V3D_PARAM_V3D_CORE0_IDENT0] = V3D_CTL_IDENT0,
  89                 [DRM_V3D_PARAM_V3D_CORE0_IDENT1] = V3D_CTL_IDENT1,
  90                 [DRM_V3D_PARAM_V3D_CORE0_IDENT2] = V3D_CTL_IDENT2,
  91         };
  92
  93         if (args->pad != 0)
  94                 return -EINVAL;
  95
  96         /* Note that DRM_V3D_PARAM_V3D_CORE0_IDENT0 is 0, so we need
  97          * to explicitly allow it in the "the register in our
  98          * parameter map" check.
  99          */
 100         if (args->param < ARRAY_SIZE(reg_map) &&
 101             (reg_map[args->param] ||
 102              args->param == DRM_V3D_PARAM_V3D_CORE0_IDENT0)) {
 103                 u32 offset = reg_map[args->param];
 104
 105                 if (args->value != 0)
 106                         return -EINVAL;
 107
 108                 ret = pm_runtime_get_sync(v3d->drm.dev);
 109                 if (ret < 0)
 110                         return ret;
 111                 if (args->param >= DRM_V3D_PARAM_V3D_CORE0_IDENT0 &&
 112                     args->param <= DRM_V3D_PARAM_V3D_CORE0_IDENT2) {
 113                         args->value = V3D_CORE_READ(0, offset);
 114                 } else {
 115                         args->value = V3D_READ(offset);
 116                 }
 117                 pm_runtime_mark_last_busy(v3d->drm.dev);
 118                 pm_runtime_put_autosuspend(v3d->drm.dev);
 119                 return 0;
 120         }
 121
 122
 123         switch (args->param) {
 124         case DRM_V3D_PARAM_SUPPORTS_TFU:
 125                 args->value = 1;
 126                 return 0;
 127         case DRM_V3D_PARAM_SUPPORTS_CSD:
 128                 args->value = v3d_has_csd(v3d);
 129                 return 0;
 130         case DRM_V3D_PARAM_SUPPORTS_CACHE_FLUSH:
 131                 args->value = 1;
 132                 return 0;
 133         default:
 134                 DRM_DEBUG("Unknown parameter %d\n", args->param);
 135                 return -EINVAL;
 136         }
 137 }
 138
 139 static int
 140 v3d_open(struct drm_device *dev, struct drm_file *file)
 141 {
 142         struct v3d_dev *v3d = to_v3d_dev(dev);
 143         struct v3d_file_priv *v3d_priv;
 144         struct drm_gpu_scheduler *sched;
 145         int i;
 146
 147         v3d_priv = kzalloc(sizeof(*v3d_priv), GFP_KERNEL);
 148         if (!v3d_priv)
 149                 return -ENOMEM;
 150
 151         v3d_priv->v3d = v3d;
 152
 153         for (i = 0; i < V3D_MAX_QUEUES; i++) {
 154                 sched = &v3d->queue[i].sched;
 155                 drm_sched_entity_init(&v3d_priv->sched_entity[i],
 156                                       DRM_SCHED_PRIORITY_NORMAL, &sched,
 157                                       1, NULL);
 158         }
 159
 160         file->driver_priv = v3d_priv;
 161
 162         return 0;
 163 }
 164
 165 static void
 166 v3d_postclose(struct drm_device *dev, struct drm_file *file)
 167 {
 168         struct v3d_file_priv *v3d_priv = file->driver_priv;
 169         enum v3d_queue q;
 170
 171         for (q = 0; q < V3D_MAX_QUEUES; q++) {
 172                 drm_sched_entity_destroy(&v3d_priv->sched_entity[q]);
 173         }
 174
 175         kfree(v3d_priv);
 176 }
 177
 178 DEFINE_DRM_GEM_FOPS(v3d_drm_fops);
 179
 180 /* DRM_AUTH is required on SUBMIT_CL for now, while we don't have GMP
 181  * protection between clients.  Note that render nodes would be be
 182  * able to submit CLs that could access BOs from clients authenticated
 183  * with the master node.  The TFU doesn't use the GMP, so it would
 184  * need to stay DRM_AUTH until we do buffer size/offset validation.
 185  */
 186 static const struct drm_ioctl_desc v3d_drm_ioctls[] = {
 187         DRM_IOCTL_DEF_DRV(V3D_SUBMIT_CL, v3d_submit_cl_ioctl, DRM_RENDER_ALLOW | DRM_AUTH),
 188         DRM_IOCTL_DEF_DRV(V3D_WAIT_BO, v3d_wait_bo_ioctl, DRM_RENDER_ALLOW),
 189         DRM_IOCTL_DEF_DRV(V3D_CREATE_BO, v3d_create_bo_ioctl, DRM_RENDER_ALLOW),
 190         DRM_IOCTL_DEF_DRV(V3D_MMAP_BO, v3d_mmap_bo_ioctl, DRM_RENDER_ALLOW),
 191         DRM_IOCTL_DEF_DRV(V3D_GET_PARAM, v3d_get_param_ioctl, DRM_RENDER_ALLOW),
 192         DRM_IOCTL_DEF_DRV(V3D_GET_BO_OFFSET, v3d_get_bo_offset_ioctl, DRM_RENDER_ALLOW),
 193         DRM_IOCTL_DEF_DRV(V3D_SUBMIT_TFU, v3d_submit_tfu_ioctl, DRM_RENDER_ALLOW | DRM_AUTH),
 194         DRM_IOCTL_DEF_DRV(V3D_SUBMIT_CSD, v3d_submit_csd_ioctl, DRM_RENDER_ALLOW | DRM_AUTH),
 195 };
 196
 197 static struct drm_driver v3d_drm_driver = {
 198         .driver_features = (DRIVER_GEM |
 199                             DRIVER_RENDER |
 200                             DRIVER_SYNCOBJ),
 201
 202         .open = v3d_open,
 203         .postclose = v3d_postclose,
 204
 205 #if defined(CONFIG_DEBUG_FS)
 206         .debugfs_init = v3d_debugfs_init,
 207 #endif
 208
 209         .gem_create_object = v3d_create_object,
 210         .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
 211         .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
 212         .gem_prime_import_sg_table = v3d_prime_import_sg_table,
 213         .gem_prime_mmap = drm_gem_prime_mmap,
 214
 215         .ioctls = v3d_drm_ioctls,
 216         .num_ioctls = ARRAY_SIZE(v3d_drm_ioctls),
 217         .fops = &v3d_drm_fops,
 218
 219         .name = DRIVER_NAME,
 220         .desc = DRIVER_DESC,
 221         .date = DRIVER_DATE,
 222         .major = DRIVER_MAJOR,
 223         .minor = DRIVER_MINOR,
 224         .patchlevel = DRIVER_PATCHLEVEL,
 225 };
 226
 227 static const struct of_device_id v3d_of_match[] = {
 228         { .compatible = "brcm,7268-v3d" },
 229         { .compatible = "brcm,7278-v3d" },
 230         {},
 231 };
 232 MODULE_DEVICE_TABLE(of, v3d_of_match);
 233
 234 static int
 235 map_regs(struct v3d_dev *v3d, void __iomem **regs, const char *name)
 236 {
 237         struct resource *res =
 238                 platform_get_resource_byname(v3d_to_pdev(v3d), IORESOURCE_MEM, name);
 239
 240         *regs = devm_ioremap_resource(v3d->drm.dev, res);
 241         return PTR_ERR_OR_ZERO(*regs);
 242 }
 243
 244 static int v3d_platform_drm_probe(struct platform_device *pdev)
 245 {
 246         struct device *dev = &pdev->dev;
 247         struct drm_device *drm;
 248         struct v3d_dev *v3d;
 249         int ret;
 250         u32 mmu_debug;
 251         u32 ident1;
 252
 253
 254         v3d = devm_drm_dev_alloc(dev, &v3d_drm_driver, struct v3d_dev, drm);
 255         if (IS_ERR(v3d))
 256                 return PTR_ERR(v3d);
 257
 258         drm = &v3d->drm;
 259
 260         platform_set_drvdata(pdev, drm);
 261
 262         ret = map_regs(v3d, &v3d->hub_regs, "hub");
 263         if (ret)
 264                 return ret;
 265
 266         ret = map_regs(v3d, &v3d->core_regs[0], "core0");
 267         if (ret)
 268                 return ret;
 269
 270         mmu_debug = V3D_READ(V3D_MMU_DEBUG_INFO);
 271         dev->coherent_dma_mask =
 272                 DMA_BIT_MASK(30 + V3D_GET_FIELD(mmu_debug, V3D_MMU_PA_WIDTH));
 273         v3d->va_width = 30 + V3D_GET_FIELD(mmu_debug, V3D_MMU_VA_WIDTH);
 274
 275         ident1 = V3D_READ(V3D_HUB_IDENT1);
 276         v3d->ver = (V3D_GET_FIELD(ident1, V3D_HUB_IDENT1_TVER) * 10 +
 277                     V3D_GET_FIELD(ident1, V3D_HUB_IDENT1_REV));
 278         v3d->cores = V3D_GET_FIELD(ident1, V3D_HUB_IDENT1_NCORES);
 279         WARN_ON(v3d->cores > 1); /* multicore not yet implemented */
 280
 281         v3d->reset = devm_reset_control_get_exclusive(dev, NULL);
 282         if (IS_ERR(v3d->reset)) {
 283                 ret = PTR_ERR(v3d->reset);
 284
 285                 if (ret == -EPROBE_DEFER)
 286                         return ret;
 287
 288                 v3d->reset = NULL;
 289                 ret = map_regs(v3d, &v3d->bridge_regs, "bridge");
 290                 if (ret) {
 291                         dev_err(dev,
 292                                 "Failed to get reset control or bridge regs\n");
 293                         return ret;
 294                 }
 295         }
 296
 297         if (v3d->ver < 41) {
 298                 ret = map_regs(v3d, &v3d->gca_regs, "gca");
 299                 if (ret)
 300                         return ret;
 301         }
 302
 303         v3d->mmu_scratch = dma_alloc_wc(dev, 4096, &v3d->mmu_scratch_paddr,
 304                                         GFP_KERNEL | __GFP_NOWARN | __GFP_ZERO);
 305         if (!v3d->mmu_scratch) {
 306                 dev_err(dev, "Failed to allocate MMU scratch page\n");
 307                 return -ENOMEM;
 308         }
 309
 310         pm_runtime_use_autosuspend(dev);
 311         pm_runtime_set_autosuspend_delay(dev, 50);
 312         pm_runtime_enable(dev);
 313
 314         ret = v3d_gem_init(drm);
 315         if (ret)
 316                 goto dma_free;
 317
 318         ret = v3d_irq_init(v3d);
 319         if (ret)
 320                 goto gem_destroy;
 321
 322         ret = drm_dev_register(drm, 0);
 323         if (ret)
 324                 goto irq_disable;
 325
 326         return 0;
 327
 328 irq_disable:
 329         v3d_irq_disable(v3d);
 330 gem_destroy:
 331         v3d_gem_destroy(drm);
 332 dma_free:
 333         dma_free_wc(dev, 4096, v3d->mmu_scratch, v3d->mmu_scratch_paddr);
 334         return ret;
 335 }
 336
 337 static int v3d_platform_drm_remove(struct platform_device *pdev)
 338 {
 339         struct drm_device *drm = platform_get_drvdata(pdev);
 340         struct v3d_dev *v3d = to_v3d_dev(drm);
 341
 342         drm_dev_unregister(drm);
 343
 344         v3d_gem_destroy(drm);
 345
 346         dma_free_wc(v3d->drm.dev, 4096, v3d->mmu_scratch,
 347                     v3d->mmu_scratch_paddr);
 348
 349         return 0;
 350 }
 351
 352 static struct platform_driver v3d_platform_driver = {
 353         .probe          = v3d_platform_drm_probe,
 354         .remove         = v3d_platform_drm_remove,
 355         .driver         = {
 356                 .name   = "v3d",
 357                 .of_match_table = v3d_of_match,
 358         },
 359 };
 360
 361 module_platform_driver(v3d_platform_driver);
 362
 363 MODULE_ALIAS("platform:v3d-drm");
 364 MODULE_DESCRIPTION("Broadcom V3D DRM Driver");
 365 MODULE_AUTHOR("Eric Anholt <[email protected]>");
 366 MODULE_LICENSE("GPL v2");