2 * Copyright (c) 2013 Intel Corporation. All rights reserved.
3 * Copyright (c) 2006, 2007, 2008, 2009 QLogic Corporation. All rights reserved.
4 * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
6 * This software is available to you under a choice of one of two
7 * licenses. You may choose to be licensed under the terms of the GNU
8 * General Public License (GPL) Version 2, available from the file
9 * COPYING in the main directory of this source tree, or the
10 * OpenIB.org BSD license below:
12 * Redistribution and use in source and binary forms, with or
13 * without modification, are permitted provided that the following
16 * - Redistributions of source code must retain the above
17 * copyright notice, this list of conditions and the following
20 * - Redistributions in binary form must reproduce the above
21 * copyright notice, this list of conditions and the following
22 * disclaimer in the documentation and/or other materials
23 * provided with the distribution.
25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
35 #include <linux/spinlock.h>
36 #include <linux/pci.h>
38 #include <linux/delay.h>
39 #include <linux/netdevice.h>
40 #include <linux/vmalloc.h>
41 #include <linux/module.h>
42 #include <linux/prefetch.h>
47 * The size has to be longer than this string, so we can append
48 * board/chip information to it in the init code.
50 const char ib_qib_version[] = QIB_DRIVER_VERSION "\n";
52 DEFINE_SPINLOCK(qib_devs_lock);
53 LIST_HEAD(qib_dev_list);
54 DEFINE_MUTEX(qib_mutex); /* general driver use */
57 module_param_named(ibmtu, qib_ibmtu, uint, S_IRUGO);
58 MODULE_PARM_DESC(ibmtu, "Set max IB MTU (0=2KB, 1=256, 2=512, ... 5=4096");
60 unsigned qib_compat_ddr_negotiate = 1;
61 module_param_named(compat_ddr_negotiate, qib_compat_ddr_negotiate, uint,
63 MODULE_PARM_DESC(compat_ddr_negotiate,
64 "Attempt pre-IBTA 1.2 DDR speed negotiation");
66 MODULE_LICENSE("Dual BSD/GPL");
68 MODULE_DESCRIPTION("Intel IB driver");
69 MODULE_VERSION(QIB_DRIVER_VERSION);
72 * QIB_PIO_MAXIBHDR is the max IB header size allowed for in our
73 * PIO send buffers. This is well beyond anything currently
74 * defined in the InfiniBand spec.
76 #define QIB_PIO_MAXIBHDR 128
79 * QIB_MAX_PKT_RCV is the max # if packets processed per receive interrupt.
81 #define QIB_MAX_PKT_RECV 64
83 struct qlogic_ib_stats qib_stats;
85 const char *qib_get_unit_name(int unit)
87 static char iname[16];
89 snprintf(iname, sizeof(iname), "infinipath%u", unit);
93 const char *qib_get_card_name(struct rvt_dev_info *rdi)
95 struct qib_ibdev *ibdev = container_of(rdi, struct qib_ibdev, rdi);
96 struct qib_devdata *dd = container_of(ibdev,
97 struct qib_devdata, verbs_dev);
98 return qib_get_unit_name(dd->unit);
101 struct pci_dev *qib_get_pci_dev(struct rvt_dev_info *rdi)
103 struct qib_ibdev *ibdev = container_of(rdi, struct qib_ibdev, rdi);
104 struct qib_devdata *dd = container_of(ibdev,
105 struct qib_devdata, verbs_dev);
110 * Return count of units with at least one port ACTIVE.
112 int qib_count_active_units(void)
114 struct qib_devdata *dd;
115 struct qib_pportdata *ppd;
117 int pidx, nunits_active = 0;
119 spin_lock_irqsave(&qib_devs_lock, flags);
120 list_for_each_entry(dd, &qib_dev_list, list) {
121 if (!(dd->flags & QIB_PRESENT) || !dd->kregbase)
123 for (pidx = 0; pidx < dd->num_pports; ++pidx) {
124 ppd = dd->pport + pidx;
125 if (ppd->lid && (ppd->lflags & (QIBL_LINKINIT |
126 QIBL_LINKARMED | QIBL_LINKACTIVE))) {
132 spin_unlock_irqrestore(&qib_devs_lock, flags);
133 return nunits_active;
137 * Return count of all units, optionally return in arguments
138 * the number of usable (present) units, and the number of
141 int qib_count_units(int *npresentp, int *nupp)
143 int nunits = 0, npresent = 0, nup = 0;
144 struct qib_devdata *dd;
147 struct qib_pportdata *ppd;
149 spin_lock_irqsave(&qib_devs_lock, flags);
151 list_for_each_entry(dd, &qib_dev_list, list) {
153 if ((dd->flags & QIB_PRESENT) && dd->kregbase)
155 for (pidx = 0; pidx < dd->num_pports; ++pidx) {
156 ppd = dd->pport + pidx;
157 if (ppd->lid && (ppd->lflags & (QIBL_LINKINIT |
158 QIBL_LINKARMED | QIBL_LINKACTIVE)))
163 spin_unlock_irqrestore(&qib_devs_lock, flags);
166 *npresentp = npresent;
174 * qib_wait_linkstate - wait for an IB link state change to occur
175 * @dd: the qlogic_ib device
176 * @state: the state to wait for
177 * @msecs: the number of milliseconds to wait
179 * wait up to msecs milliseconds for IB link state change to occur for
180 * now, take the easy polling route. Currently used only by
181 * qib_set_linkstate. Returns 0 if state reached, otherwise
182 * -ETIMEDOUT state can have multiple states set, for any of several
185 int qib_wait_linkstate(struct qib_pportdata *ppd, u32 state, int msecs)
190 spin_lock_irqsave(&ppd->lflags_lock, flags);
191 if (ppd->state_wanted) {
192 spin_unlock_irqrestore(&ppd->lflags_lock, flags);
196 ppd->state_wanted = state;
197 spin_unlock_irqrestore(&ppd->lflags_lock, flags);
198 wait_event_interruptible_timeout(ppd->state_wait,
199 (ppd->lflags & state),
200 msecs_to_jiffies(msecs));
201 spin_lock_irqsave(&ppd->lflags_lock, flags);
202 ppd->state_wanted = 0;
203 spin_unlock_irqrestore(&ppd->lflags_lock, flags);
205 if (!(ppd->lflags & state))
213 int qib_set_linkstate(struct qib_pportdata *ppd, u8 newstate)
217 struct qib_devdata *dd = ppd->dd;
221 case QIB_IB_LINKDOWN_ONLY:
222 dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LSTATE,
223 IB_LINKCMD_DOWN | IB_LINKINITCMD_NOP);
228 case QIB_IB_LINKDOWN:
229 dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LSTATE,
230 IB_LINKCMD_DOWN | IB_LINKINITCMD_POLL);
235 case QIB_IB_LINKDOWN_SLEEP:
236 dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LSTATE,
237 IB_LINKCMD_DOWN | IB_LINKINITCMD_SLEEP);
242 case QIB_IB_LINKDOWN_DISABLE:
243 dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LSTATE,
244 IB_LINKCMD_DOWN | IB_LINKINITCMD_DISABLE);
250 if (ppd->lflags & QIBL_LINKARMED) {
254 if (!(ppd->lflags & (QIBL_LINKINIT | QIBL_LINKACTIVE))) {
259 * Since the port can be ACTIVE when we ask for ARMED,
260 * clear QIBL_LINKV so we can wait for a transition.
261 * If the link isn't ARMED, then something else happened
262 * and there is no point waiting for ARMED.
264 spin_lock_irqsave(&ppd->lflags_lock, flags);
265 ppd->lflags &= ~QIBL_LINKV;
266 spin_unlock_irqrestore(&ppd->lflags_lock, flags);
267 dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LSTATE,
268 IB_LINKCMD_ARMED | IB_LINKINITCMD_NOP);
272 case QIB_IB_LINKACTIVE:
273 if (ppd->lflags & QIBL_LINKACTIVE) {
277 if (!(ppd->lflags & QIBL_LINKARMED)) {
281 dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LSTATE,
282 IB_LINKCMD_ACTIVE | IB_LINKINITCMD_NOP);
283 lstate = QIBL_LINKACTIVE;
290 ret = qib_wait_linkstate(ppd, lstate, 10);
297 * Get address of eager buffer from it's index (allocated in chunks, not
300 static inline void *qib_get_egrbuf(const struct qib_ctxtdata *rcd, u32 etail)
302 const u32 chunk = etail >> rcd->rcvegrbufs_perchunk_shift;
303 const u32 idx = etail & ((u32)rcd->rcvegrbufs_perchunk - 1);
305 return rcd->rcvegrbuf[chunk] + (idx << rcd->dd->rcvegrbufsize_shift);
309 * Returns 1 if error was a CRC, else 0.
310 * Needed for some chip's synthesized error counters.
312 static u32 qib_rcv_hdrerr(struct qib_ctxtdata *rcd, struct qib_pportdata *ppd,
313 u32 ctxt, u32 eflags, u32 l, u32 etail,
314 __le32 *rhf_addr, struct qib_message_header *rhdr)
318 if (eflags & (QLOGIC_IB_RHF_H_ICRCERR | QLOGIC_IB_RHF_H_VCRCERR))
320 else if (eflags == QLOGIC_IB_RHF_H_TIDERR) {
321 /* For TIDERR and RC QPs premptively schedule a NAK */
322 struct ib_header *hdr = (struct ib_header *)rhdr;
323 struct ib_other_headers *ohdr = NULL;
324 struct qib_ibport *ibp = &ppd->ibport_data;
325 struct qib_devdata *dd = ppd->dd;
326 struct rvt_dev_info *rdi = &dd->verbs_dev.rdi;
327 struct rvt_qp *qp = NULL;
328 u32 tlen = qib_hdrget_length_in_bytes(rhf_addr);
329 u16 lid = be16_to_cpu(hdr->lrh[1]);
330 int lnh = be16_to_cpu(hdr->lrh[0]) & 3;
336 /* Sanity check packet */
340 if (lid < be16_to_cpu(IB_MULTICAST_LID_BASE)) {
341 lid &= ~((1 << ppd->lmc) - 1);
342 if (unlikely(lid != ppd->lid))
347 if (lnh == QIB_LRH_BTH)
349 else if (lnh == QIB_LRH_GRH) {
352 ohdr = &hdr->u.l.oth;
353 if (hdr->u.l.grh.next_hdr != IB_GRH_NEXT_HDR)
355 vtf = be32_to_cpu(hdr->u.l.grh.version_tclass_flow);
356 if ((vtf >> IB_GRH_VERSION_SHIFT) != IB_GRH_VERSION)
361 /* Get opcode and PSN from packet */
362 opcode = be32_to_cpu(ohdr->bth[0]);
364 psn = be32_to_cpu(ohdr->bth[2]);
366 /* Get the destination QP number. */
367 qp_num = be32_to_cpu(ohdr->bth[1]) & RVT_QPN_MASK;
368 if (qp_num != QIB_MULTICAST_QPN) {
372 qp = rvt_lookup_qpn(rdi, &ibp->rvp, qp_num);
379 * Handle only RC QPs - for other QP types drop error
382 spin_lock(&qp->r_lock);
384 /* Check for valid receive state. */
385 if (!(ib_rvt_state_ops[qp->state] &
386 RVT_PROCESS_RECV_OK)) {
387 ibp->rvp.n_pkt_drops++;
391 switch (qp->ibqp.qp_type) {
398 be32_to_cpu(ohdr->bth[0]));
402 /* Only deal with RDMA Writes for now */
404 IB_OPCODE_RC_RDMA_READ_RESPONSE_FIRST) {
405 diff = qib_cmp24(psn, qp->r_psn);
406 if (!qp->r_nak_state && diff >= 0) {
407 ibp->rvp.n_rc_seqnak++;
410 /* Use the expected PSN. */
411 qp->r_ack_psn = qp->r_psn;
413 * Wait to send the sequence
414 * NAK until all packets
415 * in the receive queue have
417 * Otherwise, we end up
418 * propagating congestion.
420 if (list_empty(&qp->rspwait)) {
428 } /* Out of sequence NAK */
429 } /* QP Request NAKs */
436 /* For now don't handle any other QP types */
441 spin_unlock(&qp->r_lock);
444 } /* Valid packet with TIDErr */
451 * qib_kreceive - receive a packet
452 * @rcd: the qlogic_ib context
453 * @llic: gets count of good packets needed to clear lli,
454 * (used with chips that need need to track crcs for lli)
456 * called from interrupt handler for errors or receive interrupt
457 * Returns number of CRC error packets, needed by some chips for
458 * local link integrity tracking. crcs are adjusted down by following
459 * good packets, if any, and count of good packets is also tracked.
461 u32 qib_kreceive(struct qib_ctxtdata *rcd, u32 *llic, u32 *npkts)
463 struct qib_devdata *dd = rcd->dd;
464 struct qib_pportdata *ppd = rcd->ppd;
467 const u32 rsize = dd->rcvhdrentsize; /* words */
468 const u32 maxcnt = dd->rcvhdrcnt * rsize; /* words */
469 u32 etail = -1, l, hdrqtail;
470 struct qib_message_header *hdr;
471 u32 eflags, etype, tlen, i = 0, updegr = 0, crcs = 0;
474 struct rvt_qp *qp, *nqp;
477 rhf_addr = (__le32 *) rcd->rcvhdrq + l + dd->rhf_offset;
478 if (dd->flags & QIB_NODMA_RTAIL) {
479 u32 seq = qib_hdrget_seq(rhf_addr);
481 if (seq != rcd->seq_cnt)
485 hdrqtail = qib_get_rcvhdrtail(rcd);
488 smp_rmb(); /* prevent speculative reads of dma'ed hdrq */
491 for (last = 0, i = 1; !last; i += !last) {
492 hdr = dd->f_get_msgheader(dd, rhf_addr);
493 eflags = qib_hdrget_err_flags(rhf_addr);
494 etype = qib_hdrget_rcv_type(rhf_addr);
496 tlen = qib_hdrget_length_in_bytes(rhf_addr);
498 if ((dd->flags & QIB_NODMA_RTAIL) ?
499 qib_hdrget_use_egr_buf(rhf_addr) :
500 (etype != RCVHQ_RCV_TYPE_EXPECTED)) {
501 etail = qib_hdrget_index(rhf_addr);
503 if (tlen > sizeof(*hdr) ||
504 etype >= RCVHQ_RCV_TYPE_NON_KD) {
505 ebuf = qib_get_egrbuf(rcd, etail);
506 prefetch_range(ebuf, tlen - sizeof(*hdr));
510 u16 lrh_len = be16_to_cpu(hdr->lrh[2]) << 2;
512 if (lrh_len != tlen) {
513 qib_stats.sps_lenerrs++;
517 if (etype == RCVHQ_RCV_TYPE_NON_KD && !eflags &&
519 tlen > (dd->rcvhdrentsize - 2 + 1 -
520 qib_hdrget_offset(rhf_addr)) << 2) {
525 * Both tiderr and qibhdrerr are set for all plain IB
526 * packets; only qibhdrerr should be set.
528 if (unlikely(eflags))
529 crcs += qib_rcv_hdrerr(rcd, ppd, rcd->ctxt, eflags, l,
530 etail, rhf_addr, hdr);
531 else if (etype == RCVHQ_RCV_TYPE_NON_KD) {
532 qib_ib_rcv(rcd, hdr, ebuf, tlen);
535 else if (llic && *llic)
542 if (i == QIB_MAX_PKT_RECV)
545 rhf_addr = (__le32 *) rcd->rcvhdrq + l + dd->rhf_offset;
546 if (dd->flags & QIB_NODMA_RTAIL) {
547 u32 seq = qib_hdrget_seq(rhf_addr);
549 if (++rcd->seq_cnt > 13)
551 if (seq != rcd->seq_cnt)
553 } else if (l == hdrqtail)
556 * Update head regs etc., every 16 packets, if not last pkt,
557 * to help prevent rcvhdrq overflows, when many packets
558 * are processed and queue is nearly full.
559 * Don't request an interrupt for intermediate updates.
562 if (!last && !(i & 0xf)) {
563 dd->f_update_usrhead(rcd, lval, updegr, etail, i);
571 * Iterate over all QPs waiting to respond.
572 * The list won't change since the IRQ is only run on one CPU.
574 list_for_each_entry_safe(qp, nqp, &rcd->qp_wait_list, rspwait) {
575 list_del_init(&qp->rspwait);
576 if (qp->r_flags & RVT_R_RSP_NAK) {
577 qp->r_flags &= ~RVT_R_RSP_NAK;
580 if (qp->r_flags & RVT_R_RSP_SEND) {
583 qp->r_flags &= ~RVT_R_RSP_SEND;
584 spin_lock_irqsave(&qp->s_lock, flags);
585 if (ib_rvt_state_ops[qp->state] &
586 RVT_PROCESS_OR_FLUSH_SEND)
587 qib_schedule_send(qp);
588 spin_unlock_irqrestore(&qp->s_lock, flags);
594 /* Report number of packets consumed */
599 * Always write head at end, and setup rcv interrupt, even
600 * if no packets were processed.
602 lval = (u64)rcd->head | dd->rhdrhead_intr_off;
603 dd->f_update_usrhead(rcd, lval, updegr, etail, i);
608 * qib_set_mtu - set the MTU
609 * @ppd: the perport data
612 * We can handle "any" incoming size, the issue here is whether we
613 * need to restrict our outgoing size. For now, we don't do any
614 * sanity checking on this, and we don't deal with what happens to
615 * programs that are already running when the size changes.
616 * NOTE: changing the MTU will usually cause the IBC to go back to
619 int qib_set_mtu(struct qib_pportdata *ppd, u16 arg)
624 if (arg != 256 && arg != 512 && arg != 1024 && arg != 2048 &&
629 chk = ib_mtu_enum_to_int(qib_ibmtu);
630 if (chk > 0 && arg > chk) {
635 piosize = ppd->ibmaxlen;
638 if (arg >= (piosize - QIB_PIO_MAXIBHDR)) {
639 /* Only if it's not the initial value (or reset to it) */
640 if (piosize != ppd->init_ibmaxlen) {
641 if (arg > piosize && arg <= ppd->init_ibmaxlen)
642 piosize = ppd->init_ibmaxlen - 2 * sizeof(u32);
643 ppd->ibmaxlen = piosize;
645 } else if ((arg + QIB_PIO_MAXIBHDR) != ppd->ibmaxlen) {
646 piosize = arg + QIB_PIO_MAXIBHDR - 2 * sizeof(u32);
647 ppd->ibmaxlen = piosize;
650 ppd->dd->f_set_ib_cfg(ppd, QIB_IB_CFG_MTU, 0);
658 int qib_set_lid(struct qib_pportdata *ppd, u32 lid, u8 lmc)
660 struct qib_devdata *dd = ppd->dd;
665 dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LIDLMC,
666 lid | (~((1U << lmc) - 1)) << 16);
668 qib_devinfo(dd->pcidev, "IB%u:%u got a lid: 0x%x\n",
669 dd->unit, ppd->port, lid);
675 * Following deal with the "obviously simple" task of overriding the state
676 * of the LEDS, which normally indicate link physical and logical status.
677 * The complications arise in dealing with different hardware mappings
678 * and the board-dependent routine being called from interrupts.
679 * and then there's the requirement to _flash_ them.
681 #define LED_OVER_FREQ_SHIFT 8
682 #define LED_OVER_FREQ_MASK (0xFF<<LED_OVER_FREQ_SHIFT)
683 /* Below is "non-zero" to force override, but both actual LEDs are off */
684 #define LED_OVER_BOTH_OFF (8)
686 static void qib_run_led_override(unsigned long opaque)
688 struct qib_pportdata *ppd = (struct qib_pportdata *)opaque;
689 struct qib_devdata *dd = ppd->dd;
693 if (!(dd->flags & QIB_INITTED))
696 ph_idx = ppd->led_override_phase++ & 1;
697 ppd->led_override = ppd->led_override_vals[ph_idx];
698 timeoff = ppd->led_override_timeoff;
700 dd->f_setextled(ppd, 1);
702 * don't re-fire the timer if user asked for it to be off; we let
703 * it fire one more time after they turn it off to simplify
705 if (ppd->led_override_vals[0] || ppd->led_override_vals[1])
706 mod_timer(&ppd->led_override_timer, jiffies + timeoff);
709 void qib_set_led_override(struct qib_pportdata *ppd, unsigned int val)
711 struct qib_devdata *dd = ppd->dd;
714 if (!(dd->flags & QIB_INITTED))
717 /* First check if we are blinking. If not, use 1HZ polling */
719 freq = (val & LED_OVER_FREQ_MASK) >> LED_OVER_FREQ_SHIFT;
722 /* For blink, set each phase from one nybble of val */
723 ppd->led_override_vals[0] = val & 0xF;
724 ppd->led_override_vals[1] = (val >> 4) & 0xF;
725 timeoff = (HZ << 4)/freq;
727 /* Non-blink set both phases the same. */
728 ppd->led_override_vals[0] = val & 0xF;
729 ppd->led_override_vals[1] = val & 0xF;
731 ppd->led_override_timeoff = timeoff;
734 * If the timer has not already been started, do so. Use a "quick"
735 * timeout so the function will be called soon, to look at our request.
737 if (atomic_inc_return(&ppd->led_override_timer_active) == 1) {
738 /* Need to start timer */
739 init_timer(&ppd->led_override_timer);
740 ppd->led_override_timer.function = qib_run_led_override;
741 ppd->led_override_timer.data = (unsigned long) ppd;
742 ppd->led_override_timer.expires = jiffies + 1;
743 add_timer(&ppd->led_override_timer);
745 if (ppd->led_override_vals[0] || ppd->led_override_vals[1])
746 mod_timer(&ppd->led_override_timer, jiffies + 1);
747 atomic_dec(&ppd->led_override_timer_active);
752 * qib_reset_device - reset the chip if possible
753 * @unit: the device to reset
755 * Whether or not reset is successful, we attempt to re-initialize the chip
756 * (that is, much like a driver unload/reload). We clear the INITTED flag
757 * so that the various entry points will fail until we reinitialize. For
758 * now, we only allow this if no user contexts are open that use chip resources
760 int qib_reset_device(int unit)
763 struct qib_devdata *dd = qib_lookup(unit);
764 struct qib_pportdata *ppd;
773 qib_devinfo(dd->pcidev, "Reset on unit %u requested\n", unit);
775 if (!dd->kregbase || !(dd->flags & QIB_PRESENT)) {
776 qib_devinfo(dd->pcidev,
777 "Invalid unit number %u or not initialized or not present\n",
783 spin_lock_irqsave(&dd->uctxt_lock, flags);
785 for (i = dd->first_user_ctxt; i < dd->cfgctxts; i++) {
786 if (!dd->rcd[i] || !dd->rcd[i]->cnt)
788 spin_unlock_irqrestore(&dd->uctxt_lock, flags);
792 spin_unlock_irqrestore(&dd->uctxt_lock, flags);
794 for (pidx = 0; pidx < dd->num_pports; ++pidx) {
795 ppd = dd->pport + pidx;
796 if (atomic_read(&ppd->led_override_timer_active)) {
797 /* Need to stop LED timer, _then_ shut off LEDs */
798 del_timer_sync(&ppd->led_override_timer);
799 atomic_set(&ppd->led_override_timer_active, 0);
802 /* Shut off LEDs after we are sure timer is not running */
803 ppd->led_override = LED_OVER_BOTH_OFF;
804 dd->f_setextled(ppd, 0);
805 if (dd->flags & QIB_HAS_SEND_DMA)
806 qib_teardown_sdma(ppd);
809 ret = dd->f_reset(dd);
811 ret = qib_init(dd, 1);
816 "Reinitialize unit %u after reset failed with %d\n",
819 qib_devinfo(dd->pcidev,
820 "Reinitialized unit %u after resetting\n",