2 * Disk Array driver for HP Smart Array SAS controllers
3 * Copyright 2016 Microsemi Corporation
4 * Copyright 2014-2015 PMC-Sierra, Inc.
5 * Copyright 2000,2009-2015 Hewlett-Packard Development Company, L.P.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
14 * NON INFRINGEMENT. See the GNU General Public License for more details.
20 #include <linux/module.h>
21 #include <linux/interrupt.h>
22 #include <linux/types.h>
23 #include <linux/pci.h>
24 #include <linux/pci-aspm.h>
25 #include <linux/kernel.h>
26 #include <linux/slab.h>
27 #include <linux/delay.h>
29 #include <linux/timer.h>
30 #include <linux/init.h>
31 #include <linux/spinlock.h>
32 #include <linux/compat.h>
33 #include <linux/blktrace_api.h>
34 #include <linux/uaccess.h>
36 #include <linux/dma-mapping.h>
37 #include <linux/completion.h>
38 #include <linux/moduleparam.h>
39 #include <scsi/scsi.h>
40 #include <scsi/scsi_cmnd.h>
41 #include <scsi/scsi_device.h>
42 #include <scsi/scsi_host.h>
43 #include <scsi/scsi_tcq.h>
44 #include <scsi/scsi_eh.h>
45 #include <scsi/scsi_transport_sas.h>
46 #include <scsi/scsi_dbg.h>
47 #include <linux/cciss_ioctl.h>
48 #include <linux/string.h>
49 #include <linux/bitmap.h>
50 #include <linux/atomic.h>
51 #include <linux/jiffies.h>
52 #include <linux/percpu-defs.h>
53 #include <linux/percpu.h>
54 #include <asm/unaligned.h>
55 #include <asm/div64.h>
60 * HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.'
61 * with an optional trailing '-' followed by a byte value (0-255).
63 #define HPSA_DRIVER_VERSION "3.4.20-125"
64 #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
67 /* How long to wait for CISS doorbell communication */
68 #define CLEAR_EVENT_WAIT_INTERVAL 20 /* ms for each msleep() call */
69 #define MODE_CHANGE_WAIT_INTERVAL 10 /* ms for each msleep() call */
70 #define MAX_CLEAR_EVENT_WAIT 30000 /* times 20 ms = 600 s */
71 #define MAX_MODE_CHANGE_WAIT 2000 /* times 10 ms = 20 s */
72 #define MAX_IOCTL_CONFIG_WAIT 1000
74 /*define how many times we will try a command because of bus resets */
75 #define MAX_CMD_RETRIES 3
77 /* Embedded module documentation macros - see modules.h */
78 MODULE_AUTHOR("Hewlett-Packard Company");
79 MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
81 MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
82 MODULE_VERSION(HPSA_DRIVER_VERSION);
83 MODULE_LICENSE("GPL");
84 MODULE_ALIAS("cciss");
86 static int hpsa_simple_mode;
87 module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
88 MODULE_PARM_DESC(hpsa_simple_mode,
89 "Use 'simple mode' rather than 'performant mode'");
91 /* define the PCI info for the cards we can control */
92 static const struct pci_device_id hpsa_pci_device_id[] = {
93 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
94 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
95 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
96 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
97 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
98 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324A},
99 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324B},
100 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233},
101 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350},
102 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351},
103 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352},
104 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353},
105 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354},
106 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355},
107 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356},
108 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103c, 0x1920},
109 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1921},
110 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1922},
111 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1923},
112 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1924},
113 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103c, 0x1925},
114 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1926},
115 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1928},
116 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1929},
117 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BD},
118 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BE},
119 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BF},
120 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C0},
121 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C1},
122 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C2},
123 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C3},
124 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C4},
125 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C5},
126 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C6},
127 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C7},
128 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C8},
129 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C9},
130 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CA},
131 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CB},
132 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CC},
133 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CD},
134 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CE},
135 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0580},
136 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0581},
137 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0582},
138 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0583},
139 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0584},
140 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0585},
141 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0076},
142 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0087},
143 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x007D},
144 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0088},
145 {PCI_VENDOR_ID_HP, 0x333f, 0x103c, 0x333f},
146 {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
147 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
148 {PCI_VENDOR_ID_COMPAQ, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
149 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
153 MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
155 /* board_id = Subsystem Device ID & Vendor ID
156 * product = Marketing Name for the board
157 * access = Address of the struct of function pointers
159 static struct board_type products[] = {
160 {0x40700E11, "Smart Array 5300", &SA5A_access},
161 {0x40800E11, "Smart Array 5i", &SA5B_access},
162 {0x40820E11, "Smart Array 532", &SA5B_access},
163 {0x40830E11, "Smart Array 5312", &SA5B_access},
164 {0x409A0E11, "Smart Array 641", &SA5A_access},
165 {0x409B0E11, "Smart Array 642", &SA5A_access},
166 {0x409C0E11, "Smart Array 6400", &SA5A_access},
167 {0x409D0E11, "Smart Array 6400 EM", &SA5A_access},
168 {0x40910E11, "Smart Array 6i", &SA5A_access},
169 {0x3225103C, "Smart Array P600", &SA5A_access},
170 {0x3223103C, "Smart Array P800", &SA5A_access},
171 {0x3234103C, "Smart Array P400", &SA5A_access},
172 {0x3235103C, "Smart Array P400i", &SA5A_access},
173 {0x3211103C, "Smart Array E200i", &SA5A_access},
174 {0x3212103C, "Smart Array E200", &SA5A_access},
175 {0x3213103C, "Smart Array E200i", &SA5A_access},
176 {0x3214103C, "Smart Array E200i", &SA5A_access},
177 {0x3215103C, "Smart Array E200i", &SA5A_access},
178 {0x3237103C, "Smart Array E500", &SA5A_access},
179 {0x323D103C, "Smart Array P700m", &SA5A_access},
180 {0x3241103C, "Smart Array P212", &SA5_access},
181 {0x3243103C, "Smart Array P410", &SA5_access},
182 {0x3245103C, "Smart Array P410i", &SA5_access},
183 {0x3247103C, "Smart Array P411", &SA5_access},
184 {0x3249103C, "Smart Array P812", &SA5_access},
185 {0x324A103C, "Smart Array P712m", &SA5_access},
186 {0x324B103C, "Smart Array P711m", &SA5_access},
187 {0x3233103C, "HP StorageWorks 1210m", &SA5_access}, /* alias of 333f */
188 {0x3350103C, "Smart Array P222", &SA5_access},
189 {0x3351103C, "Smart Array P420", &SA5_access},
190 {0x3352103C, "Smart Array P421", &SA5_access},
191 {0x3353103C, "Smart Array P822", &SA5_access},
192 {0x3354103C, "Smart Array P420i", &SA5_access},
193 {0x3355103C, "Smart Array P220i", &SA5_access},
194 {0x3356103C, "Smart Array P721m", &SA5_access},
195 {0x1920103C, "Smart Array P430i", &SA5_access},
196 {0x1921103C, "Smart Array P830i", &SA5_access},
197 {0x1922103C, "Smart Array P430", &SA5_access},
198 {0x1923103C, "Smart Array P431", &SA5_access},
199 {0x1924103C, "Smart Array P830", &SA5_access},
200 {0x1925103C, "Smart Array P831", &SA5_access},
201 {0x1926103C, "Smart Array P731m", &SA5_access},
202 {0x1928103C, "Smart Array P230i", &SA5_access},
203 {0x1929103C, "Smart Array P530", &SA5_access},
204 {0x21BD103C, "Smart Array P244br", &SA5_access},
205 {0x21BE103C, "Smart Array P741m", &SA5_access},
206 {0x21BF103C, "Smart HBA H240ar", &SA5_access},
207 {0x21C0103C, "Smart Array P440ar", &SA5_access},
208 {0x21C1103C, "Smart Array P840ar", &SA5_access},
209 {0x21C2103C, "Smart Array P440", &SA5_access},
210 {0x21C3103C, "Smart Array P441", &SA5_access},
211 {0x21C4103C, "Smart Array", &SA5_access},
212 {0x21C5103C, "Smart Array P841", &SA5_access},
213 {0x21C6103C, "Smart HBA H244br", &SA5_access},
214 {0x21C7103C, "Smart HBA H240", &SA5_access},
215 {0x21C8103C, "Smart HBA H241", &SA5_access},
216 {0x21C9103C, "Smart Array", &SA5_access},
217 {0x21CA103C, "Smart Array P246br", &SA5_access},
218 {0x21CB103C, "Smart Array P840", &SA5_access},
219 {0x21CC103C, "Smart Array", &SA5_access},
220 {0x21CD103C, "Smart Array", &SA5_access},
221 {0x21CE103C, "Smart HBA", &SA5_access},
222 {0x05809005, "SmartHBA-SA", &SA5_access},
223 {0x05819005, "SmartHBA-SA 8i", &SA5_access},
224 {0x05829005, "SmartHBA-SA 8i8e", &SA5_access},
225 {0x05839005, "SmartHBA-SA 8e", &SA5_access},
226 {0x05849005, "SmartHBA-SA 16i", &SA5_access},
227 {0x05859005, "SmartHBA-SA 4i4e", &SA5_access},
228 {0x00761590, "HP Storage P1224 Array Controller", &SA5_access},
229 {0x00871590, "HP Storage P1224e Array Controller", &SA5_access},
230 {0x007D1590, "HP Storage P1228 Array Controller", &SA5_access},
231 {0x00881590, "HP Storage P1228e Array Controller", &SA5_access},
232 {0x333f103c, "HP StorageWorks 1210m Array Controller", &SA5_access},
233 {0xFFFF103C, "Unknown Smart Array", &SA5_access},
236 static struct scsi_transport_template *hpsa_sas_transport_template;
237 static int hpsa_add_sas_host(struct ctlr_info *h);
238 static void hpsa_delete_sas_host(struct ctlr_info *h);
239 static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node,
240 struct hpsa_scsi_dev_t *device);
241 static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device);
242 static struct hpsa_scsi_dev_t
243 *hpsa_find_device_by_sas_rphy(struct ctlr_info *h,
244 struct sas_rphy *rphy);
246 #define SCSI_CMD_BUSY ((struct scsi_cmnd *)&hpsa_cmd_busy)
247 static const struct scsi_cmnd hpsa_cmd_busy;
248 #define SCSI_CMD_IDLE ((struct scsi_cmnd *)&hpsa_cmd_idle)
249 static const struct scsi_cmnd hpsa_cmd_idle;
250 static int number_of_controllers;
252 static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
253 static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
254 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg);
257 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd,
261 static void cmd_free(struct ctlr_info *h, struct CommandList *c);
262 static struct CommandList *cmd_alloc(struct ctlr_info *h);
263 static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c);
264 static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h,
265 struct scsi_cmnd *scmd);
266 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
267 void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
269 static void hpsa_free_cmd_pool(struct ctlr_info *h);
270 #define VPD_PAGE (1 << 8)
271 #define HPSA_SIMPLE_ERROR_BITS 0x03
273 static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
274 static void hpsa_scan_start(struct Scsi_Host *);
275 static int hpsa_scan_finished(struct Scsi_Host *sh,
276 unsigned long elapsed_time);
277 static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth);
279 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
280 static int hpsa_slave_alloc(struct scsi_device *sdev);
281 static int hpsa_slave_configure(struct scsi_device *sdev);
282 static void hpsa_slave_destroy(struct scsi_device *sdev);
284 static void hpsa_update_scsi_devices(struct ctlr_info *h);
285 static int check_for_unit_attention(struct ctlr_info *h,
286 struct CommandList *c);
287 static void check_ioctl_unit_attention(struct ctlr_info *h,
288 struct CommandList *c);
289 /* performant mode helper functions */
290 static void calc_bucket_map(int *bucket, int num_buckets,
291 int nsgs, int min_blocks, u32 *bucket_map);
292 static void hpsa_free_performant_mode(struct ctlr_info *h);
293 static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
294 static inline u32 next_command(struct ctlr_info *h, u8 q);
295 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
296 u32 *cfg_base_addr, u64 *cfg_base_addr_index,
298 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
299 unsigned long *memory_bar);
300 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id,
302 static int wait_for_device_to_become_ready(struct ctlr_info *h,
303 unsigned char lunaddr[],
305 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
307 static inline void finish_cmd(struct CommandList *c);
308 static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h);
309 #define BOARD_NOT_READY 0
310 #define BOARD_READY 1
311 static void hpsa_drain_accel_commands(struct ctlr_info *h);
312 static void hpsa_flush_cache(struct ctlr_info *h);
313 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
314 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
315 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk);
316 static void hpsa_command_resubmit_worker(struct work_struct *work);
317 static u32 lockup_detected(struct ctlr_info *h);
318 static int detect_controller_lockup(struct ctlr_info *h);
319 static void hpsa_disable_rld_caching(struct ctlr_info *h);
320 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
321 struct ReportExtendedLUNdata *buf, int bufsize);
322 static bool hpsa_vpd_page_supported(struct ctlr_info *h,
323 unsigned char scsi3addr[], u8 page);
324 static int hpsa_luns_changed(struct ctlr_info *h);
325 static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c,
326 struct hpsa_scsi_dev_t *dev,
327 unsigned char *scsi3addr);
329 static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
331 unsigned long *priv = shost_priv(sdev->host);
332 return (struct ctlr_info *) *priv;
335 static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
337 unsigned long *priv = shost_priv(sh);
338 return (struct ctlr_info *) *priv;
341 static inline bool hpsa_is_cmd_idle(struct CommandList *c)
343 return c->scsi_cmd == SCSI_CMD_IDLE;
346 static inline bool hpsa_is_pending_event(struct CommandList *c)
348 return c->reset_pending;
351 /* extract sense key, asc, and ascq from sense data. -1 means invalid. */
352 static void decode_sense_data(const u8 *sense_data, int sense_data_len,
353 u8 *sense_key, u8 *asc, u8 *ascq)
355 struct scsi_sense_hdr sshdr;
362 if (sense_data_len < 1)
365 rc = scsi_normalize_sense(sense_data, sense_data_len, &sshdr);
367 *sense_key = sshdr.sense_key;
373 static int check_for_unit_attention(struct ctlr_info *h,
374 struct CommandList *c)
376 u8 sense_key, asc, ascq;
379 if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo))
380 sense_len = sizeof(c->err_info->SenseInfo);
382 sense_len = c->err_info->SenseLen;
384 decode_sense_data(c->err_info->SenseInfo, sense_len,
385 &sense_key, &asc, &ascq);
386 if (sense_key != UNIT_ATTENTION || asc == 0xff)
391 dev_warn(&h->pdev->dev,
392 "%s: a state change detected, command retried\n",
396 dev_warn(&h->pdev->dev,
397 "%s: LUN failure detected\n", h->devname);
399 case REPORT_LUNS_CHANGED:
400 dev_warn(&h->pdev->dev,
401 "%s: report LUN data changed\n", h->devname);
403 * Note: this REPORT_LUNS_CHANGED condition only occurs on the external
404 * target (array) devices.
408 dev_warn(&h->pdev->dev,
409 "%s: a power on or device reset detected\n",
412 case UNIT_ATTENTION_CLEARED:
413 dev_warn(&h->pdev->dev,
414 "%s: unit attention cleared by another initiator\n",
418 dev_warn(&h->pdev->dev,
419 "%s: unknown unit attention detected\n",
426 static int check_for_busy(struct ctlr_info *h, struct CommandList *c)
428 if (c->err_info->CommandStatus != CMD_TARGET_STATUS ||
429 (c->err_info->ScsiStatus != SAM_STAT_BUSY &&
430 c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL))
432 dev_warn(&h->pdev->dev, HPSA "device busy");
436 static u32 lockup_detected(struct ctlr_info *h);
437 static ssize_t host_show_lockup_detected(struct device *dev,
438 struct device_attribute *attr, char *buf)
442 struct Scsi_Host *shost = class_to_shost(dev);
444 h = shost_to_hba(shost);
445 ld = lockup_detected(h);
447 return sprintf(buf, "ld=%d\n", ld);
450 static ssize_t host_store_hp_ssd_smart_path_status(struct device *dev,
451 struct device_attribute *attr,
452 const char *buf, size_t count)
456 struct Scsi_Host *shost = class_to_shost(dev);
459 if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
461 len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
462 strncpy(tmpbuf, buf, len);
464 if (sscanf(tmpbuf, "%d", &status) != 1)
466 h = shost_to_hba(shost);
467 h->acciopath_status = !!status;
468 dev_warn(&h->pdev->dev,
469 "hpsa: HP SSD Smart Path %s via sysfs update.\n",
470 h->acciopath_status ? "enabled" : "disabled");
474 static ssize_t host_store_raid_offload_debug(struct device *dev,
475 struct device_attribute *attr,
476 const char *buf, size_t count)
478 int debug_level, len;
480 struct Scsi_Host *shost = class_to_shost(dev);
483 if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
485 len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
486 strncpy(tmpbuf, buf, len);
488 if (sscanf(tmpbuf, "%d", &debug_level) != 1)
492 h = shost_to_hba(shost);
493 h->raid_offload_debug = debug_level;
494 dev_warn(&h->pdev->dev, "hpsa: Set raid_offload_debug level = %d\n",
495 h->raid_offload_debug);
499 static ssize_t host_store_rescan(struct device *dev,
500 struct device_attribute *attr,
501 const char *buf, size_t count)
504 struct Scsi_Host *shost = class_to_shost(dev);
505 h = shost_to_hba(shost);
506 hpsa_scan_start(h->scsi_host);
510 static ssize_t host_show_firmware_revision(struct device *dev,
511 struct device_attribute *attr, char *buf)
514 struct Scsi_Host *shost = class_to_shost(dev);
515 unsigned char *fwrev;
517 h = shost_to_hba(shost);
518 if (!h->hba_inquiry_data)
520 fwrev = &h->hba_inquiry_data[32];
521 return snprintf(buf, 20, "%c%c%c%c\n",
522 fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
525 static ssize_t host_show_commands_outstanding(struct device *dev,
526 struct device_attribute *attr, char *buf)
528 struct Scsi_Host *shost = class_to_shost(dev);
529 struct ctlr_info *h = shost_to_hba(shost);
531 return snprintf(buf, 20, "%d\n",
532 atomic_read(&h->commands_outstanding));
535 static ssize_t host_show_transport_mode(struct device *dev,
536 struct device_attribute *attr, char *buf)
539 struct Scsi_Host *shost = class_to_shost(dev);
541 h = shost_to_hba(shost);
542 return snprintf(buf, 20, "%s\n",
543 h->transMethod & CFGTBL_Trans_Performant ?
544 "performant" : "simple");
547 static ssize_t host_show_hp_ssd_smart_path_status(struct device *dev,
548 struct device_attribute *attr, char *buf)
551 struct Scsi_Host *shost = class_to_shost(dev);
553 h = shost_to_hba(shost);
554 return snprintf(buf, 30, "HP SSD Smart Path %s\n",
555 (h->acciopath_status == 1) ? "enabled" : "disabled");
558 /* List of controllers which cannot be hard reset on kexec with reset_devices */
559 static u32 unresettable_controller[] = {
560 0x324a103C, /* Smart Array P712m */
561 0x324b103C, /* Smart Array P711m */
562 0x3223103C, /* Smart Array P800 */
563 0x3234103C, /* Smart Array P400 */
564 0x3235103C, /* Smart Array P400i */
565 0x3211103C, /* Smart Array E200i */
566 0x3212103C, /* Smart Array E200 */
567 0x3213103C, /* Smart Array E200i */
568 0x3214103C, /* Smart Array E200i */
569 0x3215103C, /* Smart Array E200i */
570 0x3237103C, /* Smart Array E500 */
571 0x323D103C, /* Smart Array P700m */
572 0x40800E11, /* Smart Array 5i */
573 0x409C0E11, /* Smart Array 6400 */
574 0x409D0E11, /* Smart Array 6400 EM */
575 0x40700E11, /* Smart Array 5300 */
576 0x40820E11, /* Smart Array 532 */
577 0x40830E11, /* Smart Array 5312 */
578 0x409A0E11, /* Smart Array 641 */
579 0x409B0E11, /* Smart Array 642 */
580 0x40910E11, /* Smart Array 6i */
583 /* List of controllers which cannot even be soft reset */
584 static u32 soft_unresettable_controller[] = {
585 0x40800E11, /* Smart Array 5i */
586 0x40700E11, /* Smart Array 5300 */
587 0x40820E11, /* Smart Array 532 */
588 0x40830E11, /* Smart Array 5312 */
589 0x409A0E11, /* Smart Array 641 */
590 0x409B0E11, /* Smart Array 642 */
591 0x40910E11, /* Smart Array 6i */
592 /* Exclude 640x boards. These are two pci devices in one slot
593 * which share a battery backed cache module. One controls the
594 * cache, the other accesses the cache through the one that controls
595 * it. If we reset the one controlling the cache, the other will
596 * likely not be happy. Just forbid resetting this conjoined mess.
597 * The 640x isn't really supported by hpsa anyway.
599 0x409C0E11, /* Smart Array 6400 */
600 0x409D0E11, /* Smart Array 6400 EM */
603 static int board_id_in_array(u32 a[], int nelems, u32 board_id)
607 for (i = 0; i < nelems; i++)
608 if (a[i] == board_id)
613 static int ctlr_is_hard_resettable(u32 board_id)
615 return !board_id_in_array(unresettable_controller,
616 ARRAY_SIZE(unresettable_controller), board_id);
619 static int ctlr_is_soft_resettable(u32 board_id)
621 return !board_id_in_array(soft_unresettable_controller,
622 ARRAY_SIZE(soft_unresettable_controller), board_id);
625 static int ctlr_is_resettable(u32 board_id)
627 return ctlr_is_hard_resettable(board_id) ||
628 ctlr_is_soft_resettable(board_id);
631 static ssize_t host_show_resettable(struct device *dev,
632 struct device_attribute *attr, char *buf)
635 struct Scsi_Host *shost = class_to_shost(dev);
637 h = shost_to_hba(shost);
638 return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
641 static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
643 return (scsi3addr[3] & 0xC0) == 0x40;
646 static const char * const raid_label[] = { "0", "4", "1(+0)", "5", "5+1", "6",
647 "1(+0)ADM", "UNKNOWN", "PHYS DRV"
649 #define HPSA_RAID_0 0
650 #define HPSA_RAID_4 1
651 #define HPSA_RAID_1 2 /* also used for RAID 10 */
652 #define HPSA_RAID_5 3 /* also used for RAID 50 */
653 #define HPSA_RAID_51 4
654 #define HPSA_RAID_6 5 /* also used for RAID 60 */
655 #define HPSA_RAID_ADM 6 /* also used for RAID 1+0 ADM */
656 #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 2)
657 #define PHYSICAL_DRIVE (ARRAY_SIZE(raid_label) - 1)
659 static inline bool is_logical_device(struct hpsa_scsi_dev_t *device)
661 return !device->physical_device;
664 static ssize_t raid_level_show(struct device *dev,
665 struct device_attribute *attr, char *buf)
668 unsigned char rlevel;
670 struct scsi_device *sdev;
671 struct hpsa_scsi_dev_t *hdev;
674 sdev = to_scsi_device(dev);
675 h = sdev_to_hba(sdev);
676 spin_lock_irqsave(&h->lock, flags);
677 hdev = sdev->hostdata;
679 spin_unlock_irqrestore(&h->lock, flags);
683 /* Is this even a logical drive? */
684 if (!is_logical_device(hdev)) {
685 spin_unlock_irqrestore(&h->lock, flags);
686 l = snprintf(buf, PAGE_SIZE, "N/A\n");
690 rlevel = hdev->raid_level;
691 spin_unlock_irqrestore(&h->lock, flags);
692 if (rlevel > RAID_UNKNOWN)
693 rlevel = RAID_UNKNOWN;
694 l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
698 static ssize_t lunid_show(struct device *dev,
699 struct device_attribute *attr, char *buf)
702 struct scsi_device *sdev;
703 struct hpsa_scsi_dev_t *hdev;
705 unsigned char lunid[8];
707 sdev = to_scsi_device(dev);
708 h = sdev_to_hba(sdev);
709 spin_lock_irqsave(&h->lock, flags);
710 hdev = sdev->hostdata;
712 spin_unlock_irqrestore(&h->lock, flags);
715 memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
716 spin_unlock_irqrestore(&h->lock, flags);
717 return snprintf(buf, 20, "0x%8phN\n", lunid);
720 static ssize_t unique_id_show(struct device *dev,
721 struct device_attribute *attr, char *buf)
724 struct scsi_device *sdev;
725 struct hpsa_scsi_dev_t *hdev;
727 unsigned char sn[16];
729 sdev = to_scsi_device(dev);
730 h = sdev_to_hba(sdev);
731 spin_lock_irqsave(&h->lock, flags);
732 hdev = sdev->hostdata;
734 spin_unlock_irqrestore(&h->lock, flags);
737 memcpy(sn, hdev->device_id, sizeof(sn));
738 spin_unlock_irqrestore(&h->lock, flags);
739 return snprintf(buf, 16 * 2 + 2,
740 "%02X%02X%02X%02X%02X%02X%02X%02X"
741 "%02X%02X%02X%02X%02X%02X%02X%02X\n",
742 sn[0], sn[1], sn[2], sn[3],
743 sn[4], sn[5], sn[6], sn[7],
744 sn[8], sn[9], sn[10], sn[11],
745 sn[12], sn[13], sn[14], sn[15]);
748 static ssize_t sas_address_show(struct device *dev,
749 struct device_attribute *attr, char *buf)
752 struct scsi_device *sdev;
753 struct hpsa_scsi_dev_t *hdev;
757 sdev = to_scsi_device(dev);
758 h = sdev_to_hba(sdev);
759 spin_lock_irqsave(&h->lock, flags);
760 hdev = sdev->hostdata;
761 if (!hdev || is_logical_device(hdev) || !hdev->expose_device) {
762 spin_unlock_irqrestore(&h->lock, flags);
765 sas_address = hdev->sas_address;
766 spin_unlock_irqrestore(&h->lock, flags);
768 return snprintf(buf, PAGE_SIZE, "0x%016llx\n", sas_address);
771 static ssize_t host_show_hp_ssd_smart_path_enabled(struct device *dev,
772 struct device_attribute *attr, char *buf)
775 struct scsi_device *sdev;
776 struct hpsa_scsi_dev_t *hdev;
780 sdev = to_scsi_device(dev);
781 h = sdev_to_hba(sdev);
782 spin_lock_irqsave(&h->lock, flags);
783 hdev = sdev->hostdata;
785 spin_unlock_irqrestore(&h->lock, flags);
788 offload_enabled = hdev->offload_enabled;
789 spin_unlock_irqrestore(&h->lock, flags);
791 if (hdev->devtype == TYPE_DISK || hdev->devtype == TYPE_ZBC)
792 return snprintf(buf, 20, "%d\n", offload_enabled);
794 return snprintf(buf, 40, "%s\n",
795 "Not applicable for a controller");
799 static ssize_t path_info_show(struct device *dev,
800 struct device_attribute *attr, char *buf)
803 struct scsi_device *sdev;
804 struct hpsa_scsi_dev_t *hdev;
810 u8 path_map_index = 0;
812 unsigned char phys_connector[2];
814 sdev = to_scsi_device(dev);
815 h = sdev_to_hba(sdev);
816 spin_lock_irqsave(&h->devlock, flags);
817 hdev = sdev->hostdata;
819 spin_unlock_irqrestore(&h->devlock, flags);
824 for (i = 0; i < MAX_PATHS; i++) {
825 path_map_index = 1<<i;
826 if (i == hdev->active_path_index)
828 else if (hdev->path_map & path_map_index)
833 output_len += scnprintf(buf + output_len,
834 PAGE_SIZE - output_len,
835 "[%d:%d:%d:%d] %20.20s ",
836 h->scsi_host->host_no,
837 hdev->bus, hdev->target, hdev->lun,
838 scsi_device_type(hdev->devtype));
840 if (hdev->devtype == TYPE_RAID || is_logical_device(hdev)) {
841 output_len += scnprintf(buf + output_len,
842 PAGE_SIZE - output_len,
848 memcpy(&phys_connector, &hdev->phys_connector[i],
849 sizeof(phys_connector));
850 if (phys_connector[0] < '0')
851 phys_connector[0] = '0';
852 if (phys_connector[1] < '0')
853 phys_connector[1] = '0';
854 output_len += scnprintf(buf + output_len,
855 PAGE_SIZE - output_len,
858 if ((hdev->devtype == TYPE_DISK || hdev->devtype == TYPE_ZBC) &&
859 hdev->expose_device) {
860 if (box == 0 || box == 0xFF) {
861 output_len += scnprintf(buf + output_len,
862 PAGE_SIZE - output_len,
866 output_len += scnprintf(buf + output_len,
867 PAGE_SIZE - output_len,
868 "BOX: %hhu BAY: %hhu %s\n",
871 } else if (box != 0 && box != 0xFF) {
872 output_len += scnprintf(buf + output_len,
873 PAGE_SIZE - output_len, "BOX: %hhu %s\n",
876 output_len += scnprintf(buf + output_len,
877 PAGE_SIZE - output_len, "%s\n", active);
880 spin_unlock_irqrestore(&h->devlock, flags);
884 static ssize_t host_show_ctlr_num(struct device *dev,
885 struct device_attribute *attr, char *buf)
888 struct Scsi_Host *shost = class_to_shost(dev);
890 h = shost_to_hba(shost);
891 return snprintf(buf, 20, "%d\n", h->ctlr);
894 static ssize_t host_show_legacy_board(struct device *dev,
895 struct device_attribute *attr, char *buf)
898 struct Scsi_Host *shost = class_to_shost(dev);
900 h = shost_to_hba(shost);
901 return snprintf(buf, 20, "%d\n", h->legacy_board ? 1 : 0);
904 static DEVICE_ATTR_RO(raid_level);
905 static DEVICE_ATTR_RO(lunid);
906 static DEVICE_ATTR_RO(unique_id);
907 static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
908 static DEVICE_ATTR_RO(sas_address);
909 static DEVICE_ATTR(hp_ssd_smart_path_enabled, S_IRUGO,
910 host_show_hp_ssd_smart_path_enabled, NULL);
911 static DEVICE_ATTR_RO(path_info);
912 static DEVICE_ATTR(hp_ssd_smart_path_status, S_IWUSR|S_IRUGO|S_IROTH,
913 host_show_hp_ssd_smart_path_status,
914 host_store_hp_ssd_smart_path_status);
915 static DEVICE_ATTR(raid_offload_debug, S_IWUSR, NULL,
916 host_store_raid_offload_debug);
917 static DEVICE_ATTR(firmware_revision, S_IRUGO,
918 host_show_firmware_revision, NULL);
919 static DEVICE_ATTR(commands_outstanding, S_IRUGO,
920 host_show_commands_outstanding, NULL);
921 static DEVICE_ATTR(transport_mode, S_IRUGO,
922 host_show_transport_mode, NULL);
923 static DEVICE_ATTR(resettable, S_IRUGO,
924 host_show_resettable, NULL);
925 static DEVICE_ATTR(lockup_detected, S_IRUGO,
926 host_show_lockup_detected, NULL);
927 static DEVICE_ATTR(ctlr_num, S_IRUGO,
928 host_show_ctlr_num, NULL);
929 static DEVICE_ATTR(legacy_board, S_IRUGO,
930 host_show_legacy_board, NULL);
932 static struct device_attribute *hpsa_sdev_attrs[] = {
933 &dev_attr_raid_level,
936 &dev_attr_hp_ssd_smart_path_enabled,
938 &dev_attr_sas_address,
942 static struct device_attribute *hpsa_shost_attrs[] = {
944 &dev_attr_firmware_revision,
945 &dev_attr_commands_outstanding,
946 &dev_attr_transport_mode,
947 &dev_attr_resettable,
948 &dev_attr_hp_ssd_smart_path_status,
949 &dev_attr_raid_offload_debug,
950 &dev_attr_lockup_detected,
952 &dev_attr_legacy_board,
956 #define HPSA_NRESERVED_CMDS (HPSA_CMDS_RESERVED_FOR_DRIVER +\
957 HPSA_MAX_CONCURRENT_PASSTHRUS)
959 static struct scsi_host_template hpsa_driver_template = {
960 .module = THIS_MODULE,
963 .queuecommand = hpsa_scsi_queue_command,
964 .scan_start = hpsa_scan_start,
965 .scan_finished = hpsa_scan_finished,
966 .change_queue_depth = hpsa_change_queue_depth,
968 .use_clustering = ENABLE_CLUSTERING,
969 .eh_device_reset_handler = hpsa_eh_device_reset_handler,
971 .slave_alloc = hpsa_slave_alloc,
972 .slave_configure = hpsa_slave_configure,
973 .slave_destroy = hpsa_slave_destroy,
975 .compat_ioctl = hpsa_compat_ioctl,
977 .sdev_attrs = hpsa_sdev_attrs,
978 .shost_attrs = hpsa_shost_attrs,
983 static inline u32 next_command(struct ctlr_info *h, u8 q)
986 struct reply_queue_buffer *rq = &h->reply_queue[q];
988 if (h->transMethod & CFGTBL_Trans_io_accel1)
989 return h->access.command_completed(h, q);
991 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
992 return h->access.command_completed(h, q);
994 if ((rq->head[rq->current_entry] & 1) == rq->wraparound) {
995 a = rq->head[rq->current_entry];
997 atomic_dec(&h->commands_outstanding);
1001 /* Check for wraparound */
1002 if (rq->current_entry == h->max_commands) {
1003 rq->current_entry = 0;
1004 rq->wraparound ^= 1;
1010 * There are some special bits in the bus address of the
1011 * command that we have to set for the controller to know
1012 * how to process the command:
1014 * Normal performant mode:
1015 * bit 0: 1 means performant mode, 0 means simple mode.
1016 * bits 1-3 = block fetch table entry
1017 * bits 4-6 = command type (== 0)
1020 * bit 0 = "performant mode" bit.
1021 * bits 1-3 = block fetch table entry
1022 * bits 4-6 = command type (== 110)
1023 * (command type is needed because ioaccel1 mode
1024 * commands are submitted through the same register as normal
1025 * mode commands, so this is how the controller knows whether
1026 * the command is normal mode or ioaccel1 mode.)
1029 * bit 0 = "performant mode" bit.
1030 * bits 1-4 = block fetch table entry (note extra bit)
1031 * bits 4-6 = not needed, because ioaccel2 mode has
1032 * a separate special register for submitting commands.
1036 * set_performant_mode: Modify the tag for cciss performant
1037 * set bit 0 for pull model, bits 3-1 for block fetch
1040 #define DEFAULT_REPLY_QUEUE (-1)
1041 static void set_performant_mode(struct ctlr_info *h, struct CommandList *c,
1044 if (likely(h->transMethod & CFGTBL_Trans_Performant)) {
1045 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
1046 if (unlikely(!h->msix_vectors))
1048 c->Header.ReplyQueue = reply_queue;
1052 static void set_ioaccel1_performant_mode(struct ctlr_info *h,
1053 struct CommandList *c,
1056 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
1059 * Tell the controller to post the reply to the queue for this
1060 * processor. This seems to give the best I/O throughput.
1062 cp->ReplyQueue = reply_queue;
1064 * Set the bits in the address sent down to include:
1065 * - performant mode bit (bit 0)
1066 * - pull count (bits 1-3)
1067 * - command type (bits 4-6)
1069 c->busaddr |= 1 | (h->ioaccel1_blockFetchTable[c->Header.SGList] << 1) |
1070 IOACCEL1_BUSADDR_CMDTYPE;
1073 static void set_ioaccel2_tmf_performant_mode(struct ctlr_info *h,
1074 struct CommandList *c,
1077 struct hpsa_tmf_struct *cp = (struct hpsa_tmf_struct *)
1078 &h->ioaccel2_cmd_pool[c->cmdindex];
1080 /* Tell the controller to post the reply to the queue for this
1081 * processor. This seems to give the best I/O throughput.
1083 cp->reply_queue = reply_queue;
1084 /* Set the bits in the address sent down to include:
1085 * - performant mode bit not used in ioaccel mode 2
1086 * - pull count (bits 0-3)
1087 * - command type isn't needed for ioaccel2
1089 c->busaddr |= h->ioaccel2_blockFetchTable[0];
1092 static void set_ioaccel2_performant_mode(struct ctlr_info *h,
1093 struct CommandList *c,
1096 struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
1099 * Tell the controller to post the reply to the queue for this
1100 * processor. This seems to give the best I/O throughput.
1102 cp->reply_queue = reply_queue;
1104 * Set the bits in the address sent down to include:
1105 * - performant mode bit not used in ioaccel mode 2
1106 * - pull count (bits 0-3)
1107 * - command type isn't needed for ioaccel2
1109 c->busaddr |= (h->ioaccel2_blockFetchTable[cp->sg_count]);
1112 static int is_firmware_flash_cmd(u8 *cdb)
1114 return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE;
1118 * During firmware flash, the heartbeat register may not update as frequently
1119 * as it should. So we dial down lockup detection during firmware flash. and
1120 * dial it back up when firmware flash completes.
1122 #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ)
1123 #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ)
1124 #define HPSA_EVENT_MONITOR_INTERVAL (15 * HZ)
1125 static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h,
1126 struct CommandList *c)
1128 if (!is_firmware_flash_cmd(c->Request.CDB))
1130 atomic_inc(&h->firmware_flash_in_progress);
1131 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH;
1134 static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h,
1135 struct CommandList *c)
1137 if (is_firmware_flash_cmd(c->Request.CDB) &&
1138 atomic_dec_and_test(&h->firmware_flash_in_progress))
1139 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
1142 static void __enqueue_cmd_and_start_io(struct ctlr_info *h,
1143 struct CommandList *c, int reply_queue)
1145 dial_down_lockup_detection_during_fw_flash(h, c);
1146 atomic_inc(&h->commands_outstanding);
1148 reply_queue = h->reply_map[raw_smp_processor_id()];
1149 switch (c->cmd_type) {
1151 set_ioaccel1_performant_mode(h, c, reply_queue);
1152 writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET);
1155 set_ioaccel2_performant_mode(h, c, reply_queue);
1156 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32);
1159 set_ioaccel2_tmf_performant_mode(h, c, reply_queue);
1160 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32);
1163 set_performant_mode(h, c, reply_queue);
1164 h->access.submit_command(h, c);
1168 static void enqueue_cmd_and_start_io(struct ctlr_info *h, struct CommandList *c)
1170 if (unlikely(hpsa_is_pending_event(c)))
1171 return finish_cmd(c);
1173 __enqueue_cmd_and_start_io(h, c, DEFAULT_REPLY_QUEUE);
1176 static inline int is_hba_lunid(unsigned char scsi3addr[])
1178 return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
1181 static inline int is_scsi_rev_5(struct ctlr_info *h)
1183 if (!h->hba_inquiry_data)
1185 if ((h->hba_inquiry_data[2] & 0x07) == 5)
1190 static int hpsa_find_target_lun(struct ctlr_info *h,
1191 unsigned char scsi3addr[], int bus, int *target, int *lun)
1193 /* finds an unused bus, target, lun for a new physical device
1194 * assumes h->devlock is held
1197 DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES);
1199 bitmap_zero(lun_taken, HPSA_MAX_DEVICES);
1201 for (i = 0; i < h->ndevices; i++) {
1202 if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
1203 __set_bit(h->dev[i]->target, lun_taken);
1206 i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES);
1207 if (i < HPSA_MAX_DEVICES) {
1216 static void hpsa_show_dev_msg(const char *level, struct ctlr_info *h,
1217 struct hpsa_scsi_dev_t *dev, char *description)
1219 #define LABEL_SIZE 25
1220 char label[LABEL_SIZE];
1222 if (h == NULL || h->pdev == NULL || h->scsi_host == NULL)
1225 switch (dev->devtype) {
1227 snprintf(label, LABEL_SIZE, "controller");
1229 case TYPE_ENCLOSURE:
1230 snprintf(label, LABEL_SIZE, "enclosure");
1235 snprintf(label, LABEL_SIZE, "external");
1236 else if (!is_logical_dev_addr_mode(dev->scsi3addr))
1237 snprintf(label, LABEL_SIZE, "%s",
1238 raid_label[PHYSICAL_DRIVE]);
1240 snprintf(label, LABEL_SIZE, "RAID-%s",
1241 dev->raid_level > RAID_UNKNOWN ? "?" :
1242 raid_label[dev->raid_level]);
1245 snprintf(label, LABEL_SIZE, "rom");
1248 snprintf(label, LABEL_SIZE, "tape");
1250 case TYPE_MEDIUM_CHANGER:
1251 snprintf(label, LABEL_SIZE, "changer");
1254 snprintf(label, LABEL_SIZE, "UNKNOWN");
1258 dev_printk(level, &h->pdev->dev,
1259 "scsi %d:%d:%d:%d: %s %s %.8s %.16s %s SSDSmartPathCap%c En%c Exp=%d\n",
1260 h->scsi_host->host_no, dev->bus, dev->target, dev->lun,
1262 scsi_device_type(dev->devtype),
1266 dev->offload_config ? '+' : '-',
1267 dev->offload_to_be_enabled ? '+' : '-',
1268 dev->expose_device);
1271 /* Add an entry into h->dev[] array. */
1272 static int hpsa_scsi_add_entry(struct ctlr_info *h,
1273 struct hpsa_scsi_dev_t *device,
1274 struct hpsa_scsi_dev_t *added[], int *nadded)
1276 /* assumes h->devlock is held */
1277 int n = h->ndevices;
1279 unsigned char addr1[8], addr2[8];
1280 struct hpsa_scsi_dev_t *sd;
1282 if (n >= HPSA_MAX_DEVICES) {
1283 dev_err(&h->pdev->dev, "too many devices, some will be "
1288 /* physical devices do not have lun or target assigned until now. */
1289 if (device->lun != -1)
1290 /* Logical device, lun is already assigned. */
1293 /* If this device a non-zero lun of a multi-lun device
1294 * byte 4 of the 8-byte LUN addr will contain the logical
1295 * unit no, zero otherwise.
1297 if (device->scsi3addr[4] == 0) {
1298 /* This is not a non-zero lun of a multi-lun device */
1299 if (hpsa_find_target_lun(h, device->scsi3addr,
1300 device->bus, &device->target, &device->lun) != 0)
1305 /* This is a non-zero lun of a multi-lun device.
1306 * Search through our list and find the device which
1307 * has the same 8 byte LUN address, excepting byte 4 and 5.
1308 * Assign the same bus and target for this new LUN.
1309 * Use the logical unit number from the firmware.
1311 memcpy(addr1, device->scsi3addr, 8);
1314 for (i = 0; i < n; i++) {
1316 memcpy(addr2, sd->scsi3addr, 8);
1319 /* differ only in byte 4 and 5? */
1320 if (memcmp(addr1, addr2, 8) == 0) {
1321 device->bus = sd->bus;
1322 device->target = sd->target;
1323 device->lun = device->scsi3addr[4];
1327 if (device->lun == -1) {
1328 dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
1329 " suspect firmware bug or unsupported hardware "
1330 "configuration.\n");
1338 added[*nadded] = device;
1340 hpsa_show_dev_msg(KERN_INFO, h, device,
1341 device->expose_device ? "added" : "masked");
1346 * Called during a scan operation.
1348 * Update an entry in h->dev[] array.
1350 static void hpsa_scsi_update_entry(struct ctlr_info *h,
1351 int entry, struct hpsa_scsi_dev_t *new_entry)
1353 /* assumes h->devlock is held */
1354 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1356 /* Raid level changed. */
1357 h->dev[entry]->raid_level = new_entry->raid_level;
1360 * ioacccel_handle may have changed for a dual domain disk
1362 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
1364 /* Raid offload parameters changed. Careful about the ordering. */
1365 if (new_entry->offload_config && new_entry->offload_to_be_enabled) {
1367 * if drive is newly offload_enabled, we want to copy the
1368 * raid map data first. If previously offload_enabled and
1369 * offload_config were set, raid map data had better be
1370 * the same as it was before. If raid map data has changed
1371 * then it had better be the case that
1372 * h->dev[entry]->offload_enabled is currently 0.
1374 h->dev[entry]->raid_map = new_entry->raid_map;
1375 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
1377 if (new_entry->offload_to_be_enabled) {
1378 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
1379 wmb(); /* set ioaccel_handle *before* hba_ioaccel_enabled */
1381 h->dev[entry]->hba_ioaccel_enabled = new_entry->hba_ioaccel_enabled;
1382 h->dev[entry]->offload_config = new_entry->offload_config;
1383 h->dev[entry]->offload_to_mirror = new_entry->offload_to_mirror;
1384 h->dev[entry]->queue_depth = new_entry->queue_depth;
1387 * We can turn off ioaccel offload now, but need to delay turning
1388 * ioaccel on until we can update h->dev[entry]->phys_disk[], but we
1389 * can't do that until all the devices are updated.
1391 h->dev[entry]->offload_to_be_enabled = new_entry->offload_to_be_enabled;
1394 * turn ioaccel off immediately if told to do so.
1396 if (!new_entry->offload_to_be_enabled)
1397 h->dev[entry]->offload_enabled = 0;
1399 hpsa_show_dev_msg(KERN_INFO, h, h->dev[entry], "updated");
1402 /* Replace an entry from h->dev[] array. */
1403 static void hpsa_scsi_replace_entry(struct ctlr_info *h,
1404 int entry, struct hpsa_scsi_dev_t *new_entry,
1405 struct hpsa_scsi_dev_t *added[], int *nadded,
1406 struct hpsa_scsi_dev_t *removed[], int *nremoved)
1408 /* assumes h->devlock is held */
1409 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1410 removed[*nremoved] = h->dev[entry];
1414 * New physical devices won't have target/lun assigned yet
1415 * so we need to preserve the values in the slot we are replacing.
1417 if (new_entry->target == -1) {
1418 new_entry->target = h->dev[entry]->target;
1419 new_entry->lun = h->dev[entry]->lun;
1422 h->dev[entry] = new_entry;
1423 added[*nadded] = new_entry;
1426 hpsa_show_dev_msg(KERN_INFO, h, new_entry, "replaced");
1429 /* Remove an entry from h->dev[] array. */
1430 static void hpsa_scsi_remove_entry(struct ctlr_info *h, int entry,
1431 struct hpsa_scsi_dev_t *removed[], int *nremoved)
1433 /* assumes h->devlock is held */
1435 struct hpsa_scsi_dev_t *sd;
1437 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1440 removed[*nremoved] = h->dev[entry];
1443 for (i = entry; i < h->ndevices-1; i++)
1444 h->dev[i] = h->dev[i+1];
1446 hpsa_show_dev_msg(KERN_INFO, h, sd, "removed");
1449 #define SCSI3ADDR_EQ(a, b) ( \
1450 (a)[7] == (b)[7] && \
1451 (a)[6] == (b)[6] && \
1452 (a)[5] == (b)[5] && \
1453 (a)[4] == (b)[4] && \
1454 (a)[3] == (b)[3] && \
1455 (a)[2] == (b)[2] && \
1456 (a)[1] == (b)[1] && \
1459 static void fixup_botched_add(struct ctlr_info *h,
1460 struct hpsa_scsi_dev_t *added)
1462 /* called when scsi_add_device fails in order to re-adjust
1463 * h->dev[] to match the mid layer's view.
1465 unsigned long flags;
1468 spin_lock_irqsave(&h->lock, flags);
1469 for (i = 0; i < h->ndevices; i++) {
1470 if (h->dev[i] == added) {
1471 for (j = i; j < h->ndevices-1; j++)
1472 h->dev[j] = h->dev[j+1];
1477 spin_unlock_irqrestore(&h->lock, flags);
1481 static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
1482 struct hpsa_scsi_dev_t *dev2)
1484 /* we compare everything except lun and target as these
1485 * are not yet assigned. Compare parts likely
1488 if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
1489 sizeof(dev1->scsi3addr)) != 0)
1491 if (memcmp(dev1->device_id, dev2->device_id,
1492 sizeof(dev1->device_id)) != 0)
1494 if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
1496 if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
1498 if (dev1->devtype != dev2->devtype)
1500 if (dev1->bus != dev2->bus)
1505 static inline int device_updated(struct hpsa_scsi_dev_t *dev1,
1506 struct hpsa_scsi_dev_t *dev2)
1508 /* Device attributes that can change, but don't mean
1509 * that the device is a different device, nor that the OS
1510 * needs to be told anything about the change.
1512 if (dev1->raid_level != dev2->raid_level)
1514 if (dev1->offload_config != dev2->offload_config)
1516 if (dev1->offload_to_be_enabled != dev2->offload_to_be_enabled)
1518 if (!is_logical_dev_addr_mode(dev1->scsi3addr))
1519 if (dev1->queue_depth != dev2->queue_depth)
1522 * This can happen for dual domain devices. An active
1523 * path change causes the ioaccel handle to change
1525 * for example note the handle differences between p0 and p1
1526 * Device WWN ,WWN hash,Handle
1527 * D016 p0|0x3 [02]P2E:01:01,0x5000C5005FC4DACA,0x9B5616,0x01030003
1528 * p1 0x5000C5005FC4DAC9,0x6798C0,0x00040004
1530 if (dev1->ioaccel_handle != dev2->ioaccel_handle)
1535 /* Find needle in haystack. If exact match found, return DEVICE_SAME,
1536 * and return needle location in *index. If scsi3addr matches, but not
1537 * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
1538 * location in *index.
1539 * In the case of a minor device attribute change, such as RAID level, just
1540 * return DEVICE_UPDATED, along with the updated device's location in index.
1541 * If needle not found, return DEVICE_NOT_FOUND.
1543 static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
1544 struct hpsa_scsi_dev_t *haystack[], int haystack_size,
1548 #define DEVICE_NOT_FOUND 0
1549 #define DEVICE_CHANGED 1
1550 #define DEVICE_SAME 2
1551 #define DEVICE_UPDATED 3
1553 return DEVICE_NOT_FOUND;
1555 for (i = 0; i < haystack_size; i++) {
1556 if (haystack[i] == NULL) /* previously removed. */
1558 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
1560 if (device_is_the_same(needle, haystack[i])) {
1561 if (device_updated(needle, haystack[i]))
1562 return DEVICE_UPDATED;
1565 /* Keep offline devices offline */
1566 if (needle->volume_offline)
1567 return DEVICE_NOT_FOUND;
1568 return DEVICE_CHANGED;
1573 return DEVICE_NOT_FOUND;
1576 static void hpsa_monitor_offline_device(struct ctlr_info *h,
1577 unsigned char scsi3addr[])
1579 struct offline_device_entry *device;
1580 unsigned long flags;
1582 /* Check to see if device is already on the list */
1583 spin_lock_irqsave(&h->offline_device_lock, flags);
1584 list_for_each_entry(device, &h->offline_device_list, offline_list) {
1585 if (memcmp(device->scsi3addr, scsi3addr,
1586 sizeof(device->scsi3addr)) == 0) {
1587 spin_unlock_irqrestore(&h->offline_device_lock, flags);
1591 spin_unlock_irqrestore(&h->offline_device_lock, flags);
1593 /* Device is not on the list, add it. */
1594 device = kmalloc(sizeof(*device), GFP_KERNEL);
1598 memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr));
1599 spin_lock_irqsave(&h->offline_device_lock, flags);
1600 list_add_tail(&device->offline_list, &h->offline_device_list);
1601 spin_unlock_irqrestore(&h->offline_device_lock, flags);
1604 /* Print a message explaining various offline volume states */
1605 static void hpsa_show_volume_status(struct ctlr_info *h,
1606 struct hpsa_scsi_dev_t *sd)
1608 if (sd->volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED)
1609 dev_info(&h->pdev->dev,
1610 "C%d:B%d:T%d:L%d Volume status is not available through vital product data pages.\n",
1611 h->scsi_host->host_no,
1612 sd->bus, sd->target, sd->lun);
1613 switch (sd->volume_offline) {
1616 case HPSA_LV_UNDERGOING_ERASE:
1617 dev_info(&h->pdev->dev,
1618 "C%d:B%d:T%d:L%d Volume is undergoing background erase process.\n",
1619 h->scsi_host->host_no,
1620 sd->bus, sd->target, sd->lun);
1622 case HPSA_LV_NOT_AVAILABLE:
1623 dev_info(&h->pdev->dev,
1624 "C%d:B%d:T%d:L%d Volume is waiting for transforming volume.\n",
1625 h->scsi_host->host_no,
1626 sd->bus, sd->target, sd->lun);
1628 case HPSA_LV_UNDERGOING_RPI:
1629 dev_info(&h->pdev->dev,
1630 "C%d:B%d:T%d:L%d Volume is undergoing rapid parity init.\n",
1631 h->scsi_host->host_no,
1632 sd->bus, sd->target, sd->lun);
1634 case HPSA_LV_PENDING_RPI:
1635 dev_info(&h->pdev->dev,
1636 "C%d:B%d:T%d:L%d Volume is queued for rapid parity initialization process.\n",
1637 h->scsi_host->host_no,
1638 sd->bus, sd->target, sd->lun);
1640 case HPSA_LV_ENCRYPTED_NO_KEY:
1641 dev_info(&h->pdev->dev,
1642 "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because key is not present.\n",
1643 h->scsi_host->host_no,
1644 sd->bus, sd->target, sd->lun);
1646 case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
1647 dev_info(&h->pdev->dev,
1648 "C%d:B%d:T%d:L%d Volume is not encrypted and cannot be accessed because controller is in encryption-only mode.\n",
1649 h->scsi_host->host_no,
1650 sd->bus, sd->target, sd->lun);
1652 case HPSA_LV_UNDERGOING_ENCRYPTION:
1653 dev_info(&h->pdev->dev,
1654 "C%d:B%d:T%d:L%d Volume is undergoing encryption process.\n",
1655 h->scsi_host->host_no,
1656 sd->bus, sd->target, sd->lun);
1658 case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
1659 dev_info(&h->pdev->dev,
1660 "C%d:B%d:T%d:L%d Volume is undergoing encryption re-keying process.\n",
1661 h->scsi_host->host_no,
1662 sd->bus, sd->target, sd->lun);
1664 case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
1665 dev_info(&h->pdev->dev,
1666 "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because controller does not have encryption enabled.\n",
1667 h->scsi_host->host_no,
1668 sd->bus, sd->target, sd->lun);
1670 case HPSA_LV_PENDING_ENCRYPTION:
1671 dev_info(&h->pdev->dev,
1672 "C%d:B%d:T%d:L%d Volume is pending migration to encrypted state, but process has not started.\n",
1673 h->scsi_host->host_no,
1674 sd->bus, sd->target, sd->lun);
1676 case HPSA_LV_PENDING_ENCRYPTION_REKEYING:
1677 dev_info(&h->pdev->dev,
1678 "C%d:B%d:T%d:L%d Volume is encrypted and is pending encryption rekeying.\n",
1679 h->scsi_host->host_no,
1680 sd->bus, sd->target, sd->lun);
1686 * Figure the list of physical drive pointers for a logical drive with
1687 * raid offload configured.
1689 static void hpsa_figure_phys_disk_ptrs(struct ctlr_info *h,
1690 struct hpsa_scsi_dev_t *dev[], int ndevices,
1691 struct hpsa_scsi_dev_t *logical_drive)
1693 struct raid_map_data *map = &logical_drive->raid_map;
1694 struct raid_map_disk_data *dd = &map->data[0];
1696 int total_disks_per_row = le16_to_cpu(map->data_disks_per_row) +
1697 le16_to_cpu(map->metadata_disks_per_row);
1698 int nraid_map_entries = le16_to_cpu(map->row_cnt) *
1699 le16_to_cpu(map->layout_map_count) *
1700 total_disks_per_row;
1701 int nphys_disk = le16_to_cpu(map->layout_map_count) *
1702 total_disks_per_row;
1705 if (nraid_map_entries > RAID_MAP_MAX_ENTRIES)
1706 nraid_map_entries = RAID_MAP_MAX_ENTRIES;
1708 logical_drive->nphysical_disks = nraid_map_entries;
1711 for (i = 0; i < nraid_map_entries; i++) {
1712 logical_drive->phys_disk[i] = NULL;
1713 if (!logical_drive->offload_config)
1715 for (j = 0; j < ndevices; j++) {
1718 if (dev[j]->devtype != TYPE_DISK &&
1719 dev[j]->devtype != TYPE_ZBC)
1721 if (is_logical_device(dev[j]))
1723 if (dev[j]->ioaccel_handle != dd[i].ioaccel_handle)
1726 logical_drive->phys_disk[i] = dev[j];
1728 qdepth = min(h->nr_cmds, qdepth +
1729 logical_drive->phys_disk[i]->queue_depth);
1734 * This can happen if a physical drive is removed and
1735 * the logical drive is degraded. In that case, the RAID
1736 * map data will refer to a physical disk which isn't actually
1737 * present. And in that case offload_enabled should already
1738 * be 0, but we'll turn it off here just in case
1740 if (!logical_drive->phys_disk[i]) {
1741 dev_warn(&h->pdev->dev,
1742 "%s: [%d:%d:%d:%d] A phys disk component of LV is missing, turning off offload_enabled for LV.\n",
1744 h->scsi_host->host_no, logical_drive->bus,
1745 logical_drive->target, logical_drive->lun);
1746 logical_drive->offload_enabled = 0;
1747 logical_drive->offload_to_be_enabled = 0;
1748 logical_drive->queue_depth = 8;
1751 if (nraid_map_entries)
1753 * This is correct for reads, too high for full stripe writes,
1754 * way too high for partial stripe writes
1756 logical_drive->queue_depth = qdepth;
1758 if (logical_drive->external)
1759 logical_drive->queue_depth = EXTERNAL_QD;
1761 logical_drive->queue_depth = h->nr_cmds;
1765 static void hpsa_update_log_drive_phys_drive_ptrs(struct ctlr_info *h,
1766 struct hpsa_scsi_dev_t *dev[], int ndevices)
1770 for (i = 0; i < ndevices; i++) {
1773 if (dev[i]->devtype != TYPE_DISK &&
1774 dev[i]->devtype != TYPE_ZBC)
1776 if (!is_logical_device(dev[i]))
1780 * If offload is currently enabled, the RAID map and
1781 * phys_disk[] assignment *better* not be changing
1782 * because we would be changing ioaccel phsy_disk[] pointers
1783 * on a ioaccel volume processing I/O requests.
1785 * If an ioaccel volume status changed, initially because it was
1786 * re-configured and thus underwent a transformation, or
1787 * a drive failed, we would have received a state change
1788 * request and ioaccel should have been turned off. When the
1789 * transformation completes, we get another state change
1790 * request to turn ioaccel back on. In this case, we need
1791 * to update the ioaccel information.
1793 * Thus: If it is not currently enabled, but will be after
1794 * the scan completes, make sure the ioaccel pointers
1798 if (!dev[i]->offload_enabled && dev[i]->offload_to_be_enabled)
1799 hpsa_figure_phys_disk_ptrs(h, dev, ndevices, dev[i]);
1803 static int hpsa_add_device(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
1810 if (is_logical_device(device)) /* RAID */
1811 rc = scsi_add_device(h->scsi_host, device->bus,
1812 device->target, device->lun);
1814 rc = hpsa_add_sas_device(h->sas_host, device);
1819 static int hpsa_find_outstanding_commands_for_dev(struct ctlr_info *h,
1820 struct hpsa_scsi_dev_t *dev)
1825 for (i = 0; i < h->nr_cmds; i++) {
1826 struct CommandList *c = h->cmd_pool + i;
1827 int refcount = atomic_inc_return(&c->refcount);
1829 if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev,
1831 unsigned long flags;
1833 spin_lock_irqsave(&h->lock, flags); /* Implied MB */
1834 if (!hpsa_is_cmd_idle(c))
1836 spin_unlock_irqrestore(&h->lock, flags);
1845 static void hpsa_wait_for_outstanding_commands_for_dev(struct ctlr_info *h,
1846 struct hpsa_scsi_dev_t *device)
1852 cmds = hpsa_find_outstanding_commands_for_dev(h, device);
1861 dev_warn(&h->pdev->dev,
1862 "%s: removing device with %d outstanding commands!\n",
1866 static void hpsa_remove_device(struct ctlr_info *h,
1867 struct hpsa_scsi_dev_t *device)
1869 struct scsi_device *sdev = NULL;
1875 * Allow for commands to drain
1877 device->removed = 1;
1878 hpsa_wait_for_outstanding_commands_for_dev(h, device);
1880 if (is_logical_device(device)) { /* RAID */
1881 sdev = scsi_device_lookup(h->scsi_host, device->bus,
1882 device->target, device->lun);
1884 scsi_remove_device(sdev);
1885 scsi_device_put(sdev);
1888 * We don't expect to get here. Future commands
1889 * to this device will get a selection timeout as
1890 * if the device were gone.
1892 hpsa_show_dev_msg(KERN_WARNING, h, device,
1893 "didn't find device for removal.");
1897 hpsa_remove_sas_device(device);
1901 static void adjust_hpsa_scsi_table(struct ctlr_info *h,
1902 struct hpsa_scsi_dev_t *sd[], int nsds)
1904 /* sd contains scsi3 addresses and devtypes, and inquiry
1905 * data. This function takes what's in sd to be the current
1906 * reality and updates h->dev[] to reflect that reality.
1908 int i, entry, device_change, changes = 0;
1909 struct hpsa_scsi_dev_t *csd;
1910 unsigned long flags;
1911 struct hpsa_scsi_dev_t **added, **removed;
1912 int nadded, nremoved;
1915 * A reset can cause a device status to change
1916 * re-schedule the scan to see what happened.
1918 spin_lock_irqsave(&h->reset_lock, flags);
1919 if (h->reset_in_progress) {
1920 h->drv_req_rescan = 1;
1921 spin_unlock_irqrestore(&h->reset_lock, flags);
1924 spin_unlock_irqrestore(&h->reset_lock, flags);
1926 added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL);
1927 removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL);
1929 if (!added || !removed) {
1930 dev_warn(&h->pdev->dev, "out of memory in "
1931 "adjust_hpsa_scsi_table\n");
1935 spin_lock_irqsave(&h->devlock, flags);
1937 /* find any devices in h->dev[] that are not in
1938 * sd[] and remove them from h->dev[], and for any
1939 * devices which have changed, remove the old device
1940 * info and add the new device info.
1941 * If minor device attributes change, just update
1942 * the existing device structure.
1947 while (i < h->ndevices) {
1949 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
1950 if (device_change == DEVICE_NOT_FOUND) {
1952 hpsa_scsi_remove_entry(h, i, removed, &nremoved);
1953 continue; /* remove ^^^, hence i not incremented */
1954 } else if (device_change == DEVICE_CHANGED) {
1956 hpsa_scsi_replace_entry(h, i, sd[entry],
1957 added, &nadded, removed, &nremoved);
1958 /* Set it to NULL to prevent it from being freed
1959 * at the bottom of hpsa_update_scsi_devices()
1962 } else if (device_change == DEVICE_UPDATED) {
1963 hpsa_scsi_update_entry(h, i, sd[entry]);
1968 /* Now, make sure every device listed in sd[] is also
1969 * listed in h->dev[], adding them if they aren't found
1972 for (i = 0; i < nsds; i++) {
1973 if (!sd[i]) /* if already added above. */
1976 /* Don't add devices which are NOT READY, FORMAT IN PROGRESS
1977 * as the SCSI mid-layer does not handle such devices well.
1978 * It relentlessly loops sending TUR at 3Hz, then READ(10)
1979 * at 160Hz, and prevents the system from coming up.
1981 if (sd[i]->volume_offline) {
1982 hpsa_show_volume_status(h, sd[i]);
1983 hpsa_show_dev_msg(KERN_INFO, h, sd[i], "offline");
1987 device_change = hpsa_scsi_find_entry(sd[i], h->dev,
1988 h->ndevices, &entry);
1989 if (device_change == DEVICE_NOT_FOUND) {
1991 if (hpsa_scsi_add_entry(h, sd[i], added, &nadded) != 0)
1993 sd[i] = NULL; /* prevent from being freed later. */
1994 } else if (device_change == DEVICE_CHANGED) {
1995 /* should never happen... */
1997 dev_warn(&h->pdev->dev,
1998 "device unexpectedly changed.\n");
1999 /* but if it does happen, we just ignore that device */
2002 hpsa_update_log_drive_phys_drive_ptrs(h, h->dev, h->ndevices);
2005 * Now that h->dev[]->phys_disk[] is coherent, we can enable
2006 * any logical drives that need it enabled.
2008 * The raid map should be current by now.
2010 * We are updating the device list used for I/O requests.
2012 for (i = 0; i < h->ndevices; i++) {
2013 if (h->dev[i] == NULL)
2015 h->dev[i]->offload_enabled = h->dev[i]->offload_to_be_enabled;
2018 spin_unlock_irqrestore(&h->devlock, flags);
2020 /* Monitor devices which are in one of several NOT READY states to be
2021 * brought online later. This must be done without holding h->devlock,
2022 * so don't touch h->dev[]
2024 for (i = 0; i < nsds; i++) {
2025 if (!sd[i]) /* if already added above. */
2027 if (sd[i]->volume_offline)
2028 hpsa_monitor_offline_device(h, sd[i]->scsi3addr);
2031 /* Don't notify scsi mid layer of any changes the first time through
2032 * (or if there are no changes) scsi_scan_host will do it later the
2033 * first time through.
2038 /* Notify scsi mid layer of any removed devices */
2039 for (i = 0; i < nremoved; i++) {
2040 if (removed[i] == NULL)
2042 if (removed[i]->expose_device)
2043 hpsa_remove_device(h, removed[i]);
2048 /* Notify scsi mid layer of any added devices */
2049 for (i = 0; i < nadded; i++) {
2052 if (added[i] == NULL)
2054 if (!(added[i]->expose_device))
2056 rc = hpsa_add_device(h, added[i]);
2059 dev_warn(&h->pdev->dev,
2060 "addition failed %d, device not added.", rc);
2061 /* now we have to remove it from h->dev,
2062 * since it didn't get added to scsi mid layer
2064 fixup_botched_add(h, added[i]);
2065 h->drv_req_rescan = 1;
2074 * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t *
2075 * Assume's h->devlock is held.
2077 static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
2078 int bus, int target, int lun)
2081 struct hpsa_scsi_dev_t *sd;
2083 for (i = 0; i < h->ndevices; i++) {
2085 if (sd->bus == bus && sd->target == target && sd->lun == lun)
2091 static int hpsa_slave_alloc(struct scsi_device *sdev)
2093 struct hpsa_scsi_dev_t *sd = NULL;
2094 unsigned long flags;
2095 struct ctlr_info *h;
2097 h = sdev_to_hba(sdev);
2098 spin_lock_irqsave(&h->devlock, flags);
2099 if (sdev_channel(sdev) == HPSA_PHYSICAL_DEVICE_BUS) {
2100 struct scsi_target *starget;
2101 struct sas_rphy *rphy;
2103 starget = scsi_target(sdev);
2104 rphy = target_to_rphy(starget);
2105 sd = hpsa_find_device_by_sas_rphy(h, rphy);
2107 sd->target = sdev_id(sdev);
2108 sd->lun = sdev->lun;
2112 sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
2113 sdev_id(sdev), sdev->lun);
2115 if (sd && sd->expose_device) {
2116 atomic_set(&sd->ioaccel_cmds_out, 0);
2117 sdev->hostdata = sd;
2119 sdev->hostdata = NULL;
2120 spin_unlock_irqrestore(&h->devlock, flags);
2124 /* configure scsi device based on internal per-device structure */
2125 static int hpsa_slave_configure(struct scsi_device *sdev)
2127 struct hpsa_scsi_dev_t *sd;
2130 sd = sdev->hostdata;
2131 sdev->no_uld_attach = !sd || !sd->expose_device;
2135 queue_depth = EXTERNAL_QD;
2137 queue_depth = sd->queue_depth != 0 ?
2138 sd->queue_depth : sdev->host->can_queue;
2140 queue_depth = sdev->host->can_queue;
2142 scsi_change_queue_depth(sdev, queue_depth);
2147 static void hpsa_slave_destroy(struct scsi_device *sdev)
2149 /* nothing to do. */
2152 static void hpsa_free_ioaccel2_sg_chain_blocks(struct ctlr_info *h)
2156 if (!h->ioaccel2_cmd_sg_list)
2158 for (i = 0; i < h->nr_cmds; i++) {
2159 kfree(h->ioaccel2_cmd_sg_list[i]);
2160 h->ioaccel2_cmd_sg_list[i] = NULL;
2162 kfree(h->ioaccel2_cmd_sg_list);
2163 h->ioaccel2_cmd_sg_list = NULL;
2166 static int hpsa_allocate_ioaccel2_sg_chain_blocks(struct ctlr_info *h)
2170 if (h->chainsize <= 0)
2173 h->ioaccel2_cmd_sg_list =
2174 kzalloc(sizeof(*h->ioaccel2_cmd_sg_list) * h->nr_cmds,
2176 if (!h->ioaccel2_cmd_sg_list)
2178 for (i = 0; i < h->nr_cmds; i++) {
2179 h->ioaccel2_cmd_sg_list[i] =
2180 kmalloc_array(h->maxsgentries,
2181 sizeof(*h->ioaccel2_cmd_sg_list[i]),
2183 if (!h->ioaccel2_cmd_sg_list[i])
2189 hpsa_free_ioaccel2_sg_chain_blocks(h);
2193 static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
2197 if (!h->cmd_sg_list)
2199 for (i = 0; i < h->nr_cmds; i++) {
2200 kfree(h->cmd_sg_list[i]);
2201 h->cmd_sg_list[i] = NULL;
2203 kfree(h->cmd_sg_list);
2204 h->cmd_sg_list = NULL;
2207 static int hpsa_alloc_sg_chain_blocks(struct ctlr_info *h)
2211 if (h->chainsize <= 0)
2214 h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
2216 if (!h->cmd_sg_list)
2219 for (i = 0; i < h->nr_cmds; i++) {
2220 h->cmd_sg_list[i] = kmalloc_array(h->chainsize,
2221 sizeof(*h->cmd_sg_list[i]),
2223 if (!h->cmd_sg_list[i])
2230 hpsa_free_sg_chain_blocks(h);
2234 static int hpsa_map_ioaccel2_sg_chain_block(struct ctlr_info *h,
2235 struct io_accel2_cmd *cp, struct CommandList *c)
2237 struct ioaccel2_sg_element *chain_block;
2241 chain_block = h->ioaccel2_cmd_sg_list[c->cmdindex];
2242 chain_size = le32_to_cpu(cp->sg[0].length);
2243 temp64 = pci_map_single(h->pdev, chain_block, chain_size,
2245 if (dma_mapping_error(&h->pdev->dev, temp64)) {
2246 /* prevent subsequent unmapping */
2247 cp->sg->address = 0;
2250 cp->sg->address = cpu_to_le64(temp64);
2254 static void hpsa_unmap_ioaccel2_sg_chain_block(struct ctlr_info *h,
2255 struct io_accel2_cmd *cp)
2257 struct ioaccel2_sg_element *chain_sg;
2262 temp64 = le64_to_cpu(chain_sg->address);
2263 chain_size = le32_to_cpu(cp->sg[0].length);
2264 pci_unmap_single(h->pdev, temp64, chain_size, PCI_DMA_TODEVICE);
2267 static int hpsa_map_sg_chain_block(struct ctlr_info *h,
2268 struct CommandList *c)
2270 struct SGDescriptor *chain_sg, *chain_block;
2274 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
2275 chain_block = h->cmd_sg_list[c->cmdindex];
2276 chain_sg->Ext = cpu_to_le32(HPSA_SG_CHAIN);
2277 chain_len = sizeof(*chain_sg) *
2278 (le16_to_cpu(c->Header.SGTotal) - h->max_cmd_sg_entries);
2279 chain_sg->Len = cpu_to_le32(chain_len);
2280 temp64 = pci_map_single(h->pdev, chain_block, chain_len,
2282 if (dma_mapping_error(&h->pdev->dev, temp64)) {
2283 /* prevent subsequent unmapping */
2284 chain_sg->Addr = cpu_to_le64(0);
2287 chain_sg->Addr = cpu_to_le64(temp64);
2291 static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
2292 struct CommandList *c)
2294 struct SGDescriptor *chain_sg;
2296 if (le16_to_cpu(c->Header.SGTotal) <= h->max_cmd_sg_entries)
2299 chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
2300 pci_unmap_single(h->pdev, le64_to_cpu(chain_sg->Addr),
2301 le32_to_cpu(chain_sg->Len), PCI_DMA_TODEVICE);
2305 /* Decode the various types of errors on ioaccel2 path.
2306 * Return 1 for any error that should generate a RAID path retry.
2307 * Return 0 for errors that don't require a RAID path retry.
2309 static int handle_ioaccel_mode2_error(struct ctlr_info *h,
2310 struct CommandList *c,
2311 struct scsi_cmnd *cmd,
2312 struct io_accel2_cmd *c2,
2313 struct hpsa_scsi_dev_t *dev)
2317 u32 ioaccel2_resid = 0;
2319 switch (c2->error_data.serv_response) {
2320 case IOACCEL2_SERV_RESPONSE_COMPLETE:
2321 switch (c2->error_data.status) {
2322 case IOACCEL2_STATUS_SR_TASK_COMP_GOOD:
2324 case IOACCEL2_STATUS_SR_TASK_COMP_CHK_COND:
2325 cmd->result |= SAM_STAT_CHECK_CONDITION;
2326 if (c2->error_data.data_present !=
2327 IOACCEL2_SENSE_DATA_PRESENT) {
2328 memset(cmd->sense_buffer, 0,
2329 SCSI_SENSE_BUFFERSIZE);
2332 /* copy the sense data */
2333 data_len = c2->error_data.sense_data_len;
2334 if (data_len > SCSI_SENSE_BUFFERSIZE)
2335 data_len = SCSI_SENSE_BUFFERSIZE;
2336 if (data_len > sizeof(c2->error_data.sense_data_buff))
2338 sizeof(c2->error_data.sense_data_buff);
2339 memcpy(cmd->sense_buffer,
2340 c2->error_data.sense_data_buff, data_len);
2343 case IOACCEL2_STATUS_SR_TASK_COMP_BUSY:
2346 case IOACCEL2_STATUS_SR_TASK_COMP_RES_CON:
2349 case IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL:
2352 case IOACCEL2_STATUS_SR_TASK_COMP_ABORTED:
2360 case IOACCEL2_SERV_RESPONSE_FAILURE:
2361 switch (c2->error_data.status) {
2362 case IOACCEL2_STATUS_SR_IO_ERROR:
2363 case IOACCEL2_STATUS_SR_IO_ABORTED:
2364 case IOACCEL2_STATUS_SR_OVERRUN:
2367 case IOACCEL2_STATUS_SR_UNDERRUN:
2368 cmd->result = (DID_OK << 16); /* host byte */
2369 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
2370 ioaccel2_resid = get_unaligned_le32(
2371 &c2->error_data.resid_cnt[0]);
2372 scsi_set_resid(cmd, ioaccel2_resid);
2374 case IOACCEL2_STATUS_SR_NO_PATH_TO_DEVICE:
2375 case IOACCEL2_STATUS_SR_INVALID_DEVICE:
2376 case IOACCEL2_STATUS_SR_IOACCEL_DISABLED:
2378 * Did an HBA disk disappear? We will eventually
2379 * get a state change event from the controller but
2380 * in the meantime, we need to tell the OS that the
2381 * HBA disk is no longer there and stop I/O
2382 * from going down. This allows the potential re-insert
2383 * of the disk to get the same device node.
2385 if (dev->physical_device && dev->expose_device) {
2386 cmd->result = DID_NO_CONNECT << 16;
2388 h->drv_req_rescan = 1;
2389 dev_warn(&h->pdev->dev,
2390 "%s: device is gone!\n", __func__);
2393 * Retry by sending down the RAID path.
2394 * We will get an event from ctlr to
2395 * trigger rescan regardless.
2403 case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE:
2405 case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS:
2407 case IOACCEL2_SERV_RESPONSE_TMF_REJECTED:
2410 case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN:
2417 return retry; /* retry on raid path? */
2420 static void hpsa_cmd_resolve_events(struct ctlr_info *h,
2421 struct CommandList *c)
2423 bool do_wake = false;
2426 * Reset c->scsi_cmd here so that the reset handler will know
2427 * this command has completed. Then, check to see if the handler is
2428 * waiting for this command, and, if so, wake it.
2430 c->scsi_cmd = SCSI_CMD_IDLE;
2431 mb(); /* Declare command idle before checking for pending events. */
2432 if (c->reset_pending) {
2433 unsigned long flags;
2434 struct hpsa_scsi_dev_t *dev;
2437 * There appears to be a reset pending; lock the lock and
2438 * reconfirm. If so, then decrement the count of outstanding
2439 * commands and wake the reset command if this is the last one.
2441 spin_lock_irqsave(&h->lock, flags);
2442 dev = c->reset_pending; /* Re-fetch under the lock. */
2443 if (dev && atomic_dec_and_test(&dev->reset_cmds_out))
2445 c->reset_pending = NULL;
2446 spin_unlock_irqrestore(&h->lock, flags);
2450 wake_up_all(&h->event_sync_wait_queue);
2453 static void hpsa_cmd_resolve_and_free(struct ctlr_info *h,
2454 struct CommandList *c)
2456 hpsa_cmd_resolve_events(h, c);
2457 cmd_tagged_free(h, c);
2460 static void hpsa_cmd_free_and_done(struct ctlr_info *h,
2461 struct CommandList *c, struct scsi_cmnd *cmd)
2463 hpsa_cmd_resolve_and_free(h, c);
2464 if (cmd && cmd->scsi_done)
2465 cmd->scsi_done(cmd);
2468 static void hpsa_retry_cmd(struct ctlr_info *h, struct CommandList *c)
2470 INIT_WORK(&c->work, hpsa_command_resubmit_worker);
2471 queue_work_on(raw_smp_processor_id(), h->resubmit_wq, &c->work);
2474 static void process_ioaccel2_completion(struct ctlr_info *h,
2475 struct CommandList *c, struct scsi_cmnd *cmd,
2476 struct hpsa_scsi_dev_t *dev)
2478 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
2480 /* check for good status */
2481 if (likely(c2->error_data.serv_response == 0 &&
2482 c2->error_data.status == 0))
2483 return hpsa_cmd_free_and_done(h, c, cmd);
2486 * Any RAID offload error results in retry which will use
2487 * the normal I/O path so the controller can handle whatever is
2490 if (is_logical_device(dev) &&
2491 c2->error_data.serv_response ==
2492 IOACCEL2_SERV_RESPONSE_FAILURE) {
2493 if (c2->error_data.status ==
2494 IOACCEL2_STATUS_SR_IOACCEL_DISABLED) {
2495 dev->offload_enabled = 0;
2496 dev->offload_to_be_enabled = 0;
2499 return hpsa_retry_cmd(h, c);
2502 if (handle_ioaccel_mode2_error(h, c, cmd, c2, dev))
2503 return hpsa_retry_cmd(h, c);
2505 return hpsa_cmd_free_and_done(h, c, cmd);
2508 /* Returns 0 on success, < 0 otherwise. */
2509 static int hpsa_evaluate_tmf_status(struct ctlr_info *h,
2510 struct CommandList *cp)
2512 u8 tmf_status = cp->err_info->ScsiStatus;
2514 switch (tmf_status) {
2515 case CISS_TMF_COMPLETE:
2517 * CISS_TMF_COMPLETE never happens, instead,
2518 * ei->CommandStatus == 0 for this case.
2520 case CISS_TMF_SUCCESS:
2522 case CISS_TMF_INVALID_FRAME:
2523 case CISS_TMF_NOT_SUPPORTED:
2524 case CISS_TMF_FAILED:
2525 case CISS_TMF_WRONG_LUN:
2526 case CISS_TMF_OVERLAPPED_TAG:
2529 dev_warn(&h->pdev->dev, "Unknown TMF status: 0x%02x\n",
2536 static void complete_scsi_command(struct CommandList *cp)
2538 struct scsi_cmnd *cmd;
2539 struct ctlr_info *h;
2540 struct ErrorInfo *ei;
2541 struct hpsa_scsi_dev_t *dev;
2542 struct io_accel2_cmd *c2;
2545 u8 asc; /* additional sense code */
2546 u8 ascq; /* additional sense code qualifier */
2547 unsigned long sense_data_size;
2554 cmd->result = DID_NO_CONNECT << 16;
2555 return hpsa_cmd_free_and_done(h, cp, cmd);
2558 dev = cmd->device->hostdata;
2560 cmd->result = DID_NO_CONNECT << 16;
2561 return hpsa_cmd_free_and_done(h, cp, cmd);
2563 c2 = &h->ioaccel2_cmd_pool[cp->cmdindex];
2565 scsi_dma_unmap(cmd); /* undo the DMA mappings */
2566 if ((cp->cmd_type == CMD_SCSI) &&
2567 (le16_to_cpu(cp->Header.SGTotal) > h->max_cmd_sg_entries))
2568 hpsa_unmap_sg_chain_block(h, cp);
2570 if ((cp->cmd_type == CMD_IOACCEL2) &&
2571 (c2->sg[0].chain_indicator == IOACCEL2_CHAIN))
2572 hpsa_unmap_ioaccel2_sg_chain_block(h, c2);
2574 cmd->result = (DID_OK << 16); /* host byte */
2575 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
2577 if (cp->cmd_type == CMD_IOACCEL2 || cp->cmd_type == CMD_IOACCEL1) {
2578 if (dev->physical_device && dev->expose_device &&
2580 cmd->result = DID_NO_CONNECT << 16;
2581 return hpsa_cmd_free_and_done(h, cp, cmd);
2583 if (likely(cp->phys_disk != NULL))
2584 atomic_dec(&cp->phys_disk->ioaccel_cmds_out);
2588 * We check for lockup status here as it may be set for
2589 * CMD_SCSI, CMD_IOACCEL1 and CMD_IOACCEL2 commands by
2590 * fail_all_oustanding_cmds()
2592 if (unlikely(ei->CommandStatus == CMD_CTLR_LOCKUP)) {
2593 /* DID_NO_CONNECT will prevent a retry */
2594 cmd->result = DID_NO_CONNECT << 16;
2595 return hpsa_cmd_free_and_done(h, cp, cmd);
2598 if ((unlikely(hpsa_is_pending_event(cp))))
2599 if (cp->reset_pending)
2600 return hpsa_cmd_free_and_done(h, cp, cmd);
2602 if (cp->cmd_type == CMD_IOACCEL2)
2603 return process_ioaccel2_completion(h, cp, cmd, dev);
2605 scsi_set_resid(cmd, ei->ResidualCnt);
2606 if (ei->CommandStatus == 0)
2607 return hpsa_cmd_free_and_done(h, cp, cmd);
2609 /* For I/O accelerator commands, copy over some fields to the normal
2610 * CISS header used below for error handling.
2612 if (cp->cmd_type == CMD_IOACCEL1) {
2613 struct io_accel1_cmd *c = &h->ioaccel_cmd_pool[cp->cmdindex];
2614 cp->Header.SGList = scsi_sg_count(cmd);
2615 cp->Header.SGTotal = cpu_to_le16(cp->Header.SGList);
2616 cp->Request.CDBLen = le16_to_cpu(c->io_flags) &
2617 IOACCEL1_IOFLAGS_CDBLEN_MASK;
2618 cp->Header.tag = c->tag;
2619 memcpy(cp->Header.LUN.LunAddrBytes, c->CISS_LUN, 8);
2620 memcpy(cp->Request.CDB, c->CDB, cp->Request.CDBLen);
2622 /* Any RAID offload error results in retry which will use
2623 * the normal I/O path so the controller can handle whatever's
2626 if (is_logical_device(dev)) {
2627 if (ei->CommandStatus == CMD_IOACCEL_DISABLED)
2628 dev->offload_enabled = 0;
2629 return hpsa_retry_cmd(h, cp);
2633 /* an error has occurred */
2634 switch (ei->CommandStatus) {
2636 case CMD_TARGET_STATUS:
2637 cmd->result |= ei->ScsiStatus;
2638 /* copy the sense data */
2639 if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo))
2640 sense_data_size = SCSI_SENSE_BUFFERSIZE;
2642 sense_data_size = sizeof(ei->SenseInfo);
2643 if (ei->SenseLen < sense_data_size)
2644 sense_data_size = ei->SenseLen;
2645 memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size);
2647 decode_sense_data(ei->SenseInfo, sense_data_size,
2648 &sense_key, &asc, &ascq);
2649 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
2650 if (sense_key == ABORTED_COMMAND) {
2651 cmd->result |= DID_SOFT_ERROR << 16;
2656 /* Problem was not a check condition
2657 * Pass it up to the upper layers...
2659 if (ei->ScsiStatus) {
2660 dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
2661 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
2662 "Returning result: 0x%x\n",
2664 sense_key, asc, ascq,
2666 } else { /* scsi status is zero??? How??? */
2667 dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
2668 "Returning no connection.\n", cp),
2670 /* Ordinarily, this case should never happen,
2671 * but there is a bug in some released firmware
2672 * revisions that allows it to happen if, for
2673 * example, a 4100 backplane loses power and
2674 * the tape drive is in it. We assume that
2675 * it's a fatal error of some kind because we
2676 * can't show that it wasn't. We will make it
2677 * look like selection timeout since that is
2678 * the most common reason for this to occur,
2679 * and it's severe enough.
2682 cmd->result = DID_NO_CONNECT << 16;
2686 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
2688 case CMD_DATA_OVERRUN:
2689 dev_warn(&h->pdev->dev,
2690 "CDB %16phN data overrun\n", cp->Request.CDB);
2693 /* print_bytes(cp, sizeof(*cp), 1, 0);
2695 /* We get CMD_INVALID if you address a non-existent device
2696 * instead of a selection timeout (no response). You will
2697 * see this if you yank out a drive, then try to access it.
2698 * This is kind of a shame because it means that any other
2699 * CMD_INVALID (e.g. driver bug) will get interpreted as a
2700 * missing target. */
2701 cmd->result = DID_NO_CONNECT << 16;
2704 case CMD_PROTOCOL_ERR:
2705 cmd->result = DID_ERROR << 16;
2706 dev_warn(&h->pdev->dev, "CDB %16phN : protocol error\n",
2709 case CMD_HARDWARE_ERR:
2710 cmd->result = DID_ERROR << 16;
2711 dev_warn(&h->pdev->dev, "CDB %16phN : hardware error\n",
2714 case CMD_CONNECTION_LOST:
2715 cmd->result = DID_ERROR << 16;
2716 dev_warn(&h->pdev->dev, "CDB %16phN : connection lost\n",
2720 cmd->result = DID_ABORT << 16;
2722 case CMD_ABORT_FAILED:
2723 cmd->result = DID_ERROR << 16;
2724 dev_warn(&h->pdev->dev, "CDB %16phN : abort failed\n",
2727 case CMD_UNSOLICITED_ABORT:
2728 cmd->result = DID_SOFT_ERROR << 16; /* retry the command */
2729 dev_warn(&h->pdev->dev, "CDB %16phN : unsolicited abort\n",
2733 cmd->result = DID_TIME_OUT << 16;
2734 dev_warn(&h->pdev->dev, "CDB %16phN timed out\n",
2737 case CMD_UNABORTABLE:
2738 cmd->result = DID_ERROR << 16;
2739 dev_warn(&h->pdev->dev, "Command unabortable\n");
2741 case CMD_TMF_STATUS:
2742 if (hpsa_evaluate_tmf_status(h, cp)) /* TMF failed? */
2743 cmd->result = DID_ERROR << 16;
2745 case CMD_IOACCEL_DISABLED:
2746 /* This only handles the direct pass-through case since RAID
2747 * offload is handled above. Just attempt a retry.
2749 cmd->result = DID_SOFT_ERROR << 16;
2750 dev_warn(&h->pdev->dev,
2751 "cp %p had HP SSD Smart Path error\n", cp);
2754 cmd->result = DID_ERROR << 16;
2755 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
2756 cp, ei->CommandStatus);
2759 return hpsa_cmd_free_and_done(h, cp, cmd);
2762 static void hpsa_pci_unmap(struct pci_dev *pdev,
2763 struct CommandList *c, int sg_used, int data_direction)
2767 for (i = 0; i < sg_used; i++)
2768 pci_unmap_single(pdev, (dma_addr_t) le64_to_cpu(c->SG[i].Addr),
2769 le32_to_cpu(c->SG[i].Len),
2773 static int hpsa_map_one(struct pci_dev *pdev,
2774 struct CommandList *cp,
2781 if (buflen == 0 || data_direction == PCI_DMA_NONE) {
2782 cp->Header.SGList = 0;
2783 cp->Header.SGTotal = cpu_to_le16(0);
2787 addr64 = pci_map_single(pdev, buf, buflen, data_direction);
2788 if (dma_mapping_error(&pdev->dev, addr64)) {
2789 /* Prevent subsequent unmap of something never mapped */
2790 cp->Header.SGList = 0;
2791 cp->Header.SGTotal = cpu_to_le16(0);
2794 cp->SG[0].Addr = cpu_to_le64(addr64);
2795 cp->SG[0].Len = cpu_to_le32(buflen);
2796 cp->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* we are not chaining */
2797 cp->Header.SGList = 1; /* no. SGs contig in this cmd */
2798 cp->Header.SGTotal = cpu_to_le16(1); /* total sgs in cmd list */
2802 #define NO_TIMEOUT ((unsigned long) -1)
2803 #define DEFAULT_TIMEOUT 30000 /* milliseconds */
2804 static int hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
2805 struct CommandList *c, int reply_queue, unsigned long timeout_msecs)
2807 DECLARE_COMPLETION_ONSTACK(wait);
2810 __enqueue_cmd_and_start_io(h, c, reply_queue);
2811 if (timeout_msecs == NO_TIMEOUT) {
2812 /* TODO: get rid of this no-timeout thing */
2813 wait_for_completion_io(&wait);
2816 if (!wait_for_completion_io_timeout(&wait,
2817 msecs_to_jiffies(timeout_msecs))) {
2818 dev_warn(&h->pdev->dev, "Command timed out.\n");
2824 static int hpsa_scsi_do_simple_cmd(struct ctlr_info *h, struct CommandList *c,
2825 int reply_queue, unsigned long timeout_msecs)
2827 if (unlikely(lockup_detected(h))) {
2828 c->err_info->CommandStatus = CMD_CTLR_LOCKUP;
2831 return hpsa_scsi_do_simple_cmd_core(h, c, reply_queue, timeout_msecs);
2834 static u32 lockup_detected(struct ctlr_info *h)
2837 u32 rc, *lockup_detected;
2840 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
2841 rc = *lockup_detected;
2846 #define MAX_DRIVER_CMD_RETRIES 25
2847 static int hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
2848 struct CommandList *c, int data_direction, unsigned long timeout_msecs)
2850 int backoff_time = 10, retry_count = 0;
2854 memset(c->err_info, 0, sizeof(*c->err_info));
2855 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
2860 if (retry_count > 3) {
2861 msleep(backoff_time);
2862 if (backoff_time < 1000)
2865 } while ((check_for_unit_attention(h, c) ||
2866 check_for_busy(h, c)) &&
2867 retry_count <= MAX_DRIVER_CMD_RETRIES);
2868 hpsa_pci_unmap(h->pdev, c, 1, data_direction);
2869 if (retry_count > MAX_DRIVER_CMD_RETRIES)
2874 static void hpsa_print_cmd(struct ctlr_info *h, char *txt,
2875 struct CommandList *c)
2877 const u8 *cdb = c->Request.CDB;
2878 const u8 *lun = c->Header.LUN.LunAddrBytes;
2880 dev_warn(&h->pdev->dev, "%s: LUN:%8phN CDB:%16phN\n",
2884 static void hpsa_scsi_interpret_error(struct ctlr_info *h,
2885 struct CommandList *cp)
2887 const struct ErrorInfo *ei = cp->err_info;
2888 struct device *d = &cp->h->pdev->dev;
2889 u8 sense_key, asc, ascq;
2892 switch (ei->CommandStatus) {
2893 case CMD_TARGET_STATUS:
2894 if (ei->SenseLen > sizeof(ei->SenseInfo))
2895 sense_len = sizeof(ei->SenseInfo);
2897 sense_len = ei->SenseLen;
2898 decode_sense_data(ei->SenseInfo, sense_len,
2899 &sense_key, &asc, &ascq);
2900 hpsa_print_cmd(h, "SCSI status", cp);
2901 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION)
2902 dev_warn(d, "SCSI Status = 02, Sense key = 0x%02x, ASC = 0x%02x, ASCQ = 0x%02x\n",
2903 sense_key, asc, ascq);
2905 dev_warn(d, "SCSI Status = 0x%02x\n", ei->ScsiStatus);
2906 if (ei->ScsiStatus == 0)
2907 dev_warn(d, "SCSI status is abnormally zero. "
2908 "(probably indicates selection timeout "
2909 "reported incorrectly due to a known "
2910 "firmware bug, circa July, 2001.)\n");
2912 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
2914 case CMD_DATA_OVERRUN:
2915 hpsa_print_cmd(h, "overrun condition", cp);
2918 /* controller unfortunately reports SCSI passthru's
2919 * to non-existent targets as invalid commands.
2921 hpsa_print_cmd(h, "invalid command", cp);
2922 dev_warn(d, "probably means device no longer present\n");
2925 case CMD_PROTOCOL_ERR:
2926 hpsa_print_cmd(h, "protocol error", cp);
2928 case CMD_HARDWARE_ERR:
2929 hpsa_print_cmd(h, "hardware error", cp);
2931 case CMD_CONNECTION_LOST:
2932 hpsa_print_cmd(h, "connection lost", cp);
2935 hpsa_print_cmd(h, "aborted", cp);
2937 case CMD_ABORT_FAILED:
2938 hpsa_print_cmd(h, "abort failed", cp);
2940 case CMD_UNSOLICITED_ABORT:
2941 hpsa_print_cmd(h, "unsolicited abort", cp);
2944 hpsa_print_cmd(h, "timed out", cp);
2946 case CMD_UNABORTABLE:
2947 hpsa_print_cmd(h, "unabortable", cp);
2949 case CMD_CTLR_LOCKUP:
2950 hpsa_print_cmd(h, "controller lockup detected", cp);
2953 hpsa_print_cmd(h, "unknown status", cp);
2954 dev_warn(d, "Unknown command status %x\n",
2959 static int hpsa_do_receive_diagnostic(struct ctlr_info *h, u8 *scsi3addr,
2960 u8 page, u8 *buf, size_t bufsize)
2963 struct CommandList *c;
2964 struct ErrorInfo *ei;
2967 if (fill_cmd(c, RECEIVE_DIAGNOSTIC, h, buf, bufsize,
2968 page, scsi3addr, TYPE_CMD)) {
2972 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
2973 PCI_DMA_FROMDEVICE, NO_TIMEOUT);
2977 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
2978 hpsa_scsi_interpret_error(h, c);
2986 static u64 hpsa_get_enclosure_logical_identifier(struct ctlr_info *h,
2993 buf = kzalloc(1024, GFP_KERNEL);
2997 rc = hpsa_do_receive_diagnostic(h, scsi3addr, RECEIVE_DIAGNOSTIC,
3003 sa = get_unaligned_be64(buf+12);
3010 static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
3011 u16 page, unsigned char *buf,
3012 unsigned char bufsize)
3015 struct CommandList *c;
3016 struct ErrorInfo *ei;
3020 if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize,
3021 page, scsi3addr, TYPE_CMD)) {
3025 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
3026 PCI_DMA_FROMDEVICE, NO_TIMEOUT);
3030 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3031 hpsa_scsi_interpret_error(h, c);
3039 static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr,
3040 u8 reset_type, int reply_queue)
3043 struct CommandList *c;
3044 struct ErrorInfo *ei;
3049 /* fill_cmd can't fail here, no data buffer to map. */
3050 (void) fill_cmd(c, reset_type, h, NULL, 0, 0,
3051 scsi3addr, TYPE_MSG);
3052 rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT);
3054 dev_warn(&h->pdev->dev, "Failed to send reset command\n");
3057 /* no unmap needed here because no data xfer. */
3060 if (ei->CommandStatus != 0) {
3061 hpsa_scsi_interpret_error(h, c);
3069 static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c,
3070 struct hpsa_scsi_dev_t *dev,
3071 unsigned char *scsi3addr)
3075 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
3076 struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2;
3078 if (hpsa_is_cmd_idle(c))
3081 switch (c->cmd_type) {
3083 case CMD_IOCTL_PEND:
3084 match = !memcmp(scsi3addr, &c->Header.LUN.LunAddrBytes,
3085 sizeof(c->Header.LUN.LunAddrBytes));
3090 if (c->phys_disk == dev) {
3091 /* HBA mode match */
3094 /* Possible RAID mode -- check each phys dev. */
3095 /* FIXME: Do we need to take out a lock here? If
3096 * so, we could just call hpsa_get_pdisk_of_ioaccel2()
3098 for (i = 0; i < dev->nphysical_disks && !match; i++) {
3099 /* FIXME: an alternate test might be
3101 * match = dev->phys_disk[i]->ioaccel_handle
3102 * == c2->scsi_nexus; */
3103 match = dev->phys_disk[i] == c->phys_disk;
3109 for (i = 0; i < dev->nphysical_disks && !match; i++) {
3110 match = dev->phys_disk[i]->ioaccel_handle ==
3111 le32_to_cpu(ac->it_nexus);
3115 case 0: /* The command is in the middle of being initialized. */
3120 dev_err(&h->pdev->dev, "unexpected cmd_type: %d\n",
3128 static int hpsa_do_reset(struct ctlr_info *h, struct hpsa_scsi_dev_t *dev,
3129 unsigned char *scsi3addr, u8 reset_type, int reply_queue)
3134 /* We can really only handle one reset at a time */
3135 if (mutex_lock_interruptible(&h->reset_mutex) == -EINTR) {
3136 dev_warn(&h->pdev->dev, "concurrent reset wait interrupted.\n");
3140 BUG_ON(atomic_read(&dev->reset_cmds_out) != 0);
3142 for (i = 0; i < h->nr_cmds; i++) {
3143 struct CommandList *c = h->cmd_pool + i;
3144 int refcount = atomic_inc_return(&c->refcount);
3146 if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev, scsi3addr)) {
3147 unsigned long flags;
3150 * Mark the target command as having a reset pending,
3151 * then lock a lock so that the command cannot complete
3152 * while we're considering it. If the command is not
3153 * idle then count it; otherwise revoke the event.
3155 c->reset_pending = dev;
3156 spin_lock_irqsave(&h->lock, flags); /* Implied MB */
3157 if (!hpsa_is_cmd_idle(c))
3158 atomic_inc(&dev->reset_cmds_out);
3160 c->reset_pending = NULL;
3161 spin_unlock_irqrestore(&h->lock, flags);
3167 rc = hpsa_send_reset(h, scsi3addr, reset_type, reply_queue);
3169 wait_event(h->event_sync_wait_queue,
3170 atomic_read(&dev->reset_cmds_out) == 0 ||
3171 lockup_detected(h));
3173 if (unlikely(lockup_detected(h))) {
3174 dev_warn(&h->pdev->dev,
3175 "Controller lockup detected during reset wait\n");
3180 atomic_set(&dev->reset_cmds_out, 0);
3182 rc = wait_for_device_to_become_ready(h, scsi3addr, 0);
3184 mutex_unlock(&h->reset_mutex);
3188 static void hpsa_get_raid_level(struct ctlr_info *h,
3189 unsigned char *scsi3addr, unsigned char *raid_level)
3194 *raid_level = RAID_UNKNOWN;
3195 buf = kzalloc(64, GFP_KERNEL);
3199 if (!hpsa_vpd_page_supported(h, scsi3addr,
3200 HPSA_VPD_LV_DEVICE_GEOMETRY))
3203 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE |
3204 HPSA_VPD_LV_DEVICE_GEOMETRY, buf, 64);
3207 *raid_level = buf[8];
3208 if (*raid_level > RAID_UNKNOWN)
3209 *raid_level = RAID_UNKNOWN;
3215 #define HPSA_MAP_DEBUG
3216 #ifdef HPSA_MAP_DEBUG
3217 static void hpsa_debug_map_buff(struct ctlr_info *h, int rc,
3218 struct raid_map_data *map_buff)
3220 struct raid_map_disk_data *dd = &map_buff->data[0];
3222 u16 map_cnt, row_cnt, disks_per_row;
3227 /* Show details only if debugging has been activated. */
3228 if (h->raid_offload_debug < 2)
3231 dev_info(&h->pdev->dev, "structure_size = %u\n",
3232 le32_to_cpu(map_buff->structure_size));
3233 dev_info(&h->pdev->dev, "volume_blk_size = %u\n",
3234 le32_to_cpu(map_buff->volume_blk_size));
3235 dev_info(&h->pdev->dev, "volume_blk_cnt = 0x%llx\n",
3236 le64_to_cpu(map_buff->volume_blk_cnt));
3237 dev_info(&h->pdev->dev, "physicalBlockShift = %u\n",
3238 map_buff->phys_blk_shift);
3239 dev_info(&h->pdev->dev, "parity_rotation_shift = %u\n",
3240 map_buff->parity_rotation_shift);
3241 dev_info(&h->pdev->dev, "strip_size = %u\n",
3242 le16_to_cpu(map_buff->strip_size));
3243 dev_info(&h->pdev->dev, "disk_starting_blk = 0x%llx\n",
3244 le64_to_cpu(map_buff->disk_starting_blk));
3245 dev_info(&h->pdev->dev, "disk_blk_cnt = 0x%llx\n",
3246 le64_to_cpu(map_buff->disk_blk_cnt));
3247 dev_info(&h->pdev->dev, "data_disks_per_row = %u\n",
3248 le16_to_cpu(map_buff->data_disks_per_row));
3249 dev_info(&h->pdev->dev, "metadata_disks_per_row = %u\n",
3250 le16_to_cpu(map_buff->metadata_disks_per_row));
3251 dev_info(&h->pdev->dev, "row_cnt = %u\n",
3252 le16_to_cpu(map_buff->row_cnt));
3253 dev_info(&h->pdev->dev, "layout_map_count = %u\n",
3254 le16_to_cpu(map_buff->layout_map_count));
3255 dev_info(&h->pdev->dev, "flags = 0x%x\n",
3256 le16_to_cpu(map_buff->flags));
3257 dev_info(&h->pdev->dev, "encryption = %s\n",
3258 le16_to_cpu(map_buff->flags) &
3259 RAID_MAP_FLAG_ENCRYPT_ON ? "ON" : "OFF");
3260 dev_info(&h->pdev->dev, "dekindex = %u\n",
3261 le16_to_cpu(map_buff->dekindex));
3262 map_cnt = le16_to_cpu(map_buff->layout_map_count);
3263 for (map = 0; map < map_cnt; map++) {
3264 dev_info(&h->pdev->dev, "Map%u:\n", map);
3265 row_cnt = le16_to_cpu(map_buff->row_cnt);
3266 for (row = 0; row < row_cnt; row++) {
3267 dev_info(&h->pdev->dev, " Row%u:\n", row);
3269 le16_to_cpu(map_buff->data_disks_per_row);
3270 for (col = 0; col < disks_per_row; col++, dd++)
3271 dev_info(&h->pdev->dev,
3272 " D%02u: h=0x%04x xor=%u,%u\n",
3273 col, dd->ioaccel_handle,
3274 dd->xor_mult[0], dd->xor_mult[1]);
3276 le16_to_cpu(map_buff->metadata_disks_per_row);
3277 for (col = 0; col < disks_per_row; col++, dd++)
3278 dev_info(&h->pdev->dev,
3279 " M%02u: h=0x%04x xor=%u,%u\n",
3280 col, dd->ioaccel_handle,
3281 dd->xor_mult[0], dd->xor_mult[1]);
3286 static void hpsa_debug_map_buff(__attribute__((unused)) struct ctlr_info *h,
3287 __attribute__((unused)) int rc,
3288 __attribute__((unused)) struct raid_map_data *map_buff)
3293 static int hpsa_get_raid_map(struct ctlr_info *h,
3294 unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
3297 struct CommandList *c;
3298 struct ErrorInfo *ei;
3302 if (fill_cmd(c, HPSA_GET_RAID_MAP, h, &this_device->raid_map,
3303 sizeof(this_device->raid_map), 0,
3304 scsi3addr, TYPE_CMD)) {
3305 dev_warn(&h->pdev->dev, "hpsa_get_raid_map fill_cmd failed\n");
3309 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
3310 PCI_DMA_FROMDEVICE, NO_TIMEOUT);
3314 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3315 hpsa_scsi_interpret_error(h, c);
3321 /* @todo in the future, dynamically allocate RAID map memory */
3322 if (le32_to_cpu(this_device->raid_map.structure_size) >
3323 sizeof(this_device->raid_map)) {
3324 dev_warn(&h->pdev->dev, "RAID map size is too large!\n");
3327 hpsa_debug_map_buff(h, rc, &this_device->raid_map);
3334 static int hpsa_bmic_sense_subsystem_information(struct ctlr_info *h,
3335 unsigned char scsi3addr[], u16 bmic_device_index,
3336 struct bmic_sense_subsystem_info *buf, size_t bufsize)
3339 struct CommandList *c;
3340 struct ErrorInfo *ei;
3344 rc = fill_cmd(c, BMIC_SENSE_SUBSYSTEM_INFORMATION, h, buf, bufsize,
3345 0, RAID_CTLR_LUNID, TYPE_CMD);
3349 c->Request.CDB[2] = bmic_device_index & 0xff;
3350 c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff;
3352 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
3353 PCI_DMA_FROMDEVICE, NO_TIMEOUT);
3357 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3358 hpsa_scsi_interpret_error(h, c);
3366 static int hpsa_bmic_id_controller(struct ctlr_info *h,
3367 struct bmic_identify_controller *buf, size_t bufsize)
3370 struct CommandList *c;
3371 struct ErrorInfo *ei;
3375 rc = fill_cmd(c, BMIC_IDENTIFY_CONTROLLER, h, buf, bufsize,
3376 0, RAID_CTLR_LUNID, TYPE_CMD);
3380 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
3381 PCI_DMA_FROMDEVICE, NO_TIMEOUT);
3385 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3386 hpsa_scsi_interpret_error(h, c);
3394 static int hpsa_bmic_id_physical_device(struct ctlr_info *h,
3395 unsigned char scsi3addr[], u16 bmic_device_index,
3396 struct bmic_identify_physical_device *buf, size_t bufsize)
3399 struct CommandList *c;
3400 struct ErrorInfo *ei;
3403 rc = fill_cmd(c, BMIC_IDENTIFY_PHYSICAL_DEVICE, h, buf, bufsize,
3404 0, RAID_CTLR_LUNID, TYPE_CMD);
3408 c->Request.CDB[2] = bmic_device_index & 0xff;
3409 c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff;
3411 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE,
3414 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3415 hpsa_scsi_interpret_error(h, c);
3425 * get enclosure information
3426 * struct ReportExtendedLUNdata *rlep - Used for BMIC drive number
3427 * struct hpsa_scsi_dev_t *encl_dev - device entry for enclosure
3428 * Uses id_physical_device to determine the box_index.
3430 static void hpsa_get_enclosure_info(struct ctlr_info *h,
3431 unsigned char *scsi3addr,
3432 struct ReportExtendedLUNdata *rlep, int rle_index,
3433 struct hpsa_scsi_dev_t *encl_dev)
3436 struct CommandList *c = NULL;
3437 struct ErrorInfo *ei = NULL;
3438 struct bmic_sense_storage_box_params *bssbp = NULL;
3439 struct bmic_identify_physical_device *id_phys = NULL;
3440 struct ext_report_lun_entry *rle = &rlep->LUN[rle_index];
3441 u16 bmic_device_index = 0;
3443 bmic_device_index = GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]);
3445 encl_dev->sas_address =
3446 hpsa_get_enclosure_logical_identifier(h, scsi3addr);
3448 if (encl_dev->target == -1 || encl_dev->lun == -1) {
3453 if (bmic_device_index == 0xFF00 || MASKED_DEVICE(&rle->lunid[0])) {
3458 bssbp = kzalloc(sizeof(*bssbp), GFP_KERNEL);
3462 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
3466 rc = hpsa_bmic_id_physical_device(h, scsi3addr, bmic_device_index,
3467 id_phys, sizeof(*id_phys));
3469 dev_warn(&h->pdev->dev, "%s: id_phys failed %d bdi[0x%x]\n",
3470 __func__, encl_dev->external, bmic_device_index);
3476 rc = fill_cmd(c, BMIC_SENSE_STORAGE_BOX_PARAMS, h, bssbp,
3477 sizeof(*bssbp), 0, RAID_CTLR_LUNID, TYPE_CMD);
3482 if (id_phys->phys_connector[1] == 'E')
3483 c->Request.CDB[5] = id_phys->box_index;
3485 c->Request.CDB[5] = 0;
3487 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE,
3493 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
3498 encl_dev->box[id_phys->active_path_number] = bssbp->phys_box_on_port;
3499 memcpy(&encl_dev->phys_connector[id_phys->active_path_number],
3500 bssbp->phys_connector, sizeof(bssbp->phys_connector));
3511 hpsa_show_dev_msg(KERN_INFO, h, encl_dev,
3512 "Error, could not get enclosure information");
3515 static u64 hpsa_get_sas_address_from_report_physical(struct ctlr_info *h,
3516 unsigned char *scsi3addr)
3518 struct ReportExtendedLUNdata *physdev;
3523 physdev = kzalloc(sizeof(*physdev), GFP_KERNEL);
3527 if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) {
3528 dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
3532 nphysicals = get_unaligned_be32(physdev->LUNListLength) / 24;
3534 for (i = 0; i < nphysicals; i++)
3535 if (!memcmp(&physdev->LUN[i].lunid[0], scsi3addr, 8)) {
3536 sa = get_unaligned_be64(&physdev->LUN[i].wwid[0]);
3545 static void hpsa_get_sas_address(struct ctlr_info *h, unsigned char *scsi3addr,
3546 struct hpsa_scsi_dev_t *dev)
3551 if (is_hba_lunid(scsi3addr)) {
3552 struct bmic_sense_subsystem_info *ssi;
3554 ssi = kzalloc(sizeof(*ssi), GFP_KERNEL);
3558 rc = hpsa_bmic_sense_subsystem_information(h,
3559 scsi3addr, 0, ssi, sizeof(*ssi));
3561 sa = get_unaligned_be64(ssi->primary_world_wide_id);
3562 h->sas_address = sa;
3567 sa = hpsa_get_sas_address_from_report_physical(h, scsi3addr);
3569 dev->sas_address = sa;
3572 static void hpsa_ext_ctrl_present(struct ctlr_info *h,
3573 struct ReportExtendedLUNdata *physdev)
3578 if (h->discovery_polling)
3581 nphysicals = (get_unaligned_be32(physdev->LUNListLength) / 24) + 1;
3583 for (i = 0; i < nphysicals; i++) {
3584 if (physdev->LUN[i].device_type ==
3585 BMIC_DEVICE_TYPE_CONTROLLER
3586 && !is_hba_lunid(physdev->LUN[i].lunid)) {
3587 dev_info(&h->pdev->dev,
3588 "External controller present, activate discovery polling and disable rld caching\n");
3589 hpsa_disable_rld_caching(h);
3590 h->discovery_polling = 1;
3596 /* Get a device id from inquiry page 0x83 */
3597 static bool hpsa_vpd_page_supported(struct ctlr_info *h,
3598 unsigned char scsi3addr[], u8 page)
3603 unsigned char *buf, bufsize;
3605 buf = kzalloc(256, GFP_KERNEL);
3609 /* Get the size of the page list first */
3610 rc = hpsa_scsi_do_inquiry(h, scsi3addr,
3611 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
3612 buf, HPSA_VPD_HEADER_SZ);
3614 goto exit_unsupported;
3616 if ((pages + HPSA_VPD_HEADER_SZ) <= 255)
3617 bufsize = pages + HPSA_VPD_HEADER_SZ;
3621 /* Get the whole VPD page list */
3622 rc = hpsa_scsi_do_inquiry(h, scsi3addr,
3623 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
3626 goto exit_unsupported;
3629 for (i = 1; i <= pages; i++)
3630 if (buf[3 + i] == page)
3631 goto exit_supported;
3641 * Called during a scan operation.
3642 * Sets ioaccel status on the new device list, not the existing device list
3644 * The device list used during I/O will be updated later in
3645 * adjust_hpsa_scsi_table.
3647 static void hpsa_get_ioaccel_status(struct ctlr_info *h,
3648 unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
3654 this_device->offload_config = 0;
3655 this_device->offload_enabled = 0;
3656 this_device->offload_to_be_enabled = 0;
3658 buf = kzalloc(64, GFP_KERNEL);
3661 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_IOACCEL_STATUS))
3663 rc = hpsa_scsi_do_inquiry(h, scsi3addr,
3664 VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, buf, 64);
3668 #define IOACCEL_STATUS_BYTE 4
3669 #define OFFLOAD_CONFIGURED_BIT 0x01
3670 #define OFFLOAD_ENABLED_BIT 0x02
3671 ioaccel_status = buf[IOACCEL_STATUS_BYTE];
3672 this_device->offload_config =
3673 !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT);
3674 if (this_device->offload_config) {
3675 this_device->offload_to_be_enabled =
3676 !!(ioaccel_status & OFFLOAD_ENABLED_BIT);
3677 if (hpsa_get_raid_map(h, scsi3addr, this_device))
3678 this_device->offload_to_be_enabled = 0;
3686 /* Get the device id from inquiry page 0x83 */
3687 static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
3688 unsigned char *device_id, int index, int buflen)
3693 /* Does controller have VPD for device id? */
3694 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_DEVICE_ID))
3695 return 1; /* not supported */
3697 buf = kzalloc(64, GFP_KERNEL);
3701 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE |
3702 HPSA_VPD_LV_DEVICE_ID, buf, 64);
3706 memcpy(device_id, &buf[8], buflen);
3711 return rc; /*0 - got id, otherwise, didn't */
3714 static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
3715 void *buf, int bufsize,
3716 int extended_response)
3719 struct CommandList *c;
3720 unsigned char scsi3addr[8];
3721 struct ErrorInfo *ei;
3725 /* address the controller */
3726 memset(scsi3addr, 0, sizeof(scsi3addr));
3727 if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
3728 buf, bufsize, 0, scsi3addr, TYPE_CMD)) {
3732 if (extended_response)
3733 c->Request.CDB[1] = extended_response;
3734 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
3735 PCI_DMA_FROMDEVICE, NO_TIMEOUT);
3739 if (ei->CommandStatus != 0 &&
3740 ei->CommandStatus != CMD_DATA_UNDERRUN) {
3741 hpsa_scsi_interpret_error(h, c);
3744 struct ReportLUNdata *rld = buf;
3746 if (rld->extended_response_flag != extended_response) {
3747 if (!h->legacy_board) {
3748 dev_err(&h->pdev->dev,
3749 "report luns requested format %u, got %u\n",
3751 rld->extended_response_flag);
3762 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
3763 struct ReportExtendedLUNdata *buf, int bufsize)
3766 struct ReportLUNdata *lbuf;
3768 rc = hpsa_scsi_do_report_luns(h, 0, buf, bufsize,
3769 HPSA_REPORT_PHYS_EXTENDED);
3770 if (!rc || rc != -EOPNOTSUPP)
3773 /* REPORT PHYS EXTENDED is not supported */
3774 lbuf = kzalloc(sizeof(*lbuf), GFP_KERNEL);
3778 rc = hpsa_scsi_do_report_luns(h, 0, lbuf, sizeof(*lbuf), 0);
3783 /* Copy ReportLUNdata header */
3784 memcpy(buf, lbuf, 8);
3785 nphys = be32_to_cpu(*((__be32 *)lbuf->LUNListLength)) / 8;
3786 for (i = 0; i < nphys; i++)
3787 memcpy(buf->LUN[i].lunid, lbuf->LUN[i], 8);
3793 static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
3794 struct ReportLUNdata *buf, int bufsize)
3796 return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
3799 static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
3800 int bus, int target, int lun)
3803 device->target = target;
3807 /* Use VPD inquiry to get details of volume status */
3808 static int hpsa_get_volume_status(struct ctlr_info *h,
3809 unsigned char scsi3addr[])
3816 buf = kzalloc(64, GFP_KERNEL);
3818 return HPSA_VPD_LV_STATUS_UNSUPPORTED;
3820 /* Does controller have VPD for logical volume status? */
3821 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_STATUS))
3824 /* Get the size of the VPD return buffer */
3825 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
3826 buf, HPSA_VPD_HEADER_SZ);
3831 /* Now get the whole VPD buffer */
3832 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
3833 buf, size + HPSA_VPD_HEADER_SZ);
3836 status = buf[4]; /* status byte */
3842 return HPSA_VPD_LV_STATUS_UNSUPPORTED;
3845 /* Determine offline status of a volume.
3848 * 0xff (offline for unknown reasons)
3849 * # (integer code indicating one of several NOT READY states
3850 * describing why a volume is to be kept offline)
3852 static unsigned char hpsa_volume_offline(struct ctlr_info *h,
3853 unsigned char scsi3addr[])
3855 struct CommandList *c;
3856 unsigned char *sense;
3857 u8 sense_key, asc, ascq;
3862 #define ASC_LUN_NOT_READY 0x04
3863 #define ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS 0x04
3864 #define ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ 0x02
3868 (void) fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, scsi3addr, TYPE_CMD);
3869 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
3873 return HPSA_VPD_LV_STATUS_UNSUPPORTED;
3875 sense = c->err_info->SenseInfo;
3876 if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo))
3877 sense_len = sizeof(c->err_info->SenseInfo);
3879 sense_len = c->err_info->SenseLen;
3880 decode_sense_data(sense, sense_len, &sense_key, &asc, &ascq);
3881 cmd_status = c->err_info->CommandStatus;
3882 scsi_status = c->err_info->ScsiStatus;
3885 /* Determine the reason for not ready state */
3886 ldstat = hpsa_get_volume_status(h, scsi3addr);
3888 /* Keep volume offline in certain cases: */
3890 case HPSA_LV_FAILED:
3891 case HPSA_LV_UNDERGOING_ERASE:
3892 case HPSA_LV_NOT_AVAILABLE:
3893 case HPSA_LV_UNDERGOING_RPI:
3894 case HPSA_LV_PENDING_RPI:
3895 case HPSA_LV_ENCRYPTED_NO_KEY:
3896 case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
3897 case HPSA_LV_UNDERGOING_ENCRYPTION:
3898 case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
3899 case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
3901 case HPSA_VPD_LV_STATUS_UNSUPPORTED:
3902 /* If VPD status page isn't available,
3903 * use ASC/ASCQ to determine state
3905 if ((ascq == ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS) ||
3906 (ascq == ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ))
3915 static int hpsa_update_device_info(struct ctlr_info *h,
3916 unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device,
3917 unsigned char *is_OBDR_device)
3920 #define OBDR_SIG_OFFSET 43
3921 #define OBDR_TAPE_SIG "$DR-10"
3922 #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1)
3923 #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN)
3925 unsigned char *inq_buff;
3926 unsigned char *obdr_sig;
3929 inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
3935 /* Do an inquiry to the device to see what it is. */
3936 if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
3937 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
3938 dev_err(&h->pdev->dev,
3939 "%s: inquiry failed, device will be skipped.\n",
3941 rc = HPSA_INQUIRY_FAILED;
3945 scsi_sanitize_inquiry_string(&inq_buff[8], 8);
3946 scsi_sanitize_inquiry_string(&inq_buff[16], 16);
3948 this_device->devtype = (inq_buff[0] & 0x1f);
3949 memcpy(this_device->scsi3addr, scsi3addr, 8);
3950 memcpy(this_device->vendor, &inq_buff[8],
3951 sizeof(this_device->vendor));
3952 memcpy(this_device->model, &inq_buff[16],
3953 sizeof(this_device->model));
3954 this_device->rev = inq_buff[2];
3955 memset(this_device->device_id, 0,
3956 sizeof(this_device->device_id));
3957 if (hpsa_get_device_id(h, scsi3addr, this_device->device_id, 8,
3958 sizeof(this_device->device_id)) < 0)
3959 dev_err(&h->pdev->dev,
3960 "hpsa%d: %s: can't get device id for host %d:C0:T%d:L%d\t%s\t%.16s\n",
3962 h->scsi_host->host_no,
3963 this_device->target, this_device->lun,
3964 scsi_device_type(this_device->devtype),
3965 this_device->model);
3967 if ((this_device->devtype == TYPE_DISK ||
3968 this_device->devtype == TYPE_ZBC) &&
3969 is_logical_dev_addr_mode(scsi3addr)) {
3970 unsigned char volume_offline;
3972 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
3973 if (h->fw_support & MISC_FW_RAID_OFFLOAD_BASIC)
3974 hpsa_get_ioaccel_status(h, scsi3addr, this_device);
3975 volume_offline = hpsa_volume_offline(h, scsi3addr);
3976 if (volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED &&
3979 * Legacy boards might not support volume status
3981 dev_info(&h->pdev->dev,
3982 "C0:T%d:L%d Volume status not available, assuming online.\n",
3983 this_device->target, this_device->lun);
3986 this_device->volume_offline = volume_offline;
3987 if (volume_offline == HPSA_LV_FAILED) {
3988 rc = HPSA_LV_FAILED;
3989 dev_err(&h->pdev->dev,
3990 "%s: LV failed, device will be skipped.\n",
3995 this_device->raid_level = RAID_UNKNOWN;
3996 this_device->offload_config = 0;
3997 this_device->offload_enabled = 0;
3998 this_device->offload_to_be_enabled = 0;
3999 this_device->hba_ioaccel_enabled = 0;
4000 this_device->volume_offline = 0;
4001 this_device->queue_depth = h->nr_cmds;
4004 if (this_device->external)
4005 this_device->queue_depth = EXTERNAL_QD;
4007 if (is_OBDR_device) {
4008 /* See if this is a One-Button-Disaster-Recovery device
4009 * by looking for "$DR-10" at offset 43 in inquiry data.
4011 obdr_sig = &inq_buff[OBDR_SIG_OFFSET];
4012 *is_OBDR_device = (this_device->devtype == TYPE_ROM &&
4013 strncmp(obdr_sig, OBDR_TAPE_SIG,
4014 OBDR_SIG_LEN) == 0);
4025 * Helper function to assign bus, target, lun mapping of devices.
4026 * Logical drive target and lun are assigned at this time, but
4027 * physical device lun and target assignment are deferred (assigned
4028 * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
4030 static void figure_bus_target_lun(struct ctlr_info *h,
4031 u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device)
4033 u32 lunid = get_unaligned_le32(lunaddrbytes);
4035 if (!is_logical_dev_addr_mode(lunaddrbytes)) {
4036 /* physical device, target and lun filled in later */
4037 if (is_hba_lunid(lunaddrbytes)) {
4038 int bus = HPSA_HBA_BUS;
4041 bus = HPSA_LEGACY_HBA_BUS;
4042 hpsa_set_bus_target_lun(device,
4043 bus, 0, lunid & 0x3fff);
4045 /* defer target, lun assignment for physical devices */
4046 hpsa_set_bus_target_lun(device,
4047 HPSA_PHYSICAL_DEVICE_BUS, -1, -1);
4050 /* It's a logical device */
4051 if (device->external) {
4052 hpsa_set_bus_target_lun(device,
4053 HPSA_EXTERNAL_RAID_VOLUME_BUS, (lunid >> 16) & 0x3fff,
4057 hpsa_set_bus_target_lun(device, HPSA_RAID_VOLUME_BUS,
4061 static int figure_external_status(struct ctlr_info *h, int raid_ctlr_position,
4062 int i, int nphysicals, int nlocal_logicals)
4064 /* In report logicals, local logicals are listed first,
4065 * then any externals.
4067 int logicals_start = nphysicals + (raid_ctlr_position == 0);
4069 if (i == raid_ctlr_position)
4072 if (i < logicals_start)
4075 /* i is in logicals range, but still within local logicals */
4076 if ((i - nphysicals - (raid_ctlr_position == 0)) < nlocal_logicals)
4079 return 1; /* it's an external lun */
4083 * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev,
4084 * logdev. The number of luns in physdev and logdev are returned in
4085 * *nphysicals and *nlogicals, respectively.
4086 * Returns 0 on success, -1 otherwise.
4088 static int hpsa_gather_lun_info(struct ctlr_info *h,
4089 struct ReportExtendedLUNdata *physdev, u32 *nphysicals,
4090 struct ReportLUNdata *logdev, u32 *nlogicals)
4092 if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) {
4093 dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
4096 *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 24;
4097 if (*nphysicals > HPSA_MAX_PHYS_LUN) {
4098 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded. %d LUNs ignored.\n",
4099 HPSA_MAX_PHYS_LUN, *nphysicals - HPSA_MAX_PHYS_LUN);
4100 *nphysicals = HPSA_MAX_PHYS_LUN;
4102 if (hpsa_scsi_do_report_log_luns(h, logdev, sizeof(*logdev))) {
4103 dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
4106 *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
4107 /* Reject Logicals in excess of our max capability. */
4108 if (*nlogicals > HPSA_MAX_LUN) {
4109 dev_warn(&h->pdev->dev,
4110 "maximum logical LUNs (%d) exceeded. "
4111 "%d LUNs ignored.\n", HPSA_MAX_LUN,
4112 *nlogicals - HPSA_MAX_LUN);
4113 *nlogicals = HPSA_MAX_LUN;
4115 if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
4116 dev_warn(&h->pdev->dev,
4117 "maximum logical + physical LUNs (%d) exceeded. "
4118 "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
4119 *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
4120 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
4125 static u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position,
4126 int i, int nphysicals, int nlogicals,
4127 struct ReportExtendedLUNdata *physdev_list,
4128 struct ReportLUNdata *logdev_list)
4130 /* Helper function, figure out where the LUN ID info is coming from
4131 * given index i, lists of physical and logical devices, where in
4132 * the list the raid controller is supposed to appear (first or last)
4135 int logicals_start = nphysicals + (raid_ctlr_position == 0);
4136 int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
4138 if (i == raid_ctlr_position)
4139 return RAID_CTLR_LUNID;
4141 if (i < logicals_start)
4142 return &physdev_list->LUN[i -
4143 (raid_ctlr_position == 0)].lunid[0];
4145 if (i < last_device)
4146 return &logdev_list->LUN[i - nphysicals -
4147 (raid_ctlr_position == 0)][0];
4152 /* get physical drive ioaccel handle and queue depth */
4153 static void hpsa_get_ioaccel_drive_info(struct ctlr_info *h,
4154 struct hpsa_scsi_dev_t *dev,
4155 struct ReportExtendedLUNdata *rlep, int rle_index,
4156 struct bmic_identify_physical_device *id_phys)
4159 struct ext_report_lun_entry *rle;
4161 rle = &rlep->LUN[rle_index];
4163 dev->ioaccel_handle = rle->ioaccel_handle;
4164 if ((rle->device_flags & 0x08) && dev->ioaccel_handle)
4165 dev->hba_ioaccel_enabled = 1;
4166 memset(id_phys, 0, sizeof(*id_phys));
4167 rc = hpsa_bmic_id_physical_device(h, &rle->lunid[0],
4168 GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]), id_phys,
4171 /* Reserve space for FW operations */
4172 #define DRIVE_CMDS_RESERVED_FOR_FW 2
4173 #define DRIVE_QUEUE_DEPTH 7
4175 le16_to_cpu(id_phys->current_queue_depth_limit) -
4176 DRIVE_CMDS_RESERVED_FOR_FW;
4178 dev->queue_depth = DRIVE_QUEUE_DEPTH; /* conservative */
4181 static void hpsa_get_path_info(struct hpsa_scsi_dev_t *this_device,
4182 struct ReportExtendedLUNdata *rlep, int rle_index,
4183 struct bmic_identify_physical_device *id_phys)
4185 struct ext_report_lun_entry *rle = &rlep->LUN[rle_index];
4187 if ((rle->device_flags & 0x08) && this_device->ioaccel_handle)
4188 this_device->hba_ioaccel_enabled = 1;
4190 memcpy(&this_device->active_path_index,
4191 &id_phys->active_path_number,
4192 sizeof(this_device->active_path_index));
4193 memcpy(&this_device->path_map,
4194 &id_phys->redundant_path_present_map,
4195 sizeof(this_device->path_map));
4196 memcpy(&this_device->box,
4197 &id_phys->alternate_paths_phys_box_on_port,
4198 sizeof(this_device->box));
4199 memcpy(&this_device->phys_connector,
4200 &id_phys->alternate_paths_phys_connector,
4201 sizeof(this_device->phys_connector));
4202 memcpy(&this_device->bay,
4203 &id_phys->phys_bay_in_box,
4204 sizeof(this_device->bay));
4207 /* get number of local logical disks. */
4208 static int hpsa_set_local_logical_count(struct ctlr_info *h,
4209 struct bmic_identify_controller *id_ctlr,
4215 dev_warn(&h->pdev->dev, "%s: id_ctlr buffer is NULL.\n",
4219 memset(id_ctlr, 0, sizeof(*id_ctlr));
4220 rc = hpsa_bmic_id_controller(h, id_ctlr, sizeof(*id_ctlr));
4222 if (id_ctlr->configured_logical_drive_count < 255)
4223 *nlocals = id_ctlr->configured_logical_drive_count;
4225 *nlocals = le16_to_cpu(
4226 id_ctlr->extended_logical_unit_count);
4232 static bool hpsa_is_disk_spare(struct ctlr_info *h, u8 *lunaddrbytes)
4234 struct bmic_identify_physical_device *id_phys;
4235 bool is_spare = false;
4238 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
4242 rc = hpsa_bmic_id_physical_device(h,
4244 GET_BMIC_DRIVE_NUMBER(lunaddrbytes),
4245 id_phys, sizeof(*id_phys));
4247 is_spare = (id_phys->more_flags >> 6) & 0x01;
4253 #define RPL_DEV_FLAG_NON_DISK 0x1
4254 #define RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED 0x2
4255 #define RPL_DEV_FLAG_UNCONFIG_DISK 0x4
4257 #define BMIC_DEVICE_TYPE_ENCLOSURE 6
4259 static bool hpsa_skip_device(struct ctlr_info *h, u8 *lunaddrbytes,
4260 struct ext_report_lun_entry *rle)
4265 if (!MASKED_DEVICE(lunaddrbytes))
4268 device_flags = rle->device_flags;
4269 device_type = rle->device_type;
4271 if (device_flags & RPL_DEV_FLAG_NON_DISK) {
4272 if (device_type == BMIC_DEVICE_TYPE_ENCLOSURE)
4277 if (!(device_flags & RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED))
4280 if (device_flags & RPL_DEV_FLAG_UNCONFIG_DISK)
4284 * Spares may be spun down, we do not want to
4285 * do an Inquiry to a RAID set spare drive as
4286 * that would have them spun up, that is a
4287 * performance hit because I/O to the RAID device
4288 * stops while the spin up occurs which can take
4291 if (hpsa_is_disk_spare(h, lunaddrbytes))
4297 static void hpsa_update_scsi_devices(struct ctlr_info *h)
4299 /* the idea here is we could get notified
4300 * that some devices have changed, so we do a report
4301 * physical luns and report logical luns cmd, and adjust
4302 * our list of devices accordingly.
4304 * The scsi3addr's of devices won't change so long as the
4305 * adapter is not reset. That means we can rescan and
4306 * tell which devices we already know about, vs. new
4307 * devices, vs. disappearing devices.
4309 struct ReportExtendedLUNdata *physdev_list = NULL;
4310 struct ReportLUNdata *logdev_list = NULL;
4311 struct bmic_identify_physical_device *id_phys = NULL;
4312 struct bmic_identify_controller *id_ctlr = NULL;
4315 u32 nlocal_logicals = 0;
4316 u32 ndev_allocated = 0;
4317 struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
4319 int i, n_ext_target_devs, ndevs_to_allocate;
4320 int raid_ctlr_position;
4321 bool physical_device;
4322 DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS);
4324 currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL);
4325 physdev_list = kzalloc(sizeof(*physdev_list), GFP_KERNEL);
4326 logdev_list = kzalloc(sizeof(*logdev_list), GFP_KERNEL);
4327 tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
4328 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
4329 id_ctlr = kzalloc(sizeof(*id_ctlr), GFP_KERNEL);
4331 if (!currentsd || !physdev_list || !logdev_list ||
4332 !tmpdevice || !id_phys || !id_ctlr) {
4333 dev_err(&h->pdev->dev, "out of memory\n");
4336 memset(lunzerobits, 0, sizeof(lunzerobits));
4338 h->drv_req_rescan = 0; /* cancel scheduled rescan - we're doing it. */
4340 if (hpsa_gather_lun_info(h, physdev_list, &nphysicals,
4341 logdev_list, &nlogicals)) {
4342 h->drv_req_rescan = 1;
4346 /* Set number of local logicals (non PTRAID) */
4347 if (hpsa_set_local_logical_count(h, id_ctlr, &nlocal_logicals)) {
4348 dev_warn(&h->pdev->dev,
4349 "%s: Can't determine number of local logical devices.\n",
4353 /* We might see up to the maximum number of logical and physical disks
4354 * plus external target devices, and a device for the local RAID
4357 ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1;
4359 hpsa_ext_ctrl_present(h, physdev_list);
4361 /* Allocate the per device structures */
4362 for (i = 0; i < ndevs_to_allocate; i++) {
4363 if (i >= HPSA_MAX_DEVICES) {
4364 dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded."
4365 " %d devices ignored.\n", HPSA_MAX_DEVICES,
4366 ndevs_to_allocate - HPSA_MAX_DEVICES);
4370 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
4371 if (!currentsd[i]) {
4372 h->drv_req_rescan = 1;
4378 if (is_scsi_rev_5(h))
4379 raid_ctlr_position = 0;
4381 raid_ctlr_position = nphysicals + nlogicals;
4383 /* adjust our table of devices */
4384 n_ext_target_devs = 0;
4385 for (i = 0; i < nphysicals + nlogicals + 1; i++) {
4386 u8 *lunaddrbytes, is_OBDR = 0;
4388 int phys_dev_index = i - (raid_ctlr_position == 0);
4389 bool skip_device = false;
4391 memset(tmpdevice, 0, sizeof(*tmpdevice));
4393 physical_device = i < nphysicals + (raid_ctlr_position == 0);
4395 /* Figure out where the LUN ID info is coming from */
4396 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
4397 i, nphysicals, nlogicals, physdev_list, logdev_list);
4399 /* Determine if this is a lun from an external target array */
4400 tmpdevice->external =
4401 figure_external_status(h, raid_ctlr_position, i,
4402 nphysicals, nlocal_logicals);
4405 * Skip over some devices such as a spare.
4407 if (!tmpdevice->external && physical_device) {
4408 skip_device = hpsa_skip_device(h, lunaddrbytes,
4409 &physdev_list->LUN[phys_dev_index]);
4414 /* Get device type, vendor, model, device id, raid_map */
4415 rc = hpsa_update_device_info(h, lunaddrbytes, tmpdevice,
4417 if (rc == -ENOMEM) {
4418 dev_warn(&h->pdev->dev,
4419 "Out of memory, rescan deferred.\n");
4420 h->drv_req_rescan = 1;
4424 h->drv_req_rescan = 1;
4428 figure_bus_target_lun(h, lunaddrbytes, tmpdevice);
4429 this_device = currentsd[ncurrent];
4431 *this_device = *tmpdevice;
4432 this_device->physical_device = physical_device;
4435 * Expose all devices except for physical devices that
4438 if (MASKED_DEVICE(lunaddrbytes) && this_device->physical_device)
4439 this_device->expose_device = 0;
4441 this_device->expose_device = 1;
4445 * Get the SAS address for physical devices that are exposed.
4447 if (this_device->physical_device && this_device->expose_device)
4448 hpsa_get_sas_address(h, lunaddrbytes, this_device);
4450 switch (this_device->devtype) {
4452 /* We don't *really* support actual CD-ROM devices,
4453 * just "One Button Disaster Recovery" tape drive
4454 * which temporarily pretends to be a CD-ROM drive.
4455 * So we check that the device is really an OBDR tape
4456 * device by checking for "$DR-10" in bytes 43-48 of
4464 if (this_device->physical_device) {
4465 /* The disk is in HBA mode. */
4466 /* Never use RAID mapper in HBA mode. */
4467 this_device->offload_enabled = 0;
4468 hpsa_get_ioaccel_drive_info(h, this_device,
4469 physdev_list, phys_dev_index, id_phys);
4470 hpsa_get_path_info(this_device,
4471 physdev_list, phys_dev_index, id_phys);
4476 case TYPE_MEDIUM_CHANGER:
4479 case TYPE_ENCLOSURE:
4480 if (!this_device->external)
4481 hpsa_get_enclosure_info(h, lunaddrbytes,
4482 physdev_list, phys_dev_index,
4487 /* Only present the Smartarray HBA as a RAID controller.
4488 * If it's a RAID controller other than the HBA itself
4489 * (an external RAID controller, MSA500 or similar)
4492 if (!is_hba_lunid(lunaddrbytes))
4499 if (ncurrent >= HPSA_MAX_DEVICES)
4503 if (h->sas_host == NULL) {
4506 rc = hpsa_add_sas_host(h);
4508 dev_warn(&h->pdev->dev,
4509 "Could not add sas host %d\n", rc);
4514 adjust_hpsa_scsi_table(h, currentsd, ncurrent);
4517 for (i = 0; i < ndev_allocated; i++)
4518 kfree(currentsd[i]);
4520 kfree(physdev_list);
4526 static void hpsa_set_sg_descriptor(struct SGDescriptor *desc,
4527 struct scatterlist *sg)
4529 u64 addr64 = (u64) sg_dma_address(sg);
4530 unsigned int len = sg_dma_len(sg);
4532 desc->Addr = cpu_to_le64(addr64);
4533 desc->Len = cpu_to_le32(len);
4538 * hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
4539 * dma mapping and fills in the scatter gather entries of the
4542 static int hpsa_scatter_gather(struct ctlr_info *h,
4543 struct CommandList *cp,
4544 struct scsi_cmnd *cmd)
4546 struct scatterlist *sg;
4547 int use_sg, i, sg_limit, chained, last_sg;
4548 struct SGDescriptor *curr_sg;
4550 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
4552 use_sg = scsi_dma_map(cmd);
4557 goto sglist_finished;
4560 * If the number of entries is greater than the max for a single list,
4561 * then we have a chained list; we will set up all but one entry in the
4562 * first list (the last entry is saved for link information);
4563 * otherwise, we don't have a chained list and we'll set up at each of
4564 * the entries in the one list.
4567 chained = use_sg > h->max_cmd_sg_entries;
4568 sg_limit = chained ? h->max_cmd_sg_entries - 1 : use_sg;
4569 last_sg = scsi_sg_count(cmd) - 1;
4570 scsi_for_each_sg(cmd, sg, sg_limit, i) {
4571 hpsa_set_sg_descriptor(curr_sg, sg);
4577 * Continue with the chained list. Set curr_sg to the chained
4578 * list. Modify the limit to the total count less the entries
4579 * we've already set up. Resume the scan at the list entry
4580 * where the previous loop left off.
4582 curr_sg = h->cmd_sg_list[cp->cmdindex];
4583 sg_limit = use_sg - sg_limit;
4584 for_each_sg(sg, sg, sg_limit, i) {
4585 hpsa_set_sg_descriptor(curr_sg, sg);
4590 /* Back the pointer up to the last entry and mark it as "last". */
4591 (curr_sg - 1)->Ext = cpu_to_le32(HPSA_SG_LAST);
4593 if (use_sg + chained > h->maxSG)
4594 h->maxSG = use_sg + chained;
4597 cp->Header.SGList = h->max_cmd_sg_entries;
4598 cp->Header.SGTotal = cpu_to_le16(use_sg + 1);
4599 if (hpsa_map_sg_chain_block(h, cp)) {
4600 scsi_dma_unmap(cmd);
4608 cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */
4609 cp->Header.SGTotal = cpu_to_le16(use_sg); /* total sgs in cmd list */
4613 static inline void warn_zero_length_transfer(struct ctlr_info *h,
4614 u8 *cdb, int cdb_len,
4617 dev_warn(&h->pdev->dev,
4618 "%s: Blocking zero-length request: CDB:%*phN\n",
4619 func, cdb_len, cdb);
4622 #define IO_ACCEL_INELIGIBLE 1
4623 /* zero-length transfers trigger hardware errors. */
4624 static bool is_zero_length_transfer(u8 *cdb)
4628 /* Block zero-length transfer sizes on certain commands. */
4632 case VERIFY: /* 0x2F */
4633 case WRITE_VERIFY: /* 0x2E */
4634 block_cnt = get_unaligned_be16(&cdb[7]);
4638 case VERIFY_12: /* 0xAF */
4639 case WRITE_VERIFY_12: /* 0xAE */
4640 block_cnt = get_unaligned_be32(&cdb[6]);
4644 case VERIFY_16: /* 0x8F */
4645 block_cnt = get_unaligned_be32(&cdb[10]);
4651 return block_cnt == 0;
4654 static int fixup_ioaccel_cdb(u8 *cdb, int *cdb_len)
4660 /* Perform some CDB fixups if needed using 10 byte reads/writes only */
4667 if (*cdb_len == 6) {
4668 block = (((cdb[1] & 0x1F) << 16) |
4675 BUG_ON(*cdb_len != 12);
4676 block = get_unaligned_be32(&cdb[2]);
4677 block_cnt = get_unaligned_be32(&cdb[6]);
4679 if (block_cnt > 0xffff)
4680 return IO_ACCEL_INELIGIBLE;
4682 cdb[0] = is_write ? WRITE_10 : READ_10;
4684 cdb[2] = (u8) (block >> 24);
4685 cdb[3] = (u8) (block >> 16);
4686 cdb[4] = (u8) (block >> 8);
4687 cdb[5] = (u8) (block);
4689 cdb[7] = (u8) (block_cnt >> 8);
4690 cdb[8] = (u8) (block_cnt);
4698 static int hpsa_scsi_ioaccel1_queue_command(struct ctlr_info *h,
4699 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
4700 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
4702 struct scsi_cmnd *cmd = c->scsi_cmd;
4703 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
4705 unsigned int total_len = 0;
4706 struct scatterlist *sg;
4709 struct SGDescriptor *curr_sg;
4710 u32 control = IOACCEL1_CONTROL_SIMPLEQUEUE;
4712 /* TODO: implement chaining support */
4713 if (scsi_sg_count(cmd) > h->ioaccel_maxsg) {
4714 atomic_dec(&phys_disk->ioaccel_cmds_out);
4715 return IO_ACCEL_INELIGIBLE;
4718 BUG_ON(cmd->cmd_len > IOACCEL1_IOFLAGS_CDBLEN_MAX);
4720 if (is_zero_length_transfer(cdb)) {
4721 warn_zero_length_transfer(h, cdb, cdb_len, __func__);
4722 atomic_dec(&phys_disk->ioaccel_cmds_out);
4723 return IO_ACCEL_INELIGIBLE;
4726 if (fixup_ioaccel_cdb(cdb, &cdb_len)) {
4727 atomic_dec(&phys_disk->ioaccel_cmds_out);
4728 return IO_ACCEL_INELIGIBLE;
4731 c->cmd_type = CMD_IOACCEL1;
4733 /* Adjust the DMA address to point to the accelerated command buffer */
4734 c->busaddr = (u32) h->ioaccel_cmd_pool_dhandle +
4735 (c->cmdindex * sizeof(*cp));
4736 BUG_ON(c->busaddr & 0x0000007F);
4738 use_sg = scsi_dma_map(cmd);
4740 atomic_dec(&phys_disk->ioaccel_cmds_out);
4746 scsi_for_each_sg(cmd, sg, use_sg, i) {
4747 addr64 = (u64) sg_dma_address(sg);
4748 len = sg_dma_len(sg);
4750 curr_sg->Addr = cpu_to_le64(addr64);
4751 curr_sg->Len = cpu_to_le32(len);
4752 curr_sg->Ext = cpu_to_le32(0);
4755 (--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST);
4757 switch (cmd->sc_data_direction) {
4759 control |= IOACCEL1_CONTROL_DATA_OUT;
4761 case DMA_FROM_DEVICE:
4762 control |= IOACCEL1_CONTROL_DATA_IN;
4765 control |= IOACCEL1_CONTROL_NODATAXFER;
4768 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
4769 cmd->sc_data_direction);
4774 control |= IOACCEL1_CONTROL_NODATAXFER;
4777 c->Header.SGList = use_sg;
4778 /* Fill out the command structure to submit */
4779 cp->dev_handle = cpu_to_le16(ioaccel_handle & 0xFFFF);
4780 cp->transfer_len = cpu_to_le32(total_len);
4781 cp->io_flags = cpu_to_le16(IOACCEL1_IOFLAGS_IO_REQ |
4782 (cdb_len & IOACCEL1_IOFLAGS_CDBLEN_MASK));
4783 cp->control = cpu_to_le32(control);
4784 memcpy(cp->CDB, cdb, cdb_len);
4785 memcpy(cp->CISS_LUN, scsi3addr, 8);
4786 /* Tag was already set at init time. */
4787 enqueue_cmd_and_start_io(h, c);
4792 * Queue a command directly to a device behind the controller using the
4793 * I/O accelerator path.
4795 static int hpsa_scsi_ioaccel_direct_map(struct ctlr_info *h,
4796 struct CommandList *c)
4798 struct scsi_cmnd *cmd = c->scsi_cmd;
4799 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4806 return hpsa_scsi_ioaccel_queue_command(h, c, dev->ioaccel_handle,
4807 cmd->cmnd, cmd->cmd_len, dev->scsi3addr, dev);
4811 * Set encryption parameters for the ioaccel2 request
4813 static void set_encrypt_ioaccel2(struct ctlr_info *h,
4814 struct CommandList *c, struct io_accel2_cmd *cp)
4816 struct scsi_cmnd *cmd = c->scsi_cmd;
4817 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4818 struct raid_map_data *map = &dev->raid_map;
4821 /* Are we doing encryption on this device */
4822 if (!(le16_to_cpu(map->flags) & RAID_MAP_FLAG_ENCRYPT_ON))
4824 /* Set the data encryption key index. */
4825 cp->dekindex = map->dekindex;
4827 /* Set the encryption enable flag, encoded into direction field. */
4828 cp->direction |= IOACCEL2_DIRECTION_ENCRYPT_MASK;
4830 /* Set encryption tweak values based on logical block address
4831 * If block size is 512, tweak value is LBA.
4832 * For other block sizes, tweak is (LBA * block size)/ 512)
4834 switch (cmd->cmnd[0]) {
4835 /* Required? 6-byte cdbs eliminated by fixup_ioaccel_cdb */
4838 first_block = (((cmd->cmnd[1] & 0x1F) << 16) |
4839 (cmd->cmnd[2] << 8) |
4844 /* Required? 12-byte cdbs eliminated by fixup_ioaccel_cdb */
4847 first_block = get_unaligned_be32(&cmd->cmnd[2]);
4851 first_block = get_unaligned_be64(&cmd->cmnd[2]);
4854 dev_err(&h->pdev->dev,
4855 "ERROR: %s: size (0x%x) not supported for encryption\n",
4856 __func__, cmd->cmnd[0]);
4861 if (le32_to_cpu(map->volume_blk_size) != 512)
4862 first_block = first_block *
4863 le32_to_cpu(map->volume_blk_size)/512;
4865 cp->tweak_lower = cpu_to_le32(first_block);
4866 cp->tweak_upper = cpu_to_le32(first_block >> 32);
4869 static int hpsa_scsi_ioaccel2_queue_command(struct ctlr_info *h,
4870 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
4871 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
4873 struct scsi_cmnd *cmd = c->scsi_cmd;
4874 struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
4875 struct ioaccel2_sg_element *curr_sg;
4877 struct scatterlist *sg;
4885 if (!cmd->device->hostdata)
4888 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
4890 if (is_zero_length_transfer(cdb)) {
4891 warn_zero_length_transfer(h, cdb, cdb_len, __func__);
4892 atomic_dec(&phys_disk->ioaccel_cmds_out);
4893 return IO_ACCEL_INELIGIBLE;
4896 if (fixup_ioaccel_cdb(cdb, &cdb_len)) {
4897 atomic_dec(&phys_disk->ioaccel_cmds_out);
4898 return IO_ACCEL_INELIGIBLE;
4901 c->cmd_type = CMD_IOACCEL2;
4902 /* Adjust the DMA address to point to the accelerated command buffer */
4903 c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle +
4904 (c->cmdindex * sizeof(*cp));
4905 BUG_ON(c->busaddr & 0x0000007F);
4907 memset(cp, 0, sizeof(*cp));
4908 cp->IU_type = IOACCEL2_IU_TYPE;
4910 use_sg = scsi_dma_map(cmd);
4912 atomic_dec(&phys_disk->ioaccel_cmds_out);
4918 if (use_sg > h->ioaccel_maxsg) {
4919 addr64 = le64_to_cpu(
4920 h->ioaccel2_cmd_sg_list[c->cmdindex]->address);
4921 curr_sg->address = cpu_to_le64(addr64);
4922 curr_sg->length = 0;
4923 curr_sg->reserved[0] = 0;
4924 curr_sg->reserved[1] = 0;
4925 curr_sg->reserved[2] = 0;
4926 curr_sg->chain_indicator = 0x80;
4928 curr_sg = h->ioaccel2_cmd_sg_list[c->cmdindex];
4930 scsi_for_each_sg(cmd, sg, use_sg, i) {
4931 addr64 = (u64) sg_dma_address(sg);
4932 len = sg_dma_len(sg);
4934 curr_sg->address = cpu_to_le64(addr64);
4935 curr_sg->length = cpu_to_le32(len);
4936 curr_sg->reserved[0] = 0;
4937 curr_sg->reserved[1] = 0;
4938 curr_sg->reserved[2] = 0;
4939 curr_sg->chain_indicator = 0;
4943 switch (cmd->sc_data_direction) {
4945 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4946 cp->direction |= IOACCEL2_DIR_DATA_OUT;
4948 case DMA_FROM_DEVICE:
4949 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4950 cp->direction |= IOACCEL2_DIR_DATA_IN;
4953 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4954 cp->direction |= IOACCEL2_DIR_NO_DATA;
4957 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
4958 cmd->sc_data_direction);
4963 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
4964 cp->direction |= IOACCEL2_DIR_NO_DATA;
4967 /* Set encryption parameters, if necessary */
4968 set_encrypt_ioaccel2(h, c, cp);
4970 cp->scsi_nexus = cpu_to_le32(ioaccel_handle);
4971 cp->Tag = cpu_to_le32(c->cmdindex << DIRECT_LOOKUP_SHIFT);
4972 memcpy(cp->cdb, cdb, sizeof(cp->cdb));
4974 cp->data_len = cpu_to_le32(total_len);
4975 cp->err_ptr = cpu_to_le64(c->busaddr +
4976 offsetof(struct io_accel2_cmd, error_data));
4977 cp->err_len = cpu_to_le32(sizeof(cp->error_data));
4979 /* fill in sg elements */
4980 if (use_sg > h->ioaccel_maxsg) {
4982 cp->sg[0].length = cpu_to_le32(use_sg * sizeof(cp->sg[0]));
4983 if (hpsa_map_ioaccel2_sg_chain_block(h, cp, c)) {
4984 atomic_dec(&phys_disk->ioaccel_cmds_out);
4985 scsi_dma_unmap(cmd);
4989 cp->sg_count = (u8) use_sg;
4991 enqueue_cmd_and_start_io(h, c);
4996 * Queue a command to the correct I/O accelerator path.
4998 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
4999 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
5000 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
5002 if (!c->scsi_cmd->device)
5005 if (!c->scsi_cmd->device->hostdata)
5008 /* Try to honor the device's queue depth */
5009 if (atomic_inc_return(&phys_disk->ioaccel_cmds_out) >
5010 phys_disk->queue_depth) {
5011 atomic_dec(&phys_disk->ioaccel_cmds_out);
5012 return IO_ACCEL_INELIGIBLE;
5014 if (h->transMethod & CFGTBL_Trans_io_accel1)
5015 return hpsa_scsi_ioaccel1_queue_command(h, c, ioaccel_handle,
5016 cdb, cdb_len, scsi3addr,
5019 return hpsa_scsi_ioaccel2_queue_command(h, c, ioaccel_handle,
5020 cdb, cdb_len, scsi3addr,
5024 static void raid_map_helper(struct raid_map_data *map,
5025 int offload_to_mirror, u32 *map_index, u32 *current_group)
5027 if (offload_to_mirror == 0) {
5028 /* use physical disk in the first mirrored group. */
5029 *map_index %= le16_to_cpu(map->data_disks_per_row);
5033 /* determine mirror group that *map_index indicates */
5034 *current_group = *map_index /
5035 le16_to_cpu(map->data_disks_per_row);
5036 if (offload_to_mirror == *current_group)
5038 if (*current_group < le16_to_cpu(map->layout_map_count) - 1) {
5039 /* select map index from next group */
5040 *map_index += le16_to_cpu(map->data_disks_per_row);
5043 /* select map index from first group */
5044 *map_index %= le16_to_cpu(map->data_disks_per_row);
5047 } while (offload_to_mirror != *current_group);
5051 * Attempt to perform offload RAID mapping for a logical volume I/O.
5053 static int hpsa_scsi_ioaccel_raid_map(struct ctlr_info *h,
5054 struct CommandList *c)
5056 struct scsi_cmnd *cmd = c->scsi_cmd;
5057 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
5058 struct raid_map_data *map = &dev->raid_map;
5059 struct raid_map_disk_data *dd = &map->data[0];
5062 u64 first_block, last_block;
5065 u64 first_row, last_row;
5066 u32 first_row_offset, last_row_offset;
5067 u32 first_column, last_column;
5068 u64 r0_first_row, r0_last_row;
5069 u32 r5or6_blocks_per_row;
5070 u64 r5or6_first_row, r5or6_last_row;
5071 u32 r5or6_first_row_offset, r5or6_last_row_offset;
5072 u32 r5or6_first_column, r5or6_last_column;
5073 u32 total_disks_per_row;
5075 u32 first_group, last_group, current_group;
5083 #if BITS_PER_LONG == 32
5086 int offload_to_mirror;
5091 /* check for valid opcode, get LBA and block count */
5092 switch (cmd->cmnd[0]) {
5096 first_block = (((cmd->cmnd[1] & 0x1F) << 16) |
5097 (cmd->cmnd[2] << 8) |
5099 block_cnt = cmd->cmnd[4];
5107 (((u64) cmd->cmnd[2]) << 24) |
5108 (((u64) cmd->cmnd[3]) << 16) |
5109 (((u64) cmd->cmnd[4]) << 8) |
5112 (((u32) cmd->cmnd[7]) << 8) |
5119 (((u64) cmd->cmnd[2]) << 24) |
5120 (((u64) cmd->cmnd[3]) << 16) |
5121 (((u64) cmd->cmnd[4]) << 8) |
5124 (((u32) cmd->cmnd[6]) << 24) |
5125 (((u32) cmd->cmnd[7]) << 16) |
5126 (((u32) cmd->cmnd[8]) << 8) |
5133 (((u64) cmd->cmnd[2]) << 56) |
5134 (((u64) cmd->cmnd[3]) << 48) |
5135 (((u64) cmd->cmnd[4]) << 40) |
5136 (((u64) cmd->cmnd[5]) << 32) |
5137 (((u64) cmd->cmnd[6]) << 24) |
5138 (((u64) cmd->cmnd[7]) << 16) |
5139 (((u64) cmd->cmnd[8]) << 8) |
5142 (((u32) cmd->cmnd[10]) << 24) |
5143 (((u32) cmd->cmnd[11]) << 16) |
5144 (((u32) cmd->cmnd[12]) << 8) |
5148 return IO_ACCEL_INELIGIBLE; /* process via normal I/O path */
5150 last_block = first_block + block_cnt - 1;
5152 /* check for write to non-RAID-0 */
5153 if (is_write && dev->raid_level != 0)
5154 return IO_ACCEL_INELIGIBLE;
5156 /* check for invalid block or wraparound */
5157 if (last_block >= le64_to_cpu(map->volume_blk_cnt) ||
5158 last_block < first_block)
5159 return IO_ACCEL_INELIGIBLE;
5161 /* calculate stripe information for the request */
5162 blocks_per_row = le16_to_cpu(map->data_disks_per_row) *
5163 le16_to_cpu(map->strip_size);
5164 strip_size = le16_to_cpu(map->strip_size);
5165 #if BITS_PER_LONG == 32
5166 tmpdiv = first_block;
5167 (void) do_div(tmpdiv, blocks_per_row);
5169 tmpdiv = last_block;
5170 (void) do_div(tmpdiv, blocks_per_row);
5172 first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
5173 last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
5174 tmpdiv = first_row_offset;
5175 (void) do_div(tmpdiv, strip_size);
5176 first_column = tmpdiv;
5177 tmpdiv = last_row_offset;
5178 (void) do_div(tmpdiv, strip_size);
5179 last_column = tmpdiv;
5181 first_row = first_block / blocks_per_row;
5182 last_row = last_block / blocks_per_row;
5183 first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
5184 last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
5185 first_column = first_row_offset / strip_size;
5186 last_column = last_row_offset / strip_size;
5189 /* if this isn't a single row/column then give to the controller */
5190 if ((first_row != last_row) || (first_column != last_column))
5191 return IO_ACCEL_INELIGIBLE;
5193 /* proceeding with driver mapping */
5194 total_disks_per_row = le16_to_cpu(map->data_disks_per_row) +
5195 le16_to_cpu(map->metadata_disks_per_row);
5196 map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
5197 le16_to_cpu(map->row_cnt);
5198 map_index = (map_row * total_disks_per_row) + first_column;
5200 switch (dev->raid_level) {
5202 break; /* nothing special to do */
5204 /* Handles load balance across RAID 1 members.
5205 * (2-drive R1 and R10 with even # of drives.)
5206 * Appropriate for SSDs, not optimal for HDDs
5208 BUG_ON(le16_to_cpu(map->layout_map_count) != 2);
5209 if (dev->offload_to_mirror)
5210 map_index += le16_to_cpu(map->data_disks_per_row);
5211 dev->offload_to_mirror = !dev->offload_to_mirror;
5214 /* Handles N-way mirrors (R1-ADM)
5215 * and R10 with # of drives divisible by 3.)
5217 BUG_ON(le16_to_cpu(map->layout_map_count) != 3);
5219 offload_to_mirror = dev->offload_to_mirror;
5220 raid_map_helper(map, offload_to_mirror,
5221 &map_index, ¤t_group);
5222 /* set mirror group to use next time */
5224 (offload_to_mirror >=
5225 le16_to_cpu(map->layout_map_count) - 1)
5226 ? 0 : offload_to_mirror + 1;
5227 dev->offload_to_mirror = offload_to_mirror;
5228 /* Avoid direct use of dev->offload_to_mirror within this
5229 * function since multiple threads might simultaneously
5230 * increment it beyond the range of dev->layout_map_count -1.
5235 if (le16_to_cpu(map->layout_map_count) <= 1)
5238 /* Verify first and last block are in same RAID group */
5239 r5or6_blocks_per_row =
5240 le16_to_cpu(map->strip_size) *
5241 le16_to_cpu(map->data_disks_per_row);
5242 BUG_ON(r5or6_blocks_per_row == 0);
5243 stripesize = r5or6_blocks_per_row *
5244 le16_to_cpu(map->layout_map_count);
5245 #if BITS_PER_LONG == 32
5246 tmpdiv = first_block;
5247 first_group = do_div(tmpdiv, stripesize);
5248 tmpdiv = first_group;
5249 (void) do_div(tmpdiv, r5or6_blocks_per_row);
5250 first_group = tmpdiv;
5251 tmpdiv = last_block;
5252 last_group = do_div(tmpdiv, stripesize);
5253 tmpdiv = last_group;
5254 (void) do_div(tmpdiv, r5or6_blocks_per_row);
5255 last_group = tmpdiv;
5257 first_group = (first_block % stripesize) / r5or6_blocks_per_row;
5258 last_group = (last_block % stripesize) / r5or6_blocks_per_row;
5260 if (first_group != last_group)
5261 return IO_ACCEL_INELIGIBLE;
5263 /* Verify request is in a single row of RAID 5/6 */
5264 #if BITS_PER_LONG == 32
5265 tmpdiv = first_block;
5266 (void) do_div(tmpdiv, stripesize);
5267 first_row = r5or6_first_row = r0_first_row = tmpdiv;
5268 tmpdiv = last_block;
5269 (void) do_div(tmpdiv, stripesize);
5270 r5or6_last_row = r0_last_row = tmpdiv;
5272 first_row = r5or6_first_row = r0_first_row =
5273 first_block / stripesize;
5274 r5or6_last_row = r0_last_row = last_block / stripesize;
5276 if (r5or6_first_row != r5or6_last_row)
5277 return IO_ACCEL_INELIGIBLE;
5280 /* Verify request is in a single column */
5281 #if BITS_PER_LONG == 32
5282 tmpdiv = first_block;
5283 first_row_offset = do_div(tmpdiv, stripesize);
5284 tmpdiv = first_row_offset;
5285 first_row_offset = (u32) do_div(tmpdiv, r5or6_blocks_per_row);
5286 r5or6_first_row_offset = first_row_offset;
5287 tmpdiv = last_block;
5288 r5or6_last_row_offset = do_div(tmpdiv, stripesize);
5289 tmpdiv = r5or6_last_row_offset;
5290 r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row);
5291 tmpdiv = r5or6_first_row_offset;
5292 (void) do_div(tmpdiv, map->strip_size);
5293 first_column = r5or6_first_column = tmpdiv;
5294 tmpdiv = r5or6_last_row_offset;
5295 (void) do_div(tmpdiv, map->strip_size);
5296 r5or6_last_column = tmpdiv;
5298 first_row_offset = r5or6_first_row_offset =
5299 (u32)((first_block % stripesize) %
5300 r5or6_blocks_per_row);
5302 r5or6_last_row_offset =
5303 (u32)((last_block % stripesize) %
5304 r5or6_blocks_per_row);
5306 first_column = r5or6_first_column =
5307 r5or6_first_row_offset / le16_to_cpu(map->strip_size);
5309 r5or6_last_row_offset / le16_to_cpu(map->strip_size);
5311 if (r5or6_first_column != r5or6_last_column)
5312 return IO_ACCEL_INELIGIBLE;
5314 /* Request is eligible */
5315 map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
5316 le16_to_cpu(map->row_cnt);
5318 map_index = (first_group *
5319 (le16_to_cpu(map->row_cnt) * total_disks_per_row)) +
5320 (map_row * total_disks_per_row) + first_column;
5323 return IO_ACCEL_INELIGIBLE;
5326 if (unlikely(map_index >= RAID_MAP_MAX_ENTRIES))
5327 return IO_ACCEL_INELIGIBLE;
5329 c->phys_disk = dev->phys_disk[map_index];
5331 return IO_ACCEL_INELIGIBLE;
5333 disk_handle = dd[map_index].ioaccel_handle;
5334 disk_block = le64_to_cpu(map->disk_starting_blk) +
5335 first_row * le16_to_cpu(map->strip_size) +
5336 (first_row_offset - first_column *
5337 le16_to_cpu(map->strip_size));
5338 disk_block_cnt = block_cnt;
5340 /* handle differing logical/physical block sizes */
5341 if (map->phys_blk_shift) {
5342 disk_block <<= map->phys_blk_shift;
5343 disk_block_cnt <<= map->phys_blk_shift;
5345 BUG_ON(disk_block_cnt > 0xffff);
5347 /* build the new CDB for the physical disk I/O */
5348 if (disk_block > 0xffffffff) {
5349 cdb[0] = is_write ? WRITE_16 : READ_16;
5351 cdb[2] = (u8) (disk_block >> 56);
5352 cdb[3] = (u8) (disk_block >> 48);
5353 cdb[4] = (u8) (disk_block >> 40);
5354 cdb[5] = (u8) (disk_block >> 32);
5355 cdb[6] = (u8) (disk_block >> 24);
5356 cdb[7] = (u8) (disk_block >> 16);
5357 cdb[8] = (u8) (disk_block >> 8);
5358 cdb[9] = (u8) (disk_block);
5359 cdb[10] = (u8) (disk_block_cnt >> 24);
5360 cdb[11] = (u8) (disk_block_cnt >> 16);
5361 cdb[12] = (u8) (disk_block_cnt >> 8);
5362 cdb[13] = (u8) (disk_block_cnt);
5367 cdb[0] = is_write ? WRITE_10 : READ_10;
5369 cdb[2] = (u8) (disk_block >> 24);
5370 cdb[3] = (u8) (disk_block >> 16);
5371 cdb[4] = (u8) (disk_block >> 8);
5372 cdb[5] = (u8) (disk_block);
5374 cdb[7] = (u8) (disk_block_cnt >> 8);
5375 cdb[8] = (u8) (disk_block_cnt);
5379 return hpsa_scsi_ioaccel_queue_command(h, c, disk_handle, cdb, cdb_len,
5381 dev->phys_disk[map_index]);
5385 * Submit commands down the "normal" RAID stack path
5386 * All callers to hpsa_ciss_submit must check lockup_detected
5387 * beforehand, before (opt.) and after calling cmd_alloc
5389 static int hpsa_ciss_submit(struct ctlr_info *h,
5390 struct CommandList *c, struct scsi_cmnd *cmd,
5391 unsigned char scsi3addr[])
5393 cmd->host_scribble = (unsigned char *) c;
5394 c->cmd_type = CMD_SCSI;
5396 c->Header.ReplyQueue = 0; /* unused in simple mode */
5397 memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
5398 c->Header.tag = cpu_to_le64((c->cmdindex << DIRECT_LOOKUP_SHIFT));
5400 /* Fill in the request block... */
5402 c->Request.Timeout = 0;
5403 BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
5404 c->Request.CDBLen = cmd->cmd_len;
5405 memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
5406 switch (cmd->sc_data_direction) {
5408 c->Request.type_attr_dir =
5409 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_WRITE);
5411 case DMA_FROM_DEVICE:
5412 c->Request.type_attr_dir =
5413 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_READ);
5416 c->Request.type_attr_dir =
5417 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_NONE);
5419 case DMA_BIDIRECTIONAL:
5420 /* This can happen if a buggy application does a scsi passthru
5421 * and sets both inlen and outlen to non-zero. ( see
5422 * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
5425 c->Request.type_attr_dir =
5426 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_RSVD);
5427 /* This is technically wrong, and hpsa controllers should
5428 * reject it with CMD_INVALID, which is the most correct
5429 * response, but non-fibre backends appear to let it
5430 * slide by, and give the same results as if this field
5431 * were set correctly. Either way is acceptable for
5432 * our purposes here.
5438 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
5439 cmd->sc_data_direction);
5444 if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
5445 hpsa_cmd_resolve_and_free(h, c);
5446 return SCSI_MLQUEUE_HOST_BUSY;
5448 enqueue_cmd_and_start_io(h, c);
5449 /* the cmd'll come back via intr handler in complete_scsi_command() */
5453 static void hpsa_cmd_init(struct ctlr_info *h, int index,
5454 struct CommandList *c)
5456 dma_addr_t cmd_dma_handle, err_dma_handle;
5458 /* Zero out all of commandlist except the last field, refcount */
5459 memset(c, 0, offsetof(struct CommandList, refcount));
5460 c->Header.tag = cpu_to_le64((u64) (index << DIRECT_LOOKUP_SHIFT));
5461 cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c);
5462 c->err_info = h->errinfo_pool + index;
5463 memset(c->err_info, 0, sizeof(*c->err_info));
5464 err_dma_handle = h->errinfo_pool_dhandle
5465 + index * sizeof(*c->err_info);
5466 c->cmdindex = index;
5467 c->busaddr = (u32) cmd_dma_handle;
5468 c->ErrDesc.Addr = cpu_to_le64((u64) err_dma_handle);
5469 c->ErrDesc.Len = cpu_to_le32((u32) sizeof(*c->err_info));
5471 c->scsi_cmd = SCSI_CMD_IDLE;
5474 static void hpsa_preinitialize_commands(struct ctlr_info *h)
5478 for (i = 0; i < h->nr_cmds; i++) {
5479 struct CommandList *c = h->cmd_pool + i;
5481 hpsa_cmd_init(h, i, c);
5482 atomic_set(&c->refcount, 0);
5486 static inline void hpsa_cmd_partial_init(struct ctlr_info *h, int index,
5487 struct CommandList *c)
5489 dma_addr_t cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c);
5491 BUG_ON(c->cmdindex != index);
5493 memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
5494 memset(c->err_info, 0, sizeof(*c->err_info));
5495 c->busaddr = (u32) cmd_dma_handle;
5498 static int hpsa_ioaccel_submit(struct ctlr_info *h,
5499 struct CommandList *c, struct scsi_cmnd *cmd,
5500 unsigned char *scsi3addr)
5502 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
5503 int rc = IO_ACCEL_INELIGIBLE;
5506 return SCSI_MLQUEUE_HOST_BUSY;
5508 cmd->host_scribble = (unsigned char *) c;
5510 if (dev->offload_enabled) {
5511 hpsa_cmd_init(h, c->cmdindex, c);
5512 c->cmd_type = CMD_SCSI;
5514 rc = hpsa_scsi_ioaccel_raid_map(h, c);
5515 if (rc < 0) /* scsi_dma_map failed. */
5516 rc = SCSI_MLQUEUE_HOST_BUSY;
5517 } else if (dev->hba_ioaccel_enabled) {
5518 hpsa_cmd_init(h, c->cmdindex, c);
5519 c->cmd_type = CMD_SCSI;
5521 rc = hpsa_scsi_ioaccel_direct_map(h, c);
5522 if (rc < 0) /* scsi_dma_map failed. */
5523 rc = SCSI_MLQUEUE_HOST_BUSY;
5528 static void hpsa_command_resubmit_worker(struct work_struct *work)
5530 struct scsi_cmnd *cmd;
5531 struct hpsa_scsi_dev_t *dev;
5532 struct CommandList *c = container_of(work, struct CommandList, work);
5535 dev = cmd->device->hostdata;
5537 cmd->result = DID_NO_CONNECT << 16;
5538 return hpsa_cmd_free_and_done(c->h, c, cmd);
5540 if (c->reset_pending)
5541 return hpsa_cmd_free_and_done(c->h, c, cmd);
5542 if (c->cmd_type == CMD_IOACCEL2) {
5543 struct ctlr_info *h = c->h;
5544 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
5547 if (c2->error_data.serv_response ==
5548 IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL) {
5549 rc = hpsa_ioaccel_submit(h, c, cmd, dev->scsi3addr);
5552 if (rc == SCSI_MLQUEUE_HOST_BUSY) {
5554 * If we get here, it means dma mapping failed.
5555 * Try again via scsi mid layer, which will
5556 * then get SCSI_MLQUEUE_HOST_BUSY.
5558 cmd->result = DID_IMM_RETRY << 16;
5559 return hpsa_cmd_free_and_done(h, c, cmd);
5561 /* else, fall thru and resubmit down CISS path */
5564 hpsa_cmd_partial_init(c->h, c->cmdindex, c);
5565 if (hpsa_ciss_submit(c->h, c, cmd, dev->scsi3addr)) {
5567 * If we get here, it means dma mapping failed. Try
5568 * again via scsi mid layer, which will then get
5569 * SCSI_MLQUEUE_HOST_BUSY.
5571 * hpsa_ciss_submit will have already freed c
5572 * if it encountered a dma mapping failure.
5574 cmd->result = DID_IMM_RETRY << 16;
5575 cmd->scsi_done(cmd);
5579 /* Running in struct Scsi_Host->host_lock less mode */
5580 static int hpsa_scsi_queue_command(struct Scsi_Host *sh, struct scsi_cmnd *cmd)
5582 struct ctlr_info *h;
5583 struct hpsa_scsi_dev_t *dev;
5584 unsigned char scsi3addr[8];
5585 struct CommandList *c;
5588 /* Get the ptr to our adapter structure out of cmd->host. */
5589 h = sdev_to_hba(cmd->device);
5591 BUG_ON(cmd->request->tag < 0);
5593 dev = cmd->device->hostdata;
5595 cmd->result = DID_NO_CONNECT << 16;
5596 cmd->scsi_done(cmd);
5601 cmd->result = DID_NO_CONNECT << 16;
5602 cmd->scsi_done(cmd);
5606 memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
5608 if (unlikely(lockup_detected(h))) {
5609 cmd->result = DID_NO_CONNECT << 16;
5610 cmd->scsi_done(cmd);
5613 c = cmd_tagged_alloc(h, cmd);
5616 * Call alternate submit routine for I/O accelerated commands.
5617 * Retries always go down the normal I/O path.
5619 if (likely(cmd->retries == 0 &&
5620 !blk_rq_is_passthrough(cmd->request) &&
5621 h->acciopath_status)) {
5622 rc = hpsa_ioaccel_submit(h, c, cmd, scsi3addr);
5625 if (rc == SCSI_MLQUEUE_HOST_BUSY) {
5626 hpsa_cmd_resolve_and_free(h, c);
5627 return SCSI_MLQUEUE_HOST_BUSY;
5630 return hpsa_ciss_submit(h, c, cmd, scsi3addr);
5633 static void hpsa_scan_complete(struct ctlr_info *h)
5635 unsigned long flags;
5637 spin_lock_irqsave(&h->scan_lock, flags);
5638 h->scan_finished = 1;
5639 wake_up(&h->scan_wait_queue);
5640 spin_unlock_irqrestore(&h->scan_lock, flags);
5643 static void hpsa_scan_start(struct Scsi_Host *sh)
5645 struct ctlr_info *h = shost_to_hba(sh);
5646 unsigned long flags;
5649 * Don't let rescans be initiated on a controller known to be locked
5650 * up. If the controller locks up *during* a rescan, that thread is
5651 * probably hosed, but at least we can prevent new rescan threads from
5652 * piling up on a locked up controller.
5654 if (unlikely(lockup_detected(h)))
5655 return hpsa_scan_complete(h);
5658 * If a scan is already waiting to run, no need to add another
5660 spin_lock_irqsave(&h->scan_lock, flags);
5661 if (h->scan_waiting) {
5662 spin_unlock_irqrestore(&h->scan_lock, flags);
5666 spin_unlock_irqrestore(&h->scan_lock, flags);
5668 /* wait until any scan already in progress is finished. */
5670 spin_lock_irqsave(&h->scan_lock, flags);
5671 if (h->scan_finished)
5673 h->scan_waiting = 1;
5674 spin_unlock_irqrestore(&h->scan_lock, flags);
5675 wait_event(h->scan_wait_queue, h->scan_finished);
5676 /* Note: We don't need to worry about a race between this
5677 * thread and driver unload because the midlayer will
5678 * have incremented the reference count, so unload won't
5679 * happen if we're in here.
5682 h->scan_finished = 0; /* mark scan as in progress */
5683 h->scan_waiting = 0;
5684 spin_unlock_irqrestore(&h->scan_lock, flags);
5686 if (unlikely(lockup_detected(h)))
5687 return hpsa_scan_complete(h);
5690 * Do the scan after a reset completion
5692 spin_lock_irqsave(&h->reset_lock, flags);
5693 if (h->reset_in_progress) {
5694 h->drv_req_rescan = 1;
5695 spin_unlock_irqrestore(&h->reset_lock, flags);
5696 hpsa_scan_complete(h);
5699 spin_unlock_irqrestore(&h->reset_lock, flags);
5701 hpsa_update_scsi_devices(h);
5703 hpsa_scan_complete(h);
5706 static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth)
5708 struct hpsa_scsi_dev_t *logical_drive = sdev->hostdata;
5715 else if (qdepth > logical_drive->queue_depth)
5716 qdepth = logical_drive->queue_depth;
5718 return scsi_change_queue_depth(sdev, qdepth);
5721 static int hpsa_scan_finished(struct Scsi_Host *sh,
5722 unsigned long elapsed_time)
5724 struct ctlr_info *h = shost_to_hba(sh);
5725 unsigned long flags;
5728 spin_lock_irqsave(&h->scan_lock, flags);
5729 finished = h->scan_finished;
5730 spin_unlock_irqrestore(&h->scan_lock, flags);
5734 static int hpsa_scsi_host_alloc(struct ctlr_info *h)
5736 struct Scsi_Host *sh;
5738 sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
5740 dev_err(&h->pdev->dev, "scsi_host_alloc failed\n");
5747 sh->max_channel = 3;
5748 sh->max_cmd_len = MAX_COMMAND_SIZE;
5749 sh->max_lun = HPSA_MAX_LUN;
5750 sh->max_id = HPSA_MAX_LUN;
5751 sh->can_queue = h->nr_cmds - HPSA_NRESERVED_CMDS;
5752 sh->cmd_per_lun = sh->can_queue;
5753 sh->sg_tablesize = h->maxsgentries;
5754 sh->transportt = hpsa_sas_transport_template;
5755 sh->hostdata[0] = (unsigned long) h;
5756 sh->irq = pci_irq_vector(h->pdev, 0);
5757 sh->unique_id = sh->irq;
5763 static int hpsa_scsi_add_host(struct ctlr_info *h)
5767 rv = scsi_add_host(h->scsi_host, &h->pdev->dev);
5769 dev_err(&h->pdev->dev, "scsi_add_host failed\n");
5772 scsi_scan_host(h->scsi_host);
5777 * The block layer has already gone to the trouble of picking out a unique,
5778 * small-integer tag for this request. We use an offset from that value as
5779 * an index to select our command block. (The offset allows us to reserve the
5780 * low-numbered entries for our own uses.)
5782 static int hpsa_get_cmd_index(struct scsi_cmnd *scmd)
5784 int idx = scmd->request->tag;
5789 /* Offset to leave space for internal cmds. */
5790 return idx += HPSA_NRESERVED_CMDS;
5794 * Send a TEST_UNIT_READY command to the specified LUN using the specified
5795 * reply queue; returns zero if the unit is ready, and non-zero otherwise.
5797 static int hpsa_send_test_unit_ready(struct ctlr_info *h,
5798 struct CommandList *c, unsigned char lunaddr[],
5803 /* Send the Test Unit Ready, fill_cmd can't fail, no mapping */
5804 (void) fill_cmd(c, TEST_UNIT_READY, h,
5805 NULL, 0, 0, lunaddr, TYPE_CMD);
5806 rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT);
5809 /* no unmap needed here because no data xfer. */
5811 /* Check if the unit is already ready. */
5812 if (c->err_info->CommandStatus == CMD_SUCCESS)
5816 * The first command sent after reset will receive "unit attention" to
5817 * indicate that the LUN has been reset...this is actually what we're
5818 * looking for (but, success is good too).
5820 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
5821 c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
5822 (c->err_info->SenseInfo[2] == NO_SENSE ||
5823 c->err_info->SenseInfo[2] == UNIT_ATTENTION))
5830 * Wait for a TEST_UNIT_READY command to complete, retrying as necessary;
5831 * returns zero when the unit is ready, and non-zero when giving up.
5833 static int hpsa_wait_for_test_unit_ready(struct ctlr_info *h,
5834 struct CommandList *c,
5835 unsigned char lunaddr[], int reply_queue)
5839 int waittime = 1; /* seconds */
5841 /* Send test unit ready until device ready, or give up. */
5842 for (count = 0; count < HPSA_TUR_RETRY_LIMIT; count++) {
5845 * Wait for a bit. do this first, because if we send
5846 * the TUR right away, the reset will just abort it.
5848 msleep(1000 * waittime);
5850 rc = hpsa_send_test_unit_ready(h, c, lunaddr, reply_queue);
5854 /* Increase wait time with each try, up to a point. */
5855 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
5858 dev_warn(&h->pdev->dev,
5859 "waiting %d secs for device to become ready.\n",
5866 static int wait_for_device_to_become_ready(struct ctlr_info *h,
5867 unsigned char lunaddr[],
5874 struct CommandList *c;
5879 * If no specific reply queue was requested, then send the TUR
5880 * repeatedly, requesting a reply on each reply queue; otherwise execute
5881 * the loop exactly once using only the specified queue.
5883 if (reply_queue == DEFAULT_REPLY_QUEUE) {
5885 last_queue = h->nreply_queues - 1;
5887 first_queue = reply_queue;
5888 last_queue = reply_queue;
5891 for (rq = first_queue; rq <= last_queue; rq++) {
5892 rc = hpsa_wait_for_test_unit_ready(h, c, lunaddr, rq);
5898 dev_warn(&h->pdev->dev, "giving up on device.\n");
5900 dev_warn(&h->pdev->dev, "device is ready.\n");
5906 /* Need at least one of these error handlers to keep ../scsi/hosts.c from
5907 * complaining. Doing a host- or bus-reset can't do anything good here.
5909 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
5912 struct ctlr_info *h;
5913 struct hpsa_scsi_dev_t *dev;
5916 unsigned long flags;
5918 /* find the controller to which the command to be aborted was sent */
5919 h = sdev_to_hba(scsicmd->device);
5920 if (h == NULL) /* paranoia */
5923 spin_lock_irqsave(&h->reset_lock, flags);
5924 h->reset_in_progress = 1;
5925 spin_unlock_irqrestore(&h->reset_lock, flags);
5927 if (lockup_detected(h)) {
5929 goto return_reset_status;
5932 dev = scsicmd->device->hostdata;
5934 dev_err(&h->pdev->dev, "%s: device lookup failed\n", __func__);
5936 goto return_reset_status;
5939 if (dev->devtype == TYPE_ENCLOSURE) {
5941 goto return_reset_status;
5944 /* if controller locked up, we can guarantee command won't complete */
5945 if (lockup_detected(h)) {
5946 snprintf(msg, sizeof(msg),
5947 "cmd %d RESET FAILED, lockup detected",
5948 hpsa_get_cmd_index(scsicmd));
5949 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
5951 goto return_reset_status;
5954 /* this reset request might be the result of a lockup; check */
5955 if (detect_controller_lockup(h)) {
5956 snprintf(msg, sizeof(msg),
5957 "cmd %d RESET FAILED, new lockup detected",
5958 hpsa_get_cmd_index(scsicmd));
5959 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
5961 goto return_reset_status;
5964 /* Do not attempt on controller */
5965 if (is_hba_lunid(dev->scsi3addr)) {
5967 goto return_reset_status;
5970 if (is_logical_dev_addr_mode(dev->scsi3addr))
5971 reset_type = HPSA_DEVICE_RESET_MSG;
5973 reset_type = HPSA_PHYS_TARGET_RESET;
5975 sprintf(msg, "resetting %s",
5976 reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ");
5977 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
5979 /* send a reset to the SCSI LUN which the command was sent to */
5980 rc = hpsa_do_reset(h, dev, dev->scsi3addr, reset_type,
5981 DEFAULT_REPLY_QUEUE);
5987 sprintf(msg, "reset %s %s",
5988 reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ",
5989 rc == SUCCESS ? "completed successfully" : "failed");
5990 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg);
5992 return_reset_status:
5993 spin_lock_irqsave(&h->reset_lock, flags);
5994 h->reset_in_progress = 0;
5995 spin_unlock_irqrestore(&h->reset_lock, flags);
6000 * For operations with an associated SCSI command, a command block is allocated
6001 * at init, and managed by cmd_tagged_alloc() and cmd_tagged_free() using the
6002 * block request tag as an index into a table of entries. cmd_tagged_free() is
6003 * the complement, although cmd_free() may be called instead.
6005 static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h,
6006 struct scsi_cmnd *scmd)
6008 int idx = hpsa_get_cmd_index(scmd);
6009 struct CommandList *c = h->cmd_pool + idx;
6011 if (idx < HPSA_NRESERVED_CMDS || idx >= h->nr_cmds) {
6012 dev_err(&h->pdev->dev, "Bad block tag: %d not in [%d..%d]\n",
6013 idx, HPSA_NRESERVED_CMDS, h->nr_cmds - 1);
6014 /* The index value comes from the block layer, so if it's out of
6015 * bounds, it's probably not our bug.
6020 atomic_inc(&c->refcount);
6021 if (unlikely(!hpsa_is_cmd_idle(c))) {
6023 * We expect that the SCSI layer will hand us a unique tag
6024 * value. Thus, there should never be a collision here between
6025 * two requests...because if the selected command isn't idle
6026 * then someone is going to be very disappointed.
6028 dev_err(&h->pdev->dev,
6029 "tag collision (tag=%d) in cmd_tagged_alloc().\n",
6031 if (c->scsi_cmd != NULL)
6032 scsi_print_command(c->scsi_cmd);
6033 scsi_print_command(scmd);
6036 hpsa_cmd_partial_init(h, idx, c);
6040 static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c)
6043 * Release our reference to the block. We don't need to do anything
6044 * else to free it, because it is accessed by index.
6046 (void)atomic_dec(&c->refcount);
6050 * For operations that cannot sleep, a command block is allocated at init,
6051 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
6052 * which ones are free or in use. Lock must be held when calling this.
6053 * cmd_free() is the complement.
6054 * This function never gives up and returns NULL. If it hangs,
6055 * another thread must call cmd_free() to free some tags.
6058 static struct CommandList *cmd_alloc(struct ctlr_info *h)
6060 struct CommandList *c;
6065 * There is some *extremely* small but non-zero chance that that
6066 * multiple threads could get in here, and one thread could
6067 * be scanning through the list of bits looking for a free
6068 * one, but the free ones are always behind him, and other
6069 * threads sneak in behind him and eat them before he can
6070 * get to them, so that while there is always a free one, a
6071 * very unlucky thread might be starved anyway, never able to
6072 * beat the other threads. In reality, this happens so
6073 * infrequently as to be indistinguishable from never.
6075 * Note that we start allocating commands before the SCSI host structure
6076 * is initialized. Since the search starts at bit zero, this
6077 * all works, since we have at least one command structure available;
6078 * however, it means that the structures with the low indexes have to be
6079 * reserved for driver-initiated requests, while requests from the block
6080 * layer will use the higher indexes.
6084 i = find_next_zero_bit(h->cmd_pool_bits,
6085 HPSA_NRESERVED_CMDS,
6087 if (unlikely(i >= HPSA_NRESERVED_CMDS)) {
6091 c = h->cmd_pool + i;
6092 refcount = atomic_inc_return(&c->refcount);
6093 if (unlikely(refcount > 1)) {
6094 cmd_free(h, c); /* already in use */
6095 offset = (i + 1) % HPSA_NRESERVED_CMDS;
6098 set_bit(i & (BITS_PER_LONG - 1),
6099 h->cmd_pool_bits + (i / BITS_PER_LONG));
6100 break; /* it's ours now. */
6102 hpsa_cmd_partial_init(h, i, c);
6107 * This is the complementary operation to cmd_alloc(). Note, however, in some
6108 * corner cases it may also be used to free blocks allocated by
6109 * cmd_tagged_alloc() in which case the ref-count decrement does the trick and
6110 * the clear-bit is harmless.
6112 static void cmd_free(struct ctlr_info *h, struct CommandList *c)
6114 if (atomic_dec_and_test(&c->refcount)) {
6117 i = c - h->cmd_pool;
6118 clear_bit(i & (BITS_PER_LONG - 1),
6119 h->cmd_pool_bits + (i / BITS_PER_LONG));
6123 #ifdef CONFIG_COMPAT
6125 static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd,
6128 IOCTL32_Command_struct __user *arg32 =
6129 (IOCTL32_Command_struct __user *) arg;
6130 IOCTL_Command_struct arg64;
6131 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
6135 memset(&arg64, 0, sizeof(arg64));
6137 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
6138 sizeof(arg64.LUN_info));
6139 err |= copy_from_user(&arg64.Request, &arg32->Request,
6140 sizeof(arg64.Request));
6141 err |= copy_from_user(&arg64.error_info, &arg32->error_info,
6142 sizeof(arg64.error_info));
6143 err |= get_user(arg64.buf_size, &arg32->buf_size);
6144 err |= get_user(cp, &arg32->buf);
6145 arg64.buf = compat_ptr(cp);
6146 err |= copy_to_user(p, &arg64, sizeof(arg64));
6151 err = hpsa_ioctl(dev, CCISS_PASSTHRU, p);
6154 err |= copy_in_user(&arg32->error_info, &p->error_info,
6155 sizeof(arg32->error_info));
6161 static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
6162 int cmd, void __user *arg)
6164 BIG_IOCTL32_Command_struct __user *arg32 =
6165 (BIG_IOCTL32_Command_struct __user *) arg;
6166 BIG_IOCTL_Command_struct arg64;
6167 BIG_IOCTL_Command_struct __user *p =
6168 compat_alloc_user_space(sizeof(arg64));
6172 memset(&arg64, 0, sizeof(arg64));
6174 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
6175 sizeof(arg64.LUN_info));
6176 err |= copy_from_user(&arg64.Request, &arg32->Request,
6177 sizeof(arg64.Request));
6178 err |= copy_from_user(&arg64.error_info, &arg32->error_info,
6179 sizeof(arg64.error_info));
6180 err |= get_user(arg64.buf_size, &arg32->buf_size);
6181 err |= get_user(arg64.malloc_size, &arg32->malloc_size);
6182 err |= get_user(cp, &arg32->buf);
6183 arg64.buf = compat_ptr(cp);
6184 err |= copy_to_user(p, &arg64, sizeof(arg64));
6189 err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, p);
6192 err |= copy_in_user(&arg32->error_info, &p->error_info,
6193 sizeof(arg32->error_info));
6199 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void __user *arg)
6202 case CCISS_GETPCIINFO:
6203 case CCISS_GETINTINFO:
6204 case CCISS_SETINTINFO:
6205 case CCISS_GETNODENAME:
6206 case CCISS_SETNODENAME:
6207 case CCISS_GETHEARTBEAT:
6208 case CCISS_GETBUSTYPES:
6209 case CCISS_GETFIRMVER:
6210 case CCISS_GETDRIVVER:
6211 case CCISS_REVALIDVOLS:
6212 case CCISS_DEREGDISK:
6213 case CCISS_REGNEWDISK:
6215 case CCISS_RESCANDISK:
6216 case CCISS_GETLUNINFO:
6217 return hpsa_ioctl(dev, cmd, arg);
6219 case CCISS_PASSTHRU32:
6220 return hpsa_ioctl32_passthru(dev, cmd, arg);
6221 case CCISS_BIG_PASSTHRU32:
6222 return hpsa_ioctl32_big_passthru(dev, cmd, arg);
6225 return -ENOIOCTLCMD;
6230 static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
6232 struct hpsa_pci_info pciinfo;
6236 pciinfo.domain = pci_domain_nr(h->pdev->bus);
6237 pciinfo.bus = h->pdev->bus->number;
6238 pciinfo.dev_fn = h->pdev->devfn;
6239 pciinfo.board_id = h->board_id;
6240 if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
6245 static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
6247 DriverVer_type DriverVer;
6248 unsigned char vmaj, vmin, vsubmin;
6251 rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
6252 &vmaj, &vmin, &vsubmin);
6254 dev_info(&h->pdev->dev, "driver version string '%s' "
6255 "unrecognized.", HPSA_DRIVER_VERSION);
6260 DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
6263 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
6268 static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
6270 IOCTL_Command_struct iocommand;
6271 struct CommandList *c;
6278 if (!capable(CAP_SYS_RAWIO))
6280 if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
6282 if ((iocommand.buf_size < 1) &&
6283 (iocommand.Request.Type.Direction != XFER_NONE)) {
6286 if (iocommand.buf_size > 0) {
6287 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
6290 if (iocommand.Request.Type.Direction & XFER_WRITE) {
6291 /* Copy the data into the buffer we created */
6292 if (copy_from_user(buff, iocommand.buf,
6293 iocommand.buf_size)) {
6298 memset(buff, 0, iocommand.buf_size);
6303 /* Fill in the command type */
6304 c->cmd_type = CMD_IOCTL_PEND;
6305 c->scsi_cmd = SCSI_CMD_BUSY;
6306 /* Fill in Command Header */
6307 c->Header.ReplyQueue = 0; /* unused in simple mode */
6308 if (iocommand.buf_size > 0) { /* buffer to fill */
6309 c->Header.SGList = 1;
6310 c->Header.SGTotal = cpu_to_le16(1);
6311 } else { /* no buffers to fill */
6312 c->Header.SGList = 0;
6313 c->Header.SGTotal = cpu_to_le16(0);
6315 memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
6317 /* Fill in Request block */
6318 memcpy(&c->Request, &iocommand.Request,
6319 sizeof(c->Request));
6321 /* Fill in the scatter gather information */
6322 if (iocommand.buf_size > 0) {
6323 temp64 = pci_map_single(h->pdev, buff,
6324 iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
6325 if (dma_mapping_error(&h->pdev->dev, (dma_addr_t) temp64)) {
6326 c->SG[0].Addr = cpu_to_le64(0);
6327 c->SG[0].Len = cpu_to_le32(0);
6331 c->SG[0].Addr = cpu_to_le64(temp64);
6332 c->SG[0].Len = cpu_to_le32(iocommand.buf_size);
6333 c->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* not chaining */
6335 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
6337 if (iocommand.buf_size > 0)
6338 hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
6339 check_ioctl_unit_attention(h, c);
6345 /* Copy the error information out */
6346 memcpy(&iocommand.error_info, c->err_info,
6347 sizeof(iocommand.error_info));
6348 if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
6352 if ((iocommand.Request.Type.Direction & XFER_READ) &&
6353 iocommand.buf_size > 0) {
6354 /* Copy the data out of the buffer we created */
6355 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
6367 static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
6369 BIG_IOCTL_Command_struct *ioc;
6370 struct CommandList *c;
6371 unsigned char **buff = NULL;
6372 int *buff_size = NULL;
6378 BYTE __user *data_ptr;
6382 if (!capable(CAP_SYS_RAWIO))
6384 ioc = kmalloc(sizeof(*ioc), GFP_KERNEL);
6389 if (copy_from_user(ioc, argp, sizeof(*ioc))) {
6393 if ((ioc->buf_size < 1) &&
6394 (ioc->Request.Type.Direction != XFER_NONE)) {
6398 /* Check kmalloc limits using all SGs */
6399 if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
6403 if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) {
6407 buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL);
6412 buff_size = kmalloc_array(SG_ENTRIES_IN_CMD, sizeof(int), GFP_KERNEL);
6417 left = ioc->buf_size;
6418 data_ptr = ioc->buf;
6420 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
6421 buff_size[sg_used] = sz;
6422 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
6423 if (buff[sg_used] == NULL) {
6427 if (ioc->Request.Type.Direction & XFER_WRITE) {
6428 if (copy_from_user(buff[sg_used], data_ptr, sz)) {
6433 memset(buff[sg_used], 0, sz);
6440 c->cmd_type = CMD_IOCTL_PEND;
6441 c->scsi_cmd = SCSI_CMD_BUSY;
6442 c->Header.ReplyQueue = 0;
6443 c->Header.SGList = (u8) sg_used;
6444 c->Header.SGTotal = cpu_to_le16(sg_used);
6445 memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
6446 memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
6447 if (ioc->buf_size > 0) {
6449 for (i = 0; i < sg_used; i++) {
6450 temp64 = pci_map_single(h->pdev, buff[i],
6451 buff_size[i], PCI_DMA_BIDIRECTIONAL);
6452 if (dma_mapping_error(&h->pdev->dev,
6453 (dma_addr_t) temp64)) {
6454 c->SG[i].Addr = cpu_to_le64(0);
6455 c->SG[i].Len = cpu_to_le32(0);
6456 hpsa_pci_unmap(h->pdev, c, i,
6457 PCI_DMA_BIDIRECTIONAL);
6461 c->SG[i].Addr = cpu_to_le64(temp64);
6462 c->SG[i].Len = cpu_to_le32(buff_size[i]);
6463 c->SG[i].Ext = cpu_to_le32(0);
6465 c->SG[--i].Ext = cpu_to_le32(HPSA_SG_LAST);
6467 status = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
6470 hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
6471 check_ioctl_unit_attention(h, c);
6477 /* Copy the error information out */
6478 memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
6479 if (copy_to_user(argp, ioc, sizeof(*ioc))) {
6483 if ((ioc->Request.Type.Direction & XFER_READ) && ioc->buf_size > 0) {
6486 /* Copy the data out of the buffer we created */
6487 BYTE __user *ptr = ioc->buf;
6488 for (i = 0; i < sg_used; i++) {
6489 if (copy_to_user(ptr, buff[i], buff_size[i])) {
6493 ptr += buff_size[i];
6503 for (i = 0; i < sg_used; i++)
6512 static void check_ioctl_unit_attention(struct ctlr_info *h,
6513 struct CommandList *c)
6515 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
6516 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
6517 (void) check_for_unit_attention(h, c);
6523 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg)
6525 struct ctlr_info *h;
6526 void __user *argp = (void __user *)arg;
6529 h = sdev_to_hba(dev);
6532 case CCISS_DEREGDISK:
6533 case CCISS_REGNEWDISK:
6535 hpsa_scan_start(h->scsi_host);
6537 case CCISS_GETPCIINFO:
6538 return hpsa_getpciinfo_ioctl(h, argp);
6539 case CCISS_GETDRIVVER:
6540 return hpsa_getdrivver_ioctl(h, argp);
6541 case CCISS_PASSTHRU:
6542 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
6544 rc = hpsa_passthru_ioctl(h, argp);
6545 atomic_inc(&h->passthru_cmds_avail);
6547 case CCISS_BIG_PASSTHRU:
6548 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
6550 rc = hpsa_big_passthru_ioctl(h, argp);
6551 atomic_inc(&h->passthru_cmds_avail);
6558 static void hpsa_send_host_reset(struct ctlr_info *h, unsigned char *scsi3addr,
6561 struct CommandList *c;
6565 /* fill_cmd can't fail here, no data buffer to map */
6566 (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
6567 RAID_CTLR_LUNID, TYPE_MSG);
6568 c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
6570 enqueue_cmd_and_start_io(h, c);
6571 /* Don't wait for completion, the reset won't complete. Don't free
6572 * the command either. This is the last command we will send before
6573 * re-initializing everything, so it doesn't matter and won't leak.
6578 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
6579 void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
6582 int pci_dir = XFER_NONE;
6584 c->cmd_type = CMD_IOCTL_PEND;
6585 c->scsi_cmd = SCSI_CMD_BUSY;
6586 c->Header.ReplyQueue = 0;
6587 if (buff != NULL && size > 0) {
6588 c->Header.SGList = 1;
6589 c->Header.SGTotal = cpu_to_le16(1);
6591 c->Header.SGList = 0;
6592 c->Header.SGTotal = cpu_to_le16(0);
6594 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
6596 if (cmd_type == TYPE_CMD) {
6599 /* are we trying to read a vital product page */
6600 if (page_code & VPD_PAGE) {
6601 c->Request.CDB[1] = 0x01;
6602 c->Request.CDB[2] = (page_code & 0xff);
6604 c->Request.CDBLen = 6;
6605 c->Request.type_attr_dir =
6606 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6607 c->Request.Timeout = 0;
6608 c->Request.CDB[0] = HPSA_INQUIRY;
6609 c->Request.CDB[4] = size & 0xFF;
6611 case RECEIVE_DIAGNOSTIC:
6612 c->Request.CDBLen = 6;
6613 c->Request.type_attr_dir =
6614 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6615 c->Request.Timeout = 0;
6616 c->Request.CDB[0] = cmd;
6617 c->Request.CDB[1] = 1;
6618 c->Request.CDB[2] = 1;
6619 c->Request.CDB[3] = (size >> 8) & 0xFF;
6620 c->Request.CDB[4] = size & 0xFF;
6622 case HPSA_REPORT_LOG:
6623 case HPSA_REPORT_PHYS:
6624 /* Talking to controller so It's a physical command
6625 mode = 00 target = 0. Nothing to write.
6627 c->Request.CDBLen = 12;
6628 c->Request.type_attr_dir =
6629 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6630 c->Request.Timeout = 0;
6631 c->Request.CDB[0] = cmd;
6632 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
6633 c->Request.CDB[7] = (size >> 16) & 0xFF;
6634 c->Request.CDB[8] = (size >> 8) & 0xFF;
6635 c->Request.CDB[9] = size & 0xFF;
6637 case BMIC_SENSE_DIAG_OPTIONS:
6638 c->Request.CDBLen = 16;
6639 c->Request.type_attr_dir =
6640 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6641 c->Request.Timeout = 0;
6642 /* Spec says this should be BMIC_WRITE */
6643 c->Request.CDB[0] = BMIC_READ;
6644 c->Request.CDB[6] = BMIC_SENSE_DIAG_OPTIONS;
6646 case BMIC_SET_DIAG_OPTIONS:
6647 c->Request.CDBLen = 16;
6648 c->Request.type_attr_dir =
6649 TYPE_ATTR_DIR(cmd_type,
6650 ATTR_SIMPLE, XFER_WRITE);
6651 c->Request.Timeout = 0;
6652 c->Request.CDB[0] = BMIC_WRITE;
6653 c->Request.CDB[6] = BMIC_SET_DIAG_OPTIONS;
6655 case HPSA_CACHE_FLUSH:
6656 c->Request.CDBLen = 12;
6657 c->Request.type_attr_dir =
6658 TYPE_ATTR_DIR(cmd_type,
6659 ATTR_SIMPLE, XFER_WRITE);
6660 c->Request.Timeout = 0;
6661 c->Request.CDB[0] = BMIC_WRITE;
6662 c->Request.CDB[6] = BMIC_CACHE_FLUSH;
6663 c->Request.CDB[7] = (size >> 8) & 0xFF;
6664 c->Request.CDB[8] = size & 0xFF;
6666 case TEST_UNIT_READY:
6667 c->Request.CDBLen = 6;
6668 c->Request.type_attr_dir =
6669 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
6670 c->Request.Timeout = 0;
6672 case HPSA_GET_RAID_MAP:
6673 c->Request.CDBLen = 12;
6674 c->Request.type_attr_dir =
6675 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6676 c->Request.Timeout = 0;
6677 c->Request.CDB[0] = HPSA_CISS_READ;
6678 c->Request.CDB[1] = cmd;
6679 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
6680 c->Request.CDB[7] = (size >> 16) & 0xFF;
6681 c->Request.CDB[8] = (size >> 8) & 0xFF;
6682 c->Request.CDB[9] = size & 0xFF;
6684 case BMIC_SENSE_CONTROLLER_PARAMETERS:
6685 c->Request.CDBLen = 10;
6686 c->Request.type_attr_dir =
6687 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6688 c->Request.Timeout = 0;
6689 c->Request.CDB[0] = BMIC_READ;
6690 c->Request.CDB[6] = BMIC_SENSE_CONTROLLER_PARAMETERS;
6691 c->Request.CDB[7] = (size >> 16) & 0xFF;
6692 c->Request.CDB[8] = (size >> 8) & 0xFF;
6694 case BMIC_IDENTIFY_PHYSICAL_DEVICE:
6695 c->Request.CDBLen = 10;
6696 c->Request.type_attr_dir =
6697 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6698 c->Request.Timeout = 0;
6699 c->Request.CDB[0] = BMIC_READ;
6700 c->Request.CDB[6] = BMIC_IDENTIFY_PHYSICAL_DEVICE;
6701 c->Request.CDB[7] = (size >> 16) & 0xFF;
6702 c->Request.CDB[8] = (size >> 8) & 0XFF;
6704 case BMIC_SENSE_SUBSYSTEM_INFORMATION:
6705 c->Request.CDBLen = 10;
6706 c->Request.type_attr_dir =
6707 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6708 c->Request.Timeout = 0;
6709 c->Request.CDB[0] = BMIC_READ;
6710 c->Request.CDB[6] = BMIC_SENSE_SUBSYSTEM_INFORMATION;
6711 c->Request.CDB[7] = (size >> 16) & 0xFF;
6712 c->Request.CDB[8] = (size >> 8) & 0XFF;
6714 case BMIC_SENSE_STORAGE_BOX_PARAMS:
6715 c->Request.CDBLen = 10;
6716 c->Request.type_attr_dir =
6717 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6718 c->Request.Timeout = 0;
6719 c->Request.CDB[0] = BMIC_READ;
6720 c->Request.CDB[6] = BMIC_SENSE_STORAGE_BOX_PARAMS;
6721 c->Request.CDB[7] = (size >> 16) & 0xFF;
6722 c->Request.CDB[8] = (size >> 8) & 0XFF;
6724 case BMIC_IDENTIFY_CONTROLLER:
6725 c->Request.CDBLen = 10;
6726 c->Request.type_attr_dir =
6727 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
6728 c->Request.Timeout = 0;
6729 c->Request.CDB[0] = BMIC_READ;
6730 c->Request.CDB[1] = 0;
6731 c->Request.CDB[2] = 0;
6732 c->Request.CDB[3] = 0;
6733 c->Request.CDB[4] = 0;
6734 c->Request.CDB[5] = 0;
6735 c->Request.CDB[6] = BMIC_IDENTIFY_CONTROLLER;
6736 c->Request.CDB[7] = (size >> 16) & 0xFF;
6737 c->Request.CDB[8] = (size >> 8) & 0XFF;
6738 c->Request.CDB[9] = 0;
6741 dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
6744 } else if (cmd_type == TYPE_MSG) {
6747 case HPSA_PHYS_TARGET_RESET:
6748 c->Request.CDBLen = 16;
6749 c->Request.type_attr_dir =
6750 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
6751 c->Request.Timeout = 0; /* Don't time out */
6752 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
6753 c->Request.CDB[0] = HPSA_RESET;
6754 c->Request.CDB[1] = HPSA_TARGET_RESET_TYPE;
6755 /* Physical target reset needs no control bytes 4-7*/
6756 c->Request.CDB[4] = 0x00;
6757 c->Request.CDB[5] = 0x00;
6758 c->Request.CDB[6] = 0x00;
6759 c->Request.CDB[7] = 0x00;
6761 case HPSA_DEVICE_RESET_MSG:
6762 c->Request.CDBLen = 16;
6763 c->Request.type_attr_dir =
6764 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
6765 c->Request.Timeout = 0; /* Don't time out */
6766 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
6767 c->Request.CDB[0] = cmd;
6768 c->Request.CDB[1] = HPSA_RESET_TYPE_LUN;
6769 /* If bytes 4-7 are zero, it means reset the */
6771 c->Request.CDB[4] = 0x00;
6772 c->Request.CDB[5] = 0x00;
6773 c->Request.CDB[6] = 0x00;
6774 c->Request.CDB[7] = 0x00;
6777 dev_warn(&h->pdev->dev, "unknown message type %d\n",
6782 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
6786 switch (GET_DIR(c->Request.type_attr_dir)) {
6788 pci_dir = PCI_DMA_FROMDEVICE;
6791 pci_dir = PCI_DMA_TODEVICE;
6794 pci_dir = PCI_DMA_NONE;
6797 pci_dir = PCI_DMA_BIDIRECTIONAL;
6799 if (hpsa_map_one(h->pdev, c, buff, size, pci_dir))
6805 * Map (physical) PCI mem into (virtual) kernel space
6807 static void __iomem *remap_pci_mem(ulong base, ulong size)
6809 ulong page_base = ((ulong) base) & PAGE_MASK;
6810 ulong page_offs = ((ulong) base) - page_base;
6811 void __iomem *page_remapped = ioremap_nocache(page_base,
6814 return page_remapped ? (page_remapped + page_offs) : NULL;
6817 static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q)
6819 return h->access.command_completed(h, q);
6822 static inline bool interrupt_pending(struct ctlr_info *h)
6824 return h->access.intr_pending(h);
6827 static inline long interrupt_not_for_us(struct ctlr_info *h)
6829 return (h->access.intr_pending(h) == 0) ||
6830 (h->interrupts_enabled == 0);
6833 static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
6836 if (unlikely(tag_index >= h->nr_cmds)) {
6837 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
6843 static inline void finish_cmd(struct CommandList *c)
6845 dial_up_lockup_detection_on_fw_flash_complete(c->h, c);
6846 if (likely(c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_SCSI
6847 || c->cmd_type == CMD_IOACCEL2))
6848 complete_scsi_command(c);
6849 else if (c->cmd_type == CMD_IOCTL_PEND || c->cmd_type == IOACCEL2_TMF)
6850 complete(c->waiting);
6853 /* process completion of an indexed ("direct lookup") command */
6854 static inline void process_indexed_cmd(struct ctlr_info *h,
6858 struct CommandList *c;
6860 tag_index = raw_tag >> DIRECT_LOOKUP_SHIFT;
6861 if (!bad_tag(h, tag_index, raw_tag)) {
6862 c = h->cmd_pool + tag_index;
6867 /* Some controllers, like p400, will give us one interrupt
6868 * after a soft reset, even if we turned interrupts off.
6869 * Only need to check for this in the hpsa_xxx_discard_completions
6872 static int ignore_bogus_interrupt(struct ctlr_info *h)
6874 if (likely(!reset_devices))
6877 if (likely(h->interrupts_enabled))
6880 dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
6881 "(known firmware bug.) Ignoring.\n");
6887 * Convert &h->q[x] (passed to interrupt handlers) back to h.
6888 * Relies on (h-q[x] == x) being true for x such that
6889 * 0 <= x < MAX_REPLY_QUEUES.
6891 static struct ctlr_info *queue_to_hba(u8 *queue)
6893 return container_of((queue - *queue), struct ctlr_info, q[0]);
6896 static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue)
6898 struct ctlr_info *h = queue_to_hba(queue);
6899 u8 q = *(u8 *) queue;
6902 if (ignore_bogus_interrupt(h))
6905 if (interrupt_not_for_us(h))
6907 h->last_intr_timestamp = get_jiffies_64();
6908 while (interrupt_pending(h)) {
6909 raw_tag = get_next_completion(h, q);
6910 while (raw_tag != FIFO_EMPTY)
6911 raw_tag = next_command(h, q);
6916 static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue)
6918 struct ctlr_info *h = queue_to_hba(queue);
6920 u8 q = *(u8 *) queue;
6922 if (ignore_bogus_interrupt(h))
6925 h->last_intr_timestamp = get_jiffies_64();
6926 raw_tag = get_next_completion(h, q);
6927 while (raw_tag != FIFO_EMPTY)
6928 raw_tag = next_command(h, q);
6932 static irqreturn_t do_hpsa_intr_intx(int irq, void *queue)
6934 struct ctlr_info *h = queue_to_hba((u8 *) queue);
6936 u8 q = *(u8 *) queue;
6938 if (interrupt_not_for_us(h))
6940 h->last_intr_timestamp = get_jiffies_64();
6941 while (interrupt_pending(h)) {
6942 raw_tag = get_next_completion(h, q);
6943 while (raw_tag != FIFO_EMPTY) {
6944 process_indexed_cmd(h, raw_tag);
6945 raw_tag = next_command(h, q);
6951 static irqreturn_t do_hpsa_intr_msi(int irq, void *queue)
6953 struct ctlr_info *h = queue_to_hba(queue);
6955 u8 q = *(u8 *) queue;
6957 h->last_intr_timestamp = get_jiffies_64();
6958 raw_tag = get_next_completion(h, q);
6959 while (raw_tag != FIFO_EMPTY) {
6960 process_indexed_cmd(h, raw_tag);
6961 raw_tag = next_command(h, q);
6966 /* Send a message CDB to the firmware. Careful, this only works
6967 * in simple mode, not performant mode due to the tag lookup.
6968 * We only ever use this immediately after a controller reset.
6970 static int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
6974 struct CommandListHeader CommandHeader;
6975 struct RequestBlock Request;
6976 struct ErrDescriptor ErrorDescriptor;
6978 struct Command *cmd;
6979 static const size_t cmd_sz = sizeof(*cmd) +
6980 sizeof(cmd->ErrorDescriptor);
6984 void __iomem *vaddr;
6987 vaddr = pci_ioremap_bar(pdev, 0);
6991 /* The Inbound Post Queue only accepts 32-bit physical addresses for the
6992 * CCISS commands, so they must be allocated from the lower 4GiB of
6995 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
7001 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
7007 /* This must fit, because of the 32-bit consistent DMA mask. Also,
7008 * although there's no guarantee, we assume that the address is at
7009 * least 4-byte aligned (most likely, it's page-aligned).
7011 paddr32 = cpu_to_le32(paddr64);
7013 cmd->CommandHeader.ReplyQueue = 0;
7014 cmd->CommandHeader.SGList = 0;
7015 cmd->CommandHeader.SGTotal = cpu_to_le16(0);
7016 cmd->CommandHeader.tag = cpu_to_le64(paddr64);
7017 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
7019 cmd->Request.CDBLen = 16;
7020 cmd->Request.type_attr_dir =
7021 TYPE_ATTR_DIR(TYPE_MSG, ATTR_HEADOFQUEUE, XFER_NONE);
7022 cmd->Request.Timeout = 0; /* Don't time out */
7023 cmd->Request.CDB[0] = opcode;
7024 cmd->Request.CDB[1] = type;
7025 memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
7026 cmd->ErrorDescriptor.Addr =
7027 cpu_to_le64((le32_to_cpu(paddr32) + sizeof(*cmd)));
7028 cmd->ErrorDescriptor.Len = cpu_to_le32(sizeof(struct ErrorInfo));
7030 writel(le32_to_cpu(paddr32), vaddr + SA5_REQUEST_PORT_OFFSET);
7032 for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
7033 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
7034 if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr64)
7036 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
7041 /* we leak the DMA buffer here ... no choice since the controller could
7042 * still complete the command.
7044 if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
7045 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
7050 pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
7052 if (tag & HPSA_ERROR_BIT) {
7053 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
7058 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
7063 #define hpsa_noop(p) hpsa_message(p, 3, 0)
7065 static int hpsa_controller_hard_reset(struct pci_dev *pdev,
7066 void __iomem *vaddr, u32 use_doorbell)
7070 /* For everything after the P600, the PCI power state method
7071 * of resetting the controller doesn't work, so we have this
7072 * other way using the doorbell register.
7074 dev_info(&pdev->dev, "using doorbell to reset controller\n");
7075 writel(use_doorbell, vaddr + SA5_DOORBELL);
7077 /* PMC hardware guys tell us we need a 10 second delay after
7078 * doorbell reset and before any attempt to talk to the board
7079 * at all to ensure that this actually works and doesn't fall
7080 * over in some weird corner cases.
7083 } else { /* Try to do it the PCI power state way */
7085 /* Quoting from the Open CISS Specification: "The Power
7086 * Management Control/Status Register (CSR) controls the power
7087 * state of the device. The normal operating state is D0,
7088 * CSR=00h. The software off state is D3, CSR=03h. To reset
7089 * the controller, place the interface device in D3 then to D0,
7090 * this causes a secondary PCI reset which will reset the
7095 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
7097 /* enter the D3hot power management state */
7098 rc = pci_set_power_state(pdev, PCI_D3hot);
7104 /* enter the D0 power management state */
7105 rc = pci_set_power_state(pdev, PCI_D0);
7110 * The P600 requires a small delay when changing states.
7111 * Otherwise we may think the board did not reset and we bail.
7112 * This for kdump only and is particular to the P600.
7119 static void init_driver_version(char *driver_version, int len)
7121 memset(driver_version, 0, len);
7122 strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1);
7125 static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable)
7127 char *driver_version;
7128 int i, size = sizeof(cfgtable->driver_version);
7130 driver_version = kmalloc(size, GFP_KERNEL);
7131 if (!driver_version)
7134 init_driver_version(driver_version, size);
7135 for (i = 0; i < size; i++)
7136 writeb(driver_version[i], &cfgtable->driver_version[i]);
7137 kfree(driver_version);
7141 static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable,
7142 unsigned char *driver_ver)
7146 for (i = 0; i < sizeof(cfgtable->driver_version); i++)
7147 driver_ver[i] = readb(&cfgtable->driver_version[i]);
7150 static int controller_reset_failed(struct CfgTable __iomem *cfgtable)
7153 char *driver_ver, *old_driver_ver;
7154 int rc, size = sizeof(cfgtable->driver_version);
7156 old_driver_ver = kmalloc_array(2, size, GFP_KERNEL);
7157 if (!old_driver_ver)
7159 driver_ver = old_driver_ver + size;
7161 /* After a reset, the 32 bytes of "driver version" in the cfgtable
7162 * should have been changed, otherwise we know the reset failed.
7164 init_driver_version(old_driver_ver, size);
7165 read_driver_ver_from_cfgtable(cfgtable, driver_ver);
7166 rc = !memcmp(driver_ver, old_driver_ver, size);
7167 kfree(old_driver_ver);
7170 /* This does a hard reset of the controller using PCI power management
7171 * states or the using the doorbell register.
7173 static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev, u32 board_id)
7177 u64 cfg_base_addr_index;
7178 void __iomem *vaddr;
7179 unsigned long paddr;
7180 u32 misc_fw_support;
7182 struct CfgTable __iomem *cfgtable;
7184 u16 command_register;
7186 /* For controllers as old as the P600, this is very nearly
7189 * pci_save_state(pci_dev);
7190 * pci_set_power_state(pci_dev, PCI_D3hot);
7191 * pci_set_power_state(pci_dev, PCI_D0);
7192 * pci_restore_state(pci_dev);
7194 * For controllers newer than the P600, the pci power state
7195 * method of resetting doesn't work so we have another way
7196 * using the doorbell register.
7199 if (!ctlr_is_resettable(board_id)) {
7200 dev_warn(&pdev->dev, "Controller not resettable\n");
7204 /* if controller is soft- but not hard resettable... */
7205 if (!ctlr_is_hard_resettable(board_id))
7206 return -ENOTSUPP; /* try soft reset later. */
7208 /* Save the PCI command register */
7209 pci_read_config_word(pdev, 4, &command_register);
7210 pci_save_state(pdev);
7212 /* find the first memory BAR, so we can find the cfg table */
7213 rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
7216 vaddr = remap_pci_mem(paddr, 0x250);
7220 /* find cfgtable in order to check if reset via doorbell is supported */
7221 rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
7222 &cfg_base_addr_index, &cfg_offset);
7225 cfgtable = remap_pci_mem(pci_resource_start(pdev,
7226 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
7231 rc = write_driver_ver_to_cfgtable(cfgtable);
7233 goto unmap_cfgtable;
7235 /* If reset via doorbell register is supported, use that.
7236 * There are two such methods. Favor the newest method.
7238 misc_fw_support = readl(&cfgtable->misc_fw_support);
7239 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
7241 use_doorbell = DOORBELL_CTLR_RESET2;
7243 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
7245 dev_warn(&pdev->dev,
7246 "Soft reset not supported. Firmware update is required.\n");
7247 rc = -ENOTSUPP; /* try soft reset */
7248 goto unmap_cfgtable;
7252 rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
7254 goto unmap_cfgtable;
7256 pci_restore_state(pdev);
7257 pci_write_config_word(pdev, 4, command_register);
7259 /* Some devices (notably the HP Smart Array 5i Controller)
7260 need a little pause here */
7261 msleep(HPSA_POST_RESET_PAUSE_MSECS);
7263 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
7265 dev_warn(&pdev->dev,
7266 "Failed waiting for board to become ready after hard reset\n");
7267 goto unmap_cfgtable;
7270 rc = controller_reset_failed(vaddr);
7272 goto unmap_cfgtable;
7274 dev_warn(&pdev->dev, "Unable to successfully reset "
7275 "controller. Will try soft reset.\n");
7278 dev_info(&pdev->dev, "board ready after hard reset.\n");
7290 * We cannot read the structure directly, for portability we must use
7292 * This is for debug only.
7294 static void print_cfg_table(struct device *dev, struct CfgTable __iomem *tb)
7300 dev_info(dev, "Controller Configuration information\n");
7301 dev_info(dev, "------------------------------------\n");
7302 for (i = 0; i < 4; i++)
7303 temp_name[i] = readb(&(tb->Signature[i]));
7304 temp_name[4] = '\0';
7305 dev_info(dev, " Signature = %s\n", temp_name);
7306 dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence)));
7307 dev_info(dev, " Transport methods supported = 0x%x\n",
7308 readl(&(tb->TransportSupport)));
7309 dev_info(dev, " Transport methods active = 0x%x\n",
7310 readl(&(tb->TransportActive)));
7311 dev_info(dev, " Requested transport Method = 0x%x\n",
7312 readl(&(tb->HostWrite.TransportRequest)));
7313 dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n",
7314 readl(&(tb->HostWrite.CoalIntDelay)));
7315 dev_info(dev, " Coalesce Interrupt Count = 0x%x\n",
7316 readl(&(tb->HostWrite.CoalIntCount)));
7317 dev_info(dev, " Max outstanding commands = %d\n",
7318 readl(&(tb->CmdsOutMax)));
7319 dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
7320 for (i = 0; i < 16; i++)
7321 temp_name[i] = readb(&(tb->ServerName[i]));
7322 temp_name[16] = '\0';
7323 dev_info(dev, " Server Name = %s\n", temp_name);
7324 dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n",
7325 readl(&(tb->HeartBeat)));
7326 #endif /* HPSA_DEBUG */
7329 static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
7331 int i, offset, mem_type, bar_type;
7333 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
7336 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
7337 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
7338 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
7341 mem_type = pci_resource_flags(pdev, i) &
7342 PCI_BASE_ADDRESS_MEM_TYPE_MASK;
7344 case PCI_BASE_ADDRESS_MEM_TYPE_32:
7345 case PCI_BASE_ADDRESS_MEM_TYPE_1M:
7346 offset += 4; /* 32 bit */
7348 case PCI_BASE_ADDRESS_MEM_TYPE_64:
7351 default: /* reserved in PCI 2.2 */
7352 dev_warn(&pdev->dev,
7353 "base address is invalid\n");
7358 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
7364 static void hpsa_disable_interrupt_mode(struct ctlr_info *h)
7366 pci_free_irq_vectors(h->pdev);
7367 h->msix_vectors = 0;
7370 static void hpsa_setup_reply_map(struct ctlr_info *h)
7372 const struct cpumask *mask;
7373 unsigned int queue, cpu;
7375 for (queue = 0; queue < h->msix_vectors; queue++) {
7376 mask = pci_irq_get_affinity(h->pdev, queue);
7380 for_each_cpu(cpu, mask)
7381 h->reply_map[cpu] = queue;
7386 for_each_possible_cpu(cpu)
7387 h->reply_map[cpu] = 0;
7390 /* If MSI/MSI-X is supported by the kernel we will try to enable it on
7391 * controllers that are capable. If not, we use legacy INTx mode.
7393 static int hpsa_interrupt_mode(struct ctlr_info *h)
7395 unsigned int flags = PCI_IRQ_LEGACY;
7398 /* Some boards advertise MSI but don't really support it */
7399 switch (h->board_id) {
7406 ret = pci_alloc_irq_vectors(h->pdev, 1, MAX_REPLY_QUEUES,
7407 PCI_IRQ_MSIX | PCI_IRQ_AFFINITY);
7409 h->msix_vectors = ret;
7413 flags |= PCI_IRQ_MSI;
7417 ret = pci_alloc_irq_vectors(h->pdev, 1, 1, flags);
7423 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id,
7427 u32 subsystem_vendor_id, subsystem_device_id;
7429 subsystem_vendor_id = pdev->subsystem_vendor;
7430 subsystem_device_id = pdev->subsystem_device;
7431 *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
7432 subsystem_vendor_id;
7435 *legacy_board = false;
7436 for (i = 0; i < ARRAY_SIZE(products); i++)
7437 if (*board_id == products[i].board_id) {
7438 if (products[i].access != &SA5A_access &&
7439 products[i].access != &SA5B_access)
7441 dev_warn(&pdev->dev,
7442 "legacy board ID: 0x%08x\n",
7445 *legacy_board = true;
7449 dev_warn(&pdev->dev, "unrecognized board ID: 0x%08x\n", *board_id);
7451 *legacy_board = true;
7452 return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
7455 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
7456 unsigned long *memory_bar)
7460 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
7461 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
7462 /* addressing mode bits already removed */
7463 *memory_bar = pci_resource_start(pdev, i);
7464 dev_dbg(&pdev->dev, "memory BAR = %lx\n",
7468 dev_warn(&pdev->dev, "no memory BAR found\n");
7472 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
7478 iterations = HPSA_BOARD_READY_ITERATIONS;
7480 iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
7482 for (i = 0; i < iterations; i++) {
7483 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
7484 if (wait_for_ready) {
7485 if (scratchpad == HPSA_FIRMWARE_READY)
7488 if (scratchpad != HPSA_FIRMWARE_READY)
7491 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
7493 dev_warn(&pdev->dev, "board not ready, timed out.\n");
7497 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
7498 u32 *cfg_base_addr, u64 *cfg_base_addr_index,
7501 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
7502 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
7503 *cfg_base_addr &= (u32) 0x0000ffff;
7504 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
7505 if (*cfg_base_addr_index == -1) {
7506 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
7512 static void hpsa_free_cfgtables(struct ctlr_info *h)
7514 if (h->transtable) {
7515 iounmap(h->transtable);
7516 h->transtable = NULL;
7519 iounmap(h->cfgtable);
7524 /* Find and map CISS config table and transfer table
7525 + * several items must be unmapped (freed) later
7527 static int hpsa_find_cfgtables(struct ctlr_info *h)
7531 u64 cfg_base_addr_index;
7535 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
7536 &cfg_base_addr_index, &cfg_offset);
7539 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
7540 cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
7542 dev_err(&h->pdev->dev, "Failed mapping cfgtable\n");
7545 rc = write_driver_ver_to_cfgtable(h->cfgtable);
7548 /* Find performant mode table. */
7549 trans_offset = readl(&h->cfgtable->TransMethodOffset);
7550 h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
7551 cfg_base_addr_index)+cfg_offset+trans_offset,
7552 sizeof(*h->transtable));
7553 if (!h->transtable) {
7554 dev_err(&h->pdev->dev, "Failed mapping transfer table\n");
7555 hpsa_free_cfgtables(h);
7561 static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
7563 #define MIN_MAX_COMMANDS 16
7564 BUILD_BUG_ON(MIN_MAX_COMMANDS <= HPSA_NRESERVED_CMDS);
7566 h->max_commands = readl(&h->cfgtable->MaxPerformantModeCommands);
7568 /* Limit commands in memory limited kdump scenario. */
7569 if (reset_devices && h->max_commands > 32)
7570 h->max_commands = 32;
7572 if (h->max_commands < MIN_MAX_COMMANDS) {
7573 dev_warn(&h->pdev->dev,
7574 "Controller reports max supported commands of %d Using %d instead. Ensure that firmware is up to date.\n",
7577 h->max_commands = MIN_MAX_COMMANDS;
7581 /* If the controller reports that the total max sg entries is greater than 512,
7582 * then we know that chained SG blocks work. (Original smart arrays did not
7583 * support chained SG blocks and would return zero for max sg entries.)
7585 static int hpsa_supports_chained_sg_blocks(struct ctlr_info *h)
7587 return h->maxsgentries > 512;
7590 /* Interrogate the hardware for some limits:
7591 * max commands, max SG elements without chaining, and with chaining,
7592 * SG chain block size, etc.
7594 static void hpsa_find_board_params(struct ctlr_info *h)
7596 hpsa_get_max_perf_mode_cmds(h);
7597 h->nr_cmds = h->max_commands;
7598 h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
7599 h->fw_support = readl(&(h->cfgtable->misc_fw_support));
7600 if (hpsa_supports_chained_sg_blocks(h)) {
7601 /* Limit in-command s/g elements to 32 save dma'able memory. */
7602 h->max_cmd_sg_entries = 32;
7603 h->chainsize = h->maxsgentries - h->max_cmd_sg_entries;
7604 h->maxsgentries--; /* save one for chain pointer */
7607 * Original smart arrays supported at most 31 s/g entries
7608 * embedded inline in the command (trying to use more
7609 * would lock up the controller)
7611 h->max_cmd_sg_entries = 31;
7612 h->maxsgentries = 31; /* default to traditional values */
7616 /* Find out what task management functions are supported and cache */
7617 h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags));
7618 if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags))
7619 dev_warn(&h->pdev->dev, "Physical aborts not supported\n");
7620 if (!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
7621 dev_warn(&h->pdev->dev, "Logical aborts not supported\n");
7622 if (!(HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags))
7623 dev_warn(&h->pdev->dev, "HP SSD Smart Path aborts not supported\n");
7626 static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
7628 if (!check_signature(h->cfgtable->Signature, "CISS", 4)) {
7629 dev_err(&h->pdev->dev, "not a valid CISS config table\n");
7635 static inline void hpsa_set_driver_support_bits(struct ctlr_info *h)
7639 driver_support = readl(&(h->cfgtable->driver_support));
7640 /* Need to enable prefetch in the SCSI core for 6400 in x86 */
7642 driver_support |= ENABLE_SCSI_PREFETCH;
7644 driver_support |= ENABLE_UNIT_ATTN;
7645 writel(driver_support, &(h->cfgtable->driver_support));
7648 /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
7649 * in a prefetch beyond physical memory.
7651 static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
7655 if (h->board_id != 0x3225103C)
7657 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
7658 dma_prefetch |= 0x8000;
7659 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
7662 static int hpsa_wait_for_clear_event_notify_ack(struct ctlr_info *h)
7666 unsigned long flags;
7667 /* wait until the clear_event_notify bit 6 is cleared by controller. */
7668 for (i = 0; i < MAX_CLEAR_EVENT_WAIT; i++) {
7669 spin_lock_irqsave(&h->lock, flags);
7670 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
7671 spin_unlock_irqrestore(&h->lock, flags);
7672 if (!(doorbell_value & DOORBELL_CLEAR_EVENTS))
7674 /* delay and try again */
7675 msleep(CLEAR_EVENT_WAIT_INTERVAL);
7682 static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
7686 unsigned long flags;
7688 /* under certain very rare conditions, this can take awhile.
7689 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
7690 * as we enter this code.)
7692 for (i = 0; i < MAX_MODE_CHANGE_WAIT; i++) {
7693 if (h->remove_in_progress)
7695 spin_lock_irqsave(&h->lock, flags);
7696 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
7697 spin_unlock_irqrestore(&h->lock, flags);
7698 if (!(doorbell_value & CFGTBL_ChangeReq))
7700 /* delay and try again */
7701 msleep(MODE_CHANGE_WAIT_INTERVAL);
7708 /* return -ENODEV or other reason on error, 0 on success */
7709 static int hpsa_enter_simple_mode(struct ctlr_info *h)
7713 trans_support = readl(&(h->cfgtable->TransportSupport));
7714 if (!(trans_support & SIMPLE_MODE))
7717 h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
7719 /* Update the field, and then ring the doorbell */
7720 writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
7721 writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
7722 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
7723 if (hpsa_wait_for_mode_change_ack(h))
7725 print_cfg_table(&h->pdev->dev, h->cfgtable);
7726 if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple))
7728 h->transMethod = CFGTBL_Trans_Simple;
7731 dev_err(&h->pdev->dev, "failed to enter simple mode\n");
7735 /* free items allocated or mapped by hpsa_pci_init */
7736 static void hpsa_free_pci_init(struct ctlr_info *h)
7738 hpsa_free_cfgtables(h); /* pci_init 4 */
7739 iounmap(h->vaddr); /* pci_init 3 */
7741 hpsa_disable_interrupt_mode(h); /* pci_init 2 */
7743 * call pci_disable_device before pci_release_regions per
7744 * Documentation/PCI/pci.txt
7746 pci_disable_device(h->pdev); /* pci_init 1 */
7747 pci_release_regions(h->pdev); /* pci_init 2 */
7750 /* several items must be freed later */
7751 static int hpsa_pci_init(struct ctlr_info *h)
7753 int prod_index, err;
7756 prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id, &legacy_board);
7759 h->product_name = products[prod_index].product_name;
7760 h->access = *(products[prod_index].access);
7761 h->legacy_board = legacy_board;
7762 pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S |
7763 PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
7765 err = pci_enable_device(h->pdev);
7767 dev_err(&h->pdev->dev, "failed to enable PCI device\n");
7768 pci_disable_device(h->pdev);
7772 err = pci_request_regions(h->pdev, HPSA);
7774 dev_err(&h->pdev->dev,
7775 "failed to obtain PCI resources\n");
7776 pci_disable_device(h->pdev);
7780 pci_set_master(h->pdev);
7782 err = hpsa_interrupt_mode(h);
7786 /* setup mapping between CPU and reply queue */
7787 hpsa_setup_reply_map(h);
7789 err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
7791 goto clean2; /* intmode+region, pci */
7792 h->vaddr = remap_pci_mem(h->paddr, 0x250);
7794 dev_err(&h->pdev->dev, "failed to remap PCI mem\n");
7796 goto clean2; /* intmode+region, pci */
7798 err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
7800 goto clean3; /* vaddr, intmode+region, pci */
7801 err = hpsa_find_cfgtables(h);
7803 goto clean3; /* vaddr, intmode+region, pci */
7804 hpsa_find_board_params(h);
7806 if (!hpsa_CISS_signature_present(h)) {
7808 goto clean4; /* cfgtables, vaddr, intmode+region, pci */
7810 hpsa_set_driver_support_bits(h);
7811 hpsa_p600_dma_prefetch_quirk(h);
7812 err = hpsa_enter_simple_mode(h);
7814 goto clean4; /* cfgtables, vaddr, intmode+region, pci */
7817 clean4: /* cfgtables, vaddr, intmode+region, pci */
7818 hpsa_free_cfgtables(h);
7819 clean3: /* vaddr, intmode+region, pci */
7822 clean2: /* intmode+region, pci */
7823 hpsa_disable_interrupt_mode(h);
7826 * call pci_disable_device before pci_release_regions per
7827 * Documentation/PCI/pci.txt
7829 pci_disable_device(h->pdev);
7830 pci_release_regions(h->pdev);
7834 static void hpsa_hba_inquiry(struct ctlr_info *h)
7838 #define HBA_INQUIRY_BYTE_COUNT 64
7839 h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
7840 if (!h->hba_inquiry_data)
7842 rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
7843 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
7845 kfree(h->hba_inquiry_data);
7846 h->hba_inquiry_data = NULL;
7850 static int hpsa_init_reset_devices(struct pci_dev *pdev, u32 board_id)
7853 void __iomem *vaddr;
7858 /* kdump kernel is loading, we don't know in which state is
7859 * the pci interface. The dev->enable_cnt is equal zero
7860 * so we call enable+disable, wait a while and switch it on.
7862 rc = pci_enable_device(pdev);
7864 dev_warn(&pdev->dev, "Failed to enable PCI device\n");
7867 pci_disable_device(pdev);
7868 msleep(260); /* a randomly chosen number */
7869 rc = pci_enable_device(pdev);
7871 dev_warn(&pdev->dev, "failed to enable device.\n");
7875 pci_set_master(pdev);
7877 vaddr = pci_ioremap_bar(pdev, 0);
7878 if (vaddr == NULL) {
7882 writel(SA5_INTR_OFF, vaddr + SA5_REPLY_INTR_MASK_OFFSET);
7885 /* Reset the controller with a PCI power-cycle or via doorbell */
7886 rc = hpsa_kdump_hard_reset_controller(pdev, board_id);
7888 /* -ENOTSUPP here means we cannot reset the controller
7889 * but it's already (and still) up and running in
7890 * "performant mode". Or, it might be 640x, which can't reset
7891 * due to concerns about shared bbwc between 6402/6404 pair.
7896 /* Now try to get the controller to respond to a no-op */
7897 dev_info(&pdev->dev, "Waiting for controller to respond to no-op\n");
7898 for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
7899 if (hpsa_noop(pdev) == 0)
7902 dev_warn(&pdev->dev, "no-op failed%s\n",
7903 (i < 11 ? "; re-trying" : ""));
7908 pci_disable_device(pdev);
7912 static void hpsa_free_cmd_pool(struct ctlr_info *h)
7914 kfree(h->cmd_pool_bits);
7915 h->cmd_pool_bits = NULL;
7917 pci_free_consistent(h->pdev,
7918 h->nr_cmds * sizeof(struct CommandList),
7920 h->cmd_pool_dhandle);
7922 h->cmd_pool_dhandle = 0;
7924 if (h->errinfo_pool) {
7925 pci_free_consistent(h->pdev,
7926 h->nr_cmds * sizeof(struct ErrorInfo),
7928 h->errinfo_pool_dhandle);
7929 h->errinfo_pool = NULL;
7930 h->errinfo_pool_dhandle = 0;
7934 static int hpsa_alloc_cmd_pool(struct ctlr_info *h)
7936 h->cmd_pool_bits = kzalloc(
7937 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) *
7938 sizeof(unsigned long), GFP_KERNEL);
7939 h->cmd_pool = pci_alloc_consistent(h->pdev,
7940 h->nr_cmds * sizeof(*h->cmd_pool),
7941 &(h->cmd_pool_dhandle));
7942 h->errinfo_pool = pci_alloc_consistent(h->pdev,
7943 h->nr_cmds * sizeof(*h->errinfo_pool),
7944 &(h->errinfo_pool_dhandle));
7945 if ((h->cmd_pool_bits == NULL)
7946 || (h->cmd_pool == NULL)
7947 || (h->errinfo_pool == NULL)) {
7948 dev_err(&h->pdev->dev, "out of memory in %s", __func__);
7951 hpsa_preinitialize_commands(h);
7954 hpsa_free_cmd_pool(h);
7958 /* clear affinity hints and free MSI-X, MSI, or legacy INTx vectors */
7959 static void hpsa_free_irqs(struct ctlr_info *h)
7963 if (!h->msix_vectors || h->intr_mode != PERF_MODE_INT) {
7964 /* Single reply queue, only one irq to free */
7965 free_irq(pci_irq_vector(h->pdev, 0), &h->q[h->intr_mode]);
7966 h->q[h->intr_mode] = 0;
7970 for (i = 0; i < h->msix_vectors; i++) {
7971 free_irq(pci_irq_vector(h->pdev, i), &h->q[i]);
7974 for (; i < MAX_REPLY_QUEUES; i++)
7978 /* returns 0 on success; cleans up and returns -Enn on error */
7979 static int hpsa_request_irqs(struct ctlr_info *h,
7980 irqreturn_t (*msixhandler)(int, void *),
7981 irqreturn_t (*intxhandler)(int, void *))
7986 * initialize h->q[x] = x so that interrupt handlers know which
7989 for (i = 0; i < MAX_REPLY_QUEUES; i++)
7992 if (h->intr_mode == PERF_MODE_INT && h->msix_vectors > 0) {
7993 /* If performant mode and MSI-X, use multiple reply queues */
7994 for (i = 0; i < h->msix_vectors; i++) {
7995 sprintf(h->intrname[i], "%s-msix%d", h->devname, i);
7996 rc = request_irq(pci_irq_vector(h->pdev, i), msixhandler,
8002 dev_err(&h->pdev->dev,
8003 "failed to get irq %d for %s\n",
8004 pci_irq_vector(h->pdev, i), h->devname);
8005 for (j = 0; j < i; j++) {
8006 free_irq(pci_irq_vector(h->pdev, j), &h->q[j]);
8009 for (; j < MAX_REPLY_QUEUES; j++)
8015 /* Use single reply pool */
8016 if (h->msix_vectors > 0 || h->pdev->msi_enabled) {
8017 sprintf(h->intrname[0], "%s-msi%s", h->devname,
8018 h->msix_vectors ? "x" : "");
8019 rc = request_irq(pci_irq_vector(h->pdev, 0),
8022 &h->q[h->intr_mode]);
8024 sprintf(h->intrname[h->intr_mode],
8025 "%s-intx", h->devname);
8026 rc = request_irq(pci_irq_vector(h->pdev, 0),
8027 intxhandler, IRQF_SHARED,
8029 &h->q[h->intr_mode]);
8033 dev_err(&h->pdev->dev, "failed to get irq %d for %s\n",
8034 pci_irq_vector(h->pdev, 0), h->devname);
8041 static int hpsa_kdump_soft_reset(struct ctlr_info *h)
8044 hpsa_send_host_reset(h, RAID_CTLR_LUNID, HPSA_RESET_TYPE_CONTROLLER);
8046 dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
8047 rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY);
8049 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
8053 dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
8054 rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
8056 dev_warn(&h->pdev->dev, "Board failed to become ready "
8057 "after soft reset.\n");
8064 static void hpsa_free_reply_queues(struct ctlr_info *h)
8068 for (i = 0; i < h->nreply_queues; i++) {
8069 if (!h->reply_queue[i].head)
8071 pci_free_consistent(h->pdev,
8072 h->reply_queue_size,
8073 h->reply_queue[i].head,
8074 h->reply_queue[i].busaddr);
8075 h->reply_queue[i].head = NULL;
8076 h->reply_queue[i].busaddr = 0;
8078 h->reply_queue_size = 0;
8081 static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
8083 hpsa_free_performant_mode(h); /* init_one 7 */
8084 hpsa_free_sg_chain_blocks(h); /* init_one 6 */
8085 hpsa_free_cmd_pool(h); /* init_one 5 */
8086 hpsa_free_irqs(h); /* init_one 4 */
8087 scsi_host_put(h->scsi_host); /* init_one 3 */
8088 h->scsi_host = NULL; /* init_one 3 */
8089 hpsa_free_pci_init(h); /* init_one 2_5 */
8090 free_percpu(h->lockup_detected); /* init_one 2 */
8091 h->lockup_detected = NULL; /* init_one 2 */
8092 if (h->resubmit_wq) {
8093 destroy_workqueue(h->resubmit_wq); /* init_one 1 */
8094 h->resubmit_wq = NULL;
8096 if (h->rescan_ctlr_wq) {
8097 destroy_workqueue(h->rescan_ctlr_wq);
8098 h->rescan_ctlr_wq = NULL;
8100 kfree(h); /* init_one 1 */
8103 /* Called when controller lockup detected. */
8104 static void fail_all_outstanding_cmds(struct ctlr_info *h)
8107 struct CommandList *c;
8110 flush_workqueue(h->resubmit_wq); /* ensure all cmds are fully built */
8111 for (i = 0; i < h->nr_cmds; i++) {
8112 c = h->cmd_pool + i;
8113 refcount = atomic_inc_return(&c->refcount);
8115 c->err_info->CommandStatus = CMD_CTLR_LOCKUP;
8117 atomic_dec(&h->commands_outstanding);
8122 dev_warn(&h->pdev->dev,
8123 "failed %d commands in fail_all\n", failcount);
8126 static void set_lockup_detected_for_all_cpus(struct ctlr_info *h, u32 value)
8130 for_each_online_cpu(cpu) {
8131 u32 *lockup_detected;
8132 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
8133 *lockup_detected = value;
8135 wmb(); /* be sure the per-cpu variables are out to memory */
8138 static void controller_lockup_detected(struct ctlr_info *h)
8140 unsigned long flags;
8141 u32 lockup_detected;
8143 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8144 spin_lock_irqsave(&h->lock, flags);
8145 lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
8146 if (!lockup_detected) {
8147 /* no heartbeat, but controller gave us a zero. */
8148 dev_warn(&h->pdev->dev,
8149 "lockup detected after %d but scratchpad register is zero\n",
8150 h->heartbeat_sample_interval / HZ);
8151 lockup_detected = 0xffffffff;
8153 set_lockup_detected_for_all_cpus(h, lockup_detected);
8154 spin_unlock_irqrestore(&h->lock, flags);
8155 dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x after %d\n",
8156 lockup_detected, h->heartbeat_sample_interval / HZ);
8157 if (lockup_detected == 0xffff0000) {
8158 dev_warn(&h->pdev->dev, "Telling controller to do a CHKPT\n");
8159 writel(DOORBELL_GENERATE_CHKPT, h->vaddr + SA5_DOORBELL);
8161 pci_disable_device(h->pdev);
8162 fail_all_outstanding_cmds(h);
8165 static int detect_controller_lockup(struct ctlr_info *h)
8169 unsigned long flags;
8171 now = get_jiffies_64();
8172 /* If we've received an interrupt recently, we're ok. */
8173 if (time_after64(h->last_intr_timestamp +
8174 (h->heartbeat_sample_interval), now))
8178 * If we've already checked the heartbeat recently, we're ok.
8179 * This could happen if someone sends us a signal. We
8180 * otherwise don't care about signals in this thread.
8182 if (time_after64(h->last_heartbeat_timestamp +
8183 (h->heartbeat_sample_interval), now))
8186 /* If heartbeat has not changed since we last looked, we're not ok. */
8187 spin_lock_irqsave(&h->lock, flags);
8188 heartbeat = readl(&h->cfgtable->HeartBeat);
8189 spin_unlock_irqrestore(&h->lock, flags);
8190 if (h->last_heartbeat == heartbeat) {
8191 controller_lockup_detected(h);
8196 h->last_heartbeat = heartbeat;
8197 h->last_heartbeat_timestamp = now;
8202 * Set ioaccel status for all ioaccel volumes.
8204 * Called from monitor controller worker (hpsa_event_monitor_worker)
8206 * A Volume (or Volumes that comprise an Array set may be undergoing a
8207 * transformation, so we will be turning off ioaccel for all volumes that
8208 * make up the Array.
8210 static void hpsa_set_ioaccel_status(struct ctlr_info *h)
8216 struct hpsa_scsi_dev_t *device;
8221 buf = kmalloc(64, GFP_KERNEL);
8226 * Run through current device list used during I/O requests.
8228 for (i = 0; i < h->ndevices; i++) {
8233 if (!hpsa_vpd_page_supported(h, device->scsi3addr,
8234 HPSA_VPD_LV_IOACCEL_STATUS))
8239 rc = hpsa_scsi_do_inquiry(h, device->scsi3addr,
8240 VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS,
8245 ioaccel_status = buf[IOACCEL_STATUS_BYTE];
8246 device->offload_config =
8247 !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT);
8248 if (device->offload_config)
8249 device->offload_to_be_enabled =
8250 !!(ioaccel_status & OFFLOAD_ENABLED_BIT);
8253 * Immediately turn off ioaccel for any volume the
8254 * controller tells us to. Some of the reasons could be:
8255 * transformation - change to the LVs of an Array.
8256 * degraded volume - component failure
8258 * If ioaccel is to be re-enabled, re-enable later during the
8259 * scan operation so the driver can get a fresh raidmap
8260 * before turning ioaccel back on.
8263 if (!device->offload_to_be_enabled)
8264 device->offload_enabled = 0;
8270 static void hpsa_ack_ctlr_events(struct ctlr_info *h)
8274 if (!(h->fw_support & MISC_FW_EVENT_NOTIFY))
8277 /* Ask the controller to clear the events we're handling. */
8278 if ((h->transMethod & (CFGTBL_Trans_io_accel1
8279 | CFGTBL_Trans_io_accel2)) &&
8280 (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE ||
8281 h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)) {
8283 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE)
8284 event_type = "state change";
8285 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)
8286 event_type = "configuration change";
8287 /* Stop sending new RAID offload reqs via the IO accelerator */
8288 scsi_block_requests(h->scsi_host);
8289 hpsa_set_ioaccel_status(h);
8290 hpsa_drain_accel_commands(h);
8291 /* Set 'accelerator path config change' bit */
8292 dev_warn(&h->pdev->dev,
8293 "Acknowledging event: 0x%08x (HP SSD Smart Path %s)\n",
8294 h->events, event_type);
8295 writel(h->events, &(h->cfgtable->clear_event_notify));
8296 /* Set the "clear event notify field update" bit 6 */
8297 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
8298 /* Wait until ctlr clears 'clear event notify field', bit 6 */
8299 hpsa_wait_for_clear_event_notify_ack(h);
8300 scsi_unblock_requests(h->scsi_host);
8302 /* Acknowledge controller notification events. */
8303 writel(h->events, &(h->cfgtable->clear_event_notify));
8304 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
8305 hpsa_wait_for_clear_event_notify_ack(h);
8310 /* Check a register on the controller to see if there are configuration
8311 * changes (added/changed/removed logical drives, etc.) which mean that
8312 * we should rescan the controller for devices.
8313 * Also check flag for driver-initiated rescan.
8315 static int hpsa_ctlr_needs_rescan(struct ctlr_info *h)
8317 if (h->drv_req_rescan) {
8318 h->drv_req_rescan = 0;
8322 if (!(h->fw_support & MISC_FW_EVENT_NOTIFY))
8325 h->events = readl(&(h->cfgtable->event_notify));
8326 return h->events & RESCAN_REQUIRED_EVENT_BITS;
8330 * Check if any of the offline devices have become ready
8332 static int hpsa_offline_devices_ready(struct ctlr_info *h)
8334 unsigned long flags;
8335 struct offline_device_entry *d;
8336 struct list_head *this, *tmp;
8338 spin_lock_irqsave(&h->offline_device_lock, flags);
8339 list_for_each_safe(this, tmp, &h->offline_device_list) {
8340 d = list_entry(this, struct offline_device_entry,
8342 spin_unlock_irqrestore(&h->offline_device_lock, flags);
8343 if (!hpsa_volume_offline(h, d->scsi3addr)) {
8344 spin_lock_irqsave(&h->offline_device_lock, flags);
8345 list_del(&d->offline_list);
8346 spin_unlock_irqrestore(&h->offline_device_lock, flags);
8349 spin_lock_irqsave(&h->offline_device_lock, flags);
8351 spin_unlock_irqrestore(&h->offline_device_lock, flags);
8355 static int hpsa_luns_changed(struct ctlr_info *h)
8357 int rc = 1; /* assume there are changes */
8358 struct ReportLUNdata *logdev = NULL;
8360 /* if we can't find out if lun data has changed,
8361 * assume that it has.
8364 if (!h->lastlogicals)
8367 logdev = kzalloc(sizeof(*logdev), GFP_KERNEL);
8371 if (hpsa_scsi_do_report_luns(h, 1, logdev, sizeof(*logdev), 0)) {
8372 dev_warn(&h->pdev->dev,
8373 "report luns failed, can't track lun changes.\n");
8376 if (memcmp(logdev, h->lastlogicals, sizeof(*logdev))) {
8377 dev_info(&h->pdev->dev,
8378 "Lun changes detected.\n");
8379 memcpy(h->lastlogicals, logdev, sizeof(*logdev));
8382 rc = 0; /* no changes detected. */
8388 static void hpsa_perform_rescan(struct ctlr_info *h)
8390 struct Scsi_Host *sh = NULL;
8391 unsigned long flags;
8394 * Do the scan after the reset
8396 spin_lock_irqsave(&h->reset_lock, flags);
8397 if (h->reset_in_progress) {
8398 h->drv_req_rescan = 1;
8399 spin_unlock_irqrestore(&h->reset_lock, flags);
8402 spin_unlock_irqrestore(&h->reset_lock, flags);
8404 sh = scsi_host_get(h->scsi_host);
8406 hpsa_scan_start(sh);
8408 h->drv_req_rescan = 0;
8413 * watch for controller events
8415 static void hpsa_event_monitor_worker(struct work_struct *work)
8417 struct ctlr_info *h = container_of(to_delayed_work(work),
8418 struct ctlr_info, event_monitor_work);
8419 unsigned long flags;
8421 spin_lock_irqsave(&h->lock, flags);
8422 if (h->remove_in_progress) {
8423 spin_unlock_irqrestore(&h->lock, flags);
8426 spin_unlock_irqrestore(&h->lock, flags);
8428 if (hpsa_ctlr_needs_rescan(h)) {
8429 hpsa_ack_ctlr_events(h);
8430 hpsa_perform_rescan(h);
8433 spin_lock_irqsave(&h->lock, flags);
8434 if (!h->remove_in_progress)
8435 schedule_delayed_work(&h->event_monitor_work,
8436 HPSA_EVENT_MONITOR_INTERVAL);
8437 spin_unlock_irqrestore(&h->lock, flags);
8440 static void hpsa_rescan_ctlr_worker(struct work_struct *work)
8442 unsigned long flags;
8443 struct ctlr_info *h = container_of(to_delayed_work(work),
8444 struct ctlr_info, rescan_ctlr_work);
8446 spin_lock_irqsave(&h->lock, flags);
8447 if (h->remove_in_progress) {
8448 spin_unlock_irqrestore(&h->lock, flags);
8451 spin_unlock_irqrestore(&h->lock, flags);
8453 if (h->drv_req_rescan || hpsa_offline_devices_ready(h)) {
8454 hpsa_perform_rescan(h);
8455 } else if (h->discovery_polling) {
8456 if (hpsa_luns_changed(h)) {
8457 dev_info(&h->pdev->dev,
8458 "driver discovery polling rescan.\n");
8459 hpsa_perform_rescan(h);
8462 spin_lock_irqsave(&h->lock, flags);
8463 if (!h->remove_in_progress)
8464 queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work,
8465 h->heartbeat_sample_interval);
8466 spin_unlock_irqrestore(&h->lock, flags);
8469 static void hpsa_monitor_ctlr_worker(struct work_struct *work)
8471 unsigned long flags;
8472 struct ctlr_info *h = container_of(to_delayed_work(work),
8473 struct ctlr_info, monitor_ctlr_work);
8475 detect_controller_lockup(h);
8476 if (lockup_detected(h))
8479 spin_lock_irqsave(&h->lock, flags);
8480 if (!h->remove_in_progress)
8481 schedule_delayed_work(&h->monitor_ctlr_work,
8482 h->heartbeat_sample_interval);
8483 spin_unlock_irqrestore(&h->lock, flags);
8486 static struct workqueue_struct *hpsa_create_controller_wq(struct ctlr_info *h,
8489 struct workqueue_struct *wq = NULL;
8491 wq = alloc_ordered_workqueue("%s_%d_hpsa", 0, name, h->ctlr);
8493 dev_err(&h->pdev->dev, "failed to create %s workqueue\n", name);
8498 static void hpda_free_ctlr_info(struct ctlr_info *h)
8500 kfree(h->reply_map);
8504 static struct ctlr_info *hpda_alloc_ctlr_info(void)
8506 struct ctlr_info *h;
8508 h = kzalloc(sizeof(*h), GFP_KERNEL);
8512 h->reply_map = kzalloc(sizeof(*h->reply_map) * nr_cpu_ids, GFP_KERNEL);
8513 if (!h->reply_map) {
8520 static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
8523 struct ctlr_info *h;
8524 int try_soft_reset = 0;
8525 unsigned long flags;
8528 if (number_of_controllers == 0)
8529 printk(KERN_INFO DRIVER_NAME "\n");
8531 rc = hpsa_lookup_board_id(pdev, &board_id, NULL);
8533 dev_warn(&pdev->dev, "Board ID not found\n");
8537 rc = hpsa_init_reset_devices(pdev, board_id);
8539 if (rc != -ENOTSUPP)
8541 /* If the reset fails in a particular way (it has no way to do
8542 * a proper hard reset, so returns -ENOTSUPP) we can try to do
8543 * a soft reset once we get the controller configured up to the
8544 * point that it can accept a command.
8550 reinit_after_soft_reset:
8552 /* Command structures must be aligned on a 32-byte boundary because
8553 * the 5 lower bits of the address are used by the hardware. and by
8554 * the driver. See comments in hpsa.h for more info.
8556 BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
8557 h = hpda_alloc_ctlr_info();
8559 dev_err(&pdev->dev, "Failed to allocate controller head\n");
8565 h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
8566 INIT_LIST_HEAD(&h->offline_device_list);
8567 spin_lock_init(&h->lock);
8568 spin_lock_init(&h->offline_device_lock);
8569 spin_lock_init(&h->scan_lock);
8570 spin_lock_init(&h->reset_lock);
8571 atomic_set(&h->passthru_cmds_avail, HPSA_MAX_CONCURRENT_PASSTHRUS);
8573 /* Allocate and clear per-cpu variable lockup_detected */
8574 h->lockup_detected = alloc_percpu(u32);
8575 if (!h->lockup_detected) {
8576 dev_err(&h->pdev->dev, "Failed to allocate lockup detector\n");
8578 goto clean1; /* aer/h */
8580 set_lockup_detected_for_all_cpus(h, 0);
8582 rc = hpsa_pci_init(h);
8584 goto clean2; /* lu, aer/h */
8586 /* relies on h-> settings made by hpsa_pci_init, including
8587 * interrupt_mode h->intr */
8588 rc = hpsa_scsi_host_alloc(h);
8590 goto clean2_5; /* pci, lu, aer/h */
8592 sprintf(h->devname, HPSA "%d", h->scsi_host->host_no);
8593 h->ctlr = number_of_controllers;
8594 number_of_controllers++;
8596 /* configure PCI DMA stuff */
8597 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
8601 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
8605 dev_err(&pdev->dev, "no suitable DMA available\n");
8606 goto clean3; /* shost, pci, lu, aer/h */
8610 /* make sure the board interrupts are off */
8611 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8613 rc = hpsa_request_irqs(h, do_hpsa_intr_msi, do_hpsa_intr_intx);
8615 goto clean3; /* shost, pci, lu, aer/h */
8616 rc = hpsa_alloc_cmd_pool(h);
8618 goto clean4; /* irq, shost, pci, lu, aer/h */
8619 rc = hpsa_alloc_sg_chain_blocks(h);
8621 goto clean5; /* cmd, irq, shost, pci, lu, aer/h */
8622 init_waitqueue_head(&h->scan_wait_queue);
8623 init_waitqueue_head(&h->event_sync_wait_queue);
8624 mutex_init(&h->reset_mutex);
8625 h->scan_finished = 1; /* no scan currently in progress */
8626 h->scan_waiting = 0;
8628 pci_set_drvdata(pdev, h);
8631 spin_lock_init(&h->devlock);
8632 rc = hpsa_put_ctlr_into_performant_mode(h);
8634 goto clean6; /* sg, cmd, irq, shost, pci, lu, aer/h */
8636 /* create the resubmit workqueue */
8637 h->rescan_ctlr_wq = hpsa_create_controller_wq(h, "rescan");
8638 if (!h->rescan_ctlr_wq) {
8643 h->resubmit_wq = hpsa_create_controller_wq(h, "resubmit");
8644 if (!h->resubmit_wq) {
8646 goto clean7; /* aer/h */
8650 * At this point, the controller is ready to take commands.
8651 * Now, if reset_devices and the hard reset didn't work, try
8652 * the soft reset and see if that works.
8654 if (try_soft_reset) {
8656 /* This is kind of gross. We may or may not get a completion
8657 * from the soft reset command, and if we do, then the value
8658 * from the fifo may or may not be valid. So, we wait 10 secs
8659 * after the reset throwing away any completions we get during
8660 * that time. Unregister the interrupt handler and register
8661 * fake ones to scoop up any residual completions.
8663 spin_lock_irqsave(&h->lock, flags);
8664 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8665 spin_unlock_irqrestore(&h->lock, flags);
8667 rc = hpsa_request_irqs(h, hpsa_msix_discard_completions,
8668 hpsa_intx_discard_completions);
8670 dev_warn(&h->pdev->dev,
8671 "Failed to request_irq after soft reset.\n");
8673 * cannot goto clean7 or free_irqs will be called
8674 * again. Instead, do its work
8676 hpsa_free_performant_mode(h); /* clean7 */
8677 hpsa_free_sg_chain_blocks(h); /* clean6 */
8678 hpsa_free_cmd_pool(h); /* clean5 */
8680 * skip hpsa_free_irqs(h) clean4 since that
8681 * was just called before request_irqs failed
8686 rc = hpsa_kdump_soft_reset(h);
8688 /* Neither hard nor soft reset worked, we're hosed. */
8691 dev_info(&h->pdev->dev, "Board READY.\n");
8692 dev_info(&h->pdev->dev,
8693 "Waiting for stale completions to drain.\n");
8694 h->access.set_intr_mask(h, HPSA_INTR_ON);
8696 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8698 rc = controller_reset_failed(h->cfgtable);
8700 dev_info(&h->pdev->dev,
8701 "Soft reset appears to have failed.\n");
8703 /* since the controller's reset, we have to go back and re-init
8704 * everything. Easiest to just forget what we've done and do it
8707 hpsa_undo_allocations_after_kdump_soft_reset(h);
8710 /* don't goto clean, we already unallocated */
8713 goto reinit_after_soft_reset;
8716 /* Enable Accelerated IO path at driver layer */
8717 h->acciopath_status = 1;
8718 /* Disable discovery polling.*/
8719 h->discovery_polling = 0;
8722 /* Turn the interrupts on so we can service requests */
8723 h->access.set_intr_mask(h, HPSA_INTR_ON);
8725 hpsa_hba_inquiry(h);
8727 h->lastlogicals = kzalloc(sizeof(*(h->lastlogicals)), GFP_KERNEL);
8728 if (!h->lastlogicals)
8729 dev_info(&h->pdev->dev,
8730 "Can't track change to report lun data\n");
8732 /* hook into SCSI subsystem */
8733 rc = hpsa_scsi_add_host(h);
8735 goto clean7; /* perf, sg, cmd, irq, shost, pci, lu, aer/h */
8737 /* Monitor the controller for firmware lockups */
8738 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
8739 INIT_DELAYED_WORK(&h->monitor_ctlr_work, hpsa_monitor_ctlr_worker);
8740 schedule_delayed_work(&h->monitor_ctlr_work,
8741 h->heartbeat_sample_interval);
8742 INIT_DELAYED_WORK(&h->rescan_ctlr_work, hpsa_rescan_ctlr_worker);
8743 queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work,
8744 h->heartbeat_sample_interval);
8745 INIT_DELAYED_WORK(&h->event_monitor_work, hpsa_event_monitor_worker);
8746 schedule_delayed_work(&h->event_monitor_work,
8747 HPSA_EVENT_MONITOR_INTERVAL);
8750 clean7: /* perf, sg, cmd, irq, shost, pci, lu, aer/h */
8751 hpsa_free_performant_mode(h);
8752 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8753 clean6: /* sg, cmd, irq, pci, lockup, wq/aer/h */
8754 hpsa_free_sg_chain_blocks(h);
8755 clean5: /* cmd, irq, shost, pci, lu, aer/h */
8756 hpsa_free_cmd_pool(h);
8757 clean4: /* irq, shost, pci, lu, aer/h */
8759 clean3: /* shost, pci, lu, aer/h */
8760 scsi_host_put(h->scsi_host);
8761 h->scsi_host = NULL;
8762 clean2_5: /* pci, lu, aer/h */
8763 hpsa_free_pci_init(h);
8764 clean2: /* lu, aer/h */
8765 if (h->lockup_detected) {
8766 free_percpu(h->lockup_detected);
8767 h->lockup_detected = NULL;
8769 clean1: /* wq/aer/h */
8770 if (h->resubmit_wq) {
8771 destroy_workqueue(h->resubmit_wq);
8772 h->resubmit_wq = NULL;
8774 if (h->rescan_ctlr_wq) {
8775 destroy_workqueue(h->rescan_ctlr_wq);
8776 h->rescan_ctlr_wq = NULL;
8782 static void hpsa_flush_cache(struct ctlr_info *h)
8785 struct CommandList *c;
8788 if (unlikely(lockup_detected(h)))
8790 flush_buf = kzalloc(4, GFP_KERNEL);
8796 if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
8797 RAID_CTLR_LUNID, TYPE_CMD)) {
8800 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
8801 PCI_DMA_TODEVICE, DEFAULT_TIMEOUT);
8804 if (c->err_info->CommandStatus != 0)
8806 dev_warn(&h->pdev->dev,
8807 "error flushing cache on controller\n");
8812 /* Make controller gather fresh report lun data each time we
8813 * send down a report luns request
8815 static void hpsa_disable_rld_caching(struct ctlr_info *h)
8818 struct CommandList *c;
8821 /* Don't bother trying to set diag options if locked up */
8822 if (unlikely(h->lockup_detected))
8825 options = kzalloc(sizeof(*options), GFP_KERNEL);
8831 /* first, get the current diag options settings */
8832 if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0,
8833 RAID_CTLR_LUNID, TYPE_CMD))
8836 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
8837 PCI_DMA_FROMDEVICE, NO_TIMEOUT);
8838 if ((rc != 0) || (c->err_info->CommandStatus != 0))
8841 /* Now, set the bit for disabling the RLD caching */
8842 *options |= HPSA_DIAG_OPTS_DISABLE_RLD_CACHING;
8844 if (fill_cmd(c, BMIC_SET_DIAG_OPTIONS, h, options, 4, 0,
8845 RAID_CTLR_LUNID, TYPE_CMD))
8848 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
8849 PCI_DMA_TODEVICE, NO_TIMEOUT);
8850 if ((rc != 0) || (c->err_info->CommandStatus != 0))
8853 /* Now verify that it got set: */
8854 if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0,
8855 RAID_CTLR_LUNID, TYPE_CMD))
8858 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
8859 PCI_DMA_FROMDEVICE, NO_TIMEOUT);
8860 if ((rc != 0) || (c->err_info->CommandStatus != 0))
8863 if (*options & HPSA_DIAG_OPTS_DISABLE_RLD_CACHING)
8867 dev_err(&h->pdev->dev,
8868 "Error: failed to disable report lun data caching.\n");
8874 static void hpsa_shutdown(struct pci_dev *pdev)
8876 struct ctlr_info *h;
8878 h = pci_get_drvdata(pdev);
8879 /* Turn board interrupts off and send the flush cache command
8880 * sendcmd will turn off interrupt, and send the flush...
8881 * To write all data in the battery backed cache to disks
8883 hpsa_flush_cache(h);
8884 h->access.set_intr_mask(h, HPSA_INTR_OFF);
8885 hpsa_free_irqs(h); /* init_one 4 */
8886 hpsa_disable_interrupt_mode(h); /* pci_init 2 */
8889 static void hpsa_free_device_info(struct ctlr_info *h)
8893 for (i = 0; i < h->ndevices; i++) {
8899 static void hpsa_remove_one(struct pci_dev *pdev)
8901 struct ctlr_info *h;
8902 unsigned long flags;
8904 if (pci_get_drvdata(pdev) == NULL) {
8905 dev_err(&pdev->dev, "unable to remove device\n");
8908 h = pci_get_drvdata(pdev);
8910 /* Get rid of any controller monitoring work items */
8911 spin_lock_irqsave(&h->lock, flags);
8912 h->remove_in_progress = 1;
8913 spin_unlock_irqrestore(&h->lock, flags);
8914 cancel_delayed_work_sync(&h->monitor_ctlr_work);
8915 cancel_delayed_work_sync(&h->rescan_ctlr_work);
8916 cancel_delayed_work_sync(&h->event_monitor_work);
8917 destroy_workqueue(h->rescan_ctlr_wq);
8918 destroy_workqueue(h->resubmit_wq);
8920 hpsa_delete_sas_host(h);
8923 * Call before disabling interrupts.
8924 * scsi_remove_host can trigger I/O operations especially
8925 * when multipath is enabled. There can be SYNCHRONIZE CACHE
8926 * operations which cannot complete and will hang the system.
8929 scsi_remove_host(h->scsi_host); /* init_one 8 */
8930 /* includes hpsa_free_irqs - init_one 4 */
8931 /* includes hpsa_disable_interrupt_mode - pci_init 2 */
8932 hpsa_shutdown(pdev);
8934 hpsa_free_device_info(h); /* scan */
8936 kfree(h->hba_inquiry_data); /* init_one 10 */
8937 h->hba_inquiry_data = NULL; /* init_one 10 */
8938 hpsa_free_ioaccel2_sg_chain_blocks(h);
8939 hpsa_free_performant_mode(h); /* init_one 7 */
8940 hpsa_free_sg_chain_blocks(h); /* init_one 6 */
8941 hpsa_free_cmd_pool(h); /* init_one 5 */
8942 kfree(h->lastlogicals);
8944 /* hpsa_free_irqs already called via hpsa_shutdown init_one 4 */
8946 scsi_host_put(h->scsi_host); /* init_one 3 */
8947 h->scsi_host = NULL; /* init_one 3 */
8949 /* includes hpsa_disable_interrupt_mode - pci_init 2 */
8950 hpsa_free_pci_init(h); /* init_one 2.5 */
8952 free_percpu(h->lockup_detected); /* init_one 2 */
8953 h->lockup_detected = NULL; /* init_one 2 */
8954 /* (void) pci_disable_pcie_error_reporting(pdev); */ /* init_one 1 */
8956 hpda_free_ctlr_info(h); /* init_one 1 */
8959 static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
8960 __attribute__((unused)) pm_message_t state)
8965 static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
8970 static struct pci_driver hpsa_pci_driver = {
8972 .probe = hpsa_init_one,
8973 .remove = hpsa_remove_one,
8974 .id_table = hpsa_pci_device_id, /* id_table */
8975 .shutdown = hpsa_shutdown,
8976 .suspend = hpsa_suspend,
8977 .resume = hpsa_resume,
8980 /* Fill in bucket_map[], given nsgs (the max number of
8981 * scatter gather elements supported) and bucket[],
8982 * which is an array of 8 integers. The bucket[] array
8983 * contains 8 different DMA transfer sizes (in 16
8984 * byte increments) which the controller uses to fetch
8985 * commands. This function fills in bucket_map[], which
8986 * maps a given number of scatter gather elements to one of
8987 * the 8 DMA transfer sizes. The point of it is to allow the
8988 * controller to only do as much DMA as needed to fetch the
8989 * command, with the DMA transfer size encoded in the lower
8990 * bits of the command address.
8992 static void calc_bucket_map(int bucket[], int num_buckets,
8993 int nsgs, int min_blocks, u32 *bucket_map)
8997 /* Note, bucket_map must have nsgs+1 entries. */
8998 for (i = 0; i <= nsgs; i++) {
8999 /* Compute size of a command with i SG entries */
9000 size = i + min_blocks;
9001 b = num_buckets; /* Assume the biggest bucket */
9002 /* Find the bucket that is just big enough */
9003 for (j = 0; j < num_buckets; j++) {
9004 if (bucket[j] >= size) {
9009 /* for a command with i SG entries, use bucket b. */
9015 * return -ENODEV on err, 0 on success (or no action)
9016 * allocates numerous items that must be freed later
9018 static int hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support)
9021 unsigned long register_value;
9022 unsigned long transMethod = CFGTBL_Trans_Performant |
9023 (trans_support & CFGTBL_Trans_use_short_tags) |
9024 CFGTBL_Trans_enable_directed_msix |
9025 (trans_support & (CFGTBL_Trans_io_accel1 |
9026 CFGTBL_Trans_io_accel2));
9027 struct access_method access = SA5_performant_access;
9029 /* This is a bit complicated. There are 8 registers on
9030 * the controller which we write to to tell it 8 different
9031 * sizes of commands which there may be. It's a way of
9032 * reducing the DMA done to fetch each command. Encoded into
9033 * each command's tag are 3 bits which communicate to the controller
9034 * which of the eight sizes that command fits within. The size of
9035 * each command depends on how many scatter gather entries there are.
9036 * Each SG entry requires 16 bytes. The eight registers are programmed
9037 * with the number of 16-byte blocks a command of that size requires.
9038 * The smallest command possible requires 5 such 16 byte blocks.
9039 * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte
9040 * blocks. Note, this only extends to the SG entries contained
9041 * within the command block, and does not extend to chained blocks
9042 * of SG elements. bft[] contains the eight values we write to
9043 * the registers. They are not evenly distributed, but have more
9044 * sizes for small commands, and fewer sizes for larger commands.
9046 int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4};
9047 #define MIN_IOACCEL2_BFT_ENTRY 5
9048 #define HPSA_IOACCEL2_HEADER_SZ 4
9049 int bft2[16] = {MIN_IOACCEL2_BFT_ENTRY, 6, 7, 8, 9, 10, 11, 12,
9050 13, 14, 15, 16, 17, 18, 19,
9051 HPSA_IOACCEL2_HEADER_SZ + IOACCEL2_MAXSGENTRIES};
9052 BUILD_BUG_ON(ARRAY_SIZE(bft2) != 16);
9053 BUILD_BUG_ON(ARRAY_SIZE(bft) != 8);
9054 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) >
9055 16 * MIN_IOACCEL2_BFT_ENTRY);
9056 BUILD_BUG_ON(sizeof(struct ioaccel2_sg_element) != 16);
9057 BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4);
9058 /* 5 = 1 s/g entry or 4k
9059 * 6 = 2 s/g entry or 8k
9060 * 8 = 4 s/g entry or 16k
9061 * 10 = 6 s/g entry or 24k
9064 /* If the controller supports either ioaccel method then
9065 * we can also use the RAID stack submit path that does not
9066 * perform the superfluous readl() after each command submission.
9068 if (trans_support & (CFGTBL_Trans_io_accel1 | CFGTBL_Trans_io_accel2))
9069 access = SA5_performant_access_no_read;
9071 /* Controller spec: zero out this buffer. */
9072 for (i = 0; i < h->nreply_queues; i++)
9073 memset(h->reply_queue[i].head, 0, h->reply_queue_size);
9075 bft[7] = SG_ENTRIES_IN_CMD + 4;
9076 calc_bucket_map(bft, ARRAY_SIZE(bft),
9077 SG_ENTRIES_IN_CMD, 4, h->blockFetchTable);
9078 for (i = 0; i < 8; i++)
9079 writel(bft[i], &h->transtable->BlockFetch[i]);
9081 /* size of controller ring buffer */
9082 writel(h->max_commands, &h->transtable->RepQSize);
9083 writel(h->nreply_queues, &h->transtable->RepQCount);
9084 writel(0, &h->transtable->RepQCtrAddrLow32);
9085 writel(0, &h->transtable->RepQCtrAddrHigh32);
9087 for (i = 0; i < h->nreply_queues; i++) {
9088 writel(0, &h->transtable->RepQAddr[i].upper);
9089 writel(h->reply_queue[i].busaddr,
9090 &h->transtable->RepQAddr[i].lower);
9093 writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
9094 writel(transMethod, &(h->cfgtable->HostWrite.TransportRequest));
9096 * enable outbound interrupt coalescing in accelerator mode;
9098 if (trans_support & CFGTBL_Trans_io_accel1) {
9099 access = SA5_ioaccel_mode1_access;
9100 writel(10, &h->cfgtable->HostWrite.CoalIntDelay);
9101 writel(4, &h->cfgtable->HostWrite.CoalIntCount);
9103 if (trans_support & CFGTBL_Trans_io_accel2)
9104 access = SA5_ioaccel_mode2_access;
9105 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
9106 if (hpsa_wait_for_mode_change_ack(h)) {
9107 dev_err(&h->pdev->dev,
9108 "performant mode problem - doorbell timeout\n");
9111 register_value = readl(&(h->cfgtable->TransportActive));
9112 if (!(register_value & CFGTBL_Trans_Performant)) {
9113 dev_err(&h->pdev->dev,
9114 "performant mode problem - transport not active\n");
9117 /* Change the access methods to the performant access methods */
9119 h->transMethod = transMethod;
9121 if (!((trans_support & CFGTBL_Trans_io_accel1) ||
9122 (trans_support & CFGTBL_Trans_io_accel2)))
9125 if (trans_support & CFGTBL_Trans_io_accel1) {
9126 /* Set up I/O accelerator mode */
9127 for (i = 0; i < h->nreply_queues; i++) {
9128 writel(i, h->vaddr + IOACCEL_MODE1_REPLY_QUEUE_INDEX);
9129 h->reply_queue[i].current_entry =
9130 readl(h->vaddr + IOACCEL_MODE1_PRODUCER_INDEX);
9132 bft[7] = h->ioaccel_maxsg + 8;
9133 calc_bucket_map(bft, ARRAY_SIZE(bft), h->ioaccel_maxsg, 8,
9134 h->ioaccel1_blockFetchTable);
9136 /* initialize all reply queue entries to unused */
9137 for (i = 0; i < h->nreply_queues; i++)
9138 memset(h->reply_queue[i].head,
9139 (u8) IOACCEL_MODE1_REPLY_UNUSED,
9140 h->reply_queue_size);
9142 /* set all the constant fields in the accelerator command
9143 * frames once at init time to save CPU cycles later.
9145 for (i = 0; i < h->nr_cmds; i++) {
9146 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[i];
9148 cp->function = IOACCEL1_FUNCTION_SCSIIO;
9149 cp->err_info = (u32) (h->errinfo_pool_dhandle +
9150 (i * sizeof(struct ErrorInfo)));
9151 cp->err_info_len = sizeof(struct ErrorInfo);
9152 cp->sgl_offset = IOACCEL1_SGLOFFSET;
9153 cp->host_context_flags =
9154 cpu_to_le16(IOACCEL1_HCFLAGS_CISS_FORMAT);
9155 cp->timeout_sec = 0;
9158 cpu_to_le64((i << DIRECT_LOOKUP_SHIFT));
9160 cpu_to_le64(h->ioaccel_cmd_pool_dhandle +
9161 (i * sizeof(struct io_accel1_cmd)));
9163 } else if (trans_support & CFGTBL_Trans_io_accel2) {
9164 u64 cfg_offset, cfg_base_addr_index;
9165 u32 bft2_offset, cfg_base_addr;
9168 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
9169 &cfg_base_addr_index, &cfg_offset);
9170 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) != 64);
9171 bft2[15] = h->ioaccel_maxsg + HPSA_IOACCEL2_HEADER_SZ;
9172 calc_bucket_map(bft2, ARRAY_SIZE(bft2), h->ioaccel_maxsg,
9173 4, h->ioaccel2_blockFetchTable);
9174 bft2_offset = readl(&h->cfgtable->io_accel_request_size_offset);
9175 BUILD_BUG_ON(offsetof(struct CfgTable,
9176 io_accel_request_size_offset) != 0xb8);
9177 h->ioaccel2_bft2_regs =
9178 remap_pci_mem(pci_resource_start(h->pdev,
9179 cfg_base_addr_index) +
9180 cfg_offset + bft2_offset,
9182 sizeof(*h->ioaccel2_bft2_regs));
9183 for (i = 0; i < ARRAY_SIZE(bft2); i++)
9184 writel(bft2[i], &h->ioaccel2_bft2_regs[i]);
9186 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
9187 if (hpsa_wait_for_mode_change_ack(h)) {
9188 dev_err(&h->pdev->dev,
9189 "performant mode problem - enabling ioaccel mode\n");
9195 /* Free ioaccel1 mode command blocks and block fetch table */
9196 static void hpsa_free_ioaccel1_cmd_and_bft(struct ctlr_info *h)
9198 if (h->ioaccel_cmd_pool) {
9199 pci_free_consistent(h->pdev,
9200 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
9201 h->ioaccel_cmd_pool,
9202 h->ioaccel_cmd_pool_dhandle);
9203 h->ioaccel_cmd_pool = NULL;
9204 h->ioaccel_cmd_pool_dhandle = 0;
9206 kfree(h->ioaccel1_blockFetchTable);
9207 h->ioaccel1_blockFetchTable = NULL;
9210 /* Allocate ioaccel1 mode command blocks and block fetch table */
9211 static int hpsa_alloc_ioaccel1_cmd_and_bft(struct ctlr_info *h)
9214 readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
9215 if (h->ioaccel_maxsg > IOACCEL1_MAXSGENTRIES)
9216 h->ioaccel_maxsg = IOACCEL1_MAXSGENTRIES;
9218 /* Command structures must be aligned on a 128-byte boundary
9219 * because the 7 lower bits of the address are used by the
9222 BUILD_BUG_ON(sizeof(struct io_accel1_cmd) %
9223 IOACCEL1_COMMANDLIST_ALIGNMENT);
9224 h->ioaccel_cmd_pool =
9225 pci_alloc_consistent(h->pdev,
9226 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
9227 &(h->ioaccel_cmd_pool_dhandle));
9229 h->ioaccel1_blockFetchTable =
9230 kmalloc(((h->ioaccel_maxsg + 1) *
9231 sizeof(u32)), GFP_KERNEL);
9233 if ((h->ioaccel_cmd_pool == NULL) ||
9234 (h->ioaccel1_blockFetchTable == NULL))
9237 memset(h->ioaccel_cmd_pool, 0,
9238 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool));
9242 hpsa_free_ioaccel1_cmd_and_bft(h);
9246 /* Free ioaccel2 mode command blocks and block fetch table */
9247 static void hpsa_free_ioaccel2_cmd_and_bft(struct ctlr_info *h)
9249 hpsa_free_ioaccel2_sg_chain_blocks(h);
9251 if (h->ioaccel2_cmd_pool) {
9252 pci_free_consistent(h->pdev,
9253 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
9254 h->ioaccel2_cmd_pool,
9255 h->ioaccel2_cmd_pool_dhandle);
9256 h->ioaccel2_cmd_pool = NULL;
9257 h->ioaccel2_cmd_pool_dhandle = 0;
9259 kfree(h->ioaccel2_blockFetchTable);
9260 h->ioaccel2_blockFetchTable = NULL;
9263 /* Allocate ioaccel2 mode command blocks and block fetch table */
9264 static int hpsa_alloc_ioaccel2_cmd_and_bft(struct ctlr_info *h)
9268 /* Allocate ioaccel2 mode command blocks and block fetch table */
9271 readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
9272 if (h->ioaccel_maxsg > IOACCEL2_MAXSGENTRIES)
9273 h->ioaccel_maxsg = IOACCEL2_MAXSGENTRIES;
9275 BUILD_BUG_ON(sizeof(struct io_accel2_cmd) %
9276 IOACCEL2_COMMANDLIST_ALIGNMENT);
9277 h->ioaccel2_cmd_pool =
9278 pci_alloc_consistent(h->pdev,
9279 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
9280 &(h->ioaccel2_cmd_pool_dhandle));
9282 h->ioaccel2_blockFetchTable =
9283 kmalloc(((h->ioaccel_maxsg + 1) *
9284 sizeof(u32)), GFP_KERNEL);
9286 if ((h->ioaccel2_cmd_pool == NULL) ||
9287 (h->ioaccel2_blockFetchTable == NULL)) {
9292 rc = hpsa_allocate_ioaccel2_sg_chain_blocks(h);
9296 memset(h->ioaccel2_cmd_pool, 0,
9297 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool));
9301 hpsa_free_ioaccel2_cmd_and_bft(h);
9305 /* Free items allocated by hpsa_put_ctlr_into_performant_mode */
9306 static void hpsa_free_performant_mode(struct ctlr_info *h)
9308 kfree(h->blockFetchTable);
9309 h->blockFetchTable = NULL;
9310 hpsa_free_reply_queues(h);
9311 hpsa_free_ioaccel1_cmd_and_bft(h);
9312 hpsa_free_ioaccel2_cmd_and_bft(h);
9315 /* return -ENODEV on error, 0 on success (or no action)
9316 * allocates numerous items that must be freed later
9318 static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
9321 unsigned long transMethod = CFGTBL_Trans_Performant |
9322 CFGTBL_Trans_use_short_tags;
9325 if (hpsa_simple_mode)
9328 trans_support = readl(&(h->cfgtable->TransportSupport));
9329 if (!(trans_support & PERFORMANT_MODE))
9332 /* Check for I/O accelerator mode support */
9333 if (trans_support & CFGTBL_Trans_io_accel1) {
9334 transMethod |= CFGTBL_Trans_io_accel1 |
9335 CFGTBL_Trans_enable_directed_msix;
9336 rc = hpsa_alloc_ioaccel1_cmd_and_bft(h);
9339 } else if (trans_support & CFGTBL_Trans_io_accel2) {
9340 transMethod |= CFGTBL_Trans_io_accel2 |
9341 CFGTBL_Trans_enable_directed_msix;
9342 rc = hpsa_alloc_ioaccel2_cmd_and_bft(h);
9347 h->nreply_queues = h->msix_vectors > 0 ? h->msix_vectors : 1;
9348 hpsa_get_max_perf_mode_cmds(h);
9349 /* Performant mode ring buffer and supporting data structures */
9350 h->reply_queue_size = h->max_commands * sizeof(u64);
9352 for (i = 0; i < h->nreply_queues; i++) {
9353 h->reply_queue[i].head = pci_alloc_consistent(h->pdev,
9354 h->reply_queue_size,
9355 &(h->reply_queue[i].busaddr));
9356 if (!h->reply_queue[i].head) {
9358 goto clean1; /* rq, ioaccel */
9360 h->reply_queue[i].size = h->max_commands;
9361 h->reply_queue[i].wraparound = 1; /* spec: init to 1 */
9362 h->reply_queue[i].current_entry = 0;
9365 /* Need a block fetch table for performant mode */
9366 h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) *
9367 sizeof(u32)), GFP_KERNEL);
9368 if (!h->blockFetchTable) {
9370 goto clean1; /* rq, ioaccel */
9373 rc = hpsa_enter_performant_mode(h, trans_support);
9375 goto clean2; /* bft, rq, ioaccel */
9378 clean2: /* bft, rq, ioaccel */
9379 kfree(h->blockFetchTable);
9380 h->blockFetchTable = NULL;
9381 clean1: /* rq, ioaccel */
9382 hpsa_free_reply_queues(h);
9383 hpsa_free_ioaccel1_cmd_and_bft(h);
9384 hpsa_free_ioaccel2_cmd_and_bft(h);
9388 static int is_accelerated_cmd(struct CommandList *c)
9390 return c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_IOACCEL2;
9393 static void hpsa_drain_accel_commands(struct ctlr_info *h)
9395 struct CommandList *c = NULL;
9396 int i, accel_cmds_out;
9399 do { /* wait for all outstanding ioaccel commands to drain out */
9401 for (i = 0; i < h->nr_cmds; i++) {
9402 c = h->cmd_pool + i;
9403 refcount = atomic_inc_return(&c->refcount);
9404 if (refcount > 1) /* Command is allocated */
9405 accel_cmds_out += is_accelerated_cmd(c);
9408 if (accel_cmds_out <= 0)
9414 static struct hpsa_sas_phy *hpsa_alloc_sas_phy(
9415 struct hpsa_sas_port *hpsa_sas_port)
9417 struct hpsa_sas_phy *hpsa_sas_phy;
9418 struct sas_phy *phy;
9420 hpsa_sas_phy = kzalloc(sizeof(*hpsa_sas_phy), GFP_KERNEL);
9424 phy = sas_phy_alloc(hpsa_sas_port->parent_node->parent_dev,
9425 hpsa_sas_port->next_phy_index);
9427 kfree(hpsa_sas_phy);
9431 hpsa_sas_port->next_phy_index++;
9432 hpsa_sas_phy->phy = phy;
9433 hpsa_sas_phy->parent_port = hpsa_sas_port;
9435 return hpsa_sas_phy;
9438 static void hpsa_free_sas_phy(struct hpsa_sas_phy *hpsa_sas_phy)
9440 struct sas_phy *phy = hpsa_sas_phy->phy;
9442 sas_port_delete_phy(hpsa_sas_phy->parent_port->port, phy);
9443 if (hpsa_sas_phy->added_to_port)
9444 list_del(&hpsa_sas_phy->phy_list_entry);
9445 sas_phy_delete(phy);
9446 kfree(hpsa_sas_phy);
9449 static int hpsa_sas_port_add_phy(struct hpsa_sas_phy *hpsa_sas_phy)
9452 struct hpsa_sas_port *hpsa_sas_port;
9453 struct sas_phy *phy;
9454 struct sas_identify *identify;
9456 hpsa_sas_port = hpsa_sas_phy->parent_port;
9457 phy = hpsa_sas_phy->phy;
9459 identify = &phy->identify;
9460 memset(identify, 0, sizeof(*identify));
9461 identify->sas_address = hpsa_sas_port->sas_address;
9462 identify->device_type = SAS_END_DEVICE;
9463 identify->initiator_port_protocols = SAS_PROTOCOL_STP;
9464 identify->target_port_protocols = SAS_PROTOCOL_STP;
9465 phy->minimum_linkrate_hw = SAS_LINK_RATE_UNKNOWN;
9466 phy->maximum_linkrate_hw = SAS_LINK_RATE_UNKNOWN;
9467 phy->minimum_linkrate = SAS_LINK_RATE_UNKNOWN;
9468 phy->maximum_linkrate = SAS_LINK_RATE_UNKNOWN;
9469 phy->negotiated_linkrate = SAS_LINK_RATE_UNKNOWN;
9471 rc = sas_phy_add(hpsa_sas_phy->phy);
9475 sas_port_add_phy(hpsa_sas_port->port, hpsa_sas_phy->phy);
9476 list_add_tail(&hpsa_sas_phy->phy_list_entry,
9477 &hpsa_sas_port->phy_list_head);
9478 hpsa_sas_phy->added_to_port = true;
9484 hpsa_sas_port_add_rphy(struct hpsa_sas_port *hpsa_sas_port,
9485 struct sas_rphy *rphy)
9487 struct sas_identify *identify;
9489 identify = &rphy->identify;
9490 identify->sas_address = hpsa_sas_port->sas_address;
9491 identify->initiator_port_protocols = SAS_PROTOCOL_STP;
9492 identify->target_port_protocols = SAS_PROTOCOL_STP;
9494 return sas_rphy_add(rphy);
9497 static struct hpsa_sas_port
9498 *hpsa_alloc_sas_port(struct hpsa_sas_node *hpsa_sas_node,
9502 struct hpsa_sas_port *hpsa_sas_port;
9503 struct sas_port *port;
9505 hpsa_sas_port = kzalloc(sizeof(*hpsa_sas_port), GFP_KERNEL);
9509 INIT_LIST_HEAD(&hpsa_sas_port->phy_list_head);
9510 hpsa_sas_port->parent_node = hpsa_sas_node;
9512 port = sas_port_alloc_num(hpsa_sas_node->parent_dev);
9514 goto free_hpsa_port;
9516 rc = sas_port_add(port);
9520 hpsa_sas_port->port = port;
9521 hpsa_sas_port->sas_address = sas_address;
9522 list_add_tail(&hpsa_sas_port->port_list_entry,
9523 &hpsa_sas_node->port_list_head);
9525 return hpsa_sas_port;
9528 sas_port_free(port);
9530 kfree(hpsa_sas_port);
9535 static void hpsa_free_sas_port(struct hpsa_sas_port *hpsa_sas_port)
9537 struct hpsa_sas_phy *hpsa_sas_phy;
9538 struct hpsa_sas_phy *next;
9540 list_for_each_entry_safe(hpsa_sas_phy, next,
9541 &hpsa_sas_port->phy_list_head, phy_list_entry)
9542 hpsa_free_sas_phy(hpsa_sas_phy);
9544 sas_port_delete(hpsa_sas_port->port);
9545 list_del(&hpsa_sas_port->port_list_entry);
9546 kfree(hpsa_sas_port);
9549 static struct hpsa_sas_node *hpsa_alloc_sas_node(struct device *parent_dev)
9551 struct hpsa_sas_node *hpsa_sas_node;
9553 hpsa_sas_node = kzalloc(sizeof(*hpsa_sas_node), GFP_KERNEL);
9554 if (hpsa_sas_node) {
9555 hpsa_sas_node->parent_dev = parent_dev;
9556 INIT_LIST_HEAD(&hpsa_sas_node->port_list_head);
9559 return hpsa_sas_node;
9562 static void hpsa_free_sas_node(struct hpsa_sas_node *hpsa_sas_node)
9564 struct hpsa_sas_port *hpsa_sas_port;
9565 struct hpsa_sas_port *next;
9570 list_for_each_entry_safe(hpsa_sas_port, next,
9571 &hpsa_sas_node->port_list_head, port_list_entry)
9572 hpsa_free_sas_port(hpsa_sas_port);
9574 kfree(hpsa_sas_node);
9577 static struct hpsa_scsi_dev_t
9578 *hpsa_find_device_by_sas_rphy(struct ctlr_info *h,
9579 struct sas_rphy *rphy)
9582 struct hpsa_scsi_dev_t *device;
9584 for (i = 0; i < h->ndevices; i++) {
9586 if (!device->sas_port)
9588 if (device->sas_port->rphy == rphy)
9595 static int hpsa_add_sas_host(struct ctlr_info *h)
9598 struct device *parent_dev;
9599 struct hpsa_sas_node *hpsa_sas_node;
9600 struct hpsa_sas_port *hpsa_sas_port;
9601 struct hpsa_sas_phy *hpsa_sas_phy;
9603 parent_dev = &h->scsi_host->shost_dev;
9605 hpsa_sas_node = hpsa_alloc_sas_node(parent_dev);
9609 hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, h->sas_address);
9610 if (!hpsa_sas_port) {
9615 hpsa_sas_phy = hpsa_alloc_sas_phy(hpsa_sas_port);
9616 if (!hpsa_sas_phy) {
9621 rc = hpsa_sas_port_add_phy(hpsa_sas_phy);
9625 h->sas_host = hpsa_sas_node;
9630 hpsa_free_sas_phy(hpsa_sas_phy);
9632 hpsa_free_sas_port(hpsa_sas_port);
9634 hpsa_free_sas_node(hpsa_sas_node);
9639 static void hpsa_delete_sas_host(struct ctlr_info *h)
9641 hpsa_free_sas_node(h->sas_host);
9644 static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node,
9645 struct hpsa_scsi_dev_t *device)
9648 struct hpsa_sas_port *hpsa_sas_port;
9649 struct sas_rphy *rphy;
9651 hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, device->sas_address);
9655 rphy = sas_end_device_alloc(hpsa_sas_port->port);
9661 hpsa_sas_port->rphy = rphy;
9662 device->sas_port = hpsa_sas_port;
9664 rc = hpsa_sas_port_add_rphy(hpsa_sas_port, rphy);
9671 hpsa_free_sas_port(hpsa_sas_port);
9672 device->sas_port = NULL;
9677 static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device)
9679 if (device->sas_port) {
9680 hpsa_free_sas_port(device->sas_port);
9681 device->sas_port = NULL;
9686 hpsa_sas_get_linkerrors(struct sas_phy *phy)
9692 hpsa_sas_get_enclosure_identifier(struct sas_rphy *rphy, u64 *identifier)
9694 *identifier = rphy->identify.sas_address;
9699 hpsa_sas_get_bay_identifier(struct sas_rphy *rphy)
9705 hpsa_sas_phy_reset(struct sas_phy *phy, int hard_reset)
9711 hpsa_sas_phy_enable(struct sas_phy *phy, int enable)
9717 hpsa_sas_phy_setup(struct sas_phy *phy)
9723 hpsa_sas_phy_release(struct sas_phy *phy)
9728 hpsa_sas_phy_speed(struct sas_phy *phy, struct sas_phy_linkrates *rates)
9733 static struct sas_function_template hpsa_sas_transport_functions = {
9734 .get_linkerrors = hpsa_sas_get_linkerrors,
9735 .get_enclosure_identifier = hpsa_sas_get_enclosure_identifier,
9736 .get_bay_identifier = hpsa_sas_get_bay_identifier,
9737 .phy_reset = hpsa_sas_phy_reset,
9738 .phy_enable = hpsa_sas_phy_enable,
9739 .phy_setup = hpsa_sas_phy_setup,
9740 .phy_release = hpsa_sas_phy_release,
9741 .set_phy_speed = hpsa_sas_phy_speed,
9745 * This is it. Register the PCI driver information for the cards we control
9746 * the OS will call our registered routines when it finds one of our cards.
9748 static int __init hpsa_init(void)
9752 hpsa_sas_transport_template =
9753 sas_attach_transport(&hpsa_sas_transport_functions);
9754 if (!hpsa_sas_transport_template)
9757 rc = pci_register_driver(&hpsa_pci_driver);
9760 sas_release_transport(hpsa_sas_transport_template);
9765 static void __exit hpsa_cleanup(void)
9767 pci_unregister_driver(&hpsa_pci_driver);
9768 sas_release_transport(hpsa_sas_transport_template);
9771 static void __attribute__((unused)) verify_offsets(void)
9773 #define VERIFY_OFFSET(member, offset) \
9774 BUILD_BUG_ON(offsetof(struct raid_map_data, member) != offset)
9776 VERIFY_OFFSET(structure_size, 0);
9777 VERIFY_OFFSET(volume_blk_size, 4);
9778 VERIFY_OFFSET(volume_blk_cnt, 8);
9779 VERIFY_OFFSET(phys_blk_shift, 16);
9780 VERIFY_OFFSET(parity_rotation_shift, 17);
9781 VERIFY_OFFSET(strip_size, 18);
9782 VERIFY_OFFSET(disk_starting_blk, 20);
9783 VERIFY_OFFSET(disk_blk_cnt, 28);
9784 VERIFY_OFFSET(data_disks_per_row, 36);
9785 VERIFY_OFFSET(metadata_disks_per_row, 38);
9786 VERIFY_OFFSET(row_cnt, 40);
9787 VERIFY_OFFSET(layout_map_count, 42);
9788 VERIFY_OFFSET(flags, 44);
9789 VERIFY_OFFSET(dekindex, 46);
9790 /* VERIFY_OFFSET(reserved, 48 */
9791 VERIFY_OFFSET(data, 64);
9793 #undef VERIFY_OFFSET
9795 #define VERIFY_OFFSET(member, offset) \
9796 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, member) != offset)
9798 VERIFY_OFFSET(IU_type, 0);
9799 VERIFY_OFFSET(direction, 1);
9800 VERIFY_OFFSET(reply_queue, 2);
9801 /* VERIFY_OFFSET(reserved1, 3); */
9802 VERIFY_OFFSET(scsi_nexus, 4);
9803 VERIFY_OFFSET(Tag, 8);
9804 VERIFY_OFFSET(cdb, 16);
9805 VERIFY_OFFSET(cciss_lun, 32);
9806 VERIFY_OFFSET(data_len, 40);
9807 VERIFY_OFFSET(cmd_priority_task_attr, 44);
9808 VERIFY_OFFSET(sg_count, 45);
9809 /* VERIFY_OFFSET(reserved3 */
9810 VERIFY_OFFSET(err_ptr, 48);
9811 VERIFY_OFFSET(err_len, 56);
9812 /* VERIFY_OFFSET(reserved4 */
9813 VERIFY_OFFSET(sg, 64);
9815 #undef VERIFY_OFFSET
9817 #define VERIFY_OFFSET(member, offset) \
9818 BUILD_BUG_ON(offsetof(struct io_accel1_cmd, member) != offset)
9820 VERIFY_OFFSET(dev_handle, 0x00);
9821 VERIFY_OFFSET(reserved1, 0x02);
9822 VERIFY_OFFSET(function, 0x03);
9823 VERIFY_OFFSET(reserved2, 0x04);
9824 VERIFY_OFFSET(err_info, 0x0C);
9825 VERIFY_OFFSET(reserved3, 0x10);
9826 VERIFY_OFFSET(err_info_len, 0x12);
9827 VERIFY_OFFSET(reserved4, 0x13);
9828 VERIFY_OFFSET(sgl_offset, 0x14);
9829 VERIFY_OFFSET(reserved5, 0x15);
9830 VERIFY_OFFSET(transfer_len, 0x1C);
9831 VERIFY_OFFSET(reserved6, 0x20);
9832 VERIFY_OFFSET(io_flags, 0x24);
9833 VERIFY_OFFSET(reserved7, 0x26);
9834 VERIFY_OFFSET(LUN, 0x34);
9835 VERIFY_OFFSET(control, 0x3C);
9836 VERIFY_OFFSET(CDB, 0x40);
9837 VERIFY_OFFSET(reserved8, 0x50);
9838 VERIFY_OFFSET(host_context_flags, 0x60);
9839 VERIFY_OFFSET(timeout_sec, 0x62);
9840 VERIFY_OFFSET(ReplyQueue, 0x64);
9841 VERIFY_OFFSET(reserved9, 0x65);
9842 VERIFY_OFFSET(tag, 0x68);
9843 VERIFY_OFFSET(host_addr, 0x70);
9844 VERIFY_OFFSET(CISS_LUN, 0x78);
9845 VERIFY_OFFSET(SG, 0x78 + 8);
9846 #undef VERIFY_OFFSET
9849 module_init(hpsa_init);
9850 module_exit(hpsa_cleanup);