2 * Copyright (c) 2014 MediaTek Inc.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
15 #include <linux/irq.h>
16 #include <linux/irqchip.h>
17 #include <linux/irqdomain.h>
19 #include <linux/of_irq.h>
20 #include <linux/of_address.h>
22 #include <linux/slab.h>
23 #include <linux/spinlock.h>
25 struct mtk_sysirq_chip_data {
27 void __iomem *intpol_base;
30 static int mtk_sysirq_set_type(struct irq_data *data, unsigned int type)
32 irq_hw_number_t hwirq = data->hwirq;
33 struct mtk_sysirq_chip_data *chip_data = data->chip_data;
34 u32 offset, reg_index, value;
38 offset = hwirq & 0x1f;
39 reg_index = hwirq >> 5;
41 spin_lock_irqsave(&chip_data->lock, flags);
42 value = readl_relaxed(chip_data->intpol_base + reg_index * 4);
43 if (type == IRQ_TYPE_LEVEL_LOW || type == IRQ_TYPE_EDGE_FALLING) {
44 if (type == IRQ_TYPE_LEVEL_LOW)
45 type = IRQ_TYPE_LEVEL_HIGH;
47 type = IRQ_TYPE_EDGE_RISING;
48 value |= (1 << offset);
50 value &= ~(1 << offset);
52 writel(value, chip_data->intpol_base + reg_index * 4);
54 data = data->parent_data;
55 ret = data->chip->irq_set_type(data, type);
56 spin_unlock_irqrestore(&chip_data->lock, flags);
60 static struct irq_chip mtk_sysirq_chip = {
62 .irq_mask = irq_chip_mask_parent,
63 .irq_unmask = irq_chip_unmask_parent,
64 .irq_eoi = irq_chip_eoi_parent,
65 .irq_set_type = mtk_sysirq_set_type,
66 .irq_retrigger = irq_chip_retrigger_hierarchy,
67 .irq_set_affinity = irq_chip_set_affinity_parent,
70 static int mtk_sysirq_domain_translate(struct irq_domain *d,
71 struct irq_fwspec *fwspec,
75 if (is_of_node(fwspec->fwnode)) {
76 if (fwspec->param_count != 3)
79 /* No PPI should point to this domain */
80 if (fwspec->param[0] != 0)
83 *hwirq = fwspec->param[1];
84 *type = fwspec->param[2] & IRQ_TYPE_SENSE_MASK;
91 static int mtk_sysirq_domain_alloc(struct irq_domain *domain, unsigned int virq,
92 unsigned int nr_irqs, void *arg)
95 irq_hw_number_t hwirq;
96 struct irq_fwspec *fwspec = arg;
97 struct irq_fwspec gic_fwspec = *fwspec;
99 if (fwspec->param_count != 3)
102 /* sysirq doesn't support PPI */
103 if (fwspec->param[0])
106 hwirq = fwspec->param[1];
107 for (i = 0; i < nr_irqs; i++)
108 irq_domain_set_hwirq_and_chip(domain, virq + i, hwirq + i,
112 gic_fwspec.fwnode = domain->parent->fwnode;
113 return irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, &gic_fwspec);
116 static const struct irq_domain_ops sysirq_domain_ops = {
117 .translate = mtk_sysirq_domain_translate,
118 .alloc = mtk_sysirq_domain_alloc,
119 .free = irq_domain_free_irqs_common,
122 static int __init mtk_sysirq_of_init(struct device_node *node,
123 struct device_node *parent)
125 struct irq_domain *domain, *domain_parent;
126 struct mtk_sysirq_chip_data *chip_data;
127 int ret, size, intpol_num;
130 domain_parent = irq_find_host(parent);
131 if (!domain_parent) {
132 pr_err("mtk_sysirq: interrupt-parent not found\n");
136 ret = of_address_to_resource(node, 0, &res);
140 chip_data = kzalloc(sizeof(*chip_data), GFP_KERNEL);
144 size = resource_size(&res);
145 intpol_num = size * 8;
146 chip_data->intpol_base = ioremap(res.start, size);
147 if (!chip_data->intpol_base) {
148 pr_err("mtk_sysirq: unable to map sysirq register\n");
153 domain = irq_domain_add_hierarchy(domain_parent, 0, intpol_num, node,
154 &sysirq_domain_ops, chip_data);
159 spin_lock_init(&chip_data->lock);
164 iounmap(chip_data->intpol_base);
169 IRQCHIP_DECLARE(mtk_sysirq, "mediatek,mt6577-sysirq", mtk_sysirq_of_init);