drivers/scsi/arcmsr/arcmsr_hba.c

   1 /*
   2 *******************************************************************************
   3 **        O.S   : Linux
   4 **   FILE NAME  : arcmsr_hba.c
   5 **        BY    : Nick Cheng, C.L. Huang
   6 **   Description: SCSI RAID Device Driver for Areca RAID Controller
   7 *******************************************************************************
   8 ** Copyright (C) 2002 - 2014, Areca Technology Corporation All rights reserved
   9 **
  10 **     Web site: www.areca.com.tw
  11 **       E-mail: [email protected]
  12 **
  13 ** This program is free software; you can redistribute it and/or modify
  14 ** it under the terms of the GNU General Public License version 2 as
  15 ** published by the Free Software Foundation.
  16 ** This program is distributed in the hope that it will be useful,
  17 ** but WITHOUT ANY WARRANTY; without even the implied warranty of
  18 ** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19 ** GNU General Public License for more details.
  20 *******************************************************************************
  21 ** Redistribution and use in source and binary forms, with or without
  22 ** modification, are permitted provided that the following conditions
  23 ** are met:
  24 ** 1. Redistributions of source code must retain the above copyright
  25 **    notice, this list of conditions and the following disclaimer.
  26 ** 2. Redistributions in binary form must reproduce the above copyright
  27 **    notice, this list of conditions and the following disclaimer in the
  28 **    documentation and/or other materials provided with the distribution.
  29 ** 3. The name of the author may not be used to endorse or promote products
  30 **    derived from this software without specific prior written permission.
  31 **
  32 ** THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  33 ** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  34 ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  35 ** IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  36 ** INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING,BUT
  37 ** NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  38 ** DATA, OR PROFITS; OR BUSINESS INTERRUPTION)HOWEVER CAUSED AND ON ANY
  39 ** THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  40 ** (INCLUDING NEGLIGENCE OR OTHERWISE)ARISING IN ANY WAY OUT OF THE USE OF
  41 ** THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  42 *******************************************************************************
  43 ** For history of changes, see Documentation/scsi/ChangeLog.arcmsr
  44 **     Firmware Specification, see Documentation/scsi/arcmsr_spec.rst
  45 *******************************************************************************
  46 */
  47 #include <linux/module.h>
  48 #include <linux/reboot.h>
  49 #include <linux/spinlock.h>
  50 #include <linux/pci_ids.h>
  51 #include <linux/interrupt.h>
  52 #include <linux/moduleparam.h>
  53 #include <linux/errno.h>
  54 #include <linux/types.h>
  55 #include <linux/delay.h>
  56 #include <linux/dma-mapping.h>
  57 #include <linux/timer.h>
  58 #include <linux/slab.h>
  59 #include <linux/pci.h>
  60 #include <linux/circ_buf.h>
  61 #include <asm/dma.h>
  62 #include <asm/io.h>
  63 #include <linux/uaccess.h>
  64 #include <scsi/scsi_host.h>
  65 #include <scsi/scsi.h>
  66 #include <scsi/scsi_cmnd.h>
  67 #include <scsi/scsi_tcq.h>
  68 #include <scsi/scsi_device.h>
  69 #include <scsi/scsi_transport.h>
  70 #include <scsi/scsicam.h>
  71 #include "arcmsr.h"
  72 MODULE_AUTHOR("Nick Cheng, C.L. Huang <[email protected]>");
  73 MODULE_DESCRIPTION("Areca ARC11xx/12xx/16xx/188x SAS/SATA RAID Controller Driver");
  74 MODULE_LICENSE("Dual BSD/GPL");
  75 MODULE_VERSION(ARCMSR_DRIVER_VERSION);
  76
  77 static int msix_enable = 1;
  78 module_param(msix_enable, int, S_IRUGO);
  79 MODULE_PARM_DESC(msix_enable, "Enable MSI-X interrupt(0 ~ 1), msix_enable=1(enable), =0(disable)");
  80
  81 static int msi_enable = 1;
  82 module_param(msi_enable, int, S_IRUGO);
  83 MODULE_PARM_DESC(msi_enable, "Enable MSI interrupt(0 ~ 1), msi_enable=1(enable), =0(disable)");
  84
  85 static int host_can_queue = ARCMSR_DEFAULT_OUTSTANDING_CMD;
  86 module_param(host_can_queue, int, S_IRUGO);
  87 MODULE_PARM_DESC(host_can_queue, " adapter queue depth(32 ~ 1024), default is 128");
  88
  89 static int cmd_per_lun = ARCMSR_DEFAULT_CMD_PERLUN;
  90 module_param(cmd_per_lun, int, S_IRUGO);
  91 MODULE_PARM_DESC(cmd_per_lun, " device queue depth(1 ~ 128), default is 32");
  92
  93 static int dma_mask_64 = 0;
  94 module_param(dma_mask_64, int, S_IRUGO);
  95 MODULE_PARM_DESC(dma_mask_64, " set DMA mask to 64 bits(0 ~ 1), dma_mask_64=1(64 bits), =0(32 bits)");
  96
  97 static int set_date_time = 0;
  98 module_param(set_date_time, int, S_IRUGO);
  99 MODULE_PARM_DESC(set_date_time, " send date, time to iop(0 ~ 1), set_date_time=1(enable), default(=0) is disable");
 100
 101 static int cmd_timeout = ARCMSR_DEFAULT_TIMEOUT;
 102 module_param(cmd_timeout, int, S_IRUGO);
 103 MODULE_PARM_DESC(cmd_timeout, " scsi cmd timeout(0 ~ 120 sec.), default is 90");
 104
 105 #define ARCMSR_SLEEPTIME        10
 106 #define ARCMSR_RETRYCOUNT       12
 107
 108 static wait_queue_head_t wait_q;
 109 static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb,
 110                                         struct scsi_cmnd *cmd);
 111 static int arcmsr_iop_confirm(struct AdapterControlBlock *acb);
 112 static int arcmsr_abort(struct scsi_cmnd *);
 113 static int arcmsr_bus_reset(struct scsi_cmnd *);
 114 static int arcmsr_bios_param(struct scsi_device *sdev,
 115                 struct block_device *bdev, sector_t capacity, int *info);
 116 static int arcmsr_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
 117 static int arcmsr_probe(struct pci_dev *pdev,
 118                                 const struct pci_device_id *id);
 119 static int __maybe_unused arcmsr_suspend(struct device *dev);
 120 static int __maybe_unused arcmsr_resume(struct device *dev);
 121 static void arcmsr_remove(struct pci_dev *pdev);
 122 static void arcmsr_shutdown(struct pci_dev *pdev);
 123 static void arcmsr_iop_init(struct AdapterControlBlock *acb);
 124 static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb);
 125 static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb);
 126 static void arcmsr_enable_outbound_ints(struct AdapterControlBlock *acb,
 127         u32 intmask_org);
 128 static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb);
 129 static void arcmsr_hbaA_flush_cache(struct AdapterControlBlock *acb);
 130 static void arcmsr_hbaB_flush_cache(struct AdapterControlBlock *acb);
 131 static void arcmsr_request_device_map(struct timer_list *t);
 132 static void arcmsr_message_isr_bh_fn(struct work_struct *work);
 133 static bool arcmsr_get_firmware_spec(struct AdapterControlBlock *acb);
 134 static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb);
 135 static void arcmsr_hbaC_message_isr(struct AdapterControlBlock *pACB);
 136 static void arcmsr_hbaD_message_isr(struct AdapterControlBlock *acb);
 137 static void arcmsr_hbaE_message_isr(struct AdapterControlBlock *acb);
 138 static void arcmsr_hbaE_postqueue_isr(struct AdapterControlBlock *acb);
 139 static void arcmsr_hbaF_postqueue_isr(struct AdapterControlBlock *acb);
 140 static void arcmsr_hardware_reset(struct AdapterControlBlock *acb);
 141 static const char *arcmsr_info(struct Scsi_Host *);
 142 static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb);
 143 static void arcmsr_free_irq(struct pci_dev *, struct AdapterControlBlock *);
 144 static void arcmsr_wait_firmware_ready(struct AdapterControlBlock *acb);
 145 static void arcmsr_set_iop_datetime(struct timer_list *);
 146 static int arcmsr_slave_config(struct scsi_device *sdev);
 147 static int arcmsr_adjust_disk_queue_depth(struct scsi_device *sdev, int queue_depth)
 148 {
 149         if (queue_depth > ARCMSR_MAX_CMD_PERLUN)
 150                 queue_depth = ARCMSR_MAX_CMD_PERLUN;
 151         return scsi_change_queue_depth(sdev, queue_depth);
 152 }
 153
 154 static const struct scsi_host_template arcmsr_scsi_host_template = {
 155         .module                 = THIS_MODULE,
 156         .proc_name              = ARCMSR_NAME,
 157         .name                   = "Areca SAS/SATA RAID driver",
 158         .info                   = arcmsr_info,
 159         .queuecommand           = arcmsr_queue_command,
 160         .eh_abort_handler       = arcmsr_abort,
 161         .eh_bus_reset_handler   = arcmsr_bus_reset,
 162         .bios_param             = arcmsr_bios_param,
 163         .slave_configure        = arcmsr_slave_config,
 164         .change_queue_depth     = arcmsr_adjust_disk_queue_depth,
 165         .can_queue              = ARCMSR_DEFAULT_OUTSTANDING_CMD,
 166         .this_id                = ARCMSR_SCSI_INITIATOR_ID,
 167         .sg_tablesize           = ARCMSR_DEFAULT_SG_ENTRIES,
 168         .max_sectors            = ARCMSR_MAX_XFER_SECTORS_C,
 169         .cmd_per_lun            = ARCMSR_DEFAULT_CMD_PERLUN,
 170         .shost_groups           = arcmsr_host_groups,
 171         .no_write_same          = 1,
 172 };
 173
 174 static struct pci_device_id arcmsr_device_id_table[] = {
 175         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1110),
 176                 .driver_data = ACB_ADAPTER_TYPE_A},
 177         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1120),
 178                 .driver_data = ACB_ADAPTER_TYPE_A},
 179         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1130),
 180                 .driver_data = ACB_ADAPTER_TYPE_A},
 181         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1160),
 182                 .driver_data = ACB_ADAPTER_TYPE_A},
 183         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1170),
 184                 .driver_data = ACB_ADAPTER_TYPE_A},
 185         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1200),
 186                 .driver_data = ACB_ADAPTER_TYPE_B},
 187         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1201),
 188                 .driver_data = ACB_ADAPTER_TYPE_B},
 189         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1202),
 190                 .driver_data = ACB_ADAPTER_TYPE_B},
 191         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1203),
 192                 .driver_data = ACB_ADAPTER_TYPE_B},
 193         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1210),
 194                 .driver_data = ACB_ADAPTER_TYPE_A},
 195         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1214),
 196                 .driver_data = ACB_ADAPTER_TYPE_D},
 197         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1220),
 198                 .driver_data = ACB_ADAPTER_TYPE_A},
 199         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1230),
 200                 .driver_data = ACB_ADAPTER_TYPE_A},
 201         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1260),
 202                 .driver_data = ACB_ADAPTER_TYPE_A},
 203         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1270),
 204                 .driver_data = ACB_ADAPTER_TYPE_A},
 205         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1280),
 206                 .driver_data = ACB_ADAPTER_TYPE_A},
 207         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1380),
 208                 .driver_data = ACB_ADAPTER_TYPE_A},
 209         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1381),
 210                 .driver_data = ACB_ADAPTER_TYPE_A},
 211         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1680),
 212                 .driver_data = ACB_ADAPTER_TYPE_A},
 213         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1681),
 214                 .driver_data = ACB_ADAPTER_TYPE_A},
 215         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1880),
 216                 .driver_data = ACB_ADAPTER_TYPE_C},
 217         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1883),
 218                 .driver_data = ACB_ADAPTER_TYPE_C},
 219         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1884),
 220                 .driver_data = ACB_ADAPTER_TYPE_E},
 221         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1886_0),
 222                 .driver_data = ACB_ADAPTER_TYPE_F},
 223         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1886),
 224                 .driver_data = ACB_ADAPTER_TYPE_F},
 225         {0, 0}, /* Terminating entry */
 226 };
 227 MODULE_DEVICE_TABLE(pci, arcmsr_device_id_table);
 228
 229 static SIMPLE_DEV_PM_OPS(arcmsr_pm_ops, arcmsr_suspend, arcmsr_resume);
 230
 231 static struct pci_driver arcmsr_pci_driver = {
 232         .name                   = "arcmsr",
 233         .id_table               = arcmsr_device_id_table,
 234         .probe                  = arcmsr_probe,
 235         .remove                 = arcmsr_remove,
 236         .driver.pm              = &arcmsr_pm_ops,
 237         .shutdown               = arcmsr_shutdown,
 238 };
 239 /*
 240 ****************************************************************************
 241 ****************************************************************************
 242 */
 243
 244 static void arcmsr_free_io_queue(struct AdapterControlBlock *acb)
 245 {
 246         switch (acb->adapter_type) {
 247         case ACB_ADAPTER_TYPE_B:
 248         case ACB_ADAPTER_TYPE_D:
 249         case ACB_ADAPTER_TYPE_E:
 250         case ACB_ADAPTER_TYPE_F:
 251                 dma_free_coherent(&acb->pdev->dev, acb->ioqueue_size,
 252                         acb->dma_coherent2, acb->dma_coherent_handle2);
 253                 break;
 254         }
 255 }
 256
 257 static bool arcmsr_remap_pciregion(struct AdapterControlBlock *acb)
 258 {
 259         struct pci_dev *pdev = acb->pdev;
 260         switch (acb->adapter_type){
 261         case ACB_ADAPTER_TYPE_A:{
 262                 acb->pmuA = ioremap(pci_resource_start(pdev,0), pci_resource_len(pdev,0));
 263                 if (!acb->pmuA) {
 264                         printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
 265                         return false;
 266                 }
 267                 break;
 268         }
 269         case ACB_ADAPTER_TYPE_B:{
 270                 void __iomem *mem_base0, *mem_base1;
 271                 mem_base0 = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
 272                 if (!mem_base0) {
 273                         printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
 274                         return false;
 275                 }
 276                 mem_base1 = ioremap(pci_resource_start(pdev, 2), pci_resource_len(pdev, 2));
 277                 if (!mem_base1) {
 278                         iounmap(mem_base0);
 279                         printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
 280                         return false;
 281                 }
 282                 acb->mem_base0 = mem_base0;
 283                 acb->mem_base1 = mem_base1;
 284                 break;
 285         }
 286         case ACB_ADAPTER_TYPE_C:{
 287                 acb->pmuC = ioremap(pci_resource_start(pdev, 1), pci_resource_len(pdev, 1));
 288                 if (!acb->pmuC) {
 289                         printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
 290                         return false;
 291                 }
 292                 if (readl(&acb->pmuC->outbound_doorbell) & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) {
 293                         writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, &acb->pmuC->outbound_doorbell_clear);/*clear interrupt*/
 294                         return true;
 295                 }
 296                 break;
 297         }
 298         case ACB_ADAPTER_TYPE_D: {
 299                 void __iomem *mem_base0;
 300                 unsigned long addr, range;
 301
 302                 addr = (unsigned long)pci_resource_start(pdev, 0);
 303                 range = pci_resource_len(pdev, 0);
 304                 mem_base0 = ioremap(addr, range);
 305                 if (!mem_base0) {
 306                         pr_notice("arcmsr%d: memory mapping region fail\n",
 307                                 acb->host->host_no);
 308                         return false;
 309                 }
 310                 acb->mem_base0 = mem_base0;
 311                 break;
 312                 }
 313         case ACB_ADAPTER_TYPE_E: {
 314                 acb->pmuE = ioremap(pci_resource_start(pdev, 1),
 315                         pci_resource_len(pdev, 1));
 316                 if (!acb->pmuE) {
 317                         pr_notice("arcmsr%d: memory mapping region fail \n",
 318                                 acb->host->host_no);
 319                         return false;
 320                 }
 321                 writel(0, &acb->pmuE->host_int_status); /*clear interrupt*/
 322                 writel(ARCMSR_HBEMU_DOORBELL_SYNC, &acb->pmuE->iobound_doorbell);       /* synchronize doorbell to 0 */
 323                 acb->in_doorbell = 0;
 324                 acb->out_doorbell = 0;
 325                 break;
 326                 }
 327         case ACB_ADAPTER_TYPE_F: {
 328                 acb->pmuF = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
 329                 if (!acb->pmuF) {
 330                         pr_notice("arcmsr%d: memory mapping region fail\n",
 331                                 acb->host->host_no);
 332                         return false;
 333                 }
 334                 writel(0, &acb->pmuF->host_int_status); /* clear interrupt */
 335                 writel(ARCMSR_HBFMU_DOORBELL_SYNC, &acb->pmuF->iobound_doorbell);
 336                 acb->in_doorbell = 0;
 337                 acb->out_doorbell = 0;
 338                 break;
 339                 }
 340         }
 341         return true;
 342 }
 343
 344 static void arcmsr_unmap_pciregion(struct AdapterControlBlock *acb)
 345 {
 346         switch (acb->adapter_type) {
 347         case ACB_ADAPTER_TYPE_A:
 348                 iounmap(acb->pmuA);
 349                 break;
 350         case ACB_ADAPTER_TYPE_B:
 351                 iounmap(acb->mem_base0);
 352                 iounmap(acb->mem_base1);
 353                 break;
 354         case ACB_ADAPTER_TYPE_C:
 355                 iounmap(acb->pmuC);
 356                 break;
 357         case ACB_ADAPTER_TYPE_D:
 358                 iounmap(acb->mem_base0);
 359                 break;
 360         case ACB_ADAPTER_TYPE_E:
 361                 iounmap(acb->pmuE);
 362                 break;
 363         case ACB_ADAPTER_TYPE_F:
 364                 iounmap(acb->pmuF);
 365                 break;
 366         }
 367 }
 368
 369 static irqreturn_t arcmsr_do_interrupt(int irq, void *dev_id)
 370 {
 371         irqreturn_t handle_state;
 372         struct AdapterControlBlock *acb = dev_id;
 373
 374         handle_state = arcmsr_interrupt(acb);
 375         return handle_state;
 376 }
 377
 378 static int arcmsr_bios_param(struct scsi_device *sdev,
 379                 struct block_device *bdev, sector_t capacity, int *geom)
 380 {
 381         int heads, sectors, cylinders, total_capacity;
 382
 383         if (scsi_partsize(bdev, capacity, geom))
 384                 return 0;
 385
 386         total_capacity = capacity;
 387         heads = 64;
 388         sectors = 32;
 389         cylinders = total_capacity / (heads * sectors);
 390         if (cylinders > 1024) {
 391                 heads = 255;
 392                 sectors = 63;
 393                 cylinders = total_capacity / (heads * sectors);
 394         }
 395         geom[0] = heads;
 396         geom[1] = sectors;
 397         geom[2] = cylinders;
 398         return 0;
 399 }
 400
 401 static uint8_t arcmsr_hbaA_wait_msgint_ready(struct AdapterControlBlock *acb)
 402 {
 403         struct MessageUnit_A __iomem *reg = acb->pmuA;
 404         int i;
 405
 406         for (i = 0; i < 2000; i++) {
 407                 if (readl(&reg->outbound_intstatus) &
 408                                 ARCMSR_MU_OUTBOUND_MESSAGE0_INT) {
 409                         writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT,
 410                                 &reg->outbound_intstatus);
 411                         return true;
 412                 }
 413                 msleep(10);
 414         } /* max 20 seconds */
 415
 416         return false;
 417 }
 418
 419 static uint8_t arcmsr_hbaB_wait_msgint_ready(struct AdapterControlBlock *acb)
 420 {
 421         struct MessageUnit_B *reg = acb->pmuB;
 422         int i;
 423
 424         for (i = 0; i < 2000; i++) {
 425                 if (readl(reg->iop2drv_doorbell)
 426                         & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE) {
 427                         writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN,
 428                                         reg->iop2drv_doorbell);
 429                         writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT,
 430                                         reg->drv2iop_doorbell);
 431                         return true;
 432                 }
 433                 msleep(10);
 434         } /* max 20 seconds */
 435
 436         return false;
 437 }
 438
 439 static uint8_t arcmsr_hbaC_wait_msgint_ready(struct AdapterControlBlock *pACB)
 440 {
 441         struct MessageUnit_C __iomem *phbcmu = pACB->pmuC;
 442         int i;
 443
 444         for (i = 0; i < 2000; i++) {
 445                 if (readl(&phbcmu->outbound_doorbell)
 446                                 & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) {
 447                         writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR,
 448                                 &phbcmu->outbound_doorbell_clear); /*clear interrupt*/
 449                         return true;
 450                 }
 451                 msleep(10);
 452         } /* max 20 seconds */
 453
 454         return false;
 455 }
 456
 457 static bool arcmsr_hbaD_wait_msgint_ready(struct AdapterControlBlock *pACB)
 458 {
 459         struct MessageUnit_D *reg = pACB->pmuD;
 460         int i;
 461
 462         for (i = 0; i < 2000; i++) {
 463                 if (readl(reg->outbound_doorbell)
 464                         & ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE) {
 465                         writel(ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE,
 466                                 reg->outbound_doorbell);
 467                         return true;
 468                 }
 469                 msleep(10);
 470         } /* max 20 seconds */
 471         return false;
 472 }
 473
 474 static bool arcmsr_hbaE_wait_msgint_ready(struct AdapterControlBlock *pACB)
 475 {
 476         int i;
 477         uint32_t read_doorbell;
 478         struct MessageUnit_E __iomem *phbcmu = pACB->pmuE;
 479
 480         for (i = 0; i < 2000; i++) {
 481                 read_doorbell = readl(&phbcmu->iobound_doorbell);
 482                 if ((read_doorbell ^ pACB->in_doorbell) & ARCMSR_HBEMU_IOP2DRV_MESSAGE_CMD_DONE) {
 483                         writel(0, &phbcmu->host_int_status); /*clear interrupt*/
 484                         pACB->in_doorbell = read_doorbell;
 485                         return true;
 486                 }
 487                 msleep(10);
 488         } /* max 20 seconds */
 489         return false;
 490 }
 491
 492 static void arcmsr_hbaA_flush_cache(struct AdapterControlBlock *acb)
 493 {
 494         struct MessageUnit_A __iomem *reg = acb->pmuA;
 495         int retry_count = 30;
 496         writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, &reg->inbound_msgaddr0);
 497         do {
 498                 if (arcmsr_hbaA_wait_msgint_ready(acb))
 499                         break;
 500                 else {
 501                         retry_count--;
 502                         printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \
 503                         timeout, retry count down = %d \n", acb->host->host_no, retry_count);
 504                 }
 505         } while (retry_count != 0);
 506 }
 507
 508 static void arcmsr_hbaB_flush_cache(struct AdapterControlBlock *acb)
 509 {
 510         struct MessageUnit_B *reg = acb->pmuB;
 511         int retry_count = 30;
 512         writel(ARCMSR_MESSAGE_FLUSH_CACHE, reg->drv2iop_doorbell);
 513         do {
 514                 if (arcmsr_hbaB_wait_msgint_ready(acb))
 515                         break;
 516                 else {
 517                         retry_count--;
 518                         printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \
 519                         timeout,retry count down = %d \n", acb->host->host_no, retry_count);
 520                 }
 521         } while (retry_count != 0);
 522 }
 523
 524 static void arcmsr_hbaC_flush_cache(struct AdapterControlBlock *pACB)
 525 {
 526         struct MessageUnit_C __iomem *reg = pACB->pmuC;
 527         int retry_count = 30;/* enlarge wait flush adapter cache time: 10 minute */
 528         writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, &reg->inbound_msgaddr0);
 529         writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
 530         do {
 531                 if (arcmsr_hbaC_wait_msgint_ready(pACB)) {
 532                         break;
 533                 } else {
 534                         retry_count--;
 535                         printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \
 536                         timeout,retry count down = %d \n", pACB->host->host_no, retry_count);
 537                 }
 538         } while (retry_count != 0);
 539         return;
 540 }
 541
 542 static void arcmsr_hbaD_flush_cache(struct AdapterControlBlock *pACB)
 543 {
 544         int retry_count = 15;
 545         struct MessageUnit_D *reg = pACB->pmuD;
 546
 547         writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, reg->inbound_msgaddr0);
 548         do {
 549                 if (arcmsr_hbaD_wait_msgint_ready(pACB))
 550                         break;
 551
 552                 retry_count--;
 553                 pr_notice("arcmsr%d: wait 'flush adapter "
 554                         "cache' timeout, retry count down = %d\n",
 555                         pACB->host->host_no, retry_count);
 556         } while (retry_count != 0);
 557 }
 558
 559 static void arcmsr_hbaE_flush_cache(struct AdapterControlBlock *pACB)
 560 {
 561         int retry_count = 30;
 562         struct MessageUnit_E __iomem *reg = pACB->pmuE;
 563
 564         writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, &reg->inbound_msgaddr0);
 565         pACB->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
 566         writel(pACB->out_doorbell, &reg->iobound_doorbell);
 567         do {
 568                 if (arcmsr_hbaE_wait_msgint_ready(pACB))
 569                         break;
 570                 retry_count--;
 571                 pr_notice("arcmsr%d: wait 'flush adapter "
 572                         "cache' timeout, retry count down = %d\n",
 573                         pACB->host->host_no, retry_count);
 574         } while (retry_count != 0);
 575 }
 576
 577 static void arcmsr_flush_adapter_cache(struct AdapterControlBlock *acb)
 578 {
 579         switch (acb->adapter_type) {
 580
 581         case ACB_ADAPTER_TYPE_A:
 582                 arcmsr_hbaA_flush_cache(acb);
 583                 break;
 584         case ACB_ADAPTER_TYPE_B:
 585                 arcmsr_hbaB_flush_cache(acb);
 586                 break;
 587         case ACB_ADAPTER_TYPE_C:
 588                 arcmsr_hbaC_flush_cache(acb);
 589                 break;
 590         case ACB_ADAPTER_TYPE_D:
 591                 arcmsr_hbaD_flush_cache(acb);
 592                 break;
 593         case ACB_ADAPTER_TYPE_E:
 594         case ACB_ADAPTER_TYPE_F:
 595                 arcmsr_hbaE_flush_cache(acb);
 596                 break;
 597         }
 598 }
 599
 600 static void arcmsr_hbaB_assign_regAddr(struct AdapterControlBlock *acb)
 601 {
 602         struct MessageUnit_B *reg = acb->pmuB;
 603
 604         if (acb->pdev->device == PCI_DEVICE_ID_ARECA_1203) {
 605                 reg->drv2iop_doorbell = MEM_BASE0(ARCMSR_DRV2IOP_DOORBELL_1203);
 606                 reg->drv2iop_doorbell_mask = MEM_BASE0(ARCMSR_DRV2IOP_DOORBELL_MASK_1203);
 607                 reg->iop2drv_doorbell = MEM_BASE0(ARCMSR_IOP2DRV_DOORBELL_1203);
 608                 reg->iop2drv_doorbell_mask = MEM_BASE0(ARCMSR_IOP2DRV_DOORBELL_MASK_1203);
 609         } else {
 610                 reg->drv2iop_doorbell= MEM_BASE0(ARCMSR_DRV2IOP_DOORBELL);
 611                 reg->drv2iop_doorbell_mask = MEM_BASE0(ARCMSR_DRV2IOP_DOORBELL_MASK);
 612                 reg->iop2drv_doorbell = MEM_BASE0(ARCMSR_IOP2DRV_DOORBELL);
 613                 reg->iop2drv_doorbell_mask = MEM_BASE0(ARCMSR_IOP2DRV_DOORBELL_MASK);
 614         }
 615         reg->message_wbuffer = MEM_BASE1(ARCMSR_MESSAGE_WBUFFER);
 616         reg->message_rbuffer =  MEM_BASE1(ARCMSR_MESSAGE_RBUFFER);
 617         reg->message_rwbuffer = MEM_BASE1(ARCMSR_MESSAGE_RWBUFFER);
 618 }
 619
 620 static void arcmsr_hbaD_assign_regAddr(struct AdapterControlBlock *acb)
 621 {
 622         struct MessageUnit_D *reg = acb->pmuD;
 623
 624         reg->chip_id = MEM_BASE0(ARCMSR_ARC1214_CHIP_ID);
 625         reg->cpu_mem_config = MEM_BASE0(ARCMSR_ARC1214_CPU_MEMORY_CONFIGURATION);
 626         reg->i2o_host_interrupt_mask = MEM_BASE0(ARCMSR_ARC1214_I2_HOST_INTERRUPT_MASK);
 627         reg->sample_at_reset = MEM_BASE0(ARCMSR_ARC1214_SAMPLE_RESET);
 628         reg->reset_request = MEM_BASE0(ARCMSR_ARC1214_RESET_REQUEST);
 629         reg->host_int_status = MEM_BASE0(ARCMSR_ARC1214_MAIN_INTERRUPT_STATUS);
 630         reg->pcief0_int_enable = MEM_BASE0(ARCMSR_ARC1214_PCIE_F0_INTERRUPT_ENABLE);
 631         reg->inbound_msgaddr0 = MEM_BASE0(ARCMSR_ARC1214_INBOUND_MESSAGE0);
 632         reg->inbound_msgaddr1 = MEM_BASE0(ARCMSR_ARC1214_INBOUND_MESSAGE1);
 633         reg->outbound_msgaddr0 = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_MESSAGE0);
 634         reg->outbound_msgaddr1 = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_MESSAGE1);
 635         reg->inbound_doorbell = MEM_BASE0(ARCMSR_ARC1214_INBOUND_DOORBELL);
 636         reg->outbound_doorbell = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_DOORBELL);
 637         reg->outbound_doorbell_enable = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_DOORBELL_ENABLE);
 638         reg->inboundlist_base_low = MEM_BASE0(ARCMSR_ARC1214_INBOUND_LIST_BASE_LOW);
 639         reg->inboundlist_base_high = MEM_BASE0(ARCMSR_ARC1214_INBOUND_LIST_BASE_HIGH);
 640         reg->inboundlist_write_pointer = MEM_BASE0(ARCMSR_ARC1214_INBOUND_LIST_WRITE_POINTER);
 641         reg->outboundlist_base_low = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_LIST_BASE_LOW);
 642         reg->outboundlist_base_high = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_LIST_BASE_HIGH);
 643         reg->outboundlist_copy_pointer = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_LIST_COPY_POINTER);
 644         reg->outboundlist_read_pointer = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_LIST_READ_POINTER);
 645         reg->outboundlist_interrupt_cause = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_INTERRUPT_CAUSE);
 646         reg->outboundlist_interrupt_enable = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_INTERRUPT_ENABLE);
 647         reg->message_wbuffer = MEM_BASE0(ARCMSR_ARC1214_MESSAGE_WBUFFER);
 648         reg->message_rbuffer = MEM_BASE0(ARCMSR_ARC1214_MESSAGE_RBUFFER);
 649         reg->msgcode_rwbuffer = MEM_BASE0(ARCMSR_ARC1214_MESSAGE_RWBUFFER);
 650 }
 651
 652 static void arcmsr_hbaF_assign_regAddr(struct AdapterControlBlock *acb)
 653 {
 654         dma_addr_t host_buffer_dma;
 655         struct MessageUnit_F __iomem *pmuF;
 656
 657         memset(acb->dma_coherent2, 0xff, acb->completeQ_size);
 658         acb->message_wbuffer = (uint32_t *)round_up((unsigned long)acb->dma_coherent2 +
 659                 acb->completeQ_size, 4);
 660         acb->message_rbuffer = ((void *)acb->message_wbuffer) + 0x100;
 661         acb->msgcode_rwbuffer = ((void *)acb->message_wbuffer) + 0x200;
 662         memset((void *)acb->message_wbuffer, 0, MESG_RW_BUFFER_SIZE);
 663         host_buffer_dma = round_up(acb->dma_coherent_handle2 + acb->completeQ_size, 4);
 664         pmuF = acb->pmuF;
 665         /* host buffer low address, bit0:1 all buffer active */
 666         writel(lower_32_bits(host_buffer_dma | 1), &pmuF->inbound_msgaddr0);
 667         /* host buffer high address */
 668         writel(upper_32_bits(host_buffer_dma), &pmuF->inbound_msgaddr1);
 669         /* set host buffer physical address */
 670         writel(ARCMSR_HBFMU_DOORBELL_SYNC1, &pmuF->iobound_doorbell);
 671 }
 672
 673 static bool arcmsr_alloc_io_queue(struct AdapterControlBlock *acb)
 674 {
 675         bool rtn = true;
 676         void *dma_coherent;
 677         dma_addr_t dma_coherent_handle;
 678         struct pci_dev *pdev = acb->pdev;
 679
 680         switch (acb->adapter_type) {
 681         case ACB_ADAPTER_TYPE_B: {
 682                 acb->ioqueue_size = roundup(sizeof(struct MessageUnit_B), 32);
 683                 dma_coherent = dma_alloc_coherent(&pdev->dev, acb->ioqueue_size,
 684                         &dma_coherent_handle, GFP_KERNEL);
 685                 if (!dma_coherent) {
 686                         pr_notice("arcmsr%d: DMA allocation failed\n", acb->host->host_no);
 687                         return false;
 688                 }
 689                 acb->dma_coherent_handle2 = dma_coherent_handle;
 690                 acb->dma_coherent2 = dma_coherent;
 691                 acb->pmuB = (struct MessageUnit_B *)dma_coherent;
 692                 arcmsr_hbaB_assign_regAddr(acb);
 693                 }
 694                 break;
 695         case ACB_ADAPTER_TYPE_D: {
 696                 acb->ioqueue_size = roundup(sizeof(struct MessageUnit_D), 32);
 697                 dma_coherent = dma_alloc_coherent(&pdev->dev, acb->ioqueue_size,
 698                         &dma_coherent_handle, GFP_KERNEL);
 699                 if (!dma_coherent) {
 700                         pr_notice("arcmsr%d: DMA allocation failed\n", acb->host->host_no);
 701                         return false;
 702                 }
 703                 acb->dma_coherent_handle2 = dma_coherent_handle;
 704                 acb->dma_coherent2 = dma_coherent;
 705                 acb->pmuD = (struct MessageUnit_D *)dma_coherent;
 706                 arcmsr_hbaD_assign_regAddr(acb);
 707                 }
 708                 break;
 709         case ACB_ADAPTER_TYPE_E: {
 710                 uint32_t completeQ_size;
 711                 completeQ_size = sizeof(struct deliver_completeQ) * ARCMSR_MAX_HBE_DONEQUEUE + 128;
 712                 acb->ioqueue_size = roundup(completeQ_size, 32);
 713                 dma_coherent = dma_alloc_coherent(&pdev->dev, acb->ioqueue_size,
 714                         &dma_coherent_handle, GFP_KERNEL);
 715                 if (!dma_coherent){
 716                         pr_notice("arcmsr%d: DMA allocation failed\n", acb->host->host_no);
 717                         return false;
 718                 }
 719                 acb->dma_coherent_handle2 = dma_coherent_handle;
 720                 acb->dma_coherent2 = dma_coherent;
 721                 acb->pCompletionQ = dma_coherent;
 722                 acb->completionQ_entry = acb->ioqueue_size / sizeof(struct deliver_completeQ);
 723                 acb->doneq_index = 0;
 724                 }
 725                 break;
 726         case ACB_ADAPTER_TYPE_F: {
 727                 uint32_t QueueDepth;
 728                 uint32_t depthTbl[] = {256, 512, 1024, 128, 64, 32};
 729
 730                 arcmsr_wait_firmware_ready(acb);
 731                 QueueDepth = depthTbl[readl(&acb->pmuF->outbound_msgaddr1) & 7];
 732                 acb->completeQ_size = sizeof(struct deliver_completeQ) * QueueDepth + 128;
 733                 acb->ioqueue_size = roundup(acb->completeQ_size + MESG_RW_BUFFER_SIZE, 32);
 734                 dma_coherent = dma_alloc_coherent(&pdev->dev, acb->ioqueue_size,
 735                         &dma_coherent_handle, GFP_KERNEL);
 736                 if (!dma_coherent) {
 737                         pr_notice("arcmsr%d: DMA allocation failed\n", acb->host->host_no);
 738                         return false;
 739                 }
 740                 acb->dma_coherent_handle2 = dma_coherent_handle;
 741                 acb->dma_coherent2 = dma_coherent;
 742                 acb->pCompletionQ = dma_coherent;
 743                 acb->completionQ_entry = acb->completeQ_size / sizeof(struct deliver_completeQ);
 744                 acb->doneq_index = 0;
 745                 arcmsr_hbaF_assign_regAddr(acb);
 746                 }
 747                 break;
 748         default:
 749                 break;
 750         }
 751         return rtn;
 752 }
 753
 754 static int arcmsr_alloc_xor_buffer(struct AdapterControlBlock *acb)
 755 {
 756         int rc = 0;
 757         struct pci_dev *pdev = acb->pdev;
 758         void *dma_coherent;
 759         dma_addr_t dma_coherent_handle;
 760         int i, xor_ram;
 761         struct Xor_sg *pXorPhys;
 762         void **pXorVirt;
 763         struct HostRamBuf *pRamBuf;
 764
 765         // allocate 1 MB * N physically continuous memory for XOR engine.
 766         xor_ram = (acb->firm_PicStatus >> 24) & 0x0f;
 767         acb->xor_mega = (xor_ram - 1) * 32 + 128 + 3;
 768         acb->init2cfg_size = sizeof(struct HostRamBuf) +
 769                 (sizeof(struct XorHandle) * acb->xor_mega);
 770         dma_coherent = dma_alloc_coherent(&pdev->dev, acb->init2cfg_size,
 771                 &dma_coherent_handle, GFP_KERNEL);
 772         acb->xorVirt = dma_coherent;
 773         acb->xorPhys = dma_coherent_handle;
 774         pXorPhys = (struct Xor_sg *)((unsigned long)dma_coherent +
 775                 sizeof(struct HostRamBuf));
 776         acb->xorVirtOffset = sizeof(struct HostRamBuf) +
 777                 (sizeof(struct Xor_sg) * acb->xor_mega);
 778         pXorVirt = (void **)((unsigned long)dma_coherent +
 779                 (unsigned long)acb->xorVirtOffset);
 780         for (i = 0; i < acb->xor_mega; i++) {
 781                 dma_coherent = dma_alloc_coherent(&pdev->dev,
 782                         ARCMSR_XOR_SEG_SIZE,
 783                         &dma_coherent_handle, GFP_KERNEL);
 784                 if (dma_coherent) {
 785                         pXorPhys->xorPhys = dma_coherent_handle;
 786                         pXorPhys->xorBufLen = ARCMSR_XOR_SEG_SIZE;
 787                         *pXorVirt = dma_coherent;
 788                         pXorPhys++;
 789                         pXorVirt++;
 790                 } else {
 791                         pr_info("arcmsr%d: alloc max XOR buffer = 0x%x MB\n",
 792                                 acb->host->host_no, i);
 793                         rc = -ENOMEM;
 794                         break;
 795                 }
 796         }
 797         pRamBuf = (struct HostRamBuf *)acb->xorVirt;
 798         pRamBuf->hrbSignature = 0x53425248;     //HRBS
 799         pRamBuf->hrbSize = i * ARCMSR_XOR_SEG_SIZE;
 800         pRamBuf->hrbRes[0] = 0;
 801         pRamBuf->hrbRes[1] = 0;
 802         return rc;
 803 }
 804
 805 static int arcmsr_alloc_ccb_pool(struct AdapterControlBlock *acb)
 806 {
 807         struct pci_dev *pdev = acb->pdev;
 808         void *dma_coherent;
 809         dma_addr_t dma_coherent_handle;
 810         struct CommandControlBlock *ccb_tmp;
 811         int i = 0, j = 0;
 812         unsigned long cdb_phyaddr, next_ccb_phy;
 813         unsigned long roundup_ccbsize;
 814         unsigned long max_xfer_len;
 815         unsigned long max_sg_entrys;
 816         uint32_t  firm_config_version, curr_phy_upper32;
 817
 818         for (i = 0; i < ARCMSR_MAX_TARGETID; i++)
 819                 for (j = 0; j < ARCMSR_MAX_TARGETLUN; j++)
 820                         acb->devstate[i][j] = ARECA_RAID_GONE;
 821
 822         max_xfer_len = ARCMSR_MAX_XFER_LEN;
 823         max_sg_entrys = ARCMSR_DEFAULT_SG_ENTRIES;
 824         firm_config_version = acb->firm_cfg_version;
 825         if((firm_config_version & 0xFF) >= 3){
 826                 max_xfer_len = (ARCMSR_CDB_SG_PAGE_LENGTH << ((firm_config_version >> 8) & 0xFF)) * 1024;/* max 4M byte */
 827                 max_sg_entrys = (max_xfer_len/4096);
 828         }
 829         acb->host->max_sectors = max_xfer_len/512;
 830         acb->host->sg_tablesize = max_sg_entrys;
 831         roundup_ccbsize = roundup(sizeof(struct CommandControlBlock) + (max_sg_entrys - 1) * sizeof(struct SG64ENTRY), 32);
 832         acb->uncache_size = roundup_ccbsize * acb->maxFreeCCB;
 833         if (acb->adapter_type != ACB_ADAPTER_TYPE_F)
 834                 acb->uncache_size += acb->ioqueue_size;
 835         dma_coherent = dma_alloc_coherent(&pdev->dev, acb->uncache_size, &dma_coherent_handle, GFP_KERNEL);
 836         if(!dma_coherent){
 837                 printk(KERN_NOTICE "arcmsr%d: dma_alloc_coherent got error\n", acb->host->host_no);
 838                 return -ENOMEM;
 839         }
 840         acb->dma_coherent = dma_coherent;
 841         acb->dma_coherent_handle = dma_coherent_handle;
 842         memset(dma_coherent, 0, acb->uncache_size);
 843         acb->ccbsize = roundup_ccbsize;
 844         ccb_tmp = dma_coherent;
 845         curr_phy_upper32 = upper_32_bits(dma_coherent_handle);
 846         acb->vir2phy_offset = (unsigned long)dma_coherent - (unsigned long)dma_coherent_handle;
 847         for(i = 0; i < acb->maxFreeCCB; i++){
 848                 cdb_phyaddr = (unsigned long)dma_coherent_handle + offsetof(struct CommandControlBlock, arcmsr_cdb);
 849                 switch (acb->adapter_type) {
 850                 case ACB_ADAPTER_TYPE_A:
 851                 case ACB_ADAPTER_TYPE_B:
 852                         ccb_tmp->cdb_phyaddr = cdb_phyaddr >> 5;
 853                         break;
 854                 case ACB_ADAPTER_TYPE_C:
 855                 case ACB_ADAPTER_TYPE_D:
 856                 case ACB_ADAPTER_TYPE_E:
 857                 case ACB_ADAPTER_TYPE_F:
 858                         ccb_tmp->cdb_phyaddr = cdb_phyaddr;
 859                         break;
 860                 }
 861                 acb->pccb_pool[i] = ccb_tmp;
 862                 ccb_tmp->acb = acb;
 863                 ccb_tmp->smid = (u32)i << 16;
 864                 INIT_LIST_HEAD(&ccb_tmp->list);
 865                 next_ccb_phy = dma_coherent_handle + roundup_ccbsize;
 866                 if (upper_32_bits(next_ccb_phy) != curr_phy_upper32) {
 867                         acb->maxFreeCCB = i;
 868                         acb->host->can_queue = i;
 869                         break;
 870                 }
 871                 else
 872                         list_add_tail(&ccb_tmp->list, &acb->ccb_free_list);
 873                 ccb_tmp = (struct CommandControlBlock *)((unsigned long)ccb_tmp + roundup_ccbsize);
 874                 dma_coherent_handle = next_ccb_phy;
 875         }
 876         if (acb->adapter_type != ACB_ADAPTER_TYPE_F) {
 877                 acb->dma_coherent_handle2 = dma_coherent_handle;
 878                 acb->dma_coherent2 = ccb_tmp;
 879         }
 880         switch (acb->adapter_type) {
 881         case ACB_ADAPTER_TYPE_B:
 882                 acb->pmuB = (struct MessageUnit_B *)acb->dma_coherent2;
 883                 arcmsr_hbaB_assign_regAddr(acb);
 884                 break;
 885         case ACB_ADAPTER_TYPE_D:
 886                 acb->pmuD = (struct MessageUnit_D *)acb->dma_coherent2;
 887                 arcmsr_hbaD_assign_regAddr(acb);
 888                 break;
 889         case ACB_ADAPTER_TYPE_E:
 890                 acb->pCompletionQ = acb->dma_coherent2;
 891                 acb->completionQ_entry = acb->ioqueue_size / sizeof(struct deliver_completeQ);
 892                 acb->doneq_index = 0;
 893                 break;
 894         }
 895         if ((acb->firm_PicStatus >> 24) & 0x0f) {
 896                 if (arcmsr_alloc_xor_buffer(acb))
 897                         return -ENOMEM;
 898         }
 899         return 0;
 900 }
 901
 902 static void arcmsr_message_isr_bh_fn(struct work_struct *work)
 903 {
 904         struct AdapterControlBlock *acb = container_of(work,
 905                 struct AdapterControlBlock, arcmsr_do_message_isr_bh);
 906         char *acb_dev_map = (char *)acb->device_map;
 907         uint32_t __iomem *signature = NULL;
 908         char __iomem *devicemap = NULL;
 909         int target, lun;
 910         struct scsi_device *psdev;
 911         char diff, temp;
 912
 913         switch (acb->adapter_type) {
 914         case ACB_ADAPTER_TYPE_A: {
 915                 struct MessageUnit_A __iomem *reg  = acb->pmuA;
 916
 917                 signature = (uint32_t __iomem *)(&reg->message_rwbuffer[0]);
 918                 devicemap = (char __iomem *)(&reg->message_rwbuffer[21]);
 919                 break;
 920         }
 921         case ACB_ADAPTER_TYPE_B: {
 922                 struct MessageUnit_B *reg  = acb->pmuB;
 923
 924                 signature = (uint32_t __iomem *)(&reg->message_rwbuffer[0]);
 925                 devicemap = (char __iomem *)(&reg->message_rwbuffer[21]);
 926                 break;
 927         }
 928         case ACB_ADAPTER_TYPE_C: {
 929                 struct MessageUnit_C __iomem *reg  = acb->pmuC;
 930
 931                 signature = (uint32_t __iomem *)(&reg->msgcode_rwbuffer[0]);
 932                 devicemap = (char __iomem *)(&reg->msgcode_rwbuffer[21]);
 933                 break;
 934         }
 935         case ACB_ADAPTER_TYPE_D: {
 936                 struct MessageUnit_D *reg  = acb->pmuD;
 937
 938                 signature = (uint32_t __iomem *)(&reg->msgcode_rwbuffer[0]);
 939                 devicemap = (char __iomem *)(&reg->msgcode_rwbuffer[21]);
 940                 break;
 941         }
 942         case ACB_ADAPTER_TYPE_E: {
 943                 struct MessageUnit_E __iomem *reg  = acb->pmuE;
 944
 945                 signature = (uint32_t __iomem *)(&reg->msgcode_rwbuffer[0]);
 946                 devicemap = (char __iomem *)(&reg->msgcode_rwbuffer[21]);
 947                 break;
 948                 }
 949         case ACB_ADAPTER_TYPE_F: {
 950                 signature = (uint32_t __iomem *)(&acb->msgcode_rwbuffer[0]);
 951                 devicemap = (char __iomem *)(&acb->msgcode_rwbuffer[21]);
 952                 break;
 953                 }
 954         }
 955         if (readl(signature) != ARCMSR_SIGNATURE_GET_CONFIG)
 956                 return;
 957         for (target = 0; target < ARCMSR_MAX_TARGETID - 1;
 958                 target++) {
 959                 temp = readb(devicemap);
 960                 diff = (*acb_dev_map) ^ temp;
 961                 if (diff != 0) {
 962                         *acb_dev_map = temp;
 963                         for (lun = 0; lun < ARCMSR_MAX_TARGETLUN;
 964                                 lun++) {
 965                                 if ((diff & 0x01) == 1 &&
 966                                         (temp & 0x01) == 1) {
 967                                         scsi_add_device(acb->host,
 968                                                 0, target, lun);
 969                                 } else if ((diff & 0x01) == 1
 970                                         && (temp & 0x01) == 0) {
 971                                         psdev = scsi_device_lookup(acb->host,
 972                                                 0, target, lun);
 973                                         if (psdev != NULL) {
 974                                                 scsi_remove_device(psdev);
 975                                                 scsi_device_put(psdev);
 976                                         }
 977                                 }
 978                                 temp >>= 1;
 979                                 diff >>= 1;
 980                         }
 981                 }
 982                 devicemap++;
 983                 acb_dev_map++;
 984         }
 985         acb->acb_flags &= ~ACB_F_MSG_GET_CONFIG;
 986 }
 987
 988 static int
 989 arcmsr_request_irq(struct pci_dev *pdev, struct AdapterControlBlock *acb)
 990 {
 991         unsigned long flags;
 992         int nvec, i;
 993
 994         if (msix_enable == 0)
 995                 goto msi_int0;
 996         nvec = pci_alloc_irq_vectors(pdev, 1, ARCMST_NUM_MSIX_VECTORS,
 997                         PCI_IRQ_MSIX);
 998         if (nvec > 0) {
 999                 pr_info("arcmsr%d: msi-x enabled\n", acb->host->host_no);
1000                 flags = 0;
1001         } else {
1002 msi_int0:
1003                 if (msi_enable == 1) {
1004                         nvec = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_MSI);
1005                         if (nvec == 1) {
1006                                 dev_info(&pdev->dev, "msi enabled\n");
1007                                 goto msi_int1;
1008                         }
1009                 }
1010                 nvec = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_INTX);
1011                 if (nvec < 1)
1012                         return FAILED;
1013 msi_int1:
1014                 flags = IRQF_SHARED;
1015         }
1016
1017         acb->vector_count = nvec;
1018         for (i = 0; i < nvec; i++) {
1019                 if (request_irq(pci_irq_vector(pdev, i), arcmsr_do_interrupt,
1020                                 flags, "arcmsr", acb)) {
1021                         pr_warn("arcmsr%d: request_irq =%d failed!\n",
1022                                 acb->host->host_no, pci_irq_vector(pdev, i));
1023                         goto out_free_irq;
1024                 }
1025         }
1026
1027         return SUCCESS;
1028 out_free_irq:
1029         while (--i >= 0)
1030                 free_irq(pci_irq_vector(pdev, i), acb);
1031         pci_free_irq_vectors(pdev);
1032         return FAILED;
1033 }
1034
1035 static void arcmsr_init_get_devmap_timer(struct AdapterControlBlock *pacb)
1036 {
1037         INIT_WORK(&pacb->arcmsr_do_message_isr_bh, arcmsr_message_isr_bh_fn);
1038         pacb->fw_flag = FW_NORMAL;
1039         timer_setup(&pacb->eternal_timer, arcmsr_request_device_map, 0);
1040         pacb->eternal_timer.expires = jiffies + msecs_to_jiffies(6 * HZ);
1041         add_timer(&pacb->eternal_timer);
1042 }
1043
1044 static void arcmsr_init_set_datetime_timer(struct AdapterControlBlock *pacb)
1045 {
1046         timer_setup(&pacb->refresh_timer, arcmsr_set_iop_datetime, 0);
1047         pacb->refresh_timer.expires = jiffies + msecs_to_jiffies(60 * 1000);
1048         add_timer(&pacb->refresh_timer);
1049 }
1050
1051 static int arcmsr_set_dma_mask(struct AdapterControlBlock *acb)
1052 {
1053         struct pci_dev *pcidev = acb->pdev;
1054
1055         if (IS_DMA64) {
1056                 if (((acb->adapter_type == ACB_ADAPTER_TYPE_A) && !dma_mask_64) ||
1057                     dma_set_mask(&pcidev->dev, DMA_BIT_MASK(64)))
1058                         goto    dma32;
1059                 if (acb->adapter_type <= ACB_ADAPTER_TYPE_B)
1060                         return 0;
1061                 if (dma_set_coherent_mask(&pcidev->dev, DMA_BIT_MASK(64)) ||
1062                     dma_set_mask_and_coherent(&pcidev->dev, DMA_BIT_MASK(64))) {
1063                         printk("arcmsr: set DMA 64 mask failed\n");
1064                         return -ENXIO;
1065                 }
1066         } else {
1067 dma32:
1068                 if (dma_set_mask(&pcidev->dev, DMA_BIT_MASK(32)) ||
1069                     dma_set_coherent_mask(&pcidev->dev, DMA_BIT_MASK(32)) ||
1070                     dma_set_mask_and_coherent(&pcidev->dev, DMA_BIT_MASK(32))) {
1071                         printk("arcmsr: set DMA 32-bit mask failed\n");
1072                         return -ENXIO;
1073                 }
1074         }
1075         return 0;
1076 }
1077
1078 static int arcmsr_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1079 {
1080         struct Scsi_Host *host;
1081         struct AdapterControlBlock *acb;
1082         uint8_t bus,dev_fun;
1083         int error;
1084         error = pci_enable_device(pdev);
1085         if(error){
1086                 return -ENODEV;
1087         }
1088         host = scsi_host_alloc(&arcmsr_scsi_host_template, sizeof(struct AdapterControlBlock));
1089         if(!host){
1090                 goto pci_disable_dev;
1091         }
1092         init_waitqueue_head(&wait_q);
1093         bus = pdev->bus->number;
1094         dev_fun = pdev->devfn;
1095         acb = (struct AdapterControlBlock *) host->hostdata;
1096         memset(acb,0,sizeof(struct AdapterControlBlock));
1097         acb->pdev = pdev;
1098         acb->adapter_type = id->driver_data;
1099         if (arcmsr_set_dma_mask(acb))
1100                 goto scsi_host_release;
1101         acb->host = host;
1102         host->max_lun = ARCMSR_MAX_TARGETLUN;
1103         host->max_id = ARCMSR_MAX_TARGETID;             /*16:8*/
1104         host->max_cmd_len = 16;                         /*this is issue of 64bit LBA ,over 2T byte*/
1105         if ((host_can_queue < ARCMSR_MIN_OUTSTANDING_CMD) || (host_can_queue > ARCMSR_MAX_OUTSTANDING_CMD))
1106                 host_can_queue = ARCMSR_DEFAULT_OUTSTANDING_CMD;
1107         host->can_queue = host_can_queue;       /* max simultaneous cmds */
1108         if ((cmd_per_lun < ARCMSR_MIN_CMD_PERLUN) || (cmd_per_lun > ARCMSR_MAX_CMD_PERLUN))
1109                 cmd_per_lun = ARCMSR_DEFAULT_CMD_PERLUN;
1110         host->cmd_per_lun = cmd_per_lun;
1111         host->this_id = ARCMSR_SCSI_INITIATOR_ID;
1112         host->unique_id = (bus << 8) | dev_fun;
1113         pci_set_drvdata(pdev, host);
1114         pci_set_master(pdev);
1115         error = pci_request_regions(pdev, "arcmsr");
1116         if(error){
1117                 goto scsi_host_release;
1118         }
1119         spin_lock_init(&acb->eh_lock);
1120         spin_lock_init(&acb->ccblist_lock);
1121         spin_lock_init(&acb->postq_lock);
1122         spin_lock_init(&acb->doneq_lock);
1123         spin_lock_init(&acb->rqbuffer_lock);
1124         spin_lock_init(&acb->wqbuffer_lock);
1125         acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED |
1126                         ACB_F_MESSAGE_RQBUFFER_CLEARED |
1127                         ACB_F_MESSAGE_WQBUFFER_READED);
1128         acb->acb_flags &= ~ACB_F_SCSISTOPADAPTER;
1129         INIT_LIST_HEAD(&acb->ccb_free_list);
1130         error = arcmsr_remap_pciregion(acb);
1131         if(!error){
1132                 goto pci_release_regs;
1133         }
1134         error = arcmsr_alloc_io_queue(acb);
1135         if (!error)
1136                 goto unmap_pci_region;
1137         error = arcmsr_get_firmware_spec(acb);
1138         if(!error){
1139                 goto free_hbb_mu;
1140         }
1141         if (acb->adapter_type != ACB_ADAPTER_TYPE_F)
1142                 arcmsr_free_io_queue(acb);
1143         error = arcmsr_alloc_ccb_pool(acb);
1144         if(error){
1145                 goto unmap_pci_region;
1146         }
1147         error = scsi_add_host(host, &pdev->dev);
1148         if(error){
1149                 goto free_ccb_pool;
1150         }
1151         if (arcmsr_request_irq(pdev, acb) == FAILED)
1152                 goto scsi_host_remove;
1153         arcmsr_iop_init(acb);
1154         arcmsr_init_get_devmap_timer(acb);
1155         if (set_date_time)
1156                 arcmsr_init_set_datetime_timer(acb);
1157         if(arcmsr_alloc_sysfs_attr(acb))
1158                 goto out_free_sysfs;
1159         scsi_scan_host(host);
1160         return 0;
1161 out_free_sysfs:
1162         if (set_date_time)
1163                 del_timer_sync(&acb->refresh_timer);
1164         del_timer_sync(&acb->eternal_timer);
1165         flush_work(&acb->arcmsr_do_message_isr_bh);
1166         arcmsr_stop_adapter_bgrb(acb);
1167         arcmsr_flush_adapter_cache(acb);
1168         arcmsr_free_irq(pdev, acb);
1169 scsi_host_remove:
1170         scsi_remove_host(host);
1171 free_ccb_pool:
1172         arcmsr_free_ccb_pool(acb);
1173         goto unmap_pci_region;
1174 free_hbb_mu:
1175         arcmsr_free_io_queue(acb);
1176 unmap_pci_region:
1177         arcmsr_unmap_pciregion(acb);
1178 pci_release_regs:
1179         pci_release_regions(pdev);
1180 scsi_host_release:
1181         scsi_host_put(host);
1182 pci_disable_dev:
1183         pci_disable_device(pdev);
1184         return -ENODEV;
1185 }
1186
1187 static void arcmsr_free_irq(struct pci_dev *pdev,
1188                 struct AdapterControlBlock *acb)
1189 {
1190         int i;
1191
1192         for (i = 0; i < acb->vector_count; i++)
1193                 free_irq(pci_irq_vector(pdev, i), acb);
1194         pci_free_irq_vectors(pdev);
1195 }
1196
1197 static int __maybe_unused arcmsr_suspend(struct device *dev)
1198 {
1199         struct pci_dev *pdev = to_pci_dev(dev);
1200         struct Scsi_Host *host = pci_get_drvdata(pdev);
1201         struct AdapterControlBlock *acb =
1202                 (struct AdapterControlBlock *)host->hostdata;
1203
1204         arcmsr_disable_outbound_ints(acb);
1205         arcmsr_free_irq(pdev, acb);
1206         del_timer_sync(&acb->eternal_timer);
1207         if (set_date_time)
1208                 del_timer_sync(&acb->refresh_timer);
1209         flush_work(&acb->arcmsr_do_message_isr_bh);
1210         arcmsr_stop_adapter_bgrb(acb);
1211         arcmsr_flush_adapter_cache(acb);
1212         return 0;
1213 }
1214
1215 static int __maybe_unused arcmsr_resume(struct device *dev)
1216 {
1217         struct pci_dev *pdev = to_pci_dev(dev);
1218         struct Scsi_Host *host = pci_get_drvdata(pdev);
1219         struct AdapterControlBlock *acb =
1220                 (struct AdapterControlBlock *)host->hostdata;
1221
1222         if (arcmsr_set_dma_mask(acb))
1223                 goto controller_unregister;
1224         if (arcmsr_request_irq(pdev, acb) == FAILED)
1225                 goto controller_stop;
1226         switch (acb->adapter_type) {
1227         case ACB_ADAPTER_TYPE_B: {
1228                 struct MessageUnit_B *reg = acb->pmuB;
1229                 uint32_t i;
1230                 for (i = 0; i < ARCMSR_MAX_HBB_POSTQUEUE; i++) {
1231                         reg->post_qbuffer[i] = 0;
1232                         reg->done_qbuffer[i] = 0;
1233                 }
1234                 reg->postq_index = 0;
1235                 reg->doneq_index = 0;
1236                 break;
1237                 }
1238         case ACB_ADAPTER_TYPE_E:
1239                 writel(0, &acb->pmuE->host_int_status);
1240                 writel(ARCMSR_HBEMU_DOORBELL_SYNC, &acb->pmuE->iobound_doorbell);
1241                 acb->in_doorbell = 0;
1242                 acb->out_doorbell = 0;
1243                 acb->doneq_index = 0;
1244                 break;
1245         case ACB_ADAPTER_TYPE_F:
1246                 writel(0, &acb->pmuF->host_int_status);
1247                 writel(ARCMSR_HBFMU_DOORBELL_SYNC, &acb->pmuF->iobound_doorbell);
1248                 acb->in_doorbell = 0;
1249                 acb->out_doorbell = 0;
1250                 acb->doneq_index = 0;
1251                 arcmsr_hbaF_assign_regAddr(acb);
1252                 break;
1253         }
1254         arcmsr_iop_init(acb);
1255         arcmsr_init_get_devmap_timer(acb);
1256         if (set_date_time)
1257                 arcmsr_init_set_datetime_timer(acb);
1258         return 0;
1259 controller_stop:
1260         arcmsr_stop_adapter_bgrb(acb);
1261         arcmsr_flush_adapter_cache(acb);
1262 controller_unregister:
1263         scsi_remove_host(host);
1264         arcmsr_free_ccb_pool(acb);
1265         if (acb->adapter_type == ACB_ADAPTER_TYPE_F)
1266                 arcmsr_free_io_queue(acb);
1267         arcmsr_unmap_pciregion(acb);
1268         scsi_host_put(host);
1269         return -ENODEV;
1270 }
1271
1272 static uint8_t arcmsr_hbaA_abort_allcmd(struct AdapterControlBlock *acb)
1273 {
1274         struct MessageUnit_A __iomem *reg = acb->pmuA;
1275         writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, &reg->inbound_msgaddr0);
1276         if (!arcmsr_hbaA_wait_msgint_ready(acb)) {
1277                 printk(KERN_NOTICE
1278                         "arcmsr%d: wait 'abort all outstanding command' timeout\n"
1279                         , acb->host->host_no);
1280                 return false;
1281         }
1282         return true;
1283 }
1284
1285 static uint8_t arcmsr_hbaB_abort_allcmd(struct AdapterControlBlock *acb)
1286 {
1287         struct MessageUnit_B *reg = acb->pmuB;
1288
1289         writel(ARCMSR_MESSAGE_ABORT_CMD, reg->drv2iop_doorbell);
1290         if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
1291                 printk(KERN_NOTICE
1292                         "arcmsr%d: wait 'abort all outstanding command' timeout\n"
1293                         , acb->host->host_no);
1294                 return false;
1295         }
1296         return true;
1297 }
1298 static uint8_t arcmsr_hbaC_abort_allcmd(struct AdapterControlBlock *pACB)
1299 {
1300         struct MessageUnit_C __iomem *reg = pACB->pmuC;
1301         writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, &reg->inbound_msgaddr0);
1302         writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
1303         if (!arcmsr_hbaC_wait_msgint_ready(pACB)) {
1304                 printk(KERN_NOTICE
1305                         "arcmsr%d: wait 'abort all outstanding command' timeout\n"
1306                         , pACB->host->host_no);
1307                 return false;
1308         }
1309         return true;
1310 }
1311
1312 static uint8_t arcmsr_hbaD_abort_allcmd(struct AdapterControlBlock *pACB)
1313 {
1314         struct MessageUnit_D *reg = pACB->pmuD;
1315
1316         writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, reg->inbound_msgaddr0);
1317         if (!arcmsr_hbaD_wait_msgint_ready(pACB)) {
1318                 pr_notice("arcmsr%d: wait 'abort all outstanding "
1319                         "command' timeout\n", pACB->host->host_no);
1320                 return false;
1321         }
1322         return true;
1323 }
1324
1325 static uint8_t arcmsr_hbaE_abort_allcmd(struct AdapterControlBlock *pACB)
1326 {
1327         struct MessageUnit_E __iomem *reg = pACB->pmuE;
1328
1329         writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, &reg->inbound_msgaddr0);
1330         pACB->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
1331         writel(pACB->out_doorbell, &reg->iobound_doorbell);
1332         if (!arcmsr_hbaE_wait_msgint_ready(pACB)) {
1333                 pr_notice("arcmsr%d: wait 'abort all outstanding "
1334                         "command' timeout\n", pACB->host->host_no);
1335                 return false;
1336         }
1337         return true;
1338 }
1339
1340 static uint8_t arcmsr_abort_allcmd(struct AdapterControlBlock *acb)
1341 {
1342         uint8_t rtnval = 0;
1343         switch (acb->adapter_type) {
1344         case ACB_ADAPTER_TYPE_A:
1345                 rtnval = arcmsr_hbaA_abort_allcmd(acb);
1346                 break;
1347         case ACB_ADAPTER_TYPE_B:
1348                 rtnval = arcmsr_hbaB_abort_allcmd(acb);
1349                 break;
1350         case ACB_ADAPTER_TYPE_C:
1351                 rtnval = arcmsr_hbaC_abort_allcmd(acb);
1352                 break;
1353         case ACB_ADAPTER_TYPE_D:
1354                 rtnval = arcmsr_hbaD_abort_allcmd(acb);
1355                 break;
1356         case ACB_ADAPTER_TYPE_E:
1357         case ACB_ADAPTER_TYPE_F:
1358                 rtnval = arcmsr_hbaE_abort_allcmd(acb);
1359                 break;
1360         }
1361         return rtnval;
1362 }
1363
1364 static void arcmsr_ccb_complete(struct CommandControlBlock *ccb)
1365 {
1366         struct AdapterControlBlock *acb = ccb->acb;
1367         struct scsi_cmnd *pcmd = ccb->pcmd;
1368         unsigned long flags;
1369         atomic_dec(&acb->ccboutstandingcount);
1370         scsi_dma_unmap(ccb->pcmd);
1371         ccb->startdone = ARCMSR_CCB_DONE;
1372         spin_lock_irqsave(&acb->ccblist_lock, flags);
1373         list_add_tail(&ccb->list, &acb->ccb_free_list);
1374         spin_unlock_irqrestore(&acb->ccblist_lock, flags);
1375         scsi_done(pcmd);
1376 }
1377
1378 static void arcmsr_report_sense_info(struct CommandControlBlock *ccb)
1379 {
1380         struct scsi_cmnd *pcmd = ccb->pcmd;
1381
1382         pcmd->result = (DID_OK << 16) | SAM_STAT_CHECK_CONDITION;
1383         if (pcmd->sense_buffer) {
1384                 struct SENSE_DATA *sensebuffer;
1385
1386                 memcpy_and_pad(pcmd->sense_buffer,
1387                                SCSI_SENSE_BUFFERSIZE,
1388                                ccb->arcmsr_cdb.SenseData,
1389                                sizeof(ccb->arcmsr_cdb.SenseData),
1390                                0);
1391
1392                 sensebuffer = (struct SENSE_DATA *)pcmd->sense_buffer;
1393                 sensebuffer->ErrorCode = SCSI_SENSE_CURRENT_ERRORS;
1394                 sensebuffer->Valid = 1;
1395         }
1396 }
1397
1398 static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb)
1399 {
1400         u32 orig_mask = 0;
1401         switch (acb->adapter_type) {
1402         case ACB_ADAPTER_TYPE_A : {
1403                 struct MessageUnit_A __iomem *reg = acb->pmuA;
1404                 orig_mask = readl(&reg->outbound_intmask);
1405                 writel(orig_mask|ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE, \
1406                                                 &reg->outbound_intmask);
1407                 }
1408                 break;
1409         case ACB_ADAPTER_TYPE_B : {
1410                 struct MessageUnit_B *reg = acb->pmuB;
1411                 orig_mask = readl(reg->iop2drv_doorbell_mask);
1412                 writel(0, reg->iop2drv_doorbell_mask);
1413                 }
1414                 break;
1415         case ACB_ADAPTER_TYPE_C:{
1416                 struct MessageUnit_C __iomem *reg = acb->pmuC;
1417                 /* disable all outbound interrupt */
1418                 orig_mask = readl(&reg->host_int_mask); /* disable outbound message0 int */
1419                 writel(orig_mask|ARCMSR_HBCMU_ALL_INTMASKENABLE, &reg->host_int_mask);
1420                 }
1421                 break;
1422         case ACB_ADAPTER_TYPE_D: {
1423                 struct MessageUnit_D *reg = acb->pmuD;
1424                 /* disable all outbound interrupt */
1425                 writel(ARCMSR_ARC1214_ALL_INT_DISABLE, reg->pcief0_int_enable);
1426                 }
1427                 break;
1428         case ACB_ADAPTER_TYPE_E:
1429         case ACB_ADAPTER_TYPE_F: {
1430                 struct MessageUnit_E __iomem *reg = acb->pmuE;
1431                 orig_mask = readl(&reg->host_int_mask);
1432                 writel(orig_mask | ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR | ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR, &reg->host_int_mask);
1433                 readl(&reg->host_int_mask); /* Dummy readl to force pci flush */
1434                 }
1435                 break;
1436         }
1437         return orig_mask;
1438 }
1439
1440 static void arcmsr_report_ccb_state(struct AdapterControlBlock *acb,
1441                         struct CommandControlBlock *ccb, bool error)
1442 {
1443         uint8_t id, lun;
1444         id = ccb->pcmd->device->id;
1445         lun = ccb->pcmd->device->lun;
1446         if (!error) {
1447                 if (acb->devstate[id][lun] == ARECA_RAID_GONE)
1448                         acb->devstate[id][lun] = ARECA_RAID_GOOD;
1449                 ccb->pcmd->result = DID_OK << 16;
1450                 arcmsr_ccb_complete(ccb);
1451         }else{
1452                 switch (ccb->arcmsr_cdb.DeviceStatus) {
1453                 case ARCMSR_DEV_SELECT_TIMEOUT: {
1454                         acb->devstate[id][lun] = ARECA_RAID_GONE;
1455                         ccb->pcmd->result = DID_NO_CONNECT << 16;
1456                         arcmsr_ccb_complete(ccb);
1457                         }
1458                         break;
1459
1460                 case ARCMSR_DEV_ABORTED:
1461
1462                 case ARCMSR_DEV_INIT_FAIL: {
1463                         acb->devstate[id][lun] = ARECA_RAID_GONE;
1464                         ccb->pcmd->result = DID_BAD_TARGET << 16;
1465                         arcmsr_ccb_complete(ccb);
1466                         }
1467                         break;
1468
1469                 case ARCMSR_DEV_CHECK_CONDITION: {
1470                         acb->devstate[id][lun] = ARECA_RAID_GOOD;
1471                         arcmsr_report_sense_info(ccb);
1472                         arcmsr_ccb_complete(ccb);
1473                         }
1474                         break;
1475
1476                 default:
1477                         printk(KERN_NOTICE
1478                                 "arcmsr%d: scsi id = %d lun = %d isr get command error done, \
1479                                 but got unknown DeviceStatus = 0x%x \n"
1480                                 , acb->host->host_no
1481                                 , id
1482                                 , lun
1483                                 , ccb->arcmsr_cdb.DeviceStatus);
1484                                 acb->devstate[id][lun] = ARECA_RAID_GONE;
1485                                 ccb->pcmd->result = DID_NO_CONNECT << 16;
1486                                 arcmsr_ccb_complete(ccb);
1487                         break;
1488                 }
1489         }
1490 }
1491
1492 static void arcmsr_drain_donequeue(struct AdapterControlBlock *acb, struct CommandControlBlock *pCCB, bool error)
1493 {
1494         if ((pCCB->acb != acb) || (pCCB->startdone != ARCMSR_CCB_START)) {
1495                 if (pCCB->startdone == ARCMSR_CCB_ABORTED) {
1496                         struct scsi_cmnd *abortcmd = pCCB->pcmd;
1497                         if (abortcmd) {
1498                                 abortcmd->result |= DID_ABORT << 16;
1499                                 arcmsr_ccb_complete(pCCB);
1500                                 printk(KERN_NOTICE "arcmsr%d: pCCB ='0x%p' isr got aborted command \n",
1501                                 acb->host->host_no, pCCB);
1502                         }
1503                         return;
1504                 }
1505                 printk(KERN_NOTICE "arcmsr%d: isr get an illegal ccb command \
1506                                 done acb = '0x%p'"
1507                                 "ccb = '0x%p' ccbacb = '0x%p' startdone = 0x%x"
1508                                 " ccboutstandingcount = %d \n"
1509                                 , acb->host->host_no
1510                                 , acb
1511                                 , pCCB
1512                                 , pCCB->acb
1513                                 , pCCB->startdone
1514                                 , atomic_read(&acb->ccboutstandingcount));
1515                 return;
1516         }
1517         arcmsr_report_ccb_state(acb, pCCB, error);
1518 }
1519
1520 static void arcmsr_done4abort_postqueue(struct AdapterControlBlock *acb)
1521 {
1522         int i = 0;
1523         uint32_t flag_ccb;
1524         struct ARCMSR_CDB *pARCMSR_CDB;
1525         bool error;
1526         struct CommandControlBlock *pCCB;
1527         unsigned long ccb_cdb_phy;
1528
1529         switch (acb->adapter_type) {
1530
1531         case ACB_ADAPTER_TYPE_A: {
1532                 struct MessageUnit_A __iomem *reg = acb->pmuA;
1533                 uint32_t outbound_intstatus;
1534                 outbound_intstatus = readl(&reg->outbound_intstatus) &
1535                                         acb->outbound_int_enable;
1536                 /*clear and abort all outbound posted Q*/
1537                 writel(outbound_intstatus, &reg->outbound_intstatus);/*clear interrupt*/
1538                 while(((flag_ccb = readl(&reg->outbound_queueport)) != 0xFFFFFFFF)
1539                                 && (i++ < acb->maxOutstanding)) {
1540                         ccb_cdb_phy = (flag_ccb << 5) & 0xffffffff;
1541                         if (acb->cdb_phyadd_hipart)
1542                                 ccb_cdb_phy = ccb_cdb_phy | acb->cdb_phyadd_hipart;
1543                         pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset + ccb_cdb_phy);
1544                         pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
1545                         error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
1546                         arcmsr_drain_donequeue(acb, pCCB, error);
1547                 }
1548                 }
1549                 break;
1550
1551         case ACB_ADAPTER_TYPE_B: {
1552                 struct MessageUnit_B *reg = acb->pmuB;
1553                 /*clear all outbound posted Q*/
1554                 writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell); /* clear doorbell interrupt */
1555                 for (i = 0; i < ARCMSR_MAX_HBB_POSTQUEUE; i++) {
1556                         flag_ccb = reg->done_qbuffer[i];
1557                         if (flag_ccb != 0) {
1558                                 reg->done_qbuffer[i] = 0;
1559                                 ccb_cdb_phy = (flag_ccb << 5) & 0xffffffff;
1560                                 if (acb->cdb_phyadd_hipart)
1561                                         ccb_cdb_phy = ccb_cdb_phy | acb->cdb_phyadd_hipart;
1562                                 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset + ccb_cdb_phy);
1563                                 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
1564                                 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
1565                                 arcmsr_drain_donequeue(acb, pCCB, error);
1566                         }
1567                         reg->post_qbuffer[i] = 0;
1568                 }
1569                 reg->doneq_index = 0;
1570                 reg->postq_index = 0;
1571                 }
1572                 break;
1573         case ACB_ADAPTER_TYPE_C: {
1574                 struct MessageUnit_C __iomem *reg = acb->pmuC;
1575                 while ((readl(&reg->host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) && (i++ < acb->maxOutstanding)) {
1576                         /*need to do*/
1577                         flag_ccb = readl(&reg->outbound_queueport_low);
1578                         ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);
1579                         if (acb->cdb_phyadd_hipart)
1580                                 ccb_cdb_phy = ccb_cdb_phy | acb->cdb_phyadd_hipart;
1581                         pARCMSR_CDB = (struct  ARCMSR_CDB *)(acb->vir2phy_offset + ccb_cdb_phy);
1582                         pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
1583                         error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
1584                         arcmsr_drain_donequeue(acb, pCCB, error);
1585                 }
1586                 }
1587                 break;
1588         case ACB_ADAPTER_TYPE_D: {
1589                 struct MessageUnit_D  *pmu = acb->pmuD;
1590                 uint32_t outbound_write_pointer;
1591                 uint32_t doneq_index, index_stripped, addressLow, residual, toggle;
1592                 unsigned long flags;
1593
1594                 residual = atomic_read(&acb->ccboutstandingcount);
1595                 for (i = 0; i < residual; i++) {
1596                         spin_lock_irqsave(&acb->doneq_lock, flags);
1597                         outbound_write_pointer =
1598                                 pmu->done_qbuffer[0].addressLow + 1;
1599                         doneq_index = pmu->doneq_index;
1600                         if ((doneq_index & 0xFFF) !=
1601                                 (outbound_write_pointer & 0xFFF)) {
1602                                 toggle = doneq_index & 0x4000;
1603                                 index_stripped = (doneq_index & 0xFFF) + 1;
1604                                 index_stripped %= ARCMSR_MAX_ARC1214_DONEQUEUE;
1605                                 pmu->doneq_index = index_stripped ? (index_stripped | toggle) :
1606                                         ((toggle ^ 0x4000) + 1);
1607                                 doneq_index = pmu->doneq_index;
1608                                 spin_unlock_irqrestore(&acb->doneq_lock, flags);
1609                                 addressLow = pmu->done_qbuffer[doneq_index &
1610                                         0xFFF].addressLow;
1611                                 ccb_cdb_phy = (addressLow & 0xFFFFFFF0);
1612                                 if (acb->cdb_phyadd_hipart)
1613                                         ccb_cdb_phy = ccb_cdb_phy | acb->cdb_phyadd_hipart;
1614                                 pARCMSR_CDB = (struct  ARCMSR_CDB *)
1615                                         (acb->vir2phy_offset + ccb_cdb_phy);
1616                                 pCCB = container_of(pARCMSR_CDB,
1617                                         struct CommandControlBlock, arcmsr_cdb);
1618                                 error = (addressLow &
1619                                         ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ?
1620                                         true : false;
1621                                 arcmsr_drain_donequeue(acb, pCCB, error);
1622                                 writel(doneq_index,
1623                                         pmu->outboundlist_read_pointer);
1624                         } else {
1625                                 spin_unlock_irqrestore(&acb->doneq_lock, flags);
1626                                 mdelay(10);
1627                         }
1628                 }
1629                 pmu->postq_index = 0;
1630                 pmu->doneq_index = 0x40FF;
1631                 }
1632                 break;
1633         case ACB_ADAPTER_TYPE_E:
1634                 arcmsr_hbaE_postqueue_isr(acb);
1635                 break;
1636         case ACB_ADAPTER_TYPE_F:
1637                 arcmsr_hbaF_postqueue_isr(acb);
1638                 break;
1639         }
1640 }
1641
1642 static void arcmsr_remove_scsi_devices(struct AdapterControlBlock *acb)
1643 {
1644         char *acb_dev_map = (char *)acb->device_map;
1645         int target, lun, i;
1646         struct scsi_device *psdev;
1647         struct CommandControlBlock *ccb;
1648         char temp;
1649
1650         for (i = 0; i < acb->maxFreeCCB; i++) {
1651                 ccb = acb->pccb_pool[i];
1652                 if (ccb->startdone == ARCMSR_CCB_START) {
1653                         ccb->pcmd->result = DID_NO_CONNECT << 16;
1654                         scsi_dma_unmap(ccb->pcmd);
1655                         scsi_done(ccb->pcmd);
1656                 }
1657         }
1658         for (target = 0; target < ARCMSR_MAX_TARGETID; target++) {
1659                 temp = *acb_dev_map;
1660                 if (temp) {
1661                         for (lun = 0; lun < ARCMSR_MAX_TARGETLUN; lun++) {
1662                                 if (temp & 1) {
1663                                         psdev = scsi_device_lookup(acb->host,
1664                                                 0, target, lun);
1665                                         if (psdev != NULL) {
1666                                                 scsi_remove_device(psdev);
1667                                                 scsi_device_put(psdev);
1668                                         }
1669                                 }
1670                                 temp >>= 1;
1671                         }
1672                         *acb_dev_map = 0;
1673                 }
1674                 acb_dev_map++;
1675         }
1676 }
1677
1678 static void arcmsr_free_pcidev(struct AdapterControlBlock *acb)
1679 {
1680         struct pci_dev *pdev;
1681         struct Scsi_Host *host;
1682
1683         host = acb->host;
1684         arcmsr_free_sysfs_attr(acb);
1685         scsi_remove_host(host);
1686         flush_work(&acb->arcmsr_do_message_isr_bh);
1687         del_timer_sync(&acb->eternal_timer);
1688         if (set_date_time)
1689                 del_timer_sync(&acb->refresh_timer);
1690         pdev = acb->pdev;
1691         arcmsr_free_irq(pdev, acb);
1692         arcmsr_free_ccb_pool(acb);
1693         if (acb->adapter_type == ACB_ADAPTER_TYPE_F)
1694                 arcmsr_free_io_queue(acb);
1695         arcmsr_unmap_pciregion(acb);
1696         pci_release_regions(pdev);
1697         scsi_host_put(host);
1698         pci_disable_device(pdev);
1699 }
1700
1701 static void arcmsr_remove(struct pci_dev *pdev)
1702 {
1703         struct Scsi_Host *host = pci_get_drvdata(pdev);
1704         struct AdapterControlBlock *acb =
1705                 (struct AdapterControlBlock *) host->hostdata;
1706         int poll_count = 0;
1707         uint16_t dev_id;
1708
1709         pci_read_config_word(pdev, PCI_DEVICE_ID, &dev_id);
1710         if (dev_id == 0xffff) {
1711                 acb->acb_flags &= ~ACB_F_IOP_INITED;
1712                 acb->acb_flags |= ACB_F_ADAPTER_REMOVED;
1713                 arcmsr_remove_scsi_devices(acb);
1714                 arcmsr_free_pcidev(acb);
1715                 return;
1716         }
1717         arcmsr_free_sysfs_attr(acb);
1718         scsi_remove_host(host);
1719         flush_work(&acb->arcmsr_do_message_isr_bh);
1720         del_timer_sync(&acb->eternal_timer);
1721         if (set_date_time)
1722                 del_timer_sync(&acb->refresh_timer);
1723         arcmsr_disable_outbound_ints(acb);
1724         arcmsr_stop_adapter_bgrb(acb);
1725         arcmsr_flush_adapter_cache(acb);
1726         acb->acb_flags |= ACB_F_SCSISTOPADAPTER;
1727         acb->acb_flags &= ~ACB_F_IOP_INITED;
1728
1729         for (poll_count = 0; poll_count < acb->maxOutstanding; poll_count++){
1730                 if (!atomic_read(&acb->ccboutstandingcount))
1731                         break;
1732                 arcmsr_interrupt(acb);/* FIXME: need spinlock */
1733                 msleep(25);
1734         }
1735
1736         if (atomic_read(&acb->ccboutstandingcount)) {
1737                 int i;
1738
1739                 arcmsr_abort_allcmd(acb);
1740                 arcmsr_done4abort_postqueue(acb);
1741                 for (i = 0; i < acb->maxFreeCCB; i++) {
1742                         struct CommandControlBlock *ccb = acb->pccb_pool[i];
1743                         if (ccb->startdone == ARCMSR_CCB_START) {
1744                                 ccb->startdone = ARCMSR_CCB_ABORTED;
1745                                 ccb->pcmd->result = DID_ABORT << 16;
1746                                 arcmsr_ccb_complete(ccb);
1747                         }
1748                 }
1749         }
1750         arcmsr_free_irq(pdev, acb);
1751         arcmsr_free_ccb_pool(acb);
1752         if (acb->adapter_type == ACB_ADAPTER_TYPE_F)
1753                 arcmsr_free_io_queue(acb);
1754         arcmsr_unmap_pciregion(acb);
1755         pci_release_regions(pdev);
1756         scsi_host_put(host);
1757         pci_disable_device(pdev);
1758 }
1759
1760 static void arcmsr_shutdown(struct pci_dev *pdev)
1761 {
1762         struct Scsi_Host *host = pci_get_drvdata(pdev);
1763         struct AdapterControlBlock *acb =
1764                 (struct AdapterControlBlock *)host->hostdata;
1765         if (acb->acb_flags & ACB_F_ADAPTER_REMOVED)
1766                 return;
1767         del_timer_sync(&acb->eternal_timer);
1768         if (set_date_time)
1769                 del_timer_sync(&acb->refresh_timer);
1770         arcmsr_disable_outbound_ints(acb);
1771         arcmsr_free_irq(pdev, acb);
1772         flush_work(&acb->arcmsr_do_message_isr_bh);
1773         arcmsr_stop_adapter_bgrb(acb);
1774         arcmsr_flush_adapter_cache(acb);
1775 }
1776
1777 static int __init arcmsr_module_init(void)
1778 {
1779         int error = 0;
1780         error = pci_register_driver(&arcmsr_pci_driver);
1781         return error;
1782 }
1783
1784 static void __exit arcmsr_module_exit(void)
1785 {
1786         pci_unregister_driver(&arcmsr_pci_driver);
1787 }
1788 module_init(arcmsr_module_init);
1789 module_exit(arcmsr_module_exit);
1790
1791 static void arcmsr_enable_outbound_ints(struct AdapterControlBlock *acb,
1792                                                 u32 intmask_org)
1793 {
1794         u32 mask;
1795         switch (acb->adapter_type) {
1796
1797         case ACB_ADAPTER_TYPE_A: {
1798                 struct MessageUnit_A __iomem *reg = acb->pmuA;
1799                 mask = intmask_org & ~(ARCMSR_MU_OUTBOUND_POSTQUEUE_INTMASKENABLE |
1800                              ARCMSR_MU_OUTBOUND_DOORBELL_INTMASKENABLE|
1801                              ARCMSR_MU_OUTBOUND_MESSAGE0_INTMASKENABLE);
1802                 writel(mask, &reg->outbound_intmask);
1803                 acb->outbound_int_enable = ~(intmask_org & mask) & 0x000000ff;
1804                 }
1805                 break;
1806
1807         case ACB_ADAPTER_TYPE_B: {
1808                 struct MessageUnit_B *reg = acb->pmuB;
1809                 mask = intmask_org | (ARCMSR_IOP2DRV_DATA_WRITE_OK |
1810                         ARCMSR_IOP2DRV_DATA_READ_OK |
1811                         ARCMSR_IOP2DRV_CDB_DONE |
1812                         ARCMSR_IOP2DRV_MESSAGE_CMD_DONE);
1813                 writel(mask, reg->iop2drv_doorbell_mask);
1814                 acb->outbound_int_enable = (intmask_org | mask) & 0x0000000f;
1815                 }
1816                 break;
1817         case ACB_ADAPTER_TYPE_C: {
1818                 struct MessageUnit_C __iomem *reg = acb->pmuC;
1819                 mask = ~(ARCMSR_HBCMU_UTILITY_A_ISR_MASK | ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR_MASK|ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR_MASK);
1820                 writel(intmask_org & mask, &reg->host_int_mask);
1821                 acb->outbound_int_enable = ~(intmask_org & mask) & 0x0000000f;
1822                 }
1823                 break;
1824         case ACB_ADAPTER_TYPE_D: {
1825                 struct MessageUnit_D *reg = acb->pmuD;
1826
1827                 mask = ARCMSR_ARC1214_ALL_INT_ENABLE;
1828                 writel(intmask_org | mask, reg->pcief0_int_enable);
1829                 break;
1830                 }
1831         case ACB_ADAPTER_TYPE_E:
1832         case ACB_ADAPTER_TYPE_F: {
1833                 struct MessageUnit_E __iomem *reg = acb->pmuE;
1834
1835                 mask = ~(ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR | ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR);
1836                 writel(intmask_org & mask, &reg->host_int_mask);
1837                 break;
1838                 }
1839         }
1840 }
1841
1842 static int arcmsr_build_ccb(struct AdapterControlBlock *acb,
1843         struct CommandControlBlock *ccb, struct scsi_cmnd *pcmd)
1844 {
1845         struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb;
1846         int8_t *psge = (int8_t *)&arcmsr_cdb->u;
1847         __le32 address_lo, address_hi;
1848         int arccdbsize = 0x30;
1849         __le32 length = 0;
1850         int i;
1851         struct scatterlist *sg;
1852         int nseg;
1853         ccb->pcmd = pcmd;
1854         memset(arcmsr_cdb, 0, sizeof(struct ARCMSR_CDB));
1855         arcmsr_cdb->TargetID = pcmd->device->id;
1856         arcmsr_cdb->LUN = pcmd->device->lun;
1857         arcmsr_cdb->Function = 1;
1858         arcmsr_cdb->msgContext = 0;
1859         memcpy(arcmsr_cdb->Cdb, pcmd->cmnd, pcmd->cmd_len);
1860
1861         nseg = scsi_dma_map(pcmd);
1862         if (unlikely(nseg > acb->host->sg_tablesize || nseg < 0))
1863                 return FAILED;
1864         scsi_for_each_sg(pcmd, sg, nseg, i) {
1865                 /* Get the physical address of the current data pointer */
1866                 length = cpu_to_le32(sg_dma_len(sg));
1867                 address_lo = cpu_to_le32(dma_addr_lo32(sg_dma_address(sg)));
1868                 address_hi = cpu_to_le32(dma_addr_hi32(sg_dma_address(sg)));
1869                 if (address_hi == 0) {
1870                         struct SG32ENTRY *pdma_sg = (struct SG32ENTRY *)psge;
1871
1872                         pdma_sg->address = address_lo;
1873                         pdma_sg->length = length;
1874                         psge += sizeof (struct SG32ENTRY);
1875                         arccdbsize += sizeof (struct SG32ENTRY);
1876                 } else {
1877                         struct SG64ENTRY *pdma_sg = (struct SG64ENTRY *)psge;
1878
1879                         pdma_sg->addresshigh = address_hi;
1880                         pdma_sg->address = address_lo;
1881                         pdma_sg->length = length|cpu_to_le32(IS_SG64_ADDR);
1882                         psge += sizeof (struct SG64ENTRY);
1883                         arccdbsize += sizeof (struct SG64ENTRY);
1884                 }
1885         }
1886         arcmsr_cdb->sgcount = (uint8_t)nseg;
1887         arcmsr_cdb->DataLength = scsi_bufflen(pcmd);
1888         arcmsr_cdb->msgPages = arccdbsize/0x100 + (arccdbsize % 0x100 ? 1 : 0);
1889         if ( arccdbsize > 256)
1890                 arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_SGL_BSIZE;
1891         if (pcmd->sc_data_direction == DMA_TO_DEVICE)
1892                 arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_WRITE;
1893         ccb->arc_cdb_size = arccdbsize;
1894         return SUCCESS;
1895 }
1896
1897 static void arcmsr_post_ccb(struct AdapterControlBlock *acb, struct CommandControlBlock *ccb)
1898 {
1899         uint32_t cdb_phyaddr = ccb->cdb_phyaddr;
1900         struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb;
1901         atomic_inc(&acb->ccboutstandingcount);
1902         ccb->startdone = ARCMSR_CCB_START;
1903         switch (acb->adapter_type) {
1904         case ACB_ADAPTER_TYPE_A: {
1905                 struct MessageUnit_A __iomem *reg = acb->pmuA;
1906
1907                 if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE)
1908                         writel(cdb_phyaddr | ARCMSR_CCBPOST_FLAG_SGL_BSIZE,
1909                         &reg->inbound_queueport);
1910                 else
1911                         writel(cdb_phyaddr, &reg->inbound_queueport);
1912                 break;
1913         }
1914
1915         case ACB_ADAPTER_TYPE_B: {
1916                 struct MessageUnit_B *reg = acb->pmuB;
1917                 uint32_t ending_index, index = reg->postq_index;
1918
1919                 ending_index = ((index + 1) % ARCMSR_MAX_HBB_POSTQUEUE);
1920                 reg->post_qbuffer[ending_index] = 0;
1921                 if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE) {
1922                         reg->post_qbuffer[index] =
1923                                 cdb_phyaddr | ARCMSR_CCBPOST_FLAG_SGL_BSIZE;
1924                 } else {
1925                         reg->post_qbuffer[index] = cdb_phyaddr;
1926                 }
1927                 index++;
1928                 index %= ARCMSR_MAX_HBB_POSTQUEUE;/*if last index number set it to 0 */
1929                 reg->postq_index = index;
1930                 writel(ARCMSR_DRV2IOP_CDB_POSTED, reg->drv2iop_doorbell);
1931                 }
1932                 break;
1933         case ACB_ADAPTER_TYPE_C: {
1934                 struct MessageUnit_C __iomem *phbcmu = acb->pmuC;
1935                 uint32_t ccb_post_stamp, arc_cdb_size;
1936
1937                 arc_cdb_size = (ccb->arc_cdb_size > 0x300) ? 0x300 : ccb->arc_cdb_size;
1938                 ccb_post_stamp = (cdb_phyaddr | ((arc_cdb_size - 1) >> 6) | 1);
1939                 writel(upper_32_bits(ccb->cdb_phyaddr), &phbcmu->inbound_queueport_high);
1940                 writel(ccb_post_stamp, &phbcmu->inbound_queueport_low);
1941                 }
1942                 break;
1943         case ACB_ADAPTER_TYPE_D: {
1944                 struct MessageUnit_D  *pmu = acb->pmuD;
1945                 u16 index_stripped;
1946                 u16 postq_index, toggle;
1947                 unsigned long flags;
1948                 struct InBound_SRB *pinbound_srb;
1949
1950                 spin_lock_irqsave(&acb->postq_lock, flags);
1951                 postq_index = pmu->postq_index;
1952                 pinbound_srb = (struct InBound_SRB *)&(pmu->post_qbuffer[postq_index & 0xFF]);
1953                 pinbound_srb->addressHigh = upper_32_bits(ccb->cdb_phyaddr);
1954                 pinbound_srb->addressLow = cdb_phyaddr;
1955                 pinbound_srb->length = ccb->arc_cdb_size >> 2;
1956                 arcmsr_cdb->msgContext = dma_addr_lo32(cdb_phyaddr);
1957                 toggle = postq_index & 0x4000;
1958                 index_stripped = postq_index + 1;
1959                 index_stripped &= (ARCMSR_MAX_ARC1214_POSTQUEUE - 1);
1960                 pmu->postq_index = index_stripped ? (index_stripped | toggle) :
1961                         (toggle ^ 0x4000);
1962                 writel(postq_index, pmu->inboundlist_write_pointer);
1963                 spin_unlock_irqrestore(&acb->postq_lock, flags);
1964                 break;
1965                 }
1966         case ACB_ADAPTER_TYPE_E: {
1967                 struct MessageUnit_E __iomem *pmu = acb->pmuE;
1968                 u32 ccb_post_stamp, arc_cdb_size;
1969
1970                 arc_cdb_size = (ccb->arc_cdb_size > 0x300) ? 0x300 : ccb->arc_cdb_size;
1971                 ccb_post_stamp = (ccb->smid | ((arc_cdb_size - 1) >> 6));
1972                 writel(0, &pmu->inbound_queueport_high);
1973                 writel(ccb_post_stamp, &pmu->inbound_queueport_low);
1974                 break;
1975                 }
1976         case ACB_ADAPTER_TYPE_F: {
1977                 struct MessageUnit_F __iomem *pmu = acb->pmuF;
1978                 u32 ccb_post_stamp, arc_cdb_size;
1979
1980                 if (ccb->arc_cdb_size <= 0x300)
1981                         arc_cdb_size = (ccb->arc_cdb_size - 1) >> 6 | 1;
1982                 else {
1983                         arc_cdb_size = ((ccb->arc_cdb_size + 0xff) >> 8) + 2;
1984                         if (arc_cdb_size > 0xF)
1985                                 arc_cdb_size = 0xF;
1986                         arc_cdb_size = (arc_cdb_size << 1) | 1;
1987                 }
1988                 ccb_post_stamp = (ccb->smid | arc_cdb_size);
1989                 writel(0, &pmu->inbound_queueport_high);
1990                 writel(ccb_post_stamp, &pmu->inbound_queueport_low);
1991                 break;
1992                 }
1993         }
1994 }
1995
1996 static void arcmsr_hbaA_stop_bgrb(struct AdapterControlBlock *acb)
1997 {
1998         struct MessageUnit_A __iomem *reg = acb->pmuA;
1999         acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
2000         writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, &reg->inbound_msgaddr0);
2001         if (!arcmsr_hbaA_wait_msgint_ready(acb)) {
2002                 printk(KERN_NOTICE
2003                         "arcmsr%d: wait 'stop adapter background rebuild' timeout\n"
2004                         , acb->host->host_no);
2005         }
2006 }
2007
2008 static void arcmsr_hbaB_stop_bgrb(struct AdapterControlBlock *acb)
2009 {
2010         struct MessageUnit_B *reg = acb->pmuB;
2011         acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
2012         writel(ARCMSR_MESSAGE_STOP_BGRB, reg->drv2iop_doorbell);
2013
2014         if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
2015                 printk(KERN_NOTICE
2016                         "arcmsr%d: wait 'stop adapter background rebuild' timeout\n"
2017                         , acb->host->host_no);
2018         }
2019 }
2020
2021 static void arcmsr_hbaC_stop_bgrb(struct AdapterControlBlock *pACB)
2022 {
2023         struct MessageUnit_C __iomem *reg = pACB->pmuC;
2024         pACB->acb_flags &= ~ACB_F_MSG_START_BGRB;
2025         writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, &reg->inbound_msgaddr0);
2026         writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
2027         if (!arcmsr_hbaC_wait_msgint_ready(pACB)) {
2028                 printk(KERN_NOTICE
2029                         "arcmsr%d: wait 'stop adapter background rebuild' timeout\n"
2030                         , pACB->host->host_no);
2031         }
2032         return;
2033 }
2034
2035 static void arcmsr_hbaD_stop_bgrb(struct AdapterControlBlock *pACB)
2036 {
2037         struct MessageUnit_D *reg = pACB->pmuD;
2038
2039         pACB->acb_flags &= ~ACB_F_MSG_START_BGRB;
2040         writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, reg->inbound_msgaddr0);
2041         if (!arcmsr_hbaD_wait_msgint_ready(pACB))
2042                 pr_notice("arcmsr%d: wait 'stop adapter background rebuild' "
2043                         "timeout\n", pACB->host->host_no);
2044 }
2045
2046 static void arcmsr_hbaE_stop_bgrb(struct AdapterControlBlock *pACB)
2047 {
2048         struct MessageUnit_E __iomem *reg = pACB->pmuE;
2049
2050         pACB->acb_flags &= ~ACB_F_MSG_START_BGRB;
2051         writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, &reg->inbound_msgaddr0);
2052         pACB->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
2053         writel(pACB->out_doorbell, &reg->iobound_doorbell);
2054         if (!arcmsr_hbaE_wait_msgint_ready(pACB)) {
2055                 pr_notice("arcmsr%d: wait 'stop adapter background rebuild' "
2056                         "timeout\n", pACB->host->host_no);
2057         }
2058 }
2059
2060 static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb)
2061 {
2062         switch (acb->adapter_type) {
2063         case ACB_ADAPTER_TYPE_A:
2064                 arcmsr_hbaA_stop_bgrb(acb);
2065                 break;
2066         case ACB_ADAPTER_TYPE_B:
2067                 arcmsr_hbaB_stop_bgrb(acb);
2068                 break;
2069         case ACB_ADAPTER_TYPE_C:
2070                 arcmsr_hbaC_stop_bgrb(acb);
2071                 break;
2072         case ACB_ADAPTER_TYPE_D:
2073                 arcmsr_hbaD_stop_bgrb(acb);
2074                 break;
2075         case ACB_ADAPTER_TYPE_E:
2076         case ACB_ADAPTER_TYPE_F:
2077                 arcmsr_hbaE_stop_bgrb(acb);
2078                 break;
2079         }
2080 }
2081
2082 static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb)
2083 {
2084         if (acb->xor_mega) {
2085                 struct Xor_sg *pXorPhys;
2086                 void **pXorVirt;
2087                 int i;
2088
2089                 pXorPhys = (struct Xor_sg *)(acb->xorVirt +
2090                         sizeof(struct HostRamBuf));
2091                 pXorVirt = (void **)((unsigned long)acb->xorVirt +
2092                         (unsigned long)acb->xorVirtOffset);
2093                 for (i = 0; i < acb->xor_mega; i++) {
2094                         if (pXorPhys->xorPhys) {
2095                                 dma_free_coherent(&acb->pdev->dev,
2096                                         ARCMSR_XOR_SEG_SIZE,
2097                                         *pXorVirt, pXorPhys->xorPhys);
2098                                 pXorPhys->xorPhys = 0;
2099                                 *pXorVirt = NULL;
2100                         }
2101                         pXorPhys++;
2102                         pXorVirt++;
2103                 }
2104                 dma_free_coherent(&acb->pdev->dev, acb->init2cfg_size,
2105                         acb->xorVirt, acb->xorPhys);
2106         }
2107         dma_free_coherent(&acb->pdev->dev, acb->uncache_size, acb->dma_coherent, acb->dma_coherent_handle);
2108 }
2109
2110 static void arcmsr_iop_message_read(struct AdapterControlBlock *acb)
2111 {
2112         switch (acb->adapter_type) {
2113         case ACB_ADAPTER_TYPE_A: {
2114                 struct MessageUnit_A __iomem *reg = acb->pmuA;
2115                 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, &reg->inbound_doorbell);
2116                 }
2117                 break;
2118         case ACB_ADAPTER_TYPE_B: {
2119                 struct MessageUnit_B *reg = acb->pmuB;
2120                 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell);
2121                 }
2122                 break;
2123         case ACB_ADAPTER_TYPE_C: {
2124                 struct MessageUnit_C __iomem *reg = acb->pmuC;
2125
2126                 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, &reg->inbound_doorbell);
2127                 }
2128                 break;
2129         case ACB_ADAPTER_TYPE_D: {
2130                 struct MessageUnit_D *reg = acb->pmuD;
2131                 writel(ARCMSR_ARC1214_DRV2IOP_DATA_OUT_READ,
2132                         reg->inbound_doorbell);
2133                 }
2134                 break;
2135         case ACB_ADAPTER_TYPE_E:
2136         case ACB_ADAPTER_TYPE_F: {
2137                 struct MessageUnit_E __iomem *reg = acb->pmuE;
2138                 acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_DATA_READ_OK;
2139                 writel(acb->out_doorbell, &reg->iobound_doorbell);
2140                 }
2141                 break;
2142         }
2143 }
2144
2145 static void arcmsr_iop_message_wrote(struct AdapterControlBlock *acb)
2146 {
2147         switch (acb->adapter_type) {
2148         case ACB_ADAPTER_TYPE_A: {
2149                 struct MessageUnit_A __iomem *reg = acb->pmuA;
2150                 /*
2151                 ** push inbound doorbell tell iop, driver data write ok
2152                 ** and wait reply on next hwinterrupt for next Qbuffer post
2153                 */
2154                 writel(ARCMSR_INBOUND_DRIVER_DATA_WRITE_OK, &reg->inbound_doorbell);
2155                 }
2156                 break;
2157
2158         case ACB_ADAPTER_TYPE_B: {
2159                 struct MessageUnit_B *reg = acb->pmuB;
2160                 /*
2161                 ** push inbound doorbell tell iop, driver data write ok
2162                 ** and wait reply on next hwinterrupt for next Qbuffer post
2163                 */
2164                 writel(ARCMSR_DRV2IOP_DATA_WRITE_OK, reg->drv2iop_doorbell);
2165                 }
2166                 break;
2167         case ACB_ADAPTER_TYPE_C: {
2168                 struct MessageUnit_C __iomem *reg = acb->pmuC;
2169                 /*
2170                 ** push inbound doorbell tell iop, driver data write ok
2171                 ** and wait reply on next hwinterrupt for next Qbuffer post
2172                 */
2173                 writel(ARCMSR_HBCMU_DRV2IOP_DATA_WRITE_OK, &reg->inbound_doorbell);
2174                 }
2175                 break;
2176         case ACB_ADAPTER_TYPE_D: {
2177                 struct MessageUnit_D *reg = acb->pmuD;
2178                 writel(ARCMSR_ARC1214_DRV2IOP_DATA_IN_READY,
2179                         reg->inbound_doorbell);
2180                 }
2181                 break;
2182         case ACB_ADAPTER_TYPE_E:
2183         case ACB_ADAPTER_TYPE_F: {
2184                 struct MessageUnit_E __iomem *reg = acb->pmuE;
2185                 acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_DATA_WRITE_OK;
2186                 writel(acb->out_doorbell, &reg->iobound_doorbell);
2187                 }
2188                 break;
2189         }
2190 }
2191
2192 struct QBUFFER __iomem *arcmsr_get_iop_rqbuffer(struct AdapterControlBlock *acb)
2193 {
2194         struct QBUFFER __iomem *qbuffer = NULL;
2195         switch (acb->adapter_type) {
2196
2197         case ACB_ADAPTER_TYPE_A: {
2198                 struct MessageUnit_A __iomem *reg = acb->pmuA;
2199                 qbuffer = (struct QBUFFER __iomem *)&reg->message_rbuffer;
2200                 }
2201                 break;
2202         case ACB_ADAPTER_TYPE_B: {
2203                 struct MessageUnit_B *reg = acb->pmuB;
2204                 qbuffer = (struct QBUFFER __iomem *)reg->message_rbuffer;
2205                 }
2206                 break;
2207         case ACB_ADAPTER_TYPE_C: {
2208                 struct MessageUnit_C __iomem *phbcmu = acb->pmuC;
2209                 qbuffer = (struct QBUFFER __iomem *)&phbcmu->message_rbuffer;
2210                 }
2211                 break;
2212         case ACB_ADAPTER_TYPE_D: {
2213                 struct MessageUnit_D *reg = acb->pmuD;
2214                 qbuffer = (struct QBUFFER __iomem *)reg->message_rbuffer;
2215                 }
2216                 break;
2217         case ACB_ADAPTER_TYPE_E: {
2218                 struct MessageUnit_E __iomem *reg = acb->pmuE;
2219                 qbuffer = (struct QBUFFER __iomem *)&reg->message_rbuffer;
2220                 }
2221                 break;
2222         case ACB_ADAPTER_TYPE_F: {
2223                 qbuffer = (struct QBUFFER __iomem *)acb->message_rbuffer;
2224                 }
2225                 break;
2226         }
2227         return qbuffer;
2228 }
2229
2230 static struct QBUFFER __iomem *arcmsr_get_iop_wqbuffer(struct AdapterControlBlock *acb)
2231 {
2232         struct QBUFFER __iomem *pqbuffer = NULL;
2233         switch (acb->adapter_type) {
2234
2235         case ACB_ADAPTER_TYPE_A: {
2236                 struct MessageUnit_A __iomem *reg = acb->pmuA;
2237                 pqbuffer = (struct QBUFFER __iomem *) &reg->message_wbuffer;
2238                 }
2239                 break;
2240         case ACB_ADAPTER_TYPE_B: {
2241                 struct MessageUnit_B  *reg = acb->pmuB;
2242                 pqbuffer = (struct QBUFFER __iomem *)reg->message_wbuffer;
2243                 }
2244                 break;
2245         case ACB_ADAPTER_TYPE_C: {
2246                 struct MessageUnit_C __iomem *reg = acb->pmuC;
2247                 pqbuffer = (struct QBUFFER __iomem *)&reg->message_wbuffer;
2248                 }
2249                 break;
2250         case ACB_ADAPTER_TYPE_D: {
2251                 struct MessageUnit_D *reg = acb->pmuD;
2252                 pqbuffer = (struct QBUFFER __iomem *)reg->message_wbuffer;
2253                 }
2254                 break;
2255         case ACB_ADAPTER_TYPE_E: {
2256                 struct MessageUnit_E __iomem *reg = acb->pmuE;
2257                 pqbuffer = (struct QBUFFER __iomem *)&reg->message_wbuffer;
2258                 }
2259                 break;
2260         case ACB_ADAPTER_TYPE_F:
2261                 pqbuffer = (struct QBUFFER __iomem *)acb->message_wbuffer;
2262                 break;
2263         }
2264         return pqbuffer;
2265 }
2266
2267 static uint32_t
2268 arcmsr_Read_iop_rqbuffer_in_DWORD(struct AdapterControlBlock *acb,
2269                 struct QBUFFER __iomem *prbuffer)
2270 {
2271         uint8_t *pQbuffer;
2272         uint8_t *buf1 = NULL;
2273         uint32_t __iomem *iop_data;
2274         uint32_t iop_len, data_len, *buf2 = NULL;
2275
2276         iop_data = (uint32_t __iomem *)prbuffer->data;
2277         iop_len = readl(&prbuffer->data_len);
2278         if (iop_len > 0) {
2279                 buf1 = kmalloc(128, GFP_ATOMIC);
2280                 buf2 = (uint32_t *)buf1;
2281                 if (buf1 == NULL)
2282                         return 0;
2283                 data_len = iop_len;
2284                 while (data_len >= 4) {
2285                         *buf2++ = readl(iop_data);
2286                         iop_data++;
2287                         data_len -= 4;
2288                 }
2289                 if (data_len)
2290                         *buf2 = readl(iop_data);
2291                 buf2 = (uint32_t *)buf1;
2292         }
2293         while (iop_len > 0) {
2294                 pQbuffer = &acb->rqbuffer[acb->rqbuf_putIndex];
2295                 *pQbuffer = *buf1;
2296                 acb->rqbuf_putIndex++;
2297                 /* if last, index number set it to 0 */
2298                 acb->rqbuf_putIndex %= ARCMSR_MAX_QBUFFER;
2299                 buf1++;
2300                 iop_len--;
2301         }
2302         kfree(buf2);
2303         /* let IOP know data has been read */
2304         arcmsr_iop_message_read(acb);
2305         return 1;
2306 }
2307
2308 uint32_t
2309 arcmsr_Read_iop_rqbuffer_data(struct AdapterControlBlock *acb,
2310         struct QBUFFER __iomem *prbuffer) {
2311
2312         uint8_t *pQbuffer;
2313         uint8_t __iomem *iop_data;
2314         uint32_t iop_len;
2315
2316         if (acb->adapter_type > ACB_ADAPTER_TYPE_B)
2317                 return arcmsr_Read_iop_rqbuffer_in_DWORD(acb, prbuffer);
2318         iop_data = (uint8_t __iomem *)prbuffer->data;
2319         iop_len = readl(&prbuffer->data_len);
2320         while (iop_len > 0) {
2321                 pQbuffer = &acb->rqbuffer[acb->rqbuf_putIndex];
2322                 *pQbuffer = readb(iop_data);
2323                 acb->rqbuf_putIndex++;
2324                 acb->rqbuf_putIndex %= ARCMSR_MAX_QBUFFER;
2325                 iop_data++;
2326                 iop_len--;
2327         }
2328         arcmsr_iop_message_read(acb);
2329         return 1;
2330 }
2331
2332 static void arcmsr_iop2drv_data_wrote_handle(struct AdapterControlBlock *acb)
2333 {
2334         unsigned long flags;
2335         struct QBUFFER __iomem  *prbuffer;
2336         int32_t buf_empty_len;
2337
2338         spin_lock_irqsave(&acb->rqbuffer_lock, flags);
2339         prbuffer = arcmsr_get_iop_rqbuffer(acb);
2340         if (acb->rqbuf_putIndex >= acb->rqbuf_getIndex) {
2341                 buf_empty_len = (ARCMSR_MAX_QBUFFER - 1) -
2342                 (acb->rqbuf_putIndex - acb->rqbuf_getIndex);
2343         } else
2344                 buf_empty_len = acb->rqbuf_getIndex - acb->rqbuf_putIndex - 1;
2345         if (buf_empty_len >= readl(&prbuffer->data_len)) {
2346                 if (arcmsr_Read_iop_rqbuffer_data(acb, prbuffer) == 0)
2347                         acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW;
2348         } else
2349                 acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW;
2350         spin_unlock_irqrestore(&acb->rqbuffer_lock, flags);
2351 }
2352
2353 static void arcmsr_write_ioctldata2iop_in_DWORD(struct AdapterControlBlock *acb)
2354 {
2355         uint8_t *pQbuffer;
2356         struct QBUFFER __iomem *pwbuffer;
2357         uint8_t *buf1 = NULL;
2358         uint32_t __iomem *iop_data;
2359         uint32_t allxfer_len = 0, data_len, *buf2 = NULL, data;
2360
2361         if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_READED) {
2362                 buf1 = kmalloc(128, GFP_ATOMIC);
2363                 buf2 = (uint32_t *)buf1;
2364                 if (buf1 == NULL)
2365                         return;
2366
2367                 acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED);
2368                 pwbuffer = arcmsr_get_iop_wqbuffer(acb);
2369                 iop_data = (uint32_t __iomem *)pwbuffer->data;
2370                 while ((acb->wqbuf_getIndex != acb->wqbuf_putIndex)
2371                         && (allxfer_len < 124)) {
2372                         pQbuffer = &acb->wqbuffer[acb->wqbuf_getIndex];
2373                         *buf1 = *pQbuffer;
2374                         acb->wqbuf_getIndex++;
2375                         acb->wqbuf_getIndex %= ARCMSR_MAX_QBUFFER;
2376                         buf1++;
2377                         allxfer_len++;
2378                 }
2379                 data_len = allxfer_len;
2380                 buf1 = (uint8_t *)buf2;
2381                 while (data_len >= 4) {
2382                         data = *buf2++;
2383                         writel(data, iop_data);
2384                         iop_data++;
2385                         data_len -= 4;
2386                 }
2387                 if (data_len) {
2388                         data = *buf2;
2389                         writel(data, iop_data);
2390                 }
2391                 writel(allxfer_len, &pwbuffer->data_len);
2392                 kfree(buf1);
2393                 arcmsr_iop_message_wrote(acb);
2394         }
2395 }
2396
2397 void
2398 arcmsr_write_ioctldata2iop(struct AdapterControlBlock *acb)
2399 {
2400         uint8_t *pQbuffer;
2401         struct QBUFFER __iomem *pwbuffer;
2402         uint8_t __iomem *iop_data;
2403         int32_t allxfer_len = 0;
2404
2405         if (acb->adapter_type > ACB_ADAPTER_TYPE_B) {
2406                 arcmsr_write_ioctldata2iop_in_DWORD(acb);
2407                 return;
2408         }
2409         if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_READED) {
2410                 acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED);
2411                 pwbuffer = arcmsr_get_iop_wqbuffer(acb);
2412                 iop_data = (uint8_t __iomem *)pwbuffer->data;
2413                 while ((acb->wqbuf_getIndex != acb->wqbuf_putIndex)
2414                         && (allxfer_len < 124)) {
2415                         pQbuffer = &acb->wqbuffer[acb->wqbuf_getIndex];
2416                         writeb(*pQbuffer, iop_data);
2417                         acb->wqbuf_getIndex++;
2418                         acb->wqbuf_getIndex %= ARCMSR_MAX_QBUFFER;
2419                         iop_data++;
2420                         allxfer_len++;
2421                 }
2422                 writel(allxfer_len, &pwbuffer->data_len);
2423                 arcmsr_iop_message_wrote(acb);
2424         }
2425 }
2426
2427 static void arcmsr_iop2drv_data_read_handle(struct AdapterControlBlock *acb)
2428 {
2429         unsigned long flags;
2430
2431         spin_lock_irqsave(&acb->wqbuffer_lock, flags);
2432         acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_READED;
2433         if (acb->wqbuf_getIndex != acb->wqbuf_putIndex)
2434                 arcmsr_write_ioctldata2iop(acb);
2435         if (acb->wqbuf_getIndex == acb->wqbuf_putIndex)
2436                 acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_CLEARED;
2437         spin_unlock_irqrestore(&acb->wqbuffer_lock, flags);
2438 }
2439
2440 static void arcmsr_hbaA_doorbell_isr(struct AdapterControlBlock *acb)
2441 {
2442         uint32_t outbound_doorbell;
2443         struct MessageUnit_A __iomem *reg = acb->pmuA;
2444         outbound_doorbell = readl(&reg->outbound_doorbell);
2445         do {
2446                 writel(outbound_doorbell, &reg->outbound_doorbell);
2447                 if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK)
2448                         arcmsr_iop2drv_data_wrote_handle(acb);
2449                 if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_READ_OK)
2450                         arcmsr_iop2drv_data_read_handle(acb);
2451                 outbound_doorbell = readl(&reg->outbound_doorbell);
2452         } while (outbound_doorbell & (ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK
2453                 | ARCMSR_OUTBOUND_IOP331_DATA_READ_OK));
2454 }
2455 static void arcmsr_hbaC_doorbell_isr(struct AdapterControlBlock *pACB)
2456 {
2457         uint32_t outbound_doorbell;
2458         struct MessageUnit_C __iomem *reg = pACB->pmuC;
2459         /*
2460         *******************************************************************
2461         **  Maybe here we need to check wrqbuffer_lock is lock or not
2462         **  DOORBELL: din! don!
2463         **  check if there are any mail need to pack from firmware
2464         *******************************************************************
2465         */
2466         outbound_doorbell = readl(&reg->outbound_doorbell);
2467         do {
2468                 writel(outbound_doorbell, &reg->outbound_doorbell_clear);
2469                 readl(&reg->outbound_doorbell_clear);
2470                 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_DATA_WRITE_OK)
2471                         arcmsr_iop2drv_data_wrote_handle(pACB);
2472                 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_DATA_READ_OK)
2473                         arcmsr_iop2drv_data_read_handle(pACB);
2474                 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE)
2475                         arcmsr_hbaC_message_isr(pACB);
2476                 outbound_doorbell = readl(&reg->outbound_doorbell);
2477         } while (outbound_doorbell & (ARCMSR_HBCMU_IOP2DRV_DATA_WRITE_OK
2478                 | ARCMSR_HBCMU_IOP2DRV_DATA_READ_OK
2479                 | ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE));
2480 }
2481
2482 static void arcmsr_hbaD_doorbell_isr(struct AdapterControlBlock *pACB)
2483 {
2484         uint32_t outbound_doorbell;
2485         struct MessageUnit_D  *pmu = pACB->pmuD;
2486
2487         outbound_doorbell = readl(pmu->outbound_doorbell);
2488         do {
2489                 writel(outbound_doorbell, pmu->outbound_doorbell);
2490                 if (outbound_doorbell & ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE)
2491                         arcmsr_hbaD_message_isr(pACB);
2492                 if (outbound_doorbell & ARCMSR_ARC1214_IOP2DRV_DATA_WRITE_OK)
2493                         arcmsr_iop2drv_data_wrote_handle(pACB);
2494                 if (outbound_doorbell & ARCMSR_ARC1214_IOP2DRV_DATA_READ_OK)
2495                         arcmsr_iop2drv_data_read_handle(pACB);
2496                 outbound_doorbell = readl(pmu->outbound_doorbell);
2497         } while (outbound_doorbell & (ARCMSR_ARC1214_IOP2DRV_DATA_WRITE_OK
2498                 | ARCMSR_ARC1214_IOP2DRV_DATA_READ_OK
2499                 | ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE));
2500 }
2501
2502 static void arcmsr_hbaE_doorbell_isr(struct AdapterControlBlock *pACB)
2503 {
2504         uint32_t outbound_doorbell, in_doorbell, tmp, i;
2505         struct MessageUnit_E __iomem *reg = pACB->pmuE;
2506
2507         if (pACB->adapter_type == ACB_ADAPTER_TYPE_F) {
2508                 for (i = 0; i < 5; i++) {
2509                         in_doorbell = readl(&reg->iobound_doorbell);
2510                         if (in_doorbell != 0)
2511                                 break;
2512                 }
2513         } else
2514                 in_doorbell = readl(&reg->iobound_doorbell);
2515         outbound_doorbell = in_doorbell ^ pACB->in_doorbell;
2516         do {
2517                 writel(0, &reg->host_int_status); /* clear interrupt */
2518                 if (outbound_doorbell & ARCMSR_HBEMU_IOP2DRV_DATA_WRITE_OK) {
2519                         arcmsr_iop2drv_data_wrote_handle(pACB);
2520                 }
2521                 if (outbound_doorbell & ARCMSR_HBEMU_IOP2DRV_DATA_READ_OK) {
2522                         arcmsr_iop2drv_data_read_handle(pACB);
2523                 }
2524                 if (outbound_doorbell & ARCMSR_HBEMU_IOP2DRV_MESSAGE_CMD_DONE) {
2525                         arcmsr_hbaE_message_isr(pACB);
2526                 }
2527                 tmp = in_doorbell;
2528                 in_doorbell = readl(&reg->iobound_doorbell);
2529                 outbound_doorbell = tmp ^ in_doorbell;
2530         } while (outbound_doorbell & (ARCMSR_HBEMU_IOP2DRV_DATA_WRITE_OK
2531                 | ARCMSR_HBEMU_IOP2DRV_DATA_READ_OK
2532                 | ARCMSR_HBEMU_IOP2DRV_MESSAGE_CMD_DONE));
2533         pACB->in_doorbell = in_doorbell;
2534 }
2535
2536 static void arcmsr_hbaA_postqueue_isr(struct AdapterControlBlock *acb)
2537 {
2538         uint32_t flag_ccb;
2539         struct MessageUnit_A __iomem *reg = acb->pmuA;
2540         struct ARCMSR_CDB *pARCMSR_CDB;
2541         struct CommandControlBlock *pCCB;
2542         bool error;
2543         unsigned long cdb_phy_addr;
2544
2545         while ((flag_ccb = readl(&reg->outbound_queueport)) != 0xFFFFFFFF) {
2546                 cdb_phy_addr = (flag_ccb << 5) & 0xffffffff;
2547                 if (acb->cdb_phyadd_hipart)
2548                         cdb_phy_addr = cdb_phy_addr | acb->cdb_phyadd_hipart;
2549                 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset + cdb_phy_addr);
2550                 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
2551                 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
2552                 arcmsr_drain_donequeue(acb, pCCB, error);
2553         }
2554 }
2555 static void arcmsr_hbaB_postqueue_isr(struct AdapterControlBlock *acb)
2556 {
2557         uint32_t index;
2558         uint32_t flag_ccb;
2559         struct MessageUnit_B *reg = acb->pmuB;
2560         struct ARCMSR_CDB *pARCMSR_CDB;
2561         struct CommandControlBlock *pCCB;
2562         bool error;
2563         unsigned long cdb_phy_addr;
2564
2565         index = reg->doneq_index;
2566         while ((flag_ccb = reg->done_qbuffer[index]) != 0) {
2567                 cdb_phy_addr = (flag_ccb << 5) & 0xffffffff;
2568                 if (acb->cdb_phyadd_hipart)
2569                         cdb_phy_addr = cdb_phy_addr | acb->cdb_phyadd_hipart;
2570                 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset + cdb_phy_addr);
2571                 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
2572                 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
2573                 arcmsr_drain_donequeue(acb, pCCB, error);
2574                 reg->done_qbuffer[index] = 0;
2575                 index++;
2576                 index %= ARCMSR_MAX_HBB_POSTQUEUE;
2577                 reg->doneq_index = index;
2578         }
2579 }
2580
2581 static void arcmsr_hbaC_postqueue_isr(struct AdapterControlBlock *acb)
2582 {
2583         struct MessageUnit_C __iomem *phbcmu;
2584         struct ARCMSR_CDB *arcmsr_cdb;
2585         struct CommandControlBlock *ccb;
2586         uint32_t flag_ccb, throttling = 0;
2587         unsigned long ccb_cdb_phy;
2588         int error;
2589
2590         phbcmu = acb->pmuC;
2591         /* areca cdb command done */
2592         /* Use correct offset and size for syncing */
2593
2594         while ((flag_ccb = readl(&phbcmu->outbound_queueport_low)) !=
2595                         0xFFFFFFFF) {
2596                 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);
2597                 if (acb->cdb_phyadd_hipart)
2598                         ccb_cdb_phy = ccb_cdb_phy | acb->cdb_phyadd_hipart;
2599                 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset
2600                         + ccb_cdb_phy);
2601                 ccb = container_of(arcmsr_cdb, struct CommandControlBlock,
2602                         arcmsr_cdb);
2603                 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1)
2604                         ? true : false;
2605                 /* check if command done with no error */
2606                 arcmsr_drain_donequeue(acb, ccb, error);
2607                 throttling++;
2608                 if (throttling == ARCMSR_HBC_ISR_THROTTLING_LEVEL) {
2609                         writel(ARCMSR_HBCMU_DRV2IOP_POSTQUEUE_THROTTLING,
2610                                 &phbcmu->inbound_doorbell);
2611                         throttling = 0;
2612                 }
2613         }
2614 }
2615
2616 static void arcmsr_hbaD_postqueue_isr(struct AdapterControlBlock *acb)
2617 {
2618         u32 outbound_write_pointer, doneq_index, index_stripped, toggle;
2619         uint32_t addressLow;
2620         int error;
2621         struct MessageUnit_D  *pmu;
2622         struct ARCMSR_CDB *arcmsr_cdb;
2623         struct CommandControlBlock *ccb;
2624         unsigned long flags, ccb_cdb_phy;
2625
2626         spin_lock_irqsave(&acb->doneq_lock, flags);
2627         pmu = acb->pmuD;
2628         outbound_write_pointer = pmu->done_qbuffer[0].addressLow + 1;
2629         doneq_index = pmu->doneq_index;
2630         if ((doneq_index & 0xFFF) != (outbound_write_pointer & 0xFFF)) {
2631                 do {
2632                         toggle = doneq_index & 0x4000;
2633                         index_stripped = (doneq_index & 0xFFF) + 1;
2634                         index_stripped %= ARCMSR_MAX_ARC1214_DONEQUEUE;
2635                         pmu->doneq_index = index_stripped ? (index_stripped | toggle) :
2636                                 ((toggle ^ 0x4000) + 1);
2637                         doneq_index = pmu->doneq_index;
2638                         addressLow = pmu->done_qbuffer[doneq_index &
2639                                 0xFFF].addressLow;
2640                         ccb_cdb_phy = (addressLow & 0xFFFFFFF0);
2641                         if (acb->cdb_phyadd_hipart)
2642                                 ccb_cdb_phy = ccb_cdb_phy | acb->cdb_phyadd_hipart;
2643                         arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset
2644                                 + ccb_cdb_phy);
2645                         ccb = container_of(arcmsr_cdb,
2646                                 struct CommandControlBlock, arcmsr_cdb);
2647                         error = (addressLow & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1)
2648                                 ? true : false;
2649                         arcmsr_drain_donequeue(acb, ccb, error);
2650                         writel(doneq_index, pmu->outboundlist_read_pointer);
2651                 } while ((doneq_index & 0xFFF) !=
2652                         (outbound_write_pointer & 0xFFF));
2653         }
2654         writel(ARCMSR_ARC1214_OUTBOUND_LIST_INTERRUPT_CLEAR,
2655                 pmu->outboundlist_interrupt_cause);
2656         readl(pmu->outboundlist_interrupt_cause);
2657         spin_unlock_irqrestore(&acb->doneq_lock, flags);
2658 }
2659
2660 static void arcmsr_hbaE_postqueue_isr(struct AdapterControlBlock *acb)
2661 {
2662         uint32_t doneq_index;
2663         uint16_t cmdSMID;
2664         int error;
2665         struct MessageUnit_E __iomem *pmu;
2666         struct CommandControlBlock *ccb;
2667         unsigned long flags;
2668
2669         spin_lock_irqsave(&acb->doneq_lock, flags);
2670         doneq_index = acb->doneq_index;
2671         pmu = acb->pmuE;
2672         while ((readl(&pmu->reply_post_producer_index) & 0xFFFF) != doneq_index) {
2673                 cmdSMID = acb->pCompletionQ[doneq_index].cmdSMID;
2674                 ccb = acb->pccb_pool[cmdSMID];
2675                 error = (acb->pCompletionQ[doneq_index].cmdFlag
2676                         & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
2677                 arcmsr_drain_donequeue(acb, ccb, error);
2678                 doneq_index++;
2679                 if (doneq_index >= acb->completionQ_entry)
2680                         doneq_index = 0;
2681         }
2682         acb->doneq_index = doneq_index;
2683         writel(doneq_index, &pmu->reply_post_consumer_index);
2684         spin_unlock_irqrestore(&acb->doneq_lock, flags);
2685 }
2686
2687 static void arcmsr_hbaF_postqueue_isr(struct AdapterControlBlock *acb)
2688 {
2689         uint32_t doneq_index;
2690         uint16_t cmdSMID;
2691         int error;
2692         struct MessageUnit_F __iomem *phbcmu;
2693         struct CommandControlBlock *ccb;
2694         unsigned long flags;
2695
2696         spin_lock_irqsave(&acb->doneq_lock, flags);
2697         doneq_index = acb->doneq_index;
2698         phbcmu = acb->pmuF;
2699         while (1) {
2700                 cmdSMID = acb->pCompletionQ[doneq_index].cmdSMID;
2701                 if (cmdSMID == 0xffff)
2702                         break;
2703                 ccb = acb->pccb_pool[cmdSMID];
2704                 error = (acb->pCompletionQ[doneq_index].cmdFlag &
2705                         ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
2706                 arcmsr_drain_donequeue(acb, ccb, error);
2707                 acb->pCompletionQ[doneq_index].cmdSMID = 0xffff;
2708                 doneq_index++;
2709                 if (doneq_index >= acb->completionQ_entry)
2710                         doneq_index = 0;
2711         }
2712         acb->doneq_index = doneq_index;
2713         writel(doneq_index, &phbcmu->reply_post_consumer_index);
2714         spin_unlock_irqrestore(&acb->doneq_lock, flags);
2715 }
2716
2717 /*
2718 **********************************************************************************
2719 ** Handle a message interrupt
2720 **
2721 ** The only message interrupt we expect is in response to a query for the current adapter config.
2722 ** We want this in order to compare the drivemap so that we can detect newly-attached drives.
2723 **********************************************************************************
2724 */
2725 static void arcmsr_hbaA_message_isr(struct AdapterControlBlock *acb)
2726 {
2727         struct MessageUnit_A __iomem *reg  = acb->pmuA;
2728         /*clear interrupt and message state*/
2729         writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT, &reg->outbound_intstatus);
2730         if (acb->acb_flags & ACB_F_MSG_GET_CONFIG)
2731                 schedule_work(&acb->arcmsr_do_message_isr_bh);
2732 }
2733 static void arcmsr_hbaB_message_isr(struct AdapterControlBlock *acb)
2734 {
2735         struct MessageUnit_B *reg  = acb->pmuB;
2736
2737         /*clear interrupt and message state*/
2738         writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
2739         if (acb->acb_flags & ACB_F_MSG_GET_CONFIG)
2740                 schedule_work(&acb->arcmsr_do_message_isr_bh);
2741 }
2742 /*
2743 **********************************************************************************
2744 ** Handle a message interrupt
2745 **
2746 ** The only message interrupt we expect is in response to a query for the
2747 ** current adapter config.
2748 ** We want this in order to compare the drivemap so that we can detect newly-attached drives.
2749 **********************************************************************************
2750 */
2751 static void arcmsr_hbaC_message_isr(struct AdapterControlBlock *acb)
2752 {
2753         struct MessageUnit_C __iomem *reg  = acb->pmuC;
2754         /*clear interrupt and message state*/
2755         writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, &reg->outbound_doorbell_clear);
2756         if (acb->acb_flags & ACB_F_MSG_GET_CONFIG)
2757                 schedule_work(&acb->arcmsr_do_message_isr_bh);
2758 }
2759
2760 static void arcmsr_hbaD_message_isr(struct AdapterControlBlock *acb)
2761 {
2762         struct MessageUnit_D *reg  = acb->pmuD;
2763
2764         writel(ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE, reg->outbound_doorbell);
2765         readl(reg->outbound_doorbell);
2766         if (acb->acb_flags & ACB_F_MSG_GET_CONFIG)
2767                 schedule_work(&acb->arcmsr_do_message_isr_bh);
2768 }
2769
2770 static void arcmsr_hbaE_message_isr(struct AdapterControlBlock *acb)
2771 {
2772         struct MessageUnit_E __iomem *reg  = acb->pmuE;
2773
2774         writel(0, &reg->host_int_status);
2775         if (acb->acb_flags & ACB_F_MSG_GET_CONFIG)
2776                 schedule_work(&acb->arcmsr_do_message_isr_bh);
2777 }
2778
2779 static int arcmsr_hbaA_handle_isr(struct AdapterControlBlock *acb)
2780 {
2781         uint32_t outbound_intstatus;
2782         struct MessageUnit_A __iomem *reg = acb->pmuA;
2783         outbound_intstatus = readl(&reg->outbound_intstatus) &
2784                 acb->outbound_int_enable;
2785         if (!(outbound_intstatus & ARCMSR_MU_OUTBOUND_HANDLE_INT))
2786                 return IRQ_NONE;
2787         do {
2788                 writel(outbound_intstatus, &reg->outbound_intstatus);
2789                 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_DOORBELL_INT)
2790                         arcmsr_hbaA_doorbell_isr(acb);
2791                 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_POSTQUEUE_INT)
2792                         arcmsr_hbaA_postqueue_isr(acb);
2793                 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_MESSAGE0_INT)
2794                         arcmsr_hbaA_message_isr(acb);
2795                 outbound_intstatus = readl(&reg->outbound_intstatus) &
2796                         acb->outbound_int_enable;
2797         } while (outbound_intstatus & (ARCMSR_MU_OUTBOUND_DOORBELL_INT
2798                 | ARCMSR_MU_OUTBOUND_POSTQUEUE_INT
2799                 | ARCMSR_MU_OUTBOUND_MESSAGE0_INT));
2800         return IRQ_HANDLED;
2801 }
2802
2803 static int arcmsr_hbaB_handle_isr(struct AdapterControlBlock *acb)
2804 {
2805         uint32_t outbound_doorbell;
2806         struct MessageUnit_B *reg = acb->pmuB;
2807         outbound_doorbell = readl(reg->iop2drv_doorbell) &
2808                                 acb->outbound_int_enable;
2809         if (!outbound_doorbell)
2810                 return IRQ_NONE;
2811         do {
2812                 writel(~outbound_doorbell, reg->iop2drv_doorbell);
2813                 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell);
2814                 if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_WRITE_OK)
2815                         arcmsr_iop2drv_data_wrote_handle(acb);
2816                 if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_READ_OK)
2817                         arcmsr_iop2drv_data_read_handle(acb);
2818                 if (outbound_doorbell & ARCMSR_IOP2DRV_CDB_DONE)
2819                         arcmsr_hbaB_postqueue_isr(acb);
2820                 if (outbound_doorbell & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE)
2821                         arcmsr_hbaB_message_isr(acb);
2822                 outbound_doorbell = readl(reg->iop2drv_doorbell) &
2823                         acb->outbound_int_enable;
2824         } while (outbound_doorbell & (ARCMSR_IOP2DRV_DATA_WRITE_OK
2825                 | ARCMSR_IOP2DRV_DATA_READ_OK
2826                 | ARCMSR_IOP2DRV_CDB_DONE
2827                 | ARCMSR_IOP2DRV_MESSAGE_CMD_DONE));
2828         return IRQ_HANDLED;
2829 }
2830
2831 static int arcmsr_hbaC_handle_isr(struct AdapterControlBlock *pACB)
2832 {
2833         uint32_t host_interrupt_status;
2834         struct MessageUnit_C __iomem *phbcmu = pACB->pmuC;
2835         /*
2836         *********************************************
2837         **   check outbound intstatus
2838         *********************************************
2839         */
2840         host_interrupt_status = readl(&phbcmu->host_int_status) &
2841                 (ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR |
2842                 ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR);
2843         if (!host_interrupt_status)
2844                 return IRQ_NONE;
2845         do {
2846                 if (host_interrupt_status & ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR)
2847                         arcmsr_hbaC_doorbell_isr(pACB);
2848                 /* MU post queue interrupts*/
2849                 if (host_interrupt_status & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR)
2850                         arcmsr_hbaC_postqueue_isr(pACB);
2851                 host_interrupt_status = readl(&phbcmu->host_int_status);
2852         } while (host_interrupt_status & (ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR |
2853                 ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR));
2854         return IRQ_HANDLED;
2855 }
2856
2857 static irqreturn_t arcmsr_hbaD_handle_isr(struct AdapterControlBlock *pACB)
2858 {
2859         u32 host_interrupt_status;
2860         struct MessageUnit_D  *pmu = pACB->pmuD;
2861
2862         host_interrupt_status = readl(pmu->host_int_status) &
2863                 (ARCMSR_ARC1214_OUTBOUND_POSTQUEUE_ISR |
2864                 ARCMSR_ARC1214_OUTBOUND_DOORBELL_ISR);
2865         if (!host_interrupt_status)
2866                 return IRQ_NONE;
2867         do {
2868                 /* MU post queue interrupts*/
2869                 if (host_interrupt_status &
2870                         ARCMSR_ARC1214_OUTBOUND_POSTQUEUE_ISR)
2871                         arcmsr_hbaD_postqueue_isr(pACB);
2872                 if (host_interrupt_status &
2873                         ARCMSR_ARC1214_OUTBOUND_DOORBELL_ISR)
2874                         arcmsr_hbaD_doorbell_isr(pACB);
2875                 host_interrupt_status = readl(pmu->host_int_status);
2876         } while (host_interrupt_status &
2877                 (ARCMSR_ARC1214_OUTBOUND_POSTQUEUE_ISR |
2878                 ARCMSR_ARC1214_OUTBOUND_DOORBELL_ISR));
2879         return IRQ_HANDLED;
2880 }
2881
2882 static irqreturn_t arcmsr_hbaE_handle_isr(struct AdapterControlBlock *pACB)
2883 {
2884         uint32_t host_interrupt_status;
2885         struct MessageUnit_E __iomem *pmu = pACB->pmuE;
2886
2887         host_interrupt_status = readl(&pmu->host_int_status) &
2888                 (ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR |
2889                 ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR);
2890         if (!host_interrupt_status)
2891                 return IRQ_NONE;
2892         do {
2893                 /* MU ioctl transfer doorbell interrupts*/
2894                 if (host_interrupt_status & ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR) {
2895                         arcmsr_hbaE_doorbell_isr(pACB);
2896                 }
2897                 /* MU post queue interrupts*/
2898                 if (host_interrupt_status & ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR) {
2899                         arcmsr_hbaE_postqueue_isr(pACB);
2900                 }
2901                 host_interrupt_status = readl(&pmu->host_int_status);
2902         } while (host_interrupt_status & (ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR |
2903                 ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR));
2904         return IRQ_HANDLED;
2905 }
2906
2907 static irqreturn_t arcmsr_hbaF_handle_isr(struct AdapterControlBlock *pACB)
2908 {
2909         uint32_t host_interrupt_status;
2910         struct MessageUnit_F __iomem *phbcmu = pACB->pmuF;
2911
2912         host_interrupt_status = readl(&phbcmu->host_int_status) &
2913                 (ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR |
2914                 ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR);
2915         if (!host_interrupt_status)
2916                 return IRQ_NONE;
2917         do {
2918                 /* MU post queue interrupts*/
2919                 if (host_interrupt_status & ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR)
2920                         arcmsr_hbaF_postqueue_isr(pACB);
2921
2922                 /* MU ioctl transfer doorbell interrupts*/
2923                 if (host_interrupt_status & ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR)
2924                         arcmsr_hbaE_doorbell_isr(pACB);
2925
2926                 host_interrupt_status = readl(&phbcmu->host_int_status);
2927         } while (host_interrupt_status & (ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR |
2928                 ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR));
2929         return IRQ_HANDLED;
2930 }
2931
2932 static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb)
2933 {
2934         switch (acb->adapter_type) {
2935         case ACB_ADAPTER_TYPE_A:
2936                 return arcmsr_hbaA_handle_isr(acb);
2937         case ACB_ADAPTER_TYPE_B:
2938                 return arcmsr_hbaB_handle_isr(acb);
2939         case ACB_ADAPTER_TYPE_C:
2940                 return arcmsr_hbaC_handle_isr(acb);
2941         case ACB_ADAPTER_TYPE_D:
2942                 return arcmsr_hbaD_handle_isr(acb);
2943         case ACB_ADAPTER_TYPE_E:
2944                 return arcmsr_hbaE_handle_isr(acb);
2945         case ACB_ADAPTER_TYPE_F:
2946                 return arcmsr_hbaF_handle_isr(acb);
2947         default:
2948                 return IRQ_NONE;
2949         }
2950 }
2951
2952 static void arcmsr_iop_parking(struct AdapterControlBlock *acb)
2953 {
2954         if (acb) {
2955                 /* stop adapter background rebuild */
2956                 if (acb->acb_flags & ACB_F_MSG_START_BGRB) {
2957                         uint32_t intmask_org;
2958                         acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
2959                         intmask_org = arcmsr_disable_outbound_ints(acb);
2960                         arcmsr_stop_adapter_bgrb(acb);
2961                         arcmsr_flush_adapter_cache(acb);
2962                         arcmsr_enable_outbound_ints(acb, intmask_org);
2963                 }
2964         }
2965 }
2966
2967
2968 void arcmsr_clear_iop2drv_rqueue_buffer(struct AdapterControlBlock *acb)
2969 {
2970         uint32_t        i;
2971
2972         if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
2973                 for (i = 0; i < 15; i++) {
2974                         if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
2975                                 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
2976                                 acb->rqbuf_getIndex = 0;
2977                                 acb->rqbuf_putIndex = 0;
2978                                 arcmsr_iop_message_read(acb);
2979                                 mdelay(30);
2980                         } else if (acb->rqbuf_getIndex !=
2981                                    acb->rqbuf_putIndex) {
2982                                 acb->rqbuf_getIndex = 0;
2983                                 acb->rqbuf_putIndex = 0;
2984                                 mdelay(30);
2985                         } else
2986                                 break;
2987                 }
2988         }
2989 }
2990
2991 static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb,
2992                 struct scsi_cmnd *cmd)
2993 {
2994         char *buffer;
2995         unsigned short use_sg;
2996         int retvalue = 0, transfer_len = 0;
2997         unsigned long flags;
2998         struct CMD_MESSAGE_FIELD *pcmdmessagefld;
2999         uint32_t controlcode = (uint32_t)cmd->cmnd[5] << 24 |
3000                 (uint32_t)cmd->cmnd[6] << 16 |
3001                 (uint32_t)cmd->cmnd[7] << 8 |
3002                 (uint32_t)cmd->cmnd[8];
3003         struct scatterlist *sg;
3004
3005         use_sg = scsi_sg_count(cmd);
3006         sg = scsi_sglist(cmd);
3007         buffer = kmap_atomic(sg_page(sg)) + sg->offset;
3008         if (use_sg > 1) {
3009                 retvalue = ARCMSR_MESSAGE_FAIL;
3010                 goto message_out;
3011         }
3012         transfer_len += sg->length;
3013         if (transfer_len > sizeof(struct CMD_MESSAGE_FIELD)) {
3014                 retvalue = ARCMSR_MESSAGE_FAIL;
3015                 pr_info("%s: ARCMSR_MESSAGE_FAIL!\n", __func__);
3016                 goto message_out;
3017         }
3018         pcmdmessagefld = (struct CMD_MESSAGE_FIELD *)buffer;
3019         switch (controlcode) {
3020         case ARCMSR_MESSAGE_READ_RQBUFFER: {
3021                 unsigned char *ver_addr;
3022                 uint8_t *ptmpQbuffer;
3023                 uint32_t allxfer_len = 0;
3024                 ver_addr = kmalloc(ARCMSR_API_DATA_BUFLEN, GFP_ATOMIC);
3025                 if (!ver_addr) {
3026                         retvalue = ARCMSR_MESSAGE_FAIL;
3027                         pr_info("%s: memory not enough!\n", __func__);
3028                         goto message_out;
3029                 }
3030                 ptmpQbuffer = ver_addr;
3031                 spin_lock_irqsave(&acb->rqbuffer_lock, flags);
3032                 if (acb->rqbuf_getIndex != acb->rqbuf_putIndex) {
3033                         unsigned int tail = acb->rqbuf_getIndex;
3034                         unsigned int head = acb->rqbuf_putIndex;
3035                         unsigned int cnt_to_end = CIRC_CNT_TO_END(head, tail, ARCMSR_MAX_QBUFFER);
3036
3037                         allxfer_len = CIRC_CNT(head, tail, ARCMSR_MAX_QBUFFER);
3038                         if (allxfer_len > ARCMSR_API_DATA_BUFLEN)
3039                                 allxfer_len = ARCMSR_API_DATA_BUFLEN;
3040
3041                         if (allxfer_len <= cnt_to_end)
3042                                 memcpy(ptmpQbuffer, acb->rqbuffer + tail, allxfer_len);
3043                         else {
3044                                 memcpy(ptmpQbuffer, acb->rqbuffer + tail, cnt_to_end);
3045                                 memcpy(ptmpQbuffer + cnt_to_end, acb->rqbuffer, allxfer_len - cnt_to_end);
3046                         }
3047                         acb->rqbuf_getIndex = (acb->rqbuf_getIndex + allxfer_len) % ARCMSR_MAX_QBUFFER;
3048                 }
3049                 memcpy(pcmdmessagefld->messagedatabuffer, ver_addr,
3050                         allxfer_len);
3051                 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
3052                         struct QBUFFER __iomem *prbuffer;
3053                         acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
3054                         prbuffer = arcmsr_get_iop_rqbuffer(acb);
3055                         if (arcmsr_Read_iop_rqbuffer_data(acb, prbuffer) == 0)
3056                                 acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW;
3057                 }
3058                 spin_unlock_irqrestore(&acb->rqbuffer_lock, flags);
3059                 kfree(ver_addr);
3060                 pcmdmessagefld->cmdmessage.Length = allxfer_len;
3061                 if (acb->fw_flag == FW_DEADLOCK)
3062                         pcmdmessagefld->cmdmessage.ReturnCode =
3063                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
3064                 else
3065                         pcmdmessagefld->cmdmessage.ReturnCode =
3066                                 ARCMSR_MESSAGE_RETURNCODE_OK;
3067                 break;
3068         }
3069         case ARCMSR_MESSAGE_WRITE_WQBUFFER: {
3070                 unsigned char *ver_addr;
3071                 uint32_t user_len;
3072                 int32_t cnt2end;
3073                 uint8_t *pQbuffer, *ptmpuserbuffer;
3074
3075                 user_len = pcmdmessagefld->cmdmessage.Length;
3076                 if (user_len > ARCMSR_API_DATA_BUFLEN) {
3077                         retvalue = ARCMSR_MESSAGE_FAIL;
3078                         goto message_out;
3079                 }
3080
3081                 ver_addr = kmalloc(ARCMSR_API_DATA_BUFLEN, GFP_ATOMIC);
3082                 if (!ver_addr) {
3083                         retvalue = ARCMSR_MESSAGE_FAIL;
3084                         goto message_out;
3085                 }
3086                 ptmpuserbuffer = ver_addr;
3087
3088                 memcpy(ptmpuserbuffer,
3089                         pcmdmessagefld->messagedatabuffer, user_len);
3090                 spin_lock_irqsave(&acb->wqbuffer_lock, flags);
3091                 if (acb->wqbuf_putIndex != acb->wqbuf_getIndex) {
3092                         struct SENSE_DATA *sensebuffer =
3093                                 (struct SENSE_DATA *)cmd->sense_buffer;
3094                         arcmsr_write_ioctldata2iop(acb);
3095                         /* has error report sensedata */
3096                         sensebuffer->ErrorCode = SCSI_SENSE_CURRENT_ERRORS;
3097                         sensebuffer->SenseKey = ILLEGAL_REQUEST;
3098                         sensebuffer->AdditionalSenseLength = 0x0A;
3099                         sensebuffer->AdditionalSenseCode = 0x20;
3100                         sensebuffer->Valid = 1;
3101                         retvalue = ARCMSR_MESSAGE_FAIL;
3102                 } else {
3103                         pQbuffer = &acb->wqbuffer[acb->wqbuf_putIndex];
3104                         cnt2end = ARCMSR_MAX_QBUFFER - acb->wqbuf_putIndex;
3105                         if (user_len > cnt2end) {
3106                                 memcpy(pQbuffer, ptmpuserbuffer, cnt2end);
3107                                 ptmpuserbuffer += cnt2end;
3108                                 user_len -= cnt2end;
3109                                 acb->wqbuf_putIndex = 0;
3110                                 pQbuffer = acb->wqbuffer;
3111                         }
3112                         memcpy(pQbuffer, ptmpuserbuffer, user_len);
3113                         acb->wqbuf_putIndex += user_len;
3114                         acb->wqbuf_putIndex %= ARCMSR_MAX_QBUFFER;
3115                         if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_CLEARED) {
3116                                 acb->acb_flags &=
3117                                                 ~ACB_F_MESSAGE_WQBUFFER_CLEARED;
3118                                 arcmsr_write_ioctldata2iop(acb);
3119                         }
3120                 }
3121                 spin_unlock_irqrestore(&acb->wqbuffer_lock, flags);
3122                 kfree(ver_addr);
3123                 if (acb->fw_flag == FW_DEADLOCK)
3124                         pcmdmessagefld->cmdmessage.ReturnCode =
3125                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
3126                 else
3127                         pcmdmessagefld->cmdmessage.ReturnCode =
3128                                 ARCMSR_MESSAGE_RETURNCODE_OK;
3129                 break;
3130         }
3131         case ARCMSR_MESSAGE_CLEAR_RQBUFFER: {
3132                 uint8_t *pQbuffer = acb->rqbuffer;
3133
3134                 arcmsr_clear_iop2drv_rqueue_buffer(acb);
3135                 spin_lock_irqsave(&acb->rqbuffer_lock, flags);
3136                 acb->acb_flags |= ACB_F_MESSAGE_RQBUFFER_CLEARED;
3137                 acb->rqbuf_getIndex = 0;
3138                 acb->rqbuf_putIndex = 0;
3139                 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER);
3140                 spin_unlock_irqrestore(&acb->rqbuffer_lock, flags);
3141                 if (acb->fw_flag == FW_DEADLOCK)
3142                         pcmdmessagefld->cmdmessage.ReturnCode =
3143                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
3144                 else
3145                         pcmdmessagefld->cmdmessage.ReturnCode =
3146                                 ARCMSR_MESSAGE_RETURNCODE_OK;
3147                 break;
3148         }
3149         case ARCMSR_MESSAGE_CLEAR_WQBUFFER: {
3150                 uint8_t *pQbuffer = acb->wqbuffer;
3151                 spin_lock_irqsave(&acb->wqbuffer_lock, flags);
3152                 acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED |
3153                         ACB_F_MESSAGE_WQBUFFER_READED);
3154                 acb->wqbuf_getIndex = 0;
3155                 acb->wqbuf_putIndex = 0;
3156                 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER);
3157                 spin_unlock_irqrestore(&acb->wqbuffer_lock, flags);
3158                 if (acb->fw_flag == FW_DEADLOCK)
3159                         pcmdmessagefld->cmdmessage.ReturnCode =
3160                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
3161                 else
3162                         pcmdmessagefld->cmdmessage.ReturnCode =
3163                                 ARCMSR_MESSAGE_RETURNCODE_OK;
3164                 break;
3165         }
3166         case ARCMSR_MESSAGE_CLEAR_ALLQBUFFER: {
3167                 uint8_t *pQbuffer;
3168                 arcmsr_clear_iop2drv_rqueue_buffer(acb);
3169                 spin_lock_irqsave(&acb->rqbuffer_lock, flags);
3170                 acb->acb_flags |= ACB_F_MESSAGE_RQBUFFER_CLEARED;
3171                 acb->rqbuf_getIndex = 0;
3172                 acb->rqbuf_putIndex = 0;
3173                 pQbuffer = acb->rqbuffer;
3174                 memset(pQbuffer, 0, sizeof(struct QBUFFER));
3175                 spin_unlock_irqrestore(&acb->rqbuffer_lock, flags);
3176                 spin_lock_irqsave(&acb->wqbuffer_lock, flags);
3177                 acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED |
3178                         ACB_F_MESSAGE_WQBUFFER_READED);
3179                 acb->wqbuf_getIndex = 0;
3180                 acb->wqbuf_putIndex = 0;
3181                 pQbuffer = acb->wqbuffer;
3182                 memset(pQbuffer, 0, sizeof(struct QBUFFER));
3183                 spin_unlock_irqrestore(&acb->wqbuffer_lock, flags);
3184                 if (acb->fw_flag == FW_DEADLOCK)
3185                         pcmdmessagefld->cmdmessage.ReturnCode =
3186                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
3187                 else
3188                         pcmdmessagefld->cmdmessage.ReturnCode =
3189                                 ARCMSR_MESSAGE_RETURNCODE_OK;
3190                 break;
3191         }
3192         case ARCMSR_MESSAGE_RETURN_CODE_3F: {
3193                 if (acb->fw_flag == FW_DEADLOCK)
3194                         pcmdmessagefld->cmdmessage.ReturnCode =
3195                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
3196                 else
3197                         pcmdmessagefld->cmdmessage.ReturnCode =
3198                                 ARCMSR_MESSAGE_RETURNCODE_3F;
3199                 break;
3200         }
3201         case ARCMSR_MESSAGE_SAY_HELLO: {
3202                 int8_t *hello_string = "Hello! I am ARCMSR";
3203                 if (acb->fw_flag == FW_DEADLOCK)
3204                         pcmdmessagefld->cmdmessage.ReturnCode =
3205                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
3206                 else
3207                         pcmdmessagefld->cmdmessage.ReturnCode =
3208                                 ARCMSR_MESSAGE_RETURNCODE_OK;
3209                 memcpy(pcmdmessagefld->messagedatabuffer,
3210                         hello_string, (int16_t)strlen(hello_string));
3211                 break;
3212         }
3213         case ARCMSR_MESSAGE_SAY_GOODBYE: {
3214                 if (acb->fw_flag == FW_DEADLOCK)
3215                         pcmdmessagefld->cmdmessage.ReturnCode =
3216                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
3217                 else
3218                         pcmdmessagefld->cmdmessage.ReturnCode =
3219                                 ARCMSR_MESSAGE_RETURNCODE_OK;
3220                 arcmsr_iop_parking(acb);
3221                 break;
3222         }
3223         case ARCMSR_MESSAGE_FLUSH_ADAPTER_CACHE: {
3224                 if (acb->fw_flag == FW_DEADLOCK)
3225                         pcmdmessagefld->cmdmessage.ReturnCode =
3226                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
3227                 else
3228                         pcmdmessagefld->cmdmessage.ReturnCode =
3229                                 ARCMSR_MESSAGE_RETURNCODE_OK;
3230                 arcmsr_flush_adapter_cache(acb);
3231                 break;
3232         }
3233         default:
3234                 retvalue = ARCMSR_MESSAGE_FAIL;
3235                 pr_info("%s: unknown controlcode!\n", __func__);
3236         }
3237 message_out:
3238         if (use_sg) {
3239                 struct scatterlist *sg = scsi_sglist(cmd);
3240                 kunmap_atomic(buffer - sg->offset);
3241         }
3242         return retvalue;
3243 }
3244
3245 static struct CommandControlBlock *arcmsr_get_freeccb(struct AdapterControlBlock *acb)
3246 {
3247         struct list_head *head;
3248         struct CommandControlBlock *ccb = NULL;
3249         unsigned long flags;
3250
3251         spin_lock_irqsave(&acb->ccblist_lock, flags);
3252         head = &acb->ccb_free_list;
3253         if (!list_empty(head)) {
3254                 ccb = list_entry(head->next, struct CommandControlBlock, list);
3255                 list_del_init(&ccb->list);
3256         }else{
3257                 spin_unlock_irqrestore(&acb->ccblist_lock, flags);
3258                 return NULL;
3259         }
3260         spin_unlock_irqrestore(&acb->ccblist_lock, flags);
3261         return ccb;
3262 }
3263
3264 static void arcmsr_handle_virtual_command(struct AdapterControlBlock *acb,
3265                 struct scsi_cmnd *cmd)
3266 {
3267         switch (cmd->cmnd[0]) {
3268         case INQUIRY: {
3269                 unsigned char inqdata[36];
3270                 char *buffer;
3271                 struct scatterlist *sg;
3272
3273                 if (cmd->device->lun) {
3274                         cmd->result = (DID_TIME_OUT << 16);
3275                         scsi_done(cmd);
3276                         return;
3277                 }
3278                 inqdata[0] = TYPE_PROCESSOR;
3279                 /* Periph Qualifier & Periph Dev Type */
3280                 inqdata[1] = 0;
3281                 /* rem media bit & Dev Type Modifier */
3282                 inqdata[2] = 0;
3283                 /* ISO, ECMA, & ANSI versions */
3284                 inqdata[4] = 31;
3285                 /* length of additional data */
3286                 memcpy(&inqdata[8], "Areca   ", 8);
3287                 /* Vendor Identification */
3288                 memcpy(&inqdata[16], "RAID controller ", 16);
3289                 /* Product Identification */
3290                 memcpy(&inqdata[32], "R001", 4); /* Product Revision */
3291
3292                 sg = scsi_sglist(cmd);
3293                 buffer = kmap_atomic(sg_page(sg)) + sg->offset;
3294
3295                 memcpy(buffer, inqdata, sizeof(inqdata));
3296                 sg = scsi_sglist(cmd);
3297                 kunmap_atomic(buffer - sg->offset);
3298
3299                 scsi_done(cmd);
3300         }
3301         break;
3302         case WRITE_BUFFER:
3303         case READ_BUFFER: {
3304                 if (arcmsr_iop_message_xfer(acb, cmd))
3305                         cmd->result = (DID_ERROR << 16);
3306                 scsi_done(cmd);
3307         }
3308         break;
3309         default:
3310                 scsi_done(cmd);
3311         }
3312 }
3313
3314 static int arcmsr_queue_command_lck(struct scsi_cmnd *cmd)
3315 {
3316         struct Scsi_Host *host = cmd->device->host;
3317         struct AdapterControlBlock *acb = (struct AdapterControlBlock *) host->hostdata;
3318         struct CommandControlBlock *ccb;
3319         int target = cmd->device->id;
3320
3321         if (acb->acb_flags & ACB_F_ADAPTER_REMOVED) {
3322                 cmd->result = (DID_NO_CONNECT << 16);
3323                 scsi_done(cmd);
3324                 return 0;
3325         }
3326         cmd->host_scribble = NULL;
3327         cmd->result = 0;
3328         if (target == 16) {
3329                 /* virtual device for iop message transfer */
3330                 arcmsr_handle_virtual_command(acb, cmd);
3331                 return 0;
3332         }
3333         ccb = arcmsr_get_freeccb(acb);
3334         if (!ccb)
3335                 return SCSI_MLQUEUE_HOST_BUSY;
3336         if (arcmsr_build_ccb( acb, ccb, cmd ) == FAILED) {
3337                 cmd->result = (DID_ERROR << 16) | SAM_STAT_RESERVATION_CONFLICT;
3338                 scsi_done(cmd);
3339                 return 0;
3340         }
3341         arcmsr_post_ccb(acb, ccb);
3342         return 0;
3343 }
3344
3345 static DEF_SCSI_QCMD(arcmsr_queue_command)
3346
3347 static int arcmsr_slave_config(struct scsi_device *sdev)
3348 {
3349         unsigned int    dev_timeout;
3350
3351         dev_timeout = sdev->request_queue->rq_timeout;
3352         if ((cmd_timeout > 0) && ((cmd_timeout * HZ) > dev_timeout))
3353                 blk_queue_rq_timeout(sdev->request_queue, cmd_timeout * HZ);
3354         return 0;
3355 }
3356
3357 static void arcmsr_get_adapter_config(struct AdapterControlBlock *pACB, uint32_t *rwbuffer)
3358 {
3359         int count;
3360         uint32_t *acb_firm_model = (uint32_t *)pACB->firm_model;
3361         uint32_t *acb_firm_version = (uint32_t *)pACB->firm_version;
3362         uint32_t *acb_device_map = (uint32_t *)pACB->device_map;
3363         uint32_t *firm_model = &rwbuffer[15];
3364         uint32_t *firm_version = &rwbuffer[17];
3365         uint32_t *device_map = &rwbuffer[21];
3366
3367         count = 2;
3368         while (count) {
3369                 *acb_firm_model = readl(firm_model);
3370                 acb_firm_model++;
3371                 firm_model++;
3372                 count--;
3373         }
3374         count = 4;
3375         while (count) {
3376                 *acb_firm_version = readl(firm_version);
3377                 acb_firm_version++;
3378                 firm_version++;
3379                 count--;
3380         }
3381         count = 4;
3382         while (count) {
3383                 *acb_device_map = readl(device_map);
3384                 acb_device_map++;
3385                 device_map++;
3386                 count--;
3387         }
3388         pACB->signature = readl(&rwbuffer[0]);
3389         pACB->firm_request_len = readl(&rwbuffer[1]);
3390         pACB->firm_numbers_queue = readl(&rwbuffer[2]);
3391         pACB->firm_sdram_size = readl(&rwbuffer[3]);
3392         pACB->firm_hd_channels = readl(&rwbuffer[4]);
3393         pACB->firm_cfg_version = readl(&rwbuffer[25]);
3394         if (pACB->adapter_type == ACB_ADAPTER_TYPE_F)
3395                 pACB->firm_PicStatus = readl(&rwbuffer[30]);
3396         else
3397                 pACB->firm_PicStatus = 0;
3398         pr_notice("Areca RAID Controller%d: Model %s, F/W %s\n",
3399                 pACB->host->host_no,
3400                 pACB->firm_model,
3401                 pACB->firm_version);
3402 }
3403
3404 static bool arcmsr_hbaA_get_config(struct AdapterControlBlock *acb)
3405 {
3406         struct MessageUnit_A __iomem *reg = acb->pmuA;
3407
3408         arcmsr_wait_firmware_ready(acb);
3409         writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
3410         if (!arcmsr_hbaA_wait_msgint_ready(acb)) {
3411                 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \
3412                         miscellaneous data' timeout \n", acb->host->host_no);
3413                 return false;
3414         }
3415         arcmsr_get_adapter_config(acb, reg->message_rwbuffer);
3416         return true;
3417 }
3418 static bool arcmsr_hbaB_get_config(struct AdapterControlBlock *acb)
3419 {
3420         struct MessageUnit_B *reg = acb->pmuB;
3421
3422         arcmsr_wait_firmware_ready(acb);
3423         writel(ARCMSR_MESSAGE_START_DRIVER_MODE, reg->drv2iop_doorbell);
3424         if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
3425                 printk(KERN_ERR "arcmsr%d: can't set driver mode.\n", acb->host->host_no);
3426                 return false;
3427         }
3428         writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell);
3429         if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
3430                 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \
3431                         miscellaneous data' timeout \n", acb->host->host_no);
3432                 return false;
3433         }
3434         arcmsr_get_adapter_config(acb, reg->message_rwbuffer);
3435         return true;
3436 }
3437
3438 static bool arcmsr_hbaC_get_config(struct AdapterControlBlock *pACB)
3439 {
3440         uint32_t intmask_org;
3441         struct MessageUnit_C __iomem *reg = pACB->pmuC;
3442
3443         /* disable all outbound interrupt */
3444         intmask_org = readl(&reg->host_int_mask); /* disable outbound message0 int */
3445         writel(intmask_org|ARCMSR_HBCMU_ALL_INTMASKENABLE, &reg->host_int_mask);
3446         /* wait firmware ready */
3447         arcmsr_wait_firmware_ready(pACB);
3448         /* post "get config" instruction */
3449         writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
3450         writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
3451         /* wait message ready */
3452         if (!arcmsr_hbaC_wait_msgint_ready(pACB)) {
3453                 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \
3454                         miscellaneous data' timeout \n", pACB->host->host_no);
3455                 return false;
3456         }
3457         arcmsr_get_adapter_config(pACB, reg->msgcode_rwbuffer);
3458         return true;
3459 }
3460
3461 static bool arcmsr_hbaD_get_config(struct AdapterControlBlock *acb)
3462 {
3463         struct MessageUnit_D *reg = acb->pmuD;
3464
3465         if (readl(acb->pmuD->outbound_doorbell) &
3466                 ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE) {
3467                 writel(ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE,
3468                         acb->pmuD->outbound_doorbell);/*clear interrupt*/
3469         }
3470         arcmsr_wait_firmware_ready(acb);
3471         /* post "get config" instruction */
3472         writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, reg->inbound_msgaddr0);
3473         /* wait message ready */
3474         if (!arcmsr_hbaD_wait_msgint_ready(acb)) {
3475                 pr_notice("arcmsr%d: wait get adapter firmware "
3476                         "miscellaneous data timeout\n", acb->host->host_no);
3477                 return false;
3478         }
3479         arcmsr_get_adapter_config(acb, reg->msgcode_rwbuffer);
3480         return true;
3481 }
3482
3483 static bool arcmsr_hbaE_get_config(struct AdapterControlBlock *pACB)
3484 {
3485         struct MessageUnit_E __iomem *reg = pACB->pmuE;
3486         uint32_t intmask_org;
3487
3488         /* disable all outbound interrupt */
3489         intmask_org = readl(&reg->host_int_mask); /* disable outbound message0 int */
3490         writel(intmask_org | ARCMSR_HBEMU_ALL_INTMASKENABLE, &reg->host_int_mask);
3491         /* wait firmware ready */
3492         arcmsr_wait_firmware_ready(pACB);
3493         mdelay(20);
3494         /* post "get config" instruction */
3495         writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
3496
3497         pACB->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
3498         writel(pACB->out_doorbell, &reg->iobound_doorbell);
3499         /* wait message ready */
3500         if (!arcmsr_hbaE_wait_msgint_ready(pACB)) {
3501                 pr_notice("arcmsr%d: wait get adapter firmware "
3502                         "miscellaneous data timeout\n", pACB->host->host_no);
3503                 return false;
3504         }
3505         arcmsr_get_adapter_config(pACB, reg->msgcode_rwbuffer);
3506         return true;
3507 }
3508
3509 static bool arcmsr_hbaF_get_config(struct AdapterControlBlock *pACB)
3510 {
3511         struct MessageUnit_F __iomem *reg = pACB->pmuF;
3512         uint32_t intmask_org;
3513
3514         /* disable all outbound interrupt */
3515         intmask_org = readl(&reg->host_int_mask); /* disable outbound message0 int */
3516         writel(intmask_org | ARCMSR_HBEMU_ALL_INTMASKENABLE, &reg->host_int_mask);
3517         /* wait firmware ready */
3518         arcmsr_wait_firmware_ready(pACB);
3519         /* post "get config" instruction */
3520         writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
3521
3522         pACB->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
3523         writel(pACB->out_doorbell, &reg->iobound_doorbell);
3524         /* wait message ready */
3525         if (!arcmsr_hbaE_wait_msgint_ready(pACB)) {
3526                 pr_notice("arcmsr%d: wait get adapter firmware miscellaneous data timeout\n",
3527                           pACB->host->host_no);
3528                 return false;
3529         }
3530         arcmsr_get_adapter_config(pACB, pACB->msgcode_rwbuffer);
3531         return true;
3532 }
3533
3534 static bool arcmsr_get_firmware_spec(struct AdapterControlBlock *acb)
3535 {
3536         bool rtn = false;
3537
3538         switch (acb->adapter_type) {
3539         case ACB_ADAPTER_TYPE_A:
3540                 rtn = arcmsr_hbaA_get_config(acb);
3541                 break;
3542         case ACB_ADAPTER_TYPE_B:
3543                 rtn = arcmsr_hbaB_get_config(acb);
3544                 break;
3545         case ACB_ADAPTER_TYPE_C:
3546                 rtn = arcmsr_hbaC_get_config(acb);
3547                 break;
3548         case ACB_ADAPTER_TYPE_D:
3549                 rtn = arcmsr_hbaD_get_config(acb);
3550                 break;
3551         case ACB_ADAPTER_TYPE_E:
3552                 rtn = arcmsr_hbaE_get_config(acb);
3553                 break;
3554         case ACB_ADAPTER_TYPE_F:
3555                 rtn = arcmsr_hbaF_get_config(acb);
3556                 break;
3557         default:
3558                 break;
3559         }
3560         acb->maxOutstanding = acb->firm_numbers_queue - 1;
3561         if (acb->host->can_queue >= acb->firm_numbers_queue)
3562                 acb->host->can_queue = acb->maxOutstanding;
3563         else
3564                 acb->maxOutstanding = acb->host->can_queue;
3565         acb->maxFreeCCB = acb->host->can_queue;
3566         if (acb->maxFreeCCB < ARCMSR_MAX_FREECCB_NUM)
3567                 acb->maxFreeCCB += 64;
3568         return rtn;
3569 }
3570
3571 static int arcmsr_hbaA_polling_ccbdone(struct AdapterControlBlock *acb,
3572         struct CommandControlBlock *poll_ccb)
3573 {
3574         struct MessageUnit_A __iomem *reg = acb->pmuA;
3575         struct CommandControlBlock *ccb;
3576         struct ARCMSR_CDB *arcmsr_cdb;
3577         uint32_t flag_ccb, outbound_intstatus, poll_ccb_done = 0, poll_count = 0;
3578         int rtn;
3579         bool error;
3580         unsigned long ccb_cdb_phy;
3581
3582 polling_hba_ccb_retry:
3583         poll_count++;
3584         outbound_intstatus = readl(&reg->outbound_intstatus) & acb->outbound_int_enable;
3585         writel(outbound_intstatus, &reg->outbound_intstatus);/*clear interrupt*/
3586         while (1) {
3587                 if ((flag_ccb = readl(&reg->outbound_queueport)) == 0xFFFFFFFF) {
3588                         if (poll_ccb_done){
3589                                 rtn = SUCCESS;
3590                                 break;
3591                         }else {
3592                                 msleep(25);
3593                                 if (poll_count > 100){
3594                                         rtn = FAILED;
3595                                         break;
3596                                 }
3597                                 goto polling_hba_ccb_retry;
3598                         }
3599                 }
3600                 ccb_cdb_phy = (flag_ccb << 5) & 0xffffffff;
3601                 if (acb->cdb_phyadd_hipart)
3602                         ccb_cdb_phy = ccb_cdb_phy | acb->cdb_phyadd_hipart;
3603                 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + ccb_cdb_phy);
3604                 ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb);
3605                 poll_ccb_done |= (ccb == poll_ccb) ? 1 : 0;
3606                 if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) {
3607                         if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) {
3608                                 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'"
3609                                         " poll command abort successfully \n"
3610                                         , acb->host->host_no
3611                                         , ccb->pcmd->device->id
3612                                         , (u32)ccb->pcmd->device->lun
3613                                         , ccb);
3614                                 ccb->pcmd->result = DID_ABORT << 16;
3615                                 arcmsr_ccb_complete(ccb);
3616                                 continue;
3617                         }
3618                         printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb"
3619                                 " command done ccb = '0x%p'"
3620                                 "ccboutstandingcount = %d \n"
3621                                 , acb->host->host_no
3622                                 , ccb
3623                                 , atomic_read(&acb->ccboutstandingcount));
3624                         continue;
3625                 }
3626                 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
3627                 arcmsr_report_ccb_state(acb, ccb, error);
3628         }
3629         return rtn;
3630 }
3631
3632 static int arcmsr_hbaB_polling_ccbdone(struct AdapterControlBlock *acb,
3633                                         struct CommandControlBlock *poll_ccb)
3634 {
3635         struct MessageUnit_B *reg = acb->pmuB;
3636         struct ARCMSR_CDB *arcmsr_cdb;
3637         struct CommandControlBlock *ccb;
3638         uint32_t flag_ccb, poll_ccb_done = 0, poll_count = 0;
3639         int index, rtn;
3640         bool error;
3641         unsigned long ccb_cdb_phy;
3642
3643 polling_hbb_ccb_retry:
3644         poll_count++;
3645         /* clear doorbell interrupt */
3646         writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
3647         while(1){
3648                 index = reg->doneq_index;
3649                 flag_ccb = reg->done_qbuffer[index];
3650                 if (flag_ccb == 0) {
3651                         if (poll_ccb_done){
3652                                 rtn = SUCCESS;
3653                                 break;
3654                         }else {
3655                                 msleep(25);
3656                                 if (poll_count > 100){
3657                                         rtn = FAILED;
3658                                         break;
3659                                 }
3660                                 goto polling_hbb_ccb_retry;
3661                         }
3662                 }
3663                 reg->done_qbuffer[index] = 0;
3664                 index++;
3665                 /*if last index number set it to 0 */
3666                 index %= ARCMSR_MAX_HBB_POSTQUEUE;
3667                 reg->doneq_index = index;
3668                 /* check if command done with no error*/
3669                 ccb_cdb_phy = (flag_ccb << 5) & 0xffffffff;
3670                 if (acb->cdb_phyadd_hipart)
3671                         ccb_cdb_phy = ccb_cdb_phy | acb->cdb_phyadd_hipart;
3672                 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + ccb_cdb_phy);
3673                 ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb);
3674                 poll_ccb_done |= (ccb == poll_ccb) ? 1 : 0;
3675                 if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) {
3676                         if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) {
3677                                 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'"
3678                                         " poll command abort successfully \n"
3679                                         ,acb->host->host_no
3680                                         ,ccb->pcmd->device->id
3681                                         ,(u32)ccb->pcmd->device->lun
3682                                         ,ccb);
3683                                 ccb->pcmd->result = DID_ABORT << 16;
3684                                 arcmsr_ccb_complete(ccb);
3685                                 continue;
3686                         }
3687                         printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb"
3688                                 " command done ccb = '0x%p'"
3689                                 "ccboutstandingcount = %d \n"
3690                                 , acb->host->host_no
3691                                 , ccb
3692                                 , atomic_read(&acb->ccboutstandingcount));
3693                         continue;
3694                 }
3695                 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
3696                 arcmsr_report_ccb_state(acb, ccb, error);
3697         }
3698         return rtn;
3699 }
3700
3701 static int arcmsr_hbaC_polling_ccbdone(struct AdapterControlBlock *acb,
3702                 struct CommandControlBlock *poll_ccb)
3703 {
3704         struct MessageUnit_C __iomem *reg = acb->pmuC;
3705         uint32_t flag_ccb;
3706         struct ARCMSR_CDB *arcmsr_cdb;
3707         bool error;
3708         struct CommandControlBlock *pCCB;
3709         uint32_t poll_ccb_done = 0, poll_count = 0;
3710         int rtn;
3711         unsigned long ccb_cdb_phy;
3712
3713 polling_hbc_ccb_retry:
3714         poll_count++;
3715         while (1) {
3716                 if ((readl(&reg->host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) == 0) {
3717                         if (poll_ccb_done) {
3718                                 rtn = SUCCESS;
3719                                 break;
3720                         } else {
3721                                 msleep(25);
3722                                 if (poll_count > 100) {
3723                                         rtn = FAILED;
3724                                         break;
3725                                 }
3726                                 goto polling_hbc_ccb_retry;
3727                         }
3728                 }
3729                 flag_ccb = readl(&reg->outbound_queueport_low);
3730                 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);
3731                 if (acb->cdb_phyadd_hipart)
3732                         ccb_cdb_phy = ccb_cdb_phy | acb->cdb_phyadd_hipart;
3733                 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + ccb_cdb_phy);
3734                 pCCB = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb);
3735                 poll_ccb_done |= (pCCB == poll_ccb) ? 1 : 0;
3736                 /* check ifcommand done with no error*/
3737                 if ((pCCB->acb != acb) || (pCCB->startdone != ARCMSR_CCB_START)) {
3738                         if (pCCB->startdone == ARCMSR_CCB_ABORTED) {
3739                                 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'"
3740                                         " poll command abort successfully \n"
3741                                         , acb->host->host_no
3742                                         , pCCB->pcmd->device->id
3743                                         , (u32)pCCB->pcmd->device->lun
3744                                         , pCCB);
3745                                 pCCB->pcmd->result = DID_ABORT << 16;
3746                                 arcmsr_ccb_complete(pCCB);
3747                                 continue;
3748                         }
3749                         printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb"
3750                                 " command done ccb = '0x%p'"
3751                                 "ccboutstandingcount = %d \n"
3752                                 , acb->host->host_no
3753                                 , pCCB
3754                                 , atomic_read(&acb->ccboutstandingcount));
3755                         continue;
3756                 }
3757                 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
3758                 arcmsr_report_ccb_state(acb, pCCB, error);
3759         }
3760         return rtn;
3761 }
3762
3763 static int arcmsr_hbaD_polling_ccbdone(struct AdapterControlBlock *acb,
3764                                 struct CommandControlBlock *poll_ccb)
3765 {
3766         bool error;
3767         uint32_t poll_ccb_done = 0, poll_count = 0, flag_ccb;
3768         int rtn, doneq_index, index_stripped, outbound_write_pointer, toggle;
3769         unsigned long flags, ccb_cdb_phy;
3770         struct ARCMSR_CDB *arcmsr_cdb;
3771         struct CommandControlBlock *pCCB;
3772         struct MessageUnit_D *pmu = acb->pmuD;
3773
3774 polling_hbaD_ccb_retry:
3775         poll_count++;
3776         while (1) {
3777                 spin_lock_irqsave(&acb->doneq_lock, flags);
3778                 outbound_write_pointer = pmu->done_qbuffer[0].addressLow + 1;
3779                 doneq_index = pmu->doneq_index;
3780                 if ((outbound_write_pointer & 0xFFF) == (doneq_index & 0xFFF)) {
3781                         spin_unlock_irqrestore(&acb->doneq_lock, flags);
3782                         if (poll_ccb_done) {
3783                                 rtn = SUCCESS;
3784                                 break;
3785                         } else {
3786                                 msleep(25);
3787                                 if (poll_count > 40) {
3788                                         rtn = FAILED;
3789                                         break;
3790                                 }
3791                                 goto polling_hbaD_ccb_retry;
3792                         }
3793                 }
3794                 toggle = doneq_index & 0x4000;
3795                 index_stripped = (doneq_index & 0xFFF) + 1;
3796                 index_stripped %= ARCMSR_MAX_ARC1214_DONEQUEUE;
3797                 pmu->doneq_index = index_stripped ? (index_stripped | toggle) :
3798                                 ((toggle ^ 0x4000) + 1);
3799                 doneq_index = pmu->doneq_index;
3800                 spin_unlock_irqrestore(&acb->doneq_lock, flags);
3801                 flag_ccb = pmu->done_qbuffer[doneq_index & 0xFFF].addressLow;
3802                 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);
3803                 if (acb->cdb_phyadd_hipart)
3804                         ccb_cdb_phy = ccb_cdb_phy | acb->cdb_phyadd_hipart;
3805                 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset +
3806                         ccb_cdb_phy);
3807                 pCCB = container_of(arcmsr_cdb, struct CommandControlBlock,
3808                         arcmsr_cdb);
3809                 poll_ccb_done |= (pCCB == poll_ccb) ? 1 : 0;
3810                 if ((pCCB->acb != acb) ||
3811                         (pCCB->startdone != ARCMSR_CCB_START)) {
3812                         if (pCCB->startdone == ARCMSR_CCB_ABORTED) {
3813                                 pr_notice("arcmsr%d: scsi id = %d "
3814                                         "lun = %d ccb = '0x%p' poll command "
3815                                         "abort successfully\n"
3816                                         , acb->host->host_no
3817                                         , pCCB->pcmd->device->id
3818                                         , (u32)pCCB->pcmd->device->lun
3819                                         , pCCB);
3820                                 pCCB->pcmd->result = DID_ABORT << 16;
3821                                 arcmsr_ccb_complete(pCCB);
3822                                 continue;
3823                         }
3824                         pr_notice("arcmsr%d: polling an illegal "
3825                                 "ccb command done ccb = '0x%p' "
3826                                 "ccboutstandingcount = %d\n"
3827                                 , acb->host->host_no
3828                                 , pCCB
3829                                 , atomic_read(&acb->ccboutstandingcount));
3830                         continue;
3831                 }
3832                 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1)
3833                         ? true : false;
3834                 arcmsr_report_ccb_state(acb, pCCB, error);
3835         }
3836         return rtn;
3837 }
3838
3839 static int arcmsr_hbaE_polling_ccbdone(struct AdapterControlBlock *acb,
3840                                 struct CommandControlBlock *poll_ccb)
3841 {
3842         bool error;
3843         uint32_t poll_ccb_done = 0, poll_count = 0, doneq_index;
3844         uint16_t cmdSMID;
3845         unsigned long flags;
3846         int rtn;
3847         struct CommandControlBlock *pCCB;
3848         struct MessageUnit_E __iomem *reg = acb->pmuE;
3849
3850         polling_hbaC_ccb_retry:
3851         poll_count++;
3852         while (1) {
3853                 spin_lock_irqsave(&acb->doneq_lock, flags);
3854                 doneq_index = acb->doneq_index;
3855                 if ((readl(&reg->reply_post_producer_index) & 0xFFFF) ==
3856                                 doneq_index) {
3857                         spin_unlock_irqrestore(&acb->doneq_lock, flags);
3858                         if (poll_ccb_done) {
3859                                 rtn = SUCCESS;
3860                                 break;
3861                         } else {
3862                                 msleep(25);
3863                                 if (poll_count > 40) {
3864                                         rtn = FAILED;
3865                                         break;
3866                                 }
3867                                 goto polling_hbaC_ccb_retry;
3868                         }
3869                 }
3870                 cmdSMID = acb->pCompletionQ[doneq_index].cmdSMID;
3871                 doneq_index++;
3872                 if (doneq_index >= acb->completionQ_entry)
3873                         doneq_index = 0;
3874                 acb->doneq_index = doneq_index;
3875                 spin_unlock_irqrestore(&acb->doneq_lock, flags);
3876                 pCCB = acb->pccb_pool[cmdSMID];
3877                 poll_ccb_done |= (pCCB == poll_ccb) ? 1 : 0;
3878                 /* check if command done with no error*/
3879                 if ((pCCB->acb != acb) || (pCCB->startdone != ARCMSR_CCB_START)) {
3880                         if (pCCB->startdone == ARCMSR_CCB_ABORTED) {
3881                                 pr_notice("arcmsr%d: scsi id = %d "
3882                                         "lun = %d ccb = '0x%p' poll command "
3883                                         "abort successfully\n"
3884                                         , acb->host->host_no
3885                                         , pCCB->pcmd->device->id
3886                                         , (u32)pCCB->pcmd->device->lun
3887                                         , pCCB);
3888                                 pCCB->pcmd->result = DID_ABORT << 16;
3889                                 arcmsr_ccb_complete(pCCB);
3890                                 continue;
3891                         }
3892                         pr_notice("arcmsr%d: polling an illegal "
3893                                 "ccb command done ccb = '0x%p' "
3894                                 "ccboutstandingcount = %d\n"
3895                                 , acb->host->host_no
3896                                 , pCCB
3897                                 , atomic_read(&acb->ccboutstandingcount));
3898                         continue;
3899                 }
3900                 error = (acb->pCompletionQ[doneq_index].cmdFlag &
3901                         ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
3902                 arcmsr_report_ccb_state(acb, pCCB, error);
3903         }
3904         writel(doneq_index, &reg->reply_post_consumer_index);
3905         return rtn;
3906 }
3907
3908 static int arcmsr_polling_ccbdone(struct AdapterControlBlock *acb,
3909                                         struct CommandControlBlock *poll_ccb)
3910 {
3911         int rtn = 0;
3912         switch (acb->adapter_type) {
3913
3914         case ACB_ADAPTER_TYPE_A:
3915                 rtn = arcmsr_hbaA_polling_ccbdone(acb, poll_ccb);
3916                 break;
3917         case ACB_ADAPTER_TYPE_B:
3918                 rtn = arcmsr_hbaB_polling_ccbdone(acb, poll_ccb);
3919                 break;
3920         case ACB_ADAPTER_TYPE_C:
3921                 rtn = arcmsr_hbaC_polling_ccbdone(acb, poll_ccb);
3922                 break;
3923         case ACB_ADAPTER_TYPE_D:
3924                 rtn = arcmsr_hbaD_polling_ccbdone(acb, poll_ccb);
3925                 break;
3926         case ACB_ADAPTER_TYPE_E:
3927         case ACB_ADAPTER_TYPE_F:
3928                 rtn = arcmsr_hbaE_polling_ccbdone(acb, poll_ccb);
3929                 break;
3930         }
3931         return rtn;
3932 }
3933
3934 static void arcmsr_set_iop_datetime(struct timer_list *t)
3935 {
3936         struct AdapterControlBlock *pacb = from_timer(pacb, t, refresh_timer);
3937         unsigned int next_time;
3938         struct tm tm;
3939
3940         union {
3941                 struct  {
3942                 uint16_t        signature;
3943                 uint8_t         year;
3944                 uint8_t         month;
3945                 uint8_t         date;
3946                 uint8_t         hour;
3947                 uint8_t         minute;
3948                 uint8_t         second;
3949                 } a;
3950                 struct  {
3951                 uint32_t        msg_time[2];
3952                 } b;
3953         } datetime;
3954
3955         time64_to_tm(ktime_get_real_seconds(), -sys_tz.tz_minuteswest * 60, &tm);
3956
3957         datetime.a.signature = 0x55AA;
3958         datetime.a.year = tm.tm_year - 100; /* base 2000 instead of 1900 */
3959         datetime.a.month = tm.tm_mon;
3960         datetime.a.date = tm.tm_mday;
3961         datetime.a.hour = tm.tm_hour;
3962         datetime.a.minute = tm.tm_min;
3963         datetime.a.second = tm.tm_sec;
3964
3965         switch (pacb->adapter_type) {
3966                 case ACB_ADAPTER_TYPE_A: {
3967                         struct MessageUnit_A __iomem *reg = pacb->pmuA;
3968                         writel(datetime.b.msg_time[0], &reg->message_rwbuffer[0]);
3969                         writel(datetime.b.msg_time[1], &reg->message_rwbuffer[1]);
3970                         writel(ARCMSR_INBOUND_MESG0_SYNC_TIMER, &reg->inbound_msgaddr0);
3971                         break;
3972                 }
3973                 case ACB_ADAPTER_TYPE_B: {
3974                         uint32_t __iomem *rwbuffer;
3975                         struct MessageUnit_B *reg = pacb->pmuB;
3976                         rwbuffer = reg->message_rwbuffer;
3977                         writel(datetime.b.msg_time[0], rwbuffer++);
3978                         writel(datetime.b.msg_time[1], rwbuffer++);
3979                         writel(ARCMSR_MESSAGE_SYNC_TIMER, reg->drv2iop_doorbell);
3980                         break;
3981                 }
3982                 case ACB_ADAPTER_TYPE_C: {
3983                         struct MessageUnit_C __iomem *reg = pacb->pmuC;
3984                         writel(datetime.b.msg_time[0], &reg->msgcode_rwbuffer[0]);
3985                         writel(datetime.b.msg_time[1], &reg->msgcode_rwbuffer[1]);
3986                         writel(ARCMSR_INBOUND_MESG0_SYNC_TIMER, &reg->inbound_msgaddr0);
3987                         writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
3988                         break;
3989                 }
3990                 case ACB_ADAPTER_TYPE_D: {
3991                         uint32_t __iomem *rwbuffer;
3992                         struct MessageUnit_D *reg = pacb->pmuD;
3993                         rwbuffer = reg->msgcode_rwbuffer;
3994                         writel(datetime.b.msg_time[0], rwbuffer++);
3995                         writel(datetime.b.msg_time[1], rwbuffer++);
3996                         writel(ARCMSR_INBOUND_MESG0_SYNC_TIMER, reg->inbound_msgaddr0);
3997                         break;
3998                 }
3999                 case ACB_ADAPTER_TYPE_E: {
4000                         struct MessageUnit_E __iomem *reg = pacb->pmuE;
4001                         writel(datetime.b.msg_time[0], &reg->msgcode_rwbuffer[0]);
4002                         writel(datetime.b.msg_time[1], &reg->msgcode_rwbuffer[1]);
4003                         writel(ARCMSR_INBOUND_MESG0_SYNC_TIMER, &reg->inbound_msgaddr0);
4004                         pacb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
4005                         writel(pacb->out_doorbell, &reg->iobound_doorbell);
4006                         break;
4007                 }
4008                 case ACB_ADAPTER_TYPE_F: {
4009                         struct MessageUnit_F __iomem *reg = pacb->pmuF;
4010
4011                         pacb->msgcode_rwbuffer[0] = datetime.b.msg_time[0];
4012                         pacb->msgcode_rwbuffer[1] = datetime.b.msg_time[1];
4013                         writel(ARCMSR_INBOUND_MESG0_SYNC_TIMER, &reg->inbound_msgaddr0);
4014                         pacb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
4015                         writel(pacb->out_doorbell, &reg->iobound_doorbell);
4016                         break;
4017                 }
4018         }
4019         if (sys_tz.tz_minuteswest)
4020                 next_time = ARCMSR_HOURS;
4021         else
4022                 next_time = ARCMSR_MINUTES;
4023         mod_timer(&pacb->refresh_timer, jiffies + msecs_to_jiffies(next_time));
4024 }
4025
4026 static int arcmsr_iop_confirm(struct AdapterControlBlock *acb)
4027 {
4028         uint32_t cdb_phyaddr, cdb_phyaddr_hi32;
4029         dma_addr_t dma_coherent_handle;
4030
4031         /*
4032         ********************************************************************
4033         ** here we need to tell iop 331 our freeccb.HighPart
4034         ** if freeccb.HighPart is not zero
4035         ********************************************************************
4036         */
4037         switch (acb->adapter_type) {
4038         case ACB_ADAPTER_TYPE_B:
4039         case ACB_ADAPTER_TYPE_D:
4040                 dma_coherent_handle = acb->dma_coherent_handle2;
4041                 break;
4042         case ACB_ADAPTER_TYPE_E:
4043         case ACB_ADAPTER_TYPE_F:
4044                 dma_coherent_handle = acb->dma_coherent_handle +
4045                         offsetof(struct CommandControlBlock, arcmsr_cdb);
4046                 break;
4047         default:
4048                 dma_coherent_handle = acb->dma_coherent_handle;
4049                 break;
4050         }
4051         cdb_phyaddr = lower_32_bits(dma_coherent_handle);
4052         cdb_phyaddr_hi32 = upper_32_bits(dma_coherent_handle);
4053         acb->cdb_phyaddr_hi32 = cdb_phyaddr_hi32;
4054         acb->cdb_phyadd_hipart = ((uint64_t)cdb_phyaddr_hi32) << 32;
4055         /*
4056         ***********************************************************************
4057         **    if adapter type B, set window of "post command Q"
4058         ***********************************************************************
4059         */
4060         switch (acb->adapter_type) {
4061
4062         case ACB_ADAPTER_TYPE_A: {
4063                 if (cdb_phyaddr_hi32 != 0) {
4064                         struct MessageUnit_A __iomem *reg = acb->pmuA;
4065                         writel(ARCMSR_SIGNATURE_SET_CONFIG, \
4066                                                 &reg->message_rwbuffer[0]);
4067                         writel(cdb_phyaddr_hi32, &reg->message_rwbuffer[1]);
4068                         writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, \
4069                                                         &reg->inbound_msgaddr0);
4070                         if (!arcmsr_hbaA_wait_msgint_ready(acb)) {
4071                                 printk(KERN_NOTICE "arcmsr%d: ""set ccb high \
4072                                 part physical address timeout\n",
4073                                 acb->host->host_no);
4074                                 return 1;
4075                         }
4076                 }
4077                 }
4078                 break;
4079
4080         case ACB_ADAPTER_TYPE_B: {
4081                 uint32_t __iomem *rwbuffer;
4082
4083                 struct MessageUnit_B *reg = acb->pmuB;
4084                 reg->postq_index = 0;
4085                 reg->doneq_index = 0;
4086                 writel(ARCMSR_MESSAGE_SET_POST_WINDOW, reg->drv2iop_doorbell);
4087                 if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
4088                         printk(KERN_NOTICE "arcmsr%d: cannot set driver mode\n", \
4089                                 acb->host->host_no);
4090                         return 1;
4091                 }
4092                 rwbuffer = reg->message_rwbuffer;
4093                 /* driver "set config" signature */
4094                 writel(ARCMSR_SIGNATURE_SET_CONFIG, rwbuffer++);
4095                 /* normal should be zero */
4096                 writel(cdb_phyaddr_hi32, rwbuffer++);
4097                 /* postQ size (256 + 8)*4        */
4098                 writel(cdb_phyaddr, rwbuffer++);
4099                 /* doneQ size (256 + 8)*4        */
4100                 writel(cdb_phyaddr + 1056, rwbuffer++);
4101                 /* ccb maxQ size must be --> [(256 + 8)*4]*/
4102                 writel(1056, rwbuffer);
4103
4104                 writel(ARCMSR_MESSAGE_SET_CONFIG, reg->drv2iop_doorbell);
4105                 if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
4106                         printk(KERN_NOTICE "arcmsr%d: 'set command Q window' \
4107                         timeout \n",acb->host->host_no);
4108                         return 1;
4109                 }
4110                 writel(ARCMSR_MESSAGE_START_DRIVER_MODE, reg->drv2iop_doorbell);
4111                 if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
4112                         pr_err("arcmsr%d: can't set driver mode.\n",
4113                                 acb->host->host_no);
4114                         return 1;
4115                 }
4116                 }
4117                 break;
4118         case ACB_ADAPTER_TYPE_C: {
4119                         struct MessageUnit_C __iomem *reg = acb->pmuC;
4120
4121                         printk(KERN_NOTICE "arcmsr%d: cdb_phyaddr_hi32=0x%x\n",
4122                                         acb->adapter_index, cdb_phyaddr_hi32);
4123                         writel(ARCMSR_SIGNATURE_SET_CONFIG, &reg->msgcode_rwbuffer[0]);
4124                         writel(cdb_phyaddr_hi32, &reg->msgcode_rwbuffer[1]);
4125                         writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, &reg->inbound_msgaddr0);
4126                         writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
4127                         if (!arcmsr_hbaC_wait_msgint_ready(acb)) {
4128                                 printk(KERN_NOTICE "arcmsr%d: 'set command Q window' \
4129                                 timeout \n", acb->host->host_no);
4130                                 return 1;
4131                         }
4132                 }
4133                 break;
4134         case ACB_ADAPTER_TYPE_D: {
4135                 uint32_t __iomem *rwbuffer;
4136                 struct MessageUnit_D *reg = acb->pmuD;
4137                 reg->postq_index = 0;
4138                 reg->doneq_index = 0;
4139                 rwbuffer = reg->msgcode_rwbuffer;
4140                 writel(ARCMSR_SIGNATURE_SET_CONFIG, rwbuffer++);
4141                 writel(cdb_phyaddr_hi32, rwbuffer++);
4142                 writel(cdb_phyaddr, rwbuffer++);
4143                 writel(cdb_phyaddr + (ARCMSR_MAX_ARC1214_POSTQUEUE *
4144                         sizeof(struct InBound_SRB)), rwbuffer++);
4145                 writel(0x100, rwbuffer);
4146                 writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, reg->inbound_msgaddr0);
4147                 if (!arcmsr_hbaD_wait_msgint_ready(acb)) {
4148                         pr_notice("arcmsr%d: 'set command Q window' timeout\n",
4149                                 acb->host->host_no);
4150                         return 1;
4151                 }
4152                 }
4153                 break;
4154         case ACB_ADAPTER_TYPE_E: {
4155                 struct MessageUnit_E __iomem *reg = acb->pmuE;
4156                 writel(ARCMSR_SIGNATURE_SET_CONFIG, &reg->msgcode_rwbuffer[0]);
4157                 writel(ARCMSR_SIGNATURE_1884, &reg->msgcode_rwbuffer[1]);
4158                 writel(cdb_phyaddr, &reg->msgcode_rwbuffer[2]);
4159                 writel(cdb_phyaddr_hi32, &reg->msgcode_rwbuffer[3]);
4160                 writel(acb->ccbsize, &reg->msgcode_rwbuffer[4]);
4161                 writel(lower_32_bits(acb->dma_coherent_handle2), &reg->msgcode_rwbuffer[5]);
4162                 writel(upper_32_bits(acb->dma_coherent_handle2), &reg->msgcode_rwbuffer[6]);
4163                 writel(acb->ioqueue_size, &reg->msgcode_rwbuffer[7]);
4164                 writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, &reg->inbound_msgaddr0);
4165                 acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
4166                 writel(acb->out_doorbell, &reg->iobound_doorbell);
4167                 if (!arcmsr_hbaE_wait_msgint_ready(acb)) {
4168                         pr_notice("arcmsr%d: 'set command Q window' timeout \n",
4169                                 acb->host->host_no);
4170                         return 1;
4171                 }
4172                 }
4173                 break;
4174         case ACB_ADAPTER_TYPE_F: {
4175                 struct MessageUnit_F __iomem *reg = acb->pmuF;
4176
4177                 acb->msgcode_rwbuffer[0] = ARCMSR_SIGNATURE_SET_CONFIG;
4178                 acb->msgcode_rwbuffer[1] = ARCMSR_SIGNATURE_1886;
4179                 acb->msgcode_rwbuffer[2] = cdb_phyaddr;
4180                 acb->msgcode_rwbuffer[3] = cdb_phyaddr_hi32;
4181                 acb->msgcode_rwbuffer[4] = acb->ccbsize;
4182                 acb->msgcode_rwbuffer[5] = lower_32_bits(acb->dma_coherent_handle2);
4183                 acb->msgcode_rwbuffer[6] = upper_32_bits(acb->dma_coherent_handle2);
4184                 acb->msgcode_rwbuffer[7] = acb->completeQ_size;
4185                 if (acb->xor_mega) {
4186                         acb->msgcode_rwbuffer[8] = 0x455AA;     //Linux init 2
4187                         acb->msgcode_rwbuffer[9] = 0;
4188                         acb->msgcode_rwbuffer[10] = lower_32_bits(acb->xorPhys);
4189                         acb->msgcode_rwbuffer[11] = upper_32_bits(acb->xorPhys);
4190                 }
4191                 writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, &reg->inbound_msgaddr0);
4192                 acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
4193                 writel(acb->out_doorbell, &reg->iobound_doorbell);
4194                 if (!arcmsr_hbaE_wait_msgint_ready(acb)) {
4195                         pr_notice("arcmsr%d: 'set command Q window' timeout\n",
4196                                 acb->host->host_no);
4197                         return 1;
4198                 }
4199                 }
4200                 break;
4201         }
4202         return 0;
4203 }
4204
4205 static void arcmsr_wait_firmware_ready(struct AdapterControlBlock *acb)
4206 {
4207         uint32_t firmware_state = 0;
4208         switch (acb->adapter_type) {
4209
4210         case ACB_ADAPTER_TYPE_A: {
4211                 struct MessageUnit_A __iomem *reg = acb->pmuA;
4212                 do {
4213                         if (!(acb->acb_flags & ACB_F_IOP_INITED))
4214                                 msleep(20);
4215                         firmware_state = readl(&reg->outbound_msgaddr1);
4216                 } while ((firmware_state & ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK) == 0);
4217                 }
4218                 break;
4219
4220         case ACB_ADAPTER_TYPE_B: {
4221                 struct MessageUnit_B *reg = acb->pmuB;
4222                 do {
4223                         if (!(acb->acb_flags & ACB_F_IOP_INITED))
4224                                 msleep(20);
4225                         firmware_state = readl(reg->iop2drv_doorbell);
4226                 } while ((firmware_state & ARCMSR_MESSAGE_FIRMWARE_OK) == 0);
4227                 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell);
4228                 }
4229                 break;
4230         case ACB_ADAPTER_TYPE_C: {
4231                 struct MessageUnit_C __iomem *reg = acb->pmuC;
4232                 do {
4233                         if (!(acb->acb_flags & ACB_F_IOP_INITED))
4234                                 msleep(20);
4235                         firmware_state = readl(&reg->outbound_msgaddr1);
4236                 } while ((firmware_state & ARCMSR_HBCMU_MESSAGE_FIRMWARE_OK) == 0);
4237                 }
4238                 break;
4239         case ACB_ADAPTER_TYPE_D: {
4240                 struct MessageUnit_D *reg = acb->pmuD;
4241                 do {
4242                         if (!(acb->acb_flags & ACB_F_IOP_INITED))
4243                                 msleep(20);
4244                         firmware_state = readl(reg->outbound_msgaddr1);
4245                 } while ((firmware_state &
4246                         ARCMSR_ARC1214_MESSAGE_FIRMWARE_OK) == 0);
4247                 }
4248                 break;
4249         case ACB_ADAPTER_TYPE_E:
4250         case ACB_ADAPTER_TYPE_F: {
4251                 struct MessageUnit_E __iomem *reg = acb->pmuE;
4252                 do {
4253                         if (!(acb->acb_flags & ACB_F_IOP_INITED))
4254                                 msleep(20);
4255                         firmware_state = readl(&reg->outbound_msgaddr1);
4256                 } while ((firmware_state & ARCMSR_HBEMU_MESSAGE_FIRMWARE_OK) == 0);
4257                 }
4258                 break;
4259         }
4260 }
4261
4262 static void arcmsr_request_device_map(struct timer_list *t)
4263 {
4264         struct AdapterControlBlock *acb = from_timer(acb, t, eternal_timer);
4265         if (acb->acb_flags & (ACB_F_MSG_GET_CONFIG | ACB_F_BUS_RESET | ACB_F_ABORT)) {
4266                 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
4267         } else {
4268                 acb->fw_flag = FW_NORMAL;
4269                 switch (acb->adapter_type) {
4270                 case ACB_ADAPTER_TYPE_A: {
4271                         struct MessageUnit_A __iomem *reg = acb->pmuA;
4272                         writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
4273                         break;
4274                         }
4275                 case ACB_ADAPTER_TYPE_B: {
4276                         struct MessageUnit_B *reg = acb->pmuB;
4277                         writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell);
4278                         break;
4279                         }
4280                 case ACB_ADAPTER_TYPE_C: {
4281                         struct MessageUnit_C __iomem *reg = acb->pmuC;
4282                         writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
4283                         writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
4284                         break;
4285                         }
4286                 case ACB_ADAPTER_TYPE_D: {
4287                         struct MessageUnit_D *reg = acb->pmuD;
4288                         writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, reg->inbound_msgaddr0);
4289                         break;
4290                         }
4291                 case ACB_ADAPTER_TYPE_E: {
4292                         struct MessageUnit_E __iomem *reg = acb->pmuE;
4293                         writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
4294                         acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
4295                         writel(acb->out_doorbell, &reg->iobound_doorbell);
4296                         break;
4297                         }
4298                 case ACB_ADAPTER_TYPE_F: {
4299                         struct MessageUnit_F __iomem *reg = acb->pmuF;
4300                         uint32_t outMsg1 = readl(&reg->outbound_msgaddr1);
4301
4302                         if (!(outMsg1 & ARCMSR_HBFMU_MESSAGE_FIRMWARE_OK) ||
4303                                 (outMsg1 & ARCMSR_HBFMU_MESSAGE_NO_VOLUME_CHANGE))
4304                                 goto nxt6s;
4305                         writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
4306                         acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
4307                         writel(acb->out_doorbell, &reg->iobound_doorbell);
4308                         break;
4309                         }
4310                 default:
4311                         return;
4312                 }
4313                 acb->acb_flags |= ACB_F_MSG_GET_CONFIG;
4314 nxt6s:
4315                 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
4316         }
4317 }
4318
4319 static void arcmsr_hbaA_start_bgrb(struct AdapterControlBlock *acb)
4320 {
4321         struct MessageUnit_A __iomem *reg = acb->pmuA;
4322         acb->acb_flags |= ACB_F_MSG_START_BGRB;
4323         writel(ARCMSR_INBOUND_MESG0_START_BGRB, &reg->inbound_msgaddr0);
4324         if (!arcmsr_hbaA_wait_msgint_ready(acb)) {
4325                 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \
4326                                 rebuild' timeout \n", acb->host->host_no);
4327         }
4328 }
4329
4330 static void arcmsr_hbaB_start_bgrb(struct AdapterControlBlock *acb)
4331 {
4332         struct MessageUnit_B *reg = acb->pmuB;
4333         acb->acb_flags |= ACB_F_MSG_START_BGRB;
4334         writel(ARCMSR_MESSAGE_START_BGRB, reg->drv2iop_doorbell);
4335         if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
4336                 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \
4337                                 rebuild' timeout \n",acb->host->host_no);
4338         }
4339 }
4340
4341 static void arcmsr_hbaC_start_bgrb(struct AdapterControlBlock *pACB)
4342 {
4343         struct MessageUnit_C __iomem *phbcmu = pACB->pmuC;
4344         pACB->acb_flags |= ACB_F_MSG_START_BGRB;
4345         writel(ARCMSR_INBOUND_MESG0_START_BGRB, &phbcmu->inbound_msgaddr0);
4346         writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &phbcmu->inbound_doorbell);
4347         if (!arcmsr_hbaC_wait_msgint_ready(pACB)) {
4348                 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \
4349                                 rebuild' timeout \n", pACB->host->host_no);
4350         }
4351         return;
4352 }
4353
4354 static void arcmsr_hbaD_start_bgrb(struct AdapterControlBlock *pACB)
4355 {
4356         struct MessageUnit_D *pmu = pACB->pmuD;
4357
4358         pACB->acb_flags |= ACB_F_MSG_START_BGRB;
4359         writel(ARCMSR_INBOUND_MESG0_START_BGRB, pmu->inbound_msgaddr0);
4360         if (!arcmsr_hbaD_wait_msgint_ready(pACB)) {
4361                 pr_notice("arcmsr%d: wait 'start adapter "
4362                         "background rebuild' timeout\n", pACB->host->host_no);
4363         }
4364 }
4365
4366 static void arcmsr_hbaE_start_bgrb(struct AdapterControlBlock *pACB)
4367 {
4368         struct MessageUnit_E __iomem *pmu = pACB->pmuE;
4369
4370         pACB->acb_flags |= ACB_F_MSG_START_BGRB;
4371         writel(ARCMSR_INBOUND_MESG0_START_BGRB, &pmu->inbound_msgaddr0);
4372         pACB->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
4373         writel(pACB->out_doorbell, &pmu->iobound_doorbell);
4374         if (!arcmsr_hbaE_wait_msgint_ready(pACB)) {
4375                 pr_notice("arcmsr%d: wait 'start adapter "
4376                         "background rebuild' timeout \n", pACB->host->host_no);
4377         }
4378 }
4379
4380 static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb)
4381 {
4382         switch (acb->adapter_type) {
4383         case ACB_ADAPTER_TYPE_A:
4384                 arcmsr_hbaA_start_bgrb(acb);
4385                 break;
4386         case ACB_ADAPTER_TYPE_B:
4387                 arcmsr_hbaB_start_bgrb(acb);
4388                 break;
4389         case ACB_ADAPTER_TYPE_C:
4390                 arcmsr_hbaC_start_bgrb(acb);
4391                 break;
4392         case ACB_ADAPTER_TYPE_D:
4393                 arcmsr_hbaD_start_bgrb(acb);
4394                 break;
4395         case ACB_ADAPTER_TYPE_E:
4396         case ACB_ADAPTER_TYPE_F:
4397                 arcmsr_hbaE_start_bgrb(acb);
4398                 break;
4399         }
4400 }
4401
4402 static void arcmsr_clear_doorbell_queue_buffer(struct AdapterControlBlock *acb)
4403 {
4404         switch (acb->adapter_type) {
4405         case ACB_ADAPTER_TYPE_A: {
4406                 struct MessageUnit_A __iomem *reg = acb->pmuA;
4407                 uint32_t outbound_doorbell;
4408                 /* empty doorbell Qbuffer if door bell ringed */
4409                 outbound_doorbell = readl(&reg->outbound_doorbell);
4410                 /*clear doorbell interrupt */
4411                 writel(outbound_doorbell, &reg->outbound_doorbell);
4412                 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, &reg->inbound_doorbell);
4413                 }
4414                 break;
4415
4416         case ACB_ADAPTER_TYPE_B: {
4417                 struct MessageUnit_B *reg = acb->pmuB;
4418                 uint32_t outbound_doorbell, i;
4419                 writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
4420                 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell);
4421                 /* let IOP know data has been read */
4422                 for(i=0; i < 200; i++) {
4423                         msleep(20);
4424                         outbound_doorbell = readl(reg->iop2drv_doorbell);
4425                         if( outbound_doorbell & ARCMSR_IOP2DRV_DATA_WRITE_OK) {
4426                                 writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
4427                                 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell);
4428                         } else
4429                                 break;
4430                 }
4431                 }
4432                 break;
4433         case ACB_ADAPTER_TYPE_C: {
4434                 struct MessageUnit_C __iomem *reg = acb->pmuC;
4435                 uint32_t outbound_doorbell, i;
4436                 /* empty doorbell Qbuffer if door bell ringed */
4437                 outbound_doorbell = readl(&reg->outbound_doorbell);
4438                 writel(outbound_doorbell, &reg->outbound_doorbell_clear);
4439                 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, &reg->inbound_doorbell);
4440                 for (i = 0; i < 200; i++) {
4441                         msleep(20);
4442                         outbound_doorbell = readl(&reg->outbound_doorbell);
4443                         if (outbound_doorbell &
4444                                 ARCMSR_HBCMU_IOP2DRV_DATA_WRITE_OK) {
4445                                 writel(outbound_doorbell,
4446                                         &reg->outbound_doorbell_clear);
4447                                 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK,
4448                                         &reg->inbound_doorbell);
4449                         } else
4450                                 break;
4451                 }
4452                 }
4453                 break;
4454         case ACB_ADAPTER_TYPE_D: {
4455                 struct MessageUnit_D *reg = acb->pmuD;
4456                 uint32_t outbound_doorbell, i;
4457                 /* empty doorbell Qbuffer if door bell ringed */
4458                 outbound_doorbell = readl(reg->outbound_doorbell);
4459                 writel(outbound_doorbell, reg->outbound_doorbell);
4460                 writel(ARCMSR_ARC1214_DRV2IOP_DATA_OUT_READ,
4461                         reg->inbound_doorbell);
4462                 for (i = 0; i < 200; i++) {
4463                         msleep(20);
4464                         outbound_doorbell = readl(reg->outbound_doorbell);
4465                         if (outbound_doorbell &
4466                                 ARCMSR_ARC1214_IOP2DRV_DATA_WRITE_OK) {
4467                                 writel(outbound_doorbell,
4468                                         reg->outbound_doorbell);
4469                                 writel(ARCMSR_ARC1214_DRV2IOP_DATA_OUT_READ,
4470                                         reg->inbound_doorbell);
4471                         } else
4472                                 break;
4473                 }
4474                 }
4475                 break;
4476         case ACB_ADAPTER_TYPE_E:
4477         case ACB_ADAPTER_TYPE_F: {
4478                 struct MessageUnit_E __iomem *reg = acb->pmuE;
4479                 uint32_t i, tmp;
4480
4481                 acb->in_doorbell = readl(&reg->iobound_doorbell);
4482                 writel(0, &reg->host_int_status); /*clear interrupt*/
4483                 acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_DATA_READ_OK;
4484                 writel(acb->out_doorbell, &reg->iobound_doorbell);
4485                 for(i=0; i < 200; i++) {
4486                         msleep(20);
4487                         tmp = acb->in_doorbell;
4488                         acb->in_doorbell = readl(&reg->iobound_doorbell);
4489                         if((tmp ^ acb->in_doorbell) & ARCMSR_HBEMU_IOP2DRV_DATA_WRITE_OK) {
4490                                 writel(0, &reg->host_int_status); /*clear interrupt*/
4491                                 acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_DATA_READ_OK;
4492                                 writel(acb->out_doorbell, &reg->iobound_doorbell);
4493                         } else
4494                                 break;
4495                 }
4496                 }
4497                 break;
4498         }
4499 }
4500
4501 static void arcmsr_enable_eoi_mode(struct AdapterControlBlock *acb)
4502 {
4503         switch (acb->adapter_type) {
4504         case ACB_ADAPTER_TYPE_A:
4505                 return;
4506         case ACB_ADAPTER_TYPE_B:
4507                 {
4508                         struct MessageUnit_B *reg = acb->pmuB;
4509                         writel(ARCMSR_MESSAGE_ACTIVE_EOI_MODE, reg->drv2iop_doorbell);
4510                         if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
4511                                 printk(KERN_NOTICE "ARCMSR IOP enables EOI_MODE TIMEOUT");
4512                                 return;
4513                         }
4514                 }
4515                 break;
4516         case ACB_ADAPTER_TYPE_C:
4517                 return;
4518         }
4519         return;
4520 }
4521
4522 static void arcmsr_hardware_reset(struct AdapterControlBlock *acb)
4523 {
4524         uint8_t value[64];
4525         int i, count = 0;
4526         struct MessageUnit_A __iomem *pmuA = acb->pmuA;
4527         struct MessageUnit_C __iomem *pmuC = acb->pmuC;
4528         struct MessageUnit_D *pmuD = acb->pmuD;
4529
4530         /* backup pci config data */
4531         printk(KERN_NOTICE "arcmsr%d: executing hw bus reset .....\n", acb->host->host_no);
4532         for (i = 0; i < 64; i++) {
4533                 pci_read_config_byte(acb->pdev, i, &value[i]);
4534         }
4535         /* hardware reset signal */
4536         if (acb->dev_id == 0x1680) {
4537                 writel(ARCMSR_ARC1680_BUS_RESET, &pmuA->reserved1[0]);
4538         } else if (acb->dev_id == 0x1880) {
4539                 do {
4540                         count++;
4541                         writel(0xF, &pmuC->write_sequence);
4542                         writel(0x4, &pmuC->write_sequence);
4543                         writel(0xB, &pmuC->write_sequence);
4544                         writel(0x2, &pmuC->write_sequence);
4545                         writel(0x7, &pmuC->write_sequence);
4546                         writel(0xD, &pmuC->write_sequence);
4547                 } while (((readl(&pmuC->host_diagnostic) & ARCMSR_ARC1880_DiagWrite_ENABLE) == 0) && (count < 5));
4548                 writel(ARCMSR_ARC1880_RESET_ADAPTER, &pmuC->host_diagnostic);
4549         } else if (acb->dev_id == 0x1884) {
4550                 struct MessageUnit_E __iomem *pmuE = acb->pmuE;
4551                 do {
4552                         count++;
4553                         writel(0x4, &pmuE->write_sequence_3xxx);
4554                         writel(0xB, &pmuE->write_sequence_3xxx);
4555                         writel(0x2, &pmuE->write_sequence_3xxx);
4556                         writel(0x7, &pmuE->write_sequence_3xxx);
4557                         writel(0xD, &pmuE->write_sequence_3xxx);
4558                         mdelay(10);
4559                 } while (((readl(&pmuE->host_diagnostic_3xxx) &
4560                         ARCMSR_ARC1884_DiagWrite_ENABLE) == 0) && (count < 5));
4561                 writel(ARCMSR_ARC188X_RESET_ADAPTER, &pmuE->host_diagnostic_3xxx);
4562         } else if (acb->dev_id == 0x1214) {
4563                 writel(0x20, pmuD->reset_request);
4564         } else {
4565                 pci_write_config_byte(acb->pdev, 0x84, 0x20);
4566         }
4567         msleep(2000);
4568         /* write back pci config data */
4569         for (i = 0; i < 64; i++) {
4570                 pci_write_config_byte(acb->pdev, i, value[i]);
4571         }
4572         msleep(1000);
4573         return;
4574 }
4575
4576 static bool arcmsr_reset_in_progress(struct AdapterControlBlock *acb)
4577 {
4578         bool rtn = true;
4579
4580         switch(acb->adapter_type) {
4581         case ACB_ADAPTER_TYPE_A:{
4582                 struct MessageUnit_A __iomem *reg = acb->pmuA;
4583                 rtn = ((readl(&reg->outbound_msgaddr1) &
4584                         ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK) == 0) ? true : false;
4585                 }
4586                 break;
4587         case ACB_ADAPTER_TYPE_B:{
4588                 struct MessageUnit_B *reg = acb->pmuB;
4589                 rtn = ((readl(reg->iop2drv_doorbell) &
4590                         ARCMSR_MESSAGE_FIRMWARE_OK) == 0) ? true : false;
4591                 }
4592                 break;
4593         case ACB_ADAPTER_TYPE_C:{
4594                 struct MessageUnit_C __iomem *reg = acb->pmuC;
4595                 rtn = (readl(&reg->host_diagnostic) & 0x04) ? true : false;
4596                 }
4597                 break;
4598         case ACB_ADAPTER_TYPE_D:{
4599                 struct MessageUnit_D *reg = acb->pmuD;
4600                 rtn = ((readl(reg->sample_at_reset) & 0x80) == 0) ?
4601                         true : false;
4602                 }
4603                 break;
4604         case ACB_ADAPTER_TYPE_E:
4605         case ACB_ADAPTER_TYPE_F:{
4606                 struct MessageUnit_E __iomem *reg = acb->pmuE;
4607                 rtn = (readl(&reg->host_diagnostic_3xxx) &
4608                         ARCMSR_ARC188X_RESET_ADAPTER) ? true : false;
4609                 }
4610                 break;
4611         }
4612         return rtn;
4613 }
4614
4615 static void arcmsr_iop_init(struct AdapterControlBlock *acb)
4616 {
4617         uint32_t intmask_org;
4618         /* disable all outbound interrupt */
4619         intmask_org = arcmsr_disable_outbound_ints(acb);
4620         arcmsr_wait_firmware_ready(acb);
4621         arcmsr_iop_confirm(acb);
4622         /*start background rebuild*/
4623         arcmsr_start_adapter_bgrb(acb);
4624         /* empty doorbell Qbuffer if door bell ringed */
4625         arcmsr_clear_doorbell_queue_buffer(acb);
4626         arcmsr_enable_eoi_mode(acb);
4627         /* enable outbound Post Queue,outbound doorbell Interrupt */
4628         arcmsr_enable_outbound_ints(acb, intmask_org);
4629         acb->acb_flags |= ACB_F_IOP_INITED;
4630 }
4631
4632 static uint8_t arcmsr_iop_reset(struct AdapterControlBlock *acb)
4633 {
4634         struct CommandControlBlock *ccb;
4635         uint32_t intmask_org;
4636         uint8_t rtnval = 0x00;
4637         int i = 0;
4638         unsigned long flags;
4639
4640         if (atomic_read(&acb->ccboutstandingcount) != 0) {
4641                 /* disable all outbound interrupt */
4642                 intmask_org = arcmsr_disable_outbound_ints(acb);
4643                 /* talk to iop 331 outstanding command aborted */
4644                 rtnval = arcmsr_abort_allcmd(acb);
4645                 /* clear all outbound posted Q */
4646                 arcmsr_done4abort_postqueue(acb);
4647                 for (i = 0; i < acb->maxFreeCCB; i++) {
4648                         ccb = acb->pccb_pool[i];
4649                         if (ccb->startdone == ARCMSR_CCB_START) {
4650                                 scsi_dma_unmap(ccb->pcmd);
4651                                 ccb->startdone = ARCMSR_CCB_DONE;
4652                                 ccb->ccb_flags = 0;
4653                                 spin_lock_irqsave(&acb->ccblist_lock, flags);
4654                                 list_add_tail(&ccb->list, &acb->ccb_free_list);
4655                                 spin_unlock_irqrestore(&acb->ccblist_lock, flags);
4656                         }
4657                 }
4658                 atomic_set(&acb->ccboutstandingcount, 0);
4659                 /* enable all outbound interrupt */
4660                 arcmsr_enable_outbound_ints(acb, intmask_org);
4661                 return rtnval;
4662         }
4663         return rtnval;
4664 }
4665
4666 static int arcmsr_bus_reset(struct scsi_cmnd *cmd)
4667 {
4668         struct AdapterControlBlock *acb;
4669         int retry_count = 0;
4670         int rtn = FAILED;
4671         acb = (struct AdapterControlBlock *) cmd->device->host->hostdata;
4672         if (acb->acb_flags & ACB_F_ADAPTER_REMOVED)
4673                 return SUCCESS;
4674         pr_notice("arcmsr: executing bus reset eh.....num_resets = %d,"
4675                 " num_aborts = %d \n", acb->num_resets, acb->num_aborts);
4676         acb->num_resets++;
4677
4678         if (acb->acb_flags & ACB_F_BUS_RESET) {
4679                 long timeout;
4680                 pr_notice("arcmsr: there is a bus reset eh proceeding...\n");
4681                 timeout = wait_event_timeout(wait_q, (acb->acb_flags
4682                         & ACB_F_BUS_RESET) == 0, 220 * HZ);
4683                 if (timeout)
4684                         return SUCCESS;
4685         }
4686         acb->acb_flags |= ACB_F_BUS_RESET;
4687         if (!arcmsr_iop_reset(acb)) {
4688                 arcmsr_hardware_reset(acb);
4689                 acb->acb_flags &= ~ACB_F_IOP_INITED;
4690 wait_reset_done:
4691                 ssleep(ARCMSR_SLEEPTIME);
4692                 if (arcmsr_reset_in_progress(acb)) {
4693                         if (retry_count > ARCMSR_RETRYCOUNT) {
4694                                 acb->fw_flag = FW_DEADLOCK;
4695                                 pr_notice("arcmsr%d: waiting for hw bus reset"
4696                                         " return, RETRY TERMINATED!!\n",
4697                                         acb->host->host_no);
4698                                 return FAILED;
4699                         }
4700                         retry_count++;
4701                         goto wait_reset_done;
4702                 }
4703                 arcmsr_iop_init(acb);
4704                 acb->fw_flag = FW_NORMAL;
4705                 mod_timer(&acb->eternal_timer, jiffies +
4706                         msecs_to_jiffies(6 * HZ));
4707                 acb->acb_flags &= ~ACB_F_BUS_RESET;
4708                 rtn = SUCCESS;
4709                 pr_notice("arcmsr: scsi bus reset eh returns with success\n");
4710         } else {
4711                 acb->acb_flags &= ~ACB_F_BUS_RESET;
4712                 acb->fw_flag = FW_NORMAL;
4713                 mod_timer(&acb->eternal_timer, jiffies +
4714                         msecs_to_jiffies(6 * HZ));
4715                 rtn = SUCCESS;
4716         }
4717         return rtn;
4718 }
4719
4720 static int arcmsr_abort_one_cmd(struct AdapterControlBlock *acb,
4721                 struct CommandControlBlock *ccb)
4722 {
4723         int rtn;
4724         rtn = arcmsr_polling_ccbdone(acb, ccb);
4725         return rtn;
4726 }
4727
4728 static int arcmsr_abort(struct scsi_cmnd *cmd)
4729 {
4730         struct AdapterControlBlock *acb =
4731                 (struct AdapterControlBlock *)cmd->device->host->hostdata;
4732         int i = 0;
4733         int rtn = FAILED;
4734         uint32_t intmask_org;
4735
4736         if (acb->acb_flags & ACB_F_ADAPTER_REMOVED)
4737                 return SUCCESS;
4738         printk(KERN_NOTICE
4739                 "arcmsr%d: abort device command of scsi id = %d lun = %d\n",
4740                 acb->host->host_no, cmd->device->id, (u32)cmd->device->lun);
4741         acb->acb_flags |= ACB_F_ABORT;
4742         acb->num_aborts++;
4743         /*
4744         ************************************************
4745         ** the all interrupt service routine is locked
4746         ** we need to handle it as soon as possible and exit
4747         ************************************************
4748         */
4749         if (!atomic_read(&acb->ccboutstandingcount)) {
4750                 acb->acb_flags &= ~ACB_F_ABORT;
4751                 return rtn;
4752         }
4753
4754         intmask_org = arcmsr_disable_outbound_ints(acb);
4755         for (i = 0; i < acb->maxFreeCCB; i++) {
4756                 struct CommandControlBlock *ccb = acb->pccb_pool[i];
4757                 if (ccb->startdone == ARCMSR_CCB_START && ccb->pcmd == cmd) {
4758                         ccb->startdone = ARCMSR_CCB_ABORTED;
4759                         rtn = arcmsr_abort_one_cmd(acb, ccb);
4760                         break;
4761                 }
4762         }
4763         acb->acb_flags &= ~ACB_F_ABORT;
4764         arcmsr_enable_outbound_ints(acb, intmask_org);
4765         return rtn;
4766 }
4767
4768 static const char *arcmsr_info(struct Scsi_Host *host)
4769 {
4770         struct AdapterControlBlock *acb =
4771                 (struct AdapterControlBlock *) host->hostdata;
4772         static char buf[256];
4773         char *type;
4774         int raid6 = 1;
4775         switch (acb->pdev->device) {
4776         case PCI_DEVICE_ID_ARECA_1110:
4777         case PCI_DEVICE_ID_ARECA_1200:
4778         case PCI_DEVICE_ID_ARECA_1202:
4779         case PCI_DEVICE_ID_ARECA_1210:
4780                 raid6 = 0;
4781                 fallthrough;
4782         case PCI_DEVICE_ID_ARECA_1120:
4783         case PCI_DEVICE_ID_ARECA_1130:
4784         case PCI_DEVICE_ID_ARECA_1160:
4785         case PCI_DEVICE_ID_ARECA_1170:
4786         case PCI_DEVICE_ID_ARECA_1201:
4787         case PCI_DEVICE_ID_ARECA_1203:
4788         case PCI_DEVICE_ID_ARECA_1220:
4789         case PCI_DEVICE_ID_ARECA_1230:
4790         case PCI_DEVICE_ID_ARECA_1260:
4791         case PCI_DEVICE_ID_ARECA_1270:
4792         case PCI_DEVICE_ID_ARECA_1280:
4793                 type = "SATA";
4794                 break;
4795         case PCI_DEVICE_ID_ARECA_1214:
4796         case PCI_DEVICE_ID_ARECA_1380:
4797         case PCI_DEVICE_ID_ARECA_1381:
4798         case PCI_DEVICE_ID_ARECA_1680:
4799         case PCI_DEVICE_ID_ARECA_1681:
4800         case PCI_DEVICE_ID_ARECA_1880:
4801         case PCI_DEVICE_ID_ARECA_1883:
4802         case PCI_DEVICE_ID_ARECA_1884:
4803                 type = "SAS/SATA";
4804                 break;
4805         case PCI_DEVICE_ID_ARECA_1886_0:
4806         case PCI_DEVICE_ID_ARECA_1886:
4807                 type = "NVMe/SAS/SATA";
4808                 break;
4809         default:
4810                 type = "unknown";
4811                 raid6 = 0;
4812                 break;
4813         }
4814         sprintf(buf, "Areca %s RAID Controller %s\narcmsr version %s\n",
4815                 type, raid6 ? "(RAID6 capable)" : "", ARCMSR_DRIVER_VERSION);
4816         return buf;
4817 }