drivers/net/phy/phylink.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * phylink models the MAC to optional PHY connection, supporting
   4  * technologies such as SFP cages where the PHY is hot-pluggable.
   5  *
   6  * Copyright (C) 2015 Russell King
   7  */
   8 #include <linux/acpi.h>
   9 #include <linux/ethtool.h>
  10 #include <linux/export.h>
  11 #include <linux/gpio/consumer.h>
  12 #include <linux/netdevice.h>
  13 #include <linux/of.h>
  14 #include <linux/of_mdio.h>
  15 #include <linux/phy.h>
  16 #include <linux/phy_fixed.h>
  17 #include <linux/phylink.h>
  18 #include <linux/rtnetlink.h>
  19 #include <linux/spinlock.h>
  20 #include <linux/timer.h>
  21 #include <linux/workqueue.h>
  22
  23 #include "sfp.h"
  24 #include "swphy.h"
  25
  26 #define SUPPORTED_INTERFACES \
  27         (SUPPORTED_TP | SUPPORTED_MII | SUPPORTED_FIBRE | \
  28          SUPPORTED_BNC | SUPPORTED_AUI | SUPPORTED_Backplane)
  29 #define ADVERTISED_INTERFACES \
  30         (ADVERTISED_TP | ADVERTISED_MII | ADVERTISED_FIBRE | \
  31          ADVERTISED_BNC | ADVERTISED_AUI | ADVERTISED_Backplane)
  32
  33 enum {
  34         PHYLINK_DISABLE_STOPPED,
  35         PHYLINK_DISABLE_LINK,
  36         PHYLINK_DISABLE_MAC_WOL,
  37
  38         PCS_STATE_DOWN = 0,
  39         PCS_STATE_STARTING,
  40         PCS_STATE_STARTED,
  41 };
  42
  43 /**
  44  * struct phylink - internal data type for phylink
  45  */
  46 struct phylink {
  47         /* private: */
  48         struct net_device *netdev;
  49         const struct phylink_mac_ops *mac_ops;
  50         struct phylink_config *config;
  51         struct phylink_pcs *pcs;
  52         struct device *dev;
  53         unsigned int old_link_state:1;
  54
  55         unsigned long phylink_disable_state; /* bitmask of disables */
  56         struct phy_device *phydev;
  57         phy_interface_t link_interface; /* PHY_INTERFACE_xxx */
  58         u8 cfg_link_an_mode;            /* MLO_AN_xxx */
  59         u8 cur_link_an_mode;
  60         u8 link_port;                   /* The current non-phy ethtool port */
  61         __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
  62
  63         /* The link configuration settings */
  64         struct phylink_link_state link_config;
  65
  66         /* The current settings */
  67         phy_interface_t cur_interface;
  68
  69         struct gpio_desc *link_gpio;
  70         unsigned int link_irq;
  71         struct timer_list link_poll;
  72         void (*get_fixed_state)(struct net_device *dev,
  73                                 struct phylink_link_state *s);
  74
  75         struct mutex state_mutex;
  76         struct phylink_link_state phy_state;
  77         struct work_struct resolve;
  78         unsigned int pcs_neg_mode;
  79         unsigned int pcs_state;
  80
  81         bool mac_link_dropped;
  82         bool using_mac_select_pcs;
  83
  84         struct sfp_bus *sfp_bus;
  85         bool sfp_may_have_phy;
  86         DECLARE_PHY_INTERFACE_MASK(sfp_interfaces);
  87         __ETHTOOL_DECLARE_LINK_MODE_MASK(sfp_support);
  88         u8 sfp_port;
  89 };
  90
  91 #define phylink_printk(level, pl, fmt, ...) \
  92         do { \
  93                 if ((pl)->config->type == PHYLINK_NETDEV) \
  94                         netdev_printk(level, (pl)->netdev, fmt, ##__VA_ARGS__); \
  95                 else if ((pl)->config->type == PHYLINK_DEV) \
  96                         dev_printk(level, (pl)->dev, fmt, ##__VA_ARGS__); \
  97         } while (0)
  98
  99 #define phylink_err(pl, fmt, ...) \
 100         phylink_printk(KERN_ERR, pl, fmt, ##__VA_ARGS__)
 101 #define phylink_warn(pl, fmt, ...) \
 102         phylink_printk(KERN_WARNING, pl, fmt, ##__VA_ARGS__)
 103 #define phylink_info(pl, fmt, ...) \
 104         phylink_printk(KERN_INFO, pl, fmt, ##__VA_ARGS__)
 105 #if defined(CONFIG_DYNAMIC_DEBUG)
 106 #define phylink_dbg(pl, fmt, ...) \
 107 do {                                                                    \
 108         if ((pl)->config->type == PHYLINK_NETDEV)                       \
 109                 netdev_dbg((pl)->netdev, fmt, ##__VA_ARGS__);           \
 110         else if ((pl)->config->type == PHYLINK_DEV)                     \
 111                 dev_dbg((pl)->dev, fmt, ##__VA_ARGS__);                 \
 112 } while (0)
 113 #elif defined(DEBUG)
 114 #define phylink_dbg(pl, fmt, ...)                                       \
 115         phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__)
 116 #else
 117 #define phylink_dbg(pl, fmt, ...)                                       \
 118 ({                                                                      \
 119         if (0)                                                          \
 120                 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__);     \
 121 })
 122 #endif
 123
 124 static const phy_interface_t phylink_sfp_interface_preference[] = {
 125         PHY_INTERFACE_MODE_25GBASER,
 126         PHY_INTERFACE_MODE_USXGMII,
 127         PHY_INTERFACE_MODE_10GBASER,
 128         PHY_INTERFACE_MODE_5GBASER,
 129         PHY_INTERFACE_MODE_2500BASEX,
 130         PHY_INTERFACE_MODE_SGMII,
 131         PHY_INTERFACE_MODE_1000BASEX,
 132         PHY_INTERFACE_MODE_100BASEX,
 133 };
 134
 135 static DECLARE_PHY_INTERFACE_MASK(phylink_sfp_interfaces);
 136
 137 /**
 138  * phylink_set_port_modes() - set the port type modes in the ethtool mask
 139  * @mask: ethtool link mode mask
 140  *
 141  * Sets all the port type modes in the ethtool mask.  MAC drivers should
 142  * use this in their 'validate' callback.
 143  */
 144 void phylink_set_port_modes(unsigned long *mask)
 145 {
 146         phylink_set(mask, TP);
 147         phylink_set(mask, AUI);
 148         phylink_set(mask, MII);
 149         phylink_set(mask, FIBRE);
 150         phylink_set(mask, BNC);
 151         phylink_set(mask, Backplane);
 152 }
 153 EXPORT_SYMBOL_GPL(phylink_set_port_modes);
 154
 155 static int phylink_is_empty_linkmode(const unsigned long *linkmode)
 156 {
 157         __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp) = { 0, };
 158
 159         phylink_set_port_modes(tmp);
 160         phylink_set(tmp, Autoneg);
 161         phylink_set(tmp, Pause);
 162         phylink_set(tmp, Asym_Pause);
 163
 164         return linkmode_subset(linkmode, tmp);
 165 }
 166
 167 static const char *phylink_an_mode_str(unsigned int mode)
 168 {
 169         static const char *modestr[] = {
 170                 [MLO_AN_PHY] = "phy",
 171                 [MLO_AN_FIXED] = "fixed",
 172                 [MLO_AN_INBAND] = "inband",
 173         };
 174
 175         return mode < ARRAY_SIZE(modestr) ? modestr[mode] : "unknown";
 176 }
 177
 178 static unsigned int phylink_interface_signal_rate(phy_interface_t interface)
 179 {
 180         switch (interface) {
 181         case PHY_INTERFACE_MODE_SGMII:
 182         case PHY_INTERFACE_MODE_1000BASEX: /* 1.25Mbd */
 183                 return 1250;
 184         case PHY_INTERFACE_MODE_2500BASEX: /* 3.125Mbd */
 185                 return 3125;
 186         case PHY_INTERFACE_MODE_5GBASER: /* 5.15625Mbd */
 187                 return 5156;
 188         case PHY_INTERFACE_MODE_10GBASER: /* 10.3125Mbd */
 189                 return 10313;
 190         default:
 191                 return 0;
 192         }
 193 }
 194
 195 /**
 196  * phylink_interface_max_speed() - get the maximum speed of a phy interface
 197  * @interface: phy interface mode defined by &typedef phy_interface_t
 198  *
 199  * Determine the maximum speed of a phy interface. This is intended to help
 200  * determine the correct speed to pass to the MAC when the phy is performing
 201  * rate matching.
 202  *
 203  * Return: The maximum speed of @interface
 204  */
 205 static int phylink_interface_max_speed(phy_interface_t interface)
 206 {
 207         switch (interface) {
 208         case PHY_INTERFACE_MODE_100BASEX:
 209         case PHY_INTERFACE_MODE_REVRMII:
 210         case PHY_INTERFACE_MODE_RMII:
 211         case PHY_INTERFACE_MODE_SMII:
 212         case PHY_INTERFACE_MODE_REVMII:
 213         case PHY_INTERFACE_MODE_MII:
 214                 return SPEED_100;
 215
 216         case PHY_INTERFACE_MODE_TBI:
 217         case PHY_INTERFACE_MODE_MOCA:
 218         case PHY_INTERFACE_MODE_RTBI:
 219         case PHY_INTERFACE_MODE_1000BASEX:
 220         case PHY_INTERFACE_MODE_1000BASEKX:
 221         case PHY_INTERFACE_MODE_TRGMII:
 222         case PHY_INTERFACE_MODE_RGMII_TXID:
 223         case PHY_INTERFACE_MODE_RGMII_RXID:
 224         case PHY_INTERFACE_MODE_RGMII_ID:
 225         case PHY_INTERFACE_MODE_RGMII:
 226         case PHY_INTERFACE_MODE_PSGMII:
 227         case PHY_INTERFACE_MODE_QSGMII:
 228         case PHY_INTERFACE_MODE_QUSGMII:
 229         case PHY_INTERFACE_MODE_SGMII:
 230         case PHY_INTERFACE_MODE_GMII:
 231                 return SPEED_1000;
 232
 233         case PHY_INTERFACE_MODE_2500BASEX:
 234         case PHY_INTERFACE_MODE_10G_QXGMII:
 235                 return SPEED_2500;
 236
 237         case PHY_INTERFACE_MODE_5GBASER:
 238                 return SPEED_5000;
 239
 240         case PHY_INTERFACE_MODE_XGMII:
 241         case PHY_INTERFACE_MODE_RXAUI:
 242         case PHY_INTERFACE_MODE_XAUI:
 243         case PHY_INTERFACE_MODE_10GBASER:
 244         case PHY_INTERFACE_MODE_10GKR:
 245         case PHY_INTERFACE_MODE_USXGMII:
 246                 return SPEED_10000;
 247
 248         case PHY_INTERFACE_MODE_25GBASER:
 249                 return SPEED_25000;
 250
 251         case PHY_INTERFACE_MODE_XLGMII:
 252                 return SPEED_40000;
 253
 254         case PHY_INTERFACE_MODE_INTERNAL:
 255         case PHY_INTERFACE_MODE_NA:
 256         case PHY_INTERFACE_MODE_MAX:
 257                 /* No idea! Garbage in, unknown out */
 258                 return SPEED_UNKNOWN;
 259         }
 260
 261         /* If we get here, someone forgot to add an interface mode above */
 262         WARN_ON_ONCE(1);
 263         return SPEED_UNKNOWN;
 264 }
 265
 266 /**
 267  * phylink_caps_to_linkmodes() - Convert capabilities to ethtool link modes
 268  * @linkmodes: ethtool linkmode mask (must be already initialised)
 269  * @caps: bitmask of MAC capabilities
 270  *
 271  * Set all possible pause, speed and duplex linkmodes in @linkmodes that are
 272  * supported by the @caps. @linkmodes must have been initialised previously.
 273  */
 274 static void phylink_caps_to_linkmodes(unsigned long *linkmodes,
 275                                       unsigned long caps)
 276 {
 277         if (caps & MAC_SYM_PAUSE)
 278                 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, linkmodes);
 279
 280         if (caps & MAC_ASYM_PAUSE)
 281                 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, linkmodes);
 282
 283         if (caps & MAC_10HD) {
 284                 __set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, linkmodes);
 285                 __set_bit(ETHTOOL_LINK_MODE_10baseT1S_Half_BIT, linkmodes);
 286                 __set_bit(ETHTOOL_LINK_MODE_10baseT1S_P2MP_Half_BIT, linkmodes);
 287         }
 288
 289         if (caps & MAC_10FD) {
 290                 __set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT, linkmodes);
 291                 __set_bit(ETHTOOL_LINK_MODE_10baseT1L_Full_BIT, linkmodes);
 292                 __set_bit(ETHTOOL_LINK_MODE_10baseT1S_Full_BIT, linkmodes);
 293         }
 294
 295         if (caps & MAC_100HD) {
 296                 __set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, linkmodes);
 297                 __set_bit(ETHTOOL_LINK_MODE_100baseFX_Half_BIT, linkmodes);
 298         }
 299
 300         if (caps & MAC_100FD) {
 301                 __set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, linkmodes);
 302                 __set_bit(ETHTOOL_LINK_MODE_100baseT1_Full_BIT, linkmodes);
 303                 __set_bit(ETHTOOL_LINK_MODE_100baseFX_Full_BIT, linkmodes);
 304         }
 305
 306         if (caps & MAC_1000HD)
 307                 __set_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, linkmodes);
 308
 309         if (caps & MAC_1000FD) {
 310                 __set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, linkmodes);
 311                 __set_bit(ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, linkmodes);
 312                 __set_bit(ETHTOOL_LINK_MODE_1000baseX_Full_BIT, linkmodes);
 313                 __set_bit(ETHTOOL_LINK_MODE_1000baseT1_Full_BIT, linkmodes);
 314         }
 315
 316         if (caps & MAC_2500FD) {
 317                 __set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, linkmodes);
 318                 __set_bit(ETHTOOL_LINK_MODE_2500baseX_Full_BIT, linkmodes);
 319         }
 320
 321         if (caps & MAC_5000FD)
 322                 __set_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, linkmodes);
 323
 324         if (caps & MAC_10000FD) {
 325                 __set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, linkmodes);
 326                 __set_bit(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, linkmodes);
 327                 __set_bit(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, linkmodes);
 328                 __set_bit(ETHTOOL_LINK_MODE_10000baseR_FEC_BIT, linkmodes);
 329                 __set_bit(ETHTOOL_LINK_MODE_10000baseCR_Full_BIT, linkmodes);
 330                 __set_bit(ETHTOOL_LINK_MODE_10000baseSR_Full_BIT, linkmodes);
 331                 __set_bit(ETHTOOL_LINK_MODE_10000baseLR_Full_BIT, linkmodes);
 332                 __set_bit(ETHTOOL_LINK_MODE_10000baseLRM_Full_BIT, linkmodes);
 333                 __set_bit(ETHTOOL_LINK_MODE_10000baseER_Full_BIT, linkmodes);
 334         }
 335
 336         if (caps & MAC_25000FD) {
 337                 __set_bit(ETHTOOL_LINK_MODE_25000baseCR_Full_BIT, linkmodes);
 338                 __set_bit(ETHTOOL_LINK_MODE_25000baseKR_Full_BIT, linkmodes);
 339                 __set_bit(ETHTOOL_LINK_MODE_25000baseSR_Full_BIT, linkmodes);
 340         }
 341
 342         if (caps & MAC_40000FD) {
 343                 __set_bit(ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, linkmodes);
 344                 __set_bit(ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, linkmodes);
 345                 __set_bit(ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT, linkmodes);
 346                 __set_bit(ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT, linkmodes);
 347         }
 348
 349         if (caps & MAC_50000FD) {
 350                 __set_bit(ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT, linkmodes);
 351                 __set_bit(ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT, linkmodes);
 352                 __set_bit(ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT, linkmodes);
 353                 __set_bit(ETHTOOL_LINK_MODE_50000baseKR_Full_BIT, linkmodes);
 354                 __set_bit(ETHTOOL_LINK_MODE_50000baseSR_Full_BIT, linkmodes);
 355                 __set_bit(ETHTOOL_LINK_MODE_50000baseCR_Full_BIT, linkmodes);
 356                 __set_bit(ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT,
 357                           linkmodes);
 358                 __set_bit(ETHTOOL_LINK_MODE_50000baseDR_Full_BIT, linkmodes);
 359         }
 360
 361         if (caps & MAC_56000FD) {
 362                 __set_bit(ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT, linkmodes);
 363                 __set_bit(ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT, linkmodes);
 364                 __set_bit(ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT, linkmodes);
 365                 __set_bit(ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT, linkmodes);
 366         }
 367
 368         if (caps & MAC_100000FD) {
 369                 __set_bit(ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, linkmodes);
 370                 __set_bit(ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT, linkmodes);
 371                 __set_bit(ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, linkmodes);
 372                 __set_bit(ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT,
 373                           linkmodes);
 374                 __set_bit(ETHTOOL_LINK_MODE_100000baseKR2_Full_BIT, linkmodes);
 375                 __set_bit(ETHTOOL_LINK_MODE_100000baseSR2_Full_BIT, linkmodes);
 376                 __set_bit(ETHTOOL_LINK_MODE_100000baseCR2_Full_BIT, linkmodes);
 377                 __set_bit(ETHTOOL_LINK_MODE_100000baseLR2_ER2_FR2_Full_BIT,
 378                           linkmodes);
 379                 __set_bit(ETHTOOL_LINK_MODE_100000baseDR2_Full_BIT, linkmodes);
 380                 __set_bit(ETHTOOL_LINK_MODE_100000baseKR_Full_BIT, linkmodes);
 381                 __set_bit(ETHTOOL_LINK_MODE_100000baseSR_Full_BIT, linkmodes);
 382                 __set_bit(ETHTOOL_LINK_MODE_100000baseLR_ER_FR_Full_BIT,
 383                           linkmodes);
 384                 __set_bit(ETHTOOL_LINK_MODE_100000baseCR_Full_BIT, linkmodes);
 385                 __set_bit(ETHTOOL_LINK_MODE_100000baseDR_Full_BIT, linkmodes);
 386         }
 387
 388         if (caps & MAC_200000FD) {
 389                 __set_bit(ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT, linkmodes);
 390                 __set_bit(ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT, linkmodes);
 391                 __set_bit(ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT,
 392                           linkmodes);
 393                 __set_bit(ETHTOOL_LINK_MODE_200000baseDR4_Full_BIT, linkmodes);
 394                 __set_bit(ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT, linkmodes);
 395                 __set_bit(ETHTOOL_LINK_MODE_200000baseKR2_Full_BIT, linkmodes);
 396                 __set_bit(ETHTOOL_LINK_MODE_200000baseSR2_Full_BIT, linkmodes);
 397                 __set_bit(ETHTOOL_LINK_MODE_200000baseLR2_ER2_FR2_Full_BIT,
 398                           linkmodes);
 399                 __set_bit(ETHTOOL_LINK_MODE_200000baseDR2_Full_BIT, linkmodes);
 400                 __set_bit(ETHTOOL_LINK_MODE_200000baseCR2_Full_BIT, linkmodes);
 401         }
 402
 403         if (caps & MAC_400000FD) {
 404                 __set_bit(ETHTOOL_LINK_MODE_400000baseKR8_Full_BIT, linkmodes);
 405                 __set_bit(ETHTOOL_LINK_MODE_400000baseSR8_Full_BIT, linkmodes);
 406                 __set_bit(ETHTOOL_LINK_MODE_400000baseLR8_ER8_FR8_Full_BIT,
 407                           linkmodes);
 408                 __set_bit(ETHTOOL_LINK_MODE_400000baseDR8_Full_BIT, linkmodes);
 409                 __set_bit(ETHTOOL_LINK_MODE_400000baseCR8_Full_BIT, linkmodes);
 410                 __set_bit(ETHTOOL_LINK_MODE_400000baseKR4_Full_BIT, linkmodes);
 411                 __set_bit(ETHTOOL_LINK_MODE_400000baseSR4_Full_BIT, linkmodes);
 412                 __set_bit(ETHTOOL_LINK_MODE_400000baseLR4_ER4_FR4_Full_BIT,
 413                           linkmodes);
 414                 __set_bit(ETHTOOL_LINK_MODE_400000baseDR4_Full_BIT, linkmodes);
 415                 __set_bit(ETHTOOL_LINK_MODE_400000baseCR4_Full_BIT, linkmodes);
 416         }
 417 }
 418
 419 static struct {
 420         unsigned long mask;
 421         int speed;
 422         unsigned int duplex;
 423 } phylink_caps_params[] = {
 424         { MAC_400000FD, SPEED_400000, DUPLEX_FULL },
 425         { MAC_200000FD, SPEED_200000, DUPLEX_FULL },
 426         { MAC_100000FD, SPEED_100000, DUPLEX_FULL },
 427         { MAC_56000FD,  SPEED_56000,  DUPLEX_FULL },
 428         { MAC_50000FD,  SPEED_50000,  DUPLEX_FULL },
 429         { MAC_40000FD,  SPEED_40000,  DUPLEX_FULL },
 430         { MAC_25000FD,  SPEED_25000,  DUPLEX_FULL },
 431         { MAC_20000FD,  SPEED_20000,  DUPLEX_FULL },
 432         { MAC_10000FD,  SPEED_10000,  DUPLEX_FULL },
 433         { MAC_5000FD,   SPEED_5000,   DUPLEX_FULL },
 434         { MAC_2500FD,   SPEED_2500,   DUPLEX_FULL },
 435         { MAC_1000FD,   SPEED_1000,   DUPLEX_FULL },
 436         { MAC_1000HD,   SPEED_1000,   DUPLEX_HALF },
 437         { MAC_100FD,    SPEED_100,    DUPLEX_FULL },
 438         { MAC_100HD,    SPEED_100,    DUPLEX_HALF },
 439         { MAC_10FD,     SPEED_10,     DUPLEX_FULL },
 440         { MAC_10HD,     SPEED_10,     DUPLEX_HALF },
 441 };
 442
 443 /**
 444  * phylink_limit_mac_speed - limit the phylink_config to a maximum speed
 445  * @config: pointer to a &struct phylink_config
 446  * @max_speed: maximum speed
 447  *
 448  * Mask off MAC capabilities for speeds higher than the @max_speed parameter.
 449  * Any further motifications of config.mac_capabilities will override this.
 450  */
 451 void phylink_limit_mac_speed(struct phylink_config *config, u32 max_speed)
 452 {
 453         int i;
 454
 455         for (i = 0; i < ARRAY_SIZE(phylink_caps_params) &&
 456                     phylink_caps_params[i].speed > max_speed; i++)
 457                 config->mac_capabilities &= ~phylink_caps_params[i].mask;
 458 }
 459 EXPORT_SYMBOL_GPL(phylink_limit_mac_speed);
 460
 461 /**
 462  * phylink_cap_from_speed_duplex - Get mac capability from speed/duplex
 463  * @speed: the speed to search for
 464  * @duplex: the duplex to search for
 465  *
 466  * Find the mac capability for a given speed and duplex.
 467  *
 468  * Return: A mask with the mac capability patching @speed and @duplex, or 0 if
 469  *         there were no matches.
 470  */
 471 static unsigned long phylink_cap_from_speed_duplex(int speed,
 472                                                    unsigned int duplex)
 473 {
 474         int i;
 475
 476         for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) {
 477                 if (speed == phylink_caps_params[i].speed &&
 478                     duplex == phylink_caps_params[i].duplex)
 479                         return phylink_caps_params[i].mask;
 480         }
 481
 482         return 0;
 483 }
 484
 485 /**
 486  * phylink_get_capabilities() - get capabilities for a given MAC
 487  * @interface: phy interface mode defined by &typedef phy_interface_t
 488  * @mac_capabilities: bitmask of MAC capabilities
 489  * @rate_matching: type of rate matching being performed
 490  *
 491  * Get the MAC capabilities that are supported by the @interface mode and
 492  * @mac_capabilities.
 493  */
 494 static unsigned long phylink_get_capabilities(phy_interface_t interface,
 495                                               unsigned long mac_capabilities,
 496                                               int rate_matching)
 497 {
 498         int max_speed = phylink_interface_max_speed(interface);
 499         unsigned long caps = MAC_SYM_PAUSE | MAC_ASYM_PAUSE;
 500         unsigned long matched_caps = 0;
 501
 502         switch (interface) {
 503         case PHY_INTERFACE_MODE_USXGMII:
 504                 caps |= MAC_10000FD | MAC_5000FD;
 505                 fallthrough;
 506
 507         case PHY_INTERFACE_MODE_10G_QXGMII:
 508                 caps |= MAC_2500FD;
 509                 fallthrough;
 510
 511         case PHY_INTERFACE_MODE_RGMII_TXID:
 512         case PHY_INTERFACE_MODE_RGMII_RXID:
 513         case PHY_INTERFACE_MODE_RGMII_ID:
 514         case PHY_INTERFACE_MODE_RGMII:
 515         case PHY_INTERFACE_MODE_PSGMII:
 516         case PHY_INTERFACE_MODE_QSGMII:
 517         case PHY_INTERFACE_MODE_QUSGMII:
 518         case PHY_INTERFACE_MODE_SGMII:
 519         case PHY_INTERFACE_MODE_GMII:
 520                 caps |= MAC_1000HD | MAC_1000FD;
 521                 fallthrough;
 522
 523         case PHY_INTERFACE_MODE_REVRMII:
 524         case PHY_INTERFACE_MODE_RMII:
 525         case PHY_INTERFACE_MODE_SMII:
 526         case PHY_INTERFACE_MODE_REVMII:
 527         case PHY_INTERFACE_MODE_MII:
 528                 caps |= MAC_10HD | MAC_10FD;
 529                 fallthrough;
 530
 531         case PHY_INTERFACE_MODE_100BASEX:
 532                 caps |= MAC_100HD | MAC_100FD;
 533                 break;
 534
 535         case PHY_INTERFACE_MODE_TBI:
 536         case PHY_INTERFACE_MODE_MOCA:
 537         case PHY_INTERFACE_MODE_RTBI:
 538         case PHY_INTERFACE_MODE_1000BASEX:
 539                 caps |= MAC_1000HD;
 540                 fallthrough;
 541         case PHY_INTERFACE_MODE_1000BASEKX:
 542         case PHY_INTERFACE_MODE_TRGMII:
 543                 caps |= MAC_1000FD;
 544                 break;
 545
 546         case PHY_INTERFACE_MODE_2500BASEX:
 547                 caps |= MAC_2500FD;
 548                 break;
 549
 550         case PHY_INTERFACE_MODE_5GBASER:
 551                 caps |= MAC_5000FD;
 552                 break;
 553
 554         case PHY_INTERFACE_MODE_XGMII:
 555         case PHY_INTERFACE_MODE_RXAUI:
 556         case PHY_INTERFACE_MODE_XAUI:
 557         case PHY_INTERFACE_MODE_10GBASER:
 558         case PHY_INTERFACE_MODE_10GKR:
 559                 caps |= MAC_10000FD;
 560                 break;
 561
 562         case PHY_INTERFACE_MODE_25GBASER:
 563                 caps |= MAC_25000FD;
 564                 break;
 565
 566         case PHY_INTERFACE_MODE_XLGMII:
 567                 caps |= MAC_40000FD;
 568                 break;
 569
 570         case PHY_INTERFACE_MODE_INTERNAL:
 571                 caps |= ~0;
 572                 break;
 573
 574         case PHY_INTERFACE_MODE_NA:
 575         case PHY_INTERFACE_MODE_MAX:
 576                 break;
 577         }
 578
 579         switch (rate_matching) {
 580         case RATE_MATCH_OPEN_LOOP:
 581                 /* TODO */
 582                 fallthrough;
 583         case RATE_MATCH_NONE:
 584                 matched_caps = 0;
 585                 break;
 586         case RATE_MATCH_PAUSE: {
 587                 /* The MAC must support asymmetric pause towards the local
 588                  * device for this. We could allow just symmetric pause, but
 589                  * then we might have to renegotiate if the link partner
 590                  * doesn't support pause. This is because there's no way to
 591                  * accept pause frames without transmitting them if we only
 592                  * support symmetric pause.
 593                  */
 594                 if (!(mac_capabilities & MAC_SYM_PAUSE) ||
 595                     !(mac_capabilities & MAC_ASYM_PAUSE))
 596                         break;
 597
 598                 /* We can't adapt if the MAC doesn't support the interface's
 599                  * max speed at full duplex.
 600                  */
 601                 if (mac_capabilities &
 602                     phylink_cap_from_speed_duplex(max_speed, DUPLEX_FULL)) {
 603                         /* Although a duplex-matching phy might exist, we
 604                          * conservatively remove these modes because the MAC
 605                          * will not be aware of the half-duplex nature of the
 606                          * link.
 607                          */
 608                         matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD));
 609                         matched_caps &= ~(MAC_1000HD | MAC_100HD | MAC_10HD);
 610                 }
 611                 break;
 612         }
 613         case RATE_MATCH_CRS:
 614                 /* The MAC must support half duplex at the interface's max
 615                  * speed.
 616                  */
 617                 if (mac_capabilities &
 618                     phylink_cap_from_speed_duplex(max_speed, DUPLEX_HALF)) {
 619                         matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD));
 620                         matched_caps &= mac_capabilities;
 621                 }
 622                 break;
 623         }
 624
 625         return (caps & mac_capabilities) | matched_caps;
 626 }
 627
 628 /**
 629  * phylink_validate_mask_caps() - Restrict link modes based on caps
 630  * @supported: ethtool bitmask for supported link modes.
 631  * @state: pointer to a &struct phylink_link_state.
 632  * @mac_capabilities: bitmask of MAC capabilities
 633  *
 634  * Calculate the supported link modes based on @mac_capabilities, and restrict
 635  * @supported and @state based on that. Use this function if your capabiliies
 636  * aren't constant, such as if they vary depending on the interface.
 637  */
 638 static void phylink_validate_mask_caps(unsigned long *supported,
 639                                        struct phylink_link_state *state,
 640                                        unsigned long mac_capabilities)
 641 {
 642         __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
 643         unsigned long caps;
 644
 645         phylink_set_port_modes(mask);
 646         phylink_set(mask, Autoneg);
 647         caps = phylink_get_capabilities(state->interface, mac_capabilities,
 648                                         state->rate_matching);
 649         phylink_caps_to_linkmodes(mask, caps);
 650
 651         linkmode_and(supported, supported, mask);
 652         linkmode_and(state->advertising, state->advertising, mask);
 653 }
 654
 655 static int phylink_validate_mac_and_pcs(struct phylink *pl,
 656                                         unsigned long *supported,
 657                                         struct phylink_link_state *state)
 658 {
 659         unsigned long capabilities;
 660         struct phylink_pcs *pcs;
 661         int ret;
 662
 663         /* Get the PCS for this interface mode */
 664         if (pl->using_mac_select_pcs) {
 665                 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface);
 666                 if (IS_ERR(pcs))
 667                         return PTR_ERR(pcs);
 668         } else {
 669                 pcs = pl->pcs;
 670         }
 671
 672         if (pcs) {
 673                 /* The PCS, if present, must be setup before phylink_create()
 674                  * has been called. If the ops is not initialised, print an
 675                  * error and backtrace rather than oopsing the kernel.
 676                  */
 677                 if (!pcs->ops) {
 678                         phylink_err(pl, "interface %s: uninitialised PCS\n",
 679                                     phy_modes(state->interface));
 680                         dump_stack();
 681                         return -EINVAL;
 682                 }
 683
 684                 /* Validate the link parameters with the PCS */
 685                 if (pcs->ops->pcs_validate) {
 686                         ret = pcs->ops->pcs_validate(pcs, supported, state);
 687                         if (ret < 0 || phylink_is_empty_linkmode(supported))
 688                                 return -EINVAL;
 689
 690                         /* Ensure the advertising mask is a subset of the
 691                          * supported mask.
 692                          */
 693                         linkmode_and(state->advertising, state->advertising,
 694                                      supported);
 695                 }
 696         }
 697
 698         /* Then validate the link parameters with the MAC */
 699         if (pl->mac_ops->mac_get_caps)
 700                 capabilities = pl->mac_ops->mac_get_caps(pl->config,
 701                                                          state->interface);
 702         else
 703                 capabilities = pl->config->mac_capabilities;
 704
 705         phylink_validate_mask_caps(supported, state, capabilities);
 706
 707         return phylink_is_empty_linkmode(supported) ? -EINVAL : 0;
 708 }
 709
 710 static void phylink_validate_one(struct phylink *pl, struct phy_device *phy,
 711                                  const unsigned long *supported,
 712                                  const struct phylink_link_state *state,
 713                                  phy_interface_t interface,
 714                                  unsigned long *accum_supported,
 715                                  unsigned long *accum_advertising)
 716 {
 717         __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp_supported);
 718         struct phylink_link_state tmp_state;
 719
 720         linkmode_copy(tmp_supported, supported);
 721
 722         tmp_state = *state;
 723         tmp_state.interface = interface;
 724
 725         if (phy)
 726                 tmp_state.rate_matching = phy_get_rate_matching(phy, interface);
 727
 728         if (!phylink_validate_mac_and_pcs(pl, tmp_supported, &tmp_state)) {
 729                 phylink_dbg(pl, " interface %u (%s) rate match %s supports %*pbl\n",
 730                             interface, phy_modes(interface),
 731                             phy_rate_matching_to_str(tmp_state.rate_matching),
 732                             __ETHTOOL_LINK_MODE_MASK_NBITS, tmp_supported);
 733
 734                 linkmode_or(accum_supported, accum_supported, tmp_supported);
 735                 linkmode_or(accum_advertising, accum_advertising,
 736                             tmp_state.advertising);
 737         }
 738 }
 739
 740 static int phylink_validate_mask(struct phylink *pl, struct phy_device *phy,
 741                                  unsigned long *supported,
 742                                  struct phylink_link_state *state,
 743                                  const unsigned long *interfaces)
 744 {
 745         __ETHTOOL_DECLARE_LINK_MODE_MASK(all_adv) = { 0, };
 746         __ETHTOOL_DECLARE_LINK_MODE_MASK(all_s) = { 0, };
 747         int interface;
 748
 749         for_each_set_bit(interface, interfaces, PHY_INTERFACE_MODE_MAX)
 750                 phylink_validate_one(pl, phy, supported, state, interface,
 751                                      all_s, all_adv);
 752
 753         linkmode_copy(supported, all_s);
 754         linkmode_copy(state->advertising, all_adv);
 755
 756         return phylink_is_empty_linkmode(supported) ? -EINVAL : 0;
 757 }
 758
 759 static int phylink_validate(struct phylink *pl, unsigned long *supported,
 760                             struct phylink_link_state *state)
 761 {
 762         const unsigned long *interfaces = pl->config->supported_interfaces;
 763
 764         if (state->interface == PHY_INTERFACE_MODE_NA)
 765                 return phylink_validate_mask(pl, NULL, supported, state,
 766                                              interfaces);
 767
 768         if (!test_bit(state->interface, interfaces))
 769                 return -EINVAL;
 770
 771         return phylink_validate_mac_and_pcs(pl, supported, state);
 772 }
 773
 774 static int phylink_parse_fixedlink(struct phylink *pl,
 775                                    const struct fwnode_handle *fwnode)
 776 {
 777         struct fwnode_handle *fixed_node;
 778         bool pause, asym_pause, autoneg;
 779         const struct phy_setting *s;
 780         struct gpio_desc *desc;
 781         u32 speed;
 782         int ret;
 783
 784         fixed_node = fwnode_get_named_child_node(fwnode, "fixed-link");
 785         if (fixed_node) {
 786                 ret = fwnode_property_read_u32(fixed_node, "speed", &speed);
 787
 788                 pl->link_config.speed = speed;
 789                 pl->link_config.duplex = DUPLEX_HALF;
 790
 791                 if (fwnode_property_read_bool(fixed_node, "full-duplex"))
 792                         pl->link_config.duplex = DUPLEX_FULL;
 793
 794                 /* We treat the "pause" and "asym-pause" terminology as
 795                  * defining the link partner's ability.
 796                  */
 797                 if (fwnode_property_read_bool(fixed_node, "pause"))
 798                         __set_bit(ETHTOOL_LINK_MODE_Pause_BIT,
 799                                   pl->link_config.lp_advertising);
 800                 if (fwnode_property_read_bool(fixed_node, "asym-pause"))
 801                         __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
 802                                   pl->link_config.lp_advertising);
 803
 804                 if (ret == 0) {
 805                         desc = fwnode_gpiod_get_index(fixed_node, "link", 0,
 806                                                       GPIOD_IN, "?");
 807
 808                         if (!IS_ERR(desc))
 809                                 pl->link_gpio = desc;
 810                         else if (desc == ERR_PTR(-EPROBE_DEFER))
 811                                 ret = -EPROBE_DEFER;
 812                 }
 813                 fwnode_handle_put(fixed_node);
 814
 815                 if (ret)
 816                         return ret;
 817         } else {
 818                 u32 prop[5];
 819
 820                 ret = fwnode_property_read_u32_array(fwnode, "fixed-link",
 821                                                      NULL, 0);
 822                 if (ret != ARRAY_SIZE(prop)) {
 823                         phylink_err(pl, "broken fixed-link?\n");
 824                         return -EINVAL;
 825                 }
 826
 827                 ret = fwnode_property_read_u32_array(fwnode, "fixed-link",
 828                                                      prop, ARRAY_SIZE(prop));
 829                 if (!ret) {
 830                         pl->link_config.duplex = prop[1] ?
 831                                                 DUPLEX_FULL : DUPLEX_HALF;
 832                         pl->link_config.speed = prop[2];
 833                         if (prop[3])
 834                                 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT,
 835                                           pl->link_config.lp_advertising);
 836                         if (prop[4])
 837                                 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
 838                                           pl->link_config.lp_advertising);
 839                 }
 840         }
 841
 842         if (pl->link_config.speed > SPEED_1000 &&
 843             pl->link_config.duplex != DUPLEX_FULL)
 844                 phylink_warn(pl, "fixed link specifies half duplex for %dMbps link?\n",
 845                              pl->link_config.speed);
 846
 847         linkmode_fill(pl->supported);
 848         linkmode_copy(pl->link_config.advertising, pl->supported);
 849         phylink_validate(pl, pl->supported, &pl->link_config);
 850
 851         pause = phylink_test(pl->supported, Pause);
 852         asym_pause = phylink_test(pl->supported, Asym_Pause);
 853         autoneg = phylink_test(pl->supported, Autoneg);
 854         s = phy_lookup_setting(pl->link_config.speed, pl->link_config.duplex,
 855                                pl->supported, true);
 856         linkmode_zero(pl->supported);
 857         phylink_set(pl->supported, MII);
 858
 859         if (pause)
 860                 phylink_set(pl->supported, Pause);
 861
 862         if (asym_pause)
 863                 phylink_set(pl->supported, Asym_Pause);
 864
 865         if (autoneg)
 866                 phylink_set(pl->supported, Autoneg);
 867
 868         if (s) {
 869                 __set_bit(s->bit, pl->supported);
 870                 __set_bit(s->bit, pl->link_config.lp_advertising);
 871         } else {
 872                 phylink_warn(pl, "fixed link %s duplex %dMbps not recognised\n",
 873                              pl->link_config.duplex == DUPLEX_FULL ? "full" : "half",
 874                              pl->link_config.speed);
 875         }
 876
 877         linkmode_and(pl->link_config.advertising, pl->link_config.advertising,
 878                      pl->supported);
 879
 880         pl->link_config.link = 1;
 881         pl->link_config.an_complete = 1;
 882
 883         return 0;
 884 }
 885
 886 static int phylink_parse_mode(struct phylink *pl,
 887                               const struct fwnode_handle *fwnode)
 888 {
 889         struct fwnode_handle *dn;
 890         const char *managed;
 891         unsigned long caps;
 892
 893         if (pl->config->default_an_inband)
 894                 pl->cfg_link_an_mode = MLO_AN_INBAND;
 895
 896         dn = fwnode_get_named_child_node(fwnode, "fixed-link");
 897         if (dn || fwnode_property_present(fwnode, "fixed-link"))
 898                 pl->cfg_link_an_mode = MLO_AN_FIXED;
 899         fwnode_handle_put(dn);
 900
 901         if ((fwnode_property_read_string(fwnode, "managed", &managed) == 0 &&
 902              strcmp(managed, "in-band-status") == 0)) {
 903                 if (pl->cfg_link_an_mode == MLO_AN_FIXED) {
 904                         phylink_err(pl,
 905                                     "can't use both fixed-link and in-band-status\n");
 906                         return -EINVAL;
 907                 }
 908
 909                 pl->cfg_link_an_mode = MLO_AN_INBAND;
 910         }
 911
 912         if (pl->cfg_link_an_mode == MLO_AN_INBAND) {
 913                 linkmode_zero(pl->supported);
 914                 phylink_set(pl->supported, MII);
 915                 phylink_set(pl->supported, Autoneg);
 916                 phylink_set(pl->supported, Asym_Pause);
 917                 phylink_set(pl->supported, Pause);
 918
 919                 switch (pl->link_config.interface) {
 920                 case PHY_INTERFACE_MODE_SGMII:
 921                 case PHY_INTERFACE_MODE_PSGMII:
 922                 case PHY_INTERFACE_MODE_QSGMII:
 923                 case PHY_INTERFACE_MODE_QUSGMII:
 924                 case PHY_INTERFACE_MODE_RGMII:
 925                 case PHY_INTERFACE_MODE_RGMII_ID:
 926                 case PHY_INTERFACE_MODE_RGMII_RXID:
 927                 case PHY_INTERFACE_MODE_RGMII_TXID:
 928                 case PHY_INTERFACE_MODE_RTBI:
 929                 case PHY_INTERFACE_MODE_1000BASEX:
 930                 case PHY_INTERFACE_MODE_2500BASEX:
 931                 case PHY_INTERFACE_MODE_5GBASER:
 932                 case PHY_INTERFACE_MODE_25GBASER:
 933                 case PHY_INTERFACE_MODE_USXGMII:
 934                 case PHY_INTERFACE_MODE_10G_QXGMII:
 935                 case PHY_INTERFACE_MODE_10GKR:
 936                 case PHY_INTERFACE_MODE_10GBASER:
 937                 case PHY_INTERFACE_MODE_XLGMII:
 938                         caps = ~(MAC_SYM_PAUSE | MAC_ASYM_PAUSE);
 939                         caps = phylink_get_capabilities(pl->link_config.interface, caps,
 940                                                         RATE_MATCH_NONE);
 941                         phylink_caps_to_linkmodes(pl->supported, caps);
 942                         break;
 943
 944                 default:
 945                         phylink_err(pl,
 946                                     "incorrect link mode %s for in-band status\n",
 947                                     phy_modes(pl->link_config.interface));
 948                         return -EINVAL;
 949                 }
 950
 951                 linkmode_copy(pl->link_config.advertising, pl->supported);
 952
 953                 if (phylink_validate(pl, pl->supported, &pl->link_config)) {
 954                         phylink_err(pl,
 955                                     "failed to validate link configuration for in-band status\n");
 956                         return -EINVAL;
 957                 }
 958         }
 959
 960         return 0;
 961 }
 962
 963 static void phylink_apply_manual_flow(struct phylink *pl,
 964                                       struct phylink_link_state *state)
 965 {
 966         /* If autoneg is disabled, pause AN is also disabled */
 967         if (!linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
 968                                state->advertising))
 969                 state->pause &= ~MLO_PAUSE_AN;
 970
 971         /* Manual configuration of pause modes */
 972         if (!(pl->link_config.pause & MLO_PAUSE_AN))
 973                 state->pause = pl->link_config.pause;
 974 }
 975
 976 static void phylink_resolve_an_pause(struct phylink_link_state *state)
 977 {
 978         bool tx_pause, rx_pause;
 979
 980         if (state->duplex == DUPLEX_FULL) {
 981                 linkmode_resolve_pause(state->advertising,
 982                                        state->lp_advertising,
 983                                        &tx_pause, &rx_pause);
 984                 if (tx_pause)
 985                         state->pause |= MLO_PAUSE_TX;
 986                 if (rx_pause)
 987                         state->pause |= MLO_PAUSE_RX;
 988         }
 989 }
 990
 991 static void phylink_pcs_pre_config(struct phylink_pcs *pcs,
 992                                    phy_interface_t interface)
 993 {
 994         if (pcs && pcs->ops->pcs_pre_config)
 995                 pcs->ops->pcs_pre_config(pcs, interface);
 996 }
 997
 998 static int phylink_pcs_post_config(struct phylink_pcs *pcs,
 999                                    phy_interface_t interface)
1000 {
1001         int err = 0;
1002
1003         if (pcs && pcs->ops->pcs_post_config)
1004                 err = pcs->ops->pcs_post_config(pcs, interface);
1005
1006         return err;
1007 }
1008
1009 static void phylink_pcs_disable(struct phylink_pcs *pcs)
1010 {
1011         if (pcs && pcs->ops->pcs_disable)
1012                 pcs->ops->pcs_disable(pcs);
1013 }
1014
1015 static int phylink_pcs_enable(struct phylink_pcs *pcs)
1016 {
1017         int err = 0;
1018
1019         if (pcs && pcs->ops->pcs_enable)
1020                 err = pcs->ops->pcs_enable(pcs);
1021
1022         return err;
1023 }
1024
1025 static int phylink_pcs_config(struct phylink_pcs *pcs, unsigned int neg_mode,
1026                               const struct phylink_link_state *state,
1027                               bool permit_pause_to_mac)
1028 {
1029         if (!pcs)
1030                 return 0;
1031
1032         return pcs->ops->pcs_config(pcs, neg_mode, state->interface,
1033                                     state->advertising, permit_pause_to_mac);
1034 }
1035
1036 static void phylink_pcs_link_up(struct phylink_pcs *pcs, unsigned int neg_mode,
1037                                 phy_interface_t interface, int speed,
1038                                 int duplex)
1039 {
1040         if (pcs && pcs->ops->pcs_link_up)
1041                 pcs->ops->pcs_link_up(pcs, neg_mode, interface, speed, duplex);
1042 }
1043
1044 static void phylink_pcs_poll_stop(struct phylink *pl)
1045 {
1046         if (pl->cfg_link_an_mode == MLO_AN_INBAND)
1047                 del_timer(&pl->link_poll);
1048 }
1049
1050 static void phylink_pcs_poll_start(struct phylink *pl)
1051 {
1052         if (pl->pcs && pl->pcs->poll && pl->cfg_link_an_mode == MLO_AN_INBAND)
1053                 mod_timer(&pl->link_poll, jiffies + HZ);
1054 }
1055
1056 int phylink_pcs_pre_init(struct phylink *pl, struct phylink_pcs *pcs)
1057 {
1058         int ret = 0;
1059
1060         /* Signal to PCS driver that MAC requires RX clock for init */
1061         if (pl->config->mac_requires_rxc)
1062                 pcs->rxc_always_on = true;
1063
1064         if (pcs->ops->pcs_pre_init)
1065                 ret = pcs->ops->pcs_pre_init(pcs);
1066
1067         return ret;
1068 }
1069 EXPORT_SYMBOL_GPL(phylink_pcs_pre_init);
1070
1071 static void phylink_mac_config(struct phylink *pl,
1072                                const struct phylink_link_state *state)
1073 {
1074         struct phylink_link_state st = *state;
1075
1076         /* Stop drivers incorrectly using these */
1077         linkmode_zero(st.lp_advertising);
1078         st.speed = SPEED_UNKNOWN;
1079         st.duplex = DUPLEX_UNKNOWN;
1080         st.an_complete = false;
1081         st.link = false;
1082
1083         phylink_dbg(pl,
1084                     "%s: mode=%s/%s/%s adv=%*pb pause=%02x\n",
1085                     __func__, phylink_an_mode_str(pl->cur_link_an_mode),
1086                     phy_modes(st.interface),
1087                     phy_rate_matching_to_str(st.rate_matching),
1088                     __ETHTOOL_LINK_MODE_MASK_NBITS, st.advertising,
1089                     st.pause);
1090
1091         pl->mac_ops->mac_config(pl->config, pl->cur_link_an_mode, &st);
1092 }
1093
1094 static void phylink_pcs_an_restart(struct phylink *pl)
1095 {
1096         if (pl->pcs && linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
1097                                          pl->link_config.advertising) &&
1098             phy_interface_mode_is_8023z(pl->link_config.interface) &&
1099             phylink_autoneg_inband(pl->cur_link_an_mode))
1100                 pl->pcs->ops->pcs_an_restart(pl->pcs);
1101 }
1102
1103 /**
1104  * phylink_pcs_neg_mode() - helper to determine PCS inband mode
1105  * @mode: one of %MLO_AN_FIXED, %MLO_AN_PHY, %MLO_AN_INBAND.
1106  * @interface: interface mode to be used
1107  * @advertising: adertisement ethtool link mode mask
1108  *
1109  * Determines the negotiation mode to be used by the PCS, and returns
1110  * one of:
1111  *
1112  * - %PHYLINK_PCS_NEG_NONE: interface mode does not support inband
1113  * - %PHYLINK_PCS_NEG_OUTBAND: an out of band mode (e.g. reading the PHY)
1114  *   will be used.
1115  * - %PHYLINK_PCS_NEG_INBAND_DISABLED: inband mode selected but autoneg
1116  *   disabled
1117  * - %PHYLINK_PCS_NEG_INBAND_ENABLED: inband mode selected and autoneg enabled
1118  *
1119  * Note: this is for cases where the PCS itself is involved in negotiation
1120  * (e.g. Clause 37, SGMII and similar) not Clause 73.
1121  */
1122 static unsigned int phylink_pcs_neg_mode(unsigned int mode,
1123                                          phy_interface_t interface,
1124                                          const unsigned long *advertising)
1125 {
1126         unsigned int neg_mode;
1127
1128         switch (interface) {
1129         case PHY_INTERFACE_MODE_SGMII:
1130         case PHY_INTERFACE_MODE_QSGMII:
1131         case PHY_INTERFACE_MODE_QUSGMII:
1132         case PHY_INTERFACE_MODE_USXGMII:
1133         case PHY_INTERFACE_MODE_10G_QXGMII:
1134                 /* These protocols are designed for use with a PHY which
1135                  * communicates its negotiation result back to the MAC via
1136                  * inband communication. Note: there exist PHYs that run
1137                  * with SGMII but do not send the inband data.
1138                  */
1139                 if (!phylink_autoneg_inband(mode))
1140                         neg_mode = PHYLINK_PCS_NEG_OUTBAND;
1141                 else
1142                         neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED;
1143                 break;
1144
1145         case PHY_INTERFACE_MODE_1000BASEX:
1146         case PHY_INTERFACE_MODE_2500BASEX:
1147                 /* 1000base-X is designed for use media-side for Fibre
1148                  * connections, and thus the Autoneg bit needs to be
1149                  * taken into account. We also do this for 2500base-X
1150                  * as well, but drivers may not support this, so may
1151                  * need to override this.
1152                  */
1153                 if (!phylink_autoneg_inband(mode))
1154                         neg_mode = PHYLINK_PCS_NEG_OUTBAND;
1155                 else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
1156                                            advertising))
1157                         neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED;
1158                 else
1159                         neg_mode = PHYLINK_PCS_NEG_INBAND_DISABLED;
1160                 break;
1161
1162         default:
1163                 neg_mode = PHYLINK_PCS_NEG_NONE;
1164                 break;
1165         }
1166
1167         return neg_mode;
1168 }
1169
1170 static void phylink_major_config(struct phylink *pl, bool restart,
1171                                   const struct phylink_link_state *state)
1172 {
1173         struct phylink_pcs *pcs = NULL;
1174         bool pcs_changed = false;
1175         unsigned int rate_kbd;
1176         unsigned int neg_mode;
1177         int err;
1178
1179         phylink_dbg(pl, "major config %s\n", phy_modes(state->interface));
1180
1181         pl->pcs_neg_mode = phylink_pcs_neg_mode(pl->cur_link_an_mode,
1182                                                 state->interface,
1183                                                 state->advertising);
1184
1185         if (pl->using_mac_select_pcs) {
1186                 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface);
1187                 if (IS_ERR(pcs)) {
1188                         phylink_err(pl,
1189                                     "mac_select_pcs unexpectedly failed: %pe\n",
1190                                     pcs);
1191                         return;
1192                 }
1193
1194                 pcs_changed = pcs && pl->pcs != pcs;
1195         }
1196
1197         phylink_pcs_poll_stop(pl);
1198
1199         if (pl->mac_ops->mac_prepare) {
1200                 err = pl->mac_ops->mac_prepare(pl->config, pl->cur_link_an_mode,
1201                                                state->interface);
1202                 if (err < 0) {
1203                         phylink_err(pl, "mac_prepare failed: %pe\n",
1204                                     ERR_PTR(err));
1205                         return;
1206                 }
1207         }
1208
1209         /* If we have a new PCS, switch to the new PCS after preparing the MAC
1210          * for the change.
1211          */
1212         if (pcs_changed) {
1213                 phylink_pcs_disable(pl->pcs);
1214
1215                 if (pl->pcs)
1216                         pl->pcs->phylink = NULL;
1217
1218                 pcs->phylink = pl;
1219
1220                 pl->pcs = pcs;
1221         }
1222
1223         if (pl->pcs)
1224                 phylink_pcs_pre_config(pl->pcs, state->interface);
1225
1226         phylink_mac_config(pl, state);
1227
1228         if (pl->pcs)
1229                 phylink_pcs_post_config(pl->pcs, state->interface);
1230
1231         if (pl->pcs_state == PCS_STATE_STARTING || pcs_changed)
1232                 phylink_pcs_enable(pl->pcs);
1233
1234         neg_mode = pl->cur_link_an_mode;
1235         if (pl->pcs && pl->pcs->neg_mode)
1236                 neg_mode = pl->pcs_neg_mode;
1237
1238         err = phylink_pcs_config(pl->pcs, neg_mode, state,
1239                                  !!(pl->link_config.pause & MLO_PAUSE_AN));
1240         if (err < 0)
1241                 phylink_err(pl, "pcs_config failed: %pe\n",
1242                             ERR_PTR(err));
1243         else if (err > 0)
1244                 restart = true;
1245
1246         if (restart)
1247                 phylink_pcs_an_restart(pl);
1248
1249         if (pl->mac_ops->mac_finish) {
1250                 err = pl->mac_ops->mac_finish(pl->config, pl->cur_link_an_mode,
1251                                               state->interface);
1252                 if (err < 0)
1253                         phylink_err(pl, "mac_finish failed: %pe\n",
1254                                     ERR_PTR(err));
1255         }
1256
1257         if (pl->sfp_bus) {
1258                 rate_kbd = phylink_interface_signal_rate(state->interface);
1259                 if (rate_kbd)
1260                         sfp_upstream_set_signal_rate(pl->sfp_bus, rate_kbd);
1261         }
1262
1263         phylink_pcs_poll_start(pl);
1264 }
1265
1266 /*
1267  * Reconfigure for a change of inband advertisement.
1268  * If we have a separate PCS, we only need to call its pcs_config() method,
1269  * and then restart AN if it indicates something changed. Otherwise, we do
1270  * the full MAC reconfiguration.
1271  */
1272 static int phylink_change_inband_advert(struct phylink *pl)
1273 {
1274         unsigned int neg_mode;
1275         int ret;
1276
1277         if (test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state))
1278                 return 0;
1279
1280         phylink_dbg(pl, "%s: mode=%s/%s adv=%*pb pause=%02x\n", __func__,
1281                     phylink_an_mode_str(pl->cur_link_an_mode),
1282                     phy_modes(pl->link_config.interface),
1283                     __ETHTOOL_LINK_MODE_MASK_NBITS, pl->link_config.advertising,
1284                     pl->link_config.pause);
1285
1286         /* Recompute the PCS neg mode */
1287         pl->pcs_neg_mode = phylink_pcs_neg_mode(pl->cur_link_an_mode,
1288                                         pl->link_config.interface,
1289                                         pl->link_config.advertising);
1290
1291         neg_mode = pl->cur_link_an_mode;
1292         if (pl->pcs->neg_mode)
1293                 neg_mode = pl->pcs_neg_mode;
1294
1295         /* Modern PCS-based method; update the advert at the PCS, and
1296          * restart negotiation if the pcs_config() helper indicates that
1297          * the programmed advertisement has changed.
1298          */
1299         ret = phylink_pcs_config(pl->pcs, neg_mode, &pl->link_config,
1300                                  !!(pl->link_config.pause & MLO_PAUSE_AN));
1301         if (ret < 0)
1302                 return ret;
1303
1304         if (ret > 0)
1305                 phylink_pcs_an_restart(pl);
1306
1307         return 0;
1308 }
1309
1310 static void phylink_mac_pcs_get_state(struct phylink *pl,
1311                                       struct phylink_link_state *state)
1312 {
1313         linkmode_copy(state->advertising, pl->link_config.advertising);
1314         linkmode_zero(state->lp_advertising);
1315         state->interface = pl->link_config.interface;
1316         state->rate_matching = pl->link_config.rate_matching;
1317         if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
1318                               state->advertising)) {
1319                 state->speed = SPEED_UNKNOWN;
1320                 state->duplex = DUPLEX_UNKNOWN;
1321                 state->pause = MLO_PAUSE_NONE;
1322         } else {
1323                 state->speed =  pl->link_config.speed;
1324                 state->duplex = pl->link_config.duplex;
1325                 state->pause = pl->link_config.pause;
1326         }
1327         state->an_complete = 0;
1328         state->link = 1;
1329
1330         if (pl->pcs)
1331                 pl->pcs->ops->pcs_get_state(pl->pcs, state);
1332         else
1333                 state->link = 0;
1334 }
1335
1336 /* The fixed state is... fixed except for the link state,
1337  * which may be determined by a GPIO or a callback.
1338  */
1339 static void phylink_get_fixed_state(struct phylink *pl,
1340                                     struct phylink_link_state *state)
1341 {
1342         *state = pl->link_config;
1343         if (pl->config->get_fixed_state)
1344                 pl->config->get_fixed_state(pl->config, state);
1345         else if (pl->link_gpio)
1346                 state->link = !!gpiod_get_value_cansleep(pl->link_gpio);
1347
1348         state->pause = MLO_PAUSE_NONE;
1349         phylink_resolve_an_pause(state);
1350 }
1351
1352 static void phylink_mac_initial_config(struct phylink *pl, bool force_restart)
1353 {
1354         struct phylink_link_state link_state;
1355
1356         switch (pl->cur_link_an_mode) {
1357         case MLO_AN_PHY:
1358                 link_state = pl->phy_state;
1359                 break;
1360
1361         case MLO_AN_FIXED:
1362                 phylink_get_fixed_state(pl, &link_state);
1363                 break;
1364
1365         case MLO_AN_INBAND:
1366                 link_state = pl->link_config;
1367                 if (link_state.interface == PHY_INTERFACE_MODE_SGMII)
1368                         link_state.pause = MLO_PAUSE_NONE;
1369                 break;
1370
1371         default: /* can't happen */
1372                 return;
1373         }
1374
1375         link_state.link = false;
1376
1377         phylink_apply_manual_flow(pl, &link_state);
1378         phylink_major_config(pl, force_restart, &link_state);
1379 }
1380
1381 static const char *phylink_pause_to_str(int pause)
1382 {
1383         switch (pause & MLO_PAUSE_TXRX_MASK) {
1384         case MLO_PAUSE_TX | MLO_PAUSE_RX:
1385                 return "rx/tx";
1386         case MLO_PAUSE_TX:
1387                 return "tx";
1388         case MLO_PAUSE_RX:
1389                 return "rx";
1390         default:
1391                 return "off";
1392         }
1393 }
1394
1395 static void phylink_link_up(struct phylink *pl,
1396                             struct phylink_link_state link_state)
1397 {
1398         struct net_device *ndev = pl->netdev;
1399         unsigned int neg_mode;
1400         int speed, duplex;
1401         bool rx_pause;
1402
1403         speed = link_state.speed;
1404         duplex = link_state.duplex;
1405         rx_pause = !!(link_state.pause & MLO_PAUSE_RX);
1406
1407         switch (link_state.rate_matching) {
1408         case RATE_MATCH_PAUSE:
1409                 /* The PHY is doing rate matchion from the media rate (in
1410                  * the link_state) to the interface speed, and will send
1411                  * pause frames to the MAC to limit its transmission speed.
1412                  */
1413                 speed = phylink_interface_max_speed(link_state.interface);
1414                 duplex = DUPLEX_FULL;
1415                 rx_pause = true;
1416                 break;
1417
1418         case RATE_MATCH_CRS:
1419                 /* The PHY is doing rate matchion from the media rate (in
1420                  * the link_state) to the interface speed, and will cause
1421                  * collisions to the MAC to limit its transmission speed.
1422                  */
1423                 speed = phylink_interface_max_speed(link_state.interface);
1424                 duplex = DUPLEX_HALF;
1425                 break;
1426         }
1427
1428         pl->cur_interface = link_state.interface;
1429
1430         neg_mode = pl->cur_link_an_mode;
1431         if (pl->pcs && pl->pcs->neg_mode)
1432                 neg_mode = pl->pcs_neg_mode;
1433
1434         phylink_pcs_link_up(pl->pcs, neg_mode, pl->cur_interface, speed,
1435                             duplex);
1436
1437         pl->mac_ops->mac_link_up(pl->config, pl->phydev, pl->cur_link_an_mode,
1438                                  pl->cur_interface, speed, duplex,
1439                                  !!(link_state.pause & MLO_PAUSE_TX), rx_pause);
1440
1441         if (ndev)
1442                 netif_carrier_on(ndev);
1443
1444         phylink_info(pl,
1445                      "Link is Up - %s/%s - flow control %s\n",
1446                      phy_speed_to_str(link_state.speed),
1447                      phy_duplex_to_str(link_state.duplex),
1448                      phylink_pause_to_str(link_state.pause));
1449 }
1450
1451 static void phylink_link_down(struct phylink *pl)
1452 {
1453         struct net_device *ndev = pl->netdev;
1454
1455         if (ndev)
1456                 netif_carrier_off(ndev);
1457         pl->mac_ops->mac_link_down(pl->config, pl->cur_link_an_mode,
1458                                    pl->cur_interface);
1459         phylink_info(pl, "Link is Down\n");
1460 }
1461
1462 static void phylink_resolve(struct work_struct *w)
1463 {
1464         struct phylink *pl = container_of(w, struct phylink, resolve);
1465         struct phylink_link_state link_state;
1466         struct net_device *ndev = pl->netdev;
1467         bool mac_config = false;
1468         bool retrigger = false;
1469         bool cur_link_state;
1470
1471         mutex_lock(&pl->state_mutex);
1472         if (pl->netdev)
1473                 cur_link_state = netif_carrier_ok(ndev);
1474         else
1475                 cur_link_state = pl->old_link_state;
1476
1477         if (pl->phylink_disable_state) {
1478                 pl->mac_link_dropped = false;
1479                 link_state.link = false;
1480         } else if (pl->mac_link_dropped) {
1481                 link_state.link = false;
1482                 retrigger = true;
1483         } else {
1484                 switch (pl->cur_link_an_mode) {
1485                 case MLO_AN_PHY:
1486                         link_state = pl->phy_state;
1487                         phylink_apply_manual_flow(pl, &link_state);
1488                         mac_config = link_state.link;
1489                         break;
1490
1491                 case MLO_AN_FIXED:
1492                         phylink_get_fixed_state(pl, &link_state);
1493                         mac_config = link_state.link;
1494                         break;
1495
1496                 case MLO_AN_INBAND:
1497                         phylink_mac_pcs_get_state(pl, &link_state);
1498
1499                         /* The PCS may have a latching link-fail indicator.
1500                          * If the link was up, bring the link down and
1501                          * re-trigger the resolve. Otherwise, re-read the
1502                          * PCS state to get the current status of the link.
1503                          */
1504                         if (!link_state.link) {
1505                                 if (cur_link_state)
1506                                         retrigger = true;
1507                                 else
1508                                         phylink_mac_pcs_get_state(pl,
1509                                                                   &link_state);
1510                         }
1511
1512                         /* If we have a phy, the "up" state is the union of
1513                          * both the PHY and the MAC
1514                          */
1515                         if (pl->phydev)
1516                                 link_state.link &= pl->phy_state.link;
1517
1518                         /* Only update if the PHY link is up */
1519                         if (pl->phydev && pl->phy_state.link) {
1520                                 /* If the interface has changed, force a
1521                                  * link down event if the link isn't already
1522                                  * down, and re-resolve.
1523                                  */
1524                                 if (link_state.interface !=
1525                                     pl->phy_state.interface) {
1526                                         retrigger = true;
1527                                         link_state.link = false;
1528                                 }
1529                                 link_state.interface = pl->phy_state.interface;
1530
1531                                 /* If we are doing rate matching, then the
1532                                  * link speed/duplex comes from the PHY
1533                                  */
1534                                 if (pl->phy_state.rate_matching) {
1535                                         link_state.rate_matching =
1536                                                 pl->phy_state.rate_matching;
1537                                         link_state.speed = pl->phy_state.speed;
1538                                         link_state.duplex =
1539                                                 pl->phy_state.duplex;
1540                                 }
1541
1542                                 /* If we have a PHY, we need to update with
1543                                  * the PHY flow control bits.
1544                                  */
1545                                 link_state.pause = pl->phy_state.pause;
1546                                 mac_config = true;
1547                         }
1548                         phylink_apply_manual_flow(pl, &link_state);
1549                         break;
1550                 }
1551         }
1552
1553         if (mac_config) {
1554                 if (link_state.interface != pl->link_config.interface) {
1555                         /* The interface has changed, force the link down and
1556                          * then reconfigure.
1557                          */
1558                         if (cur_link_state) {
1559                                 phylink_link_down(pl);
1560                                 cur_link_state = false;
1561                         }
1562                         phylink_major_config(pl, false, &link_state);
1563                         pl->link_config.interface = link_state.interface;
1564                 }
1565         }
1566
1567         if (link_state.link != cur_link_state) {
1568                 pl->old_link_state = link_state.link;
1569                 if (!link_state.link)
1570                         phylink_link_down(pl);
1571                 else
1572                         phylink_link_up(pl, link_state);
1573         }
1574         if (!link_state.link && retrigger) {
1575                 pl->mac_link_dropped = false;
1576                 queue_work(system_power_efficient_wq, &pl->resolve);
1577         }
1578         mutex_unlock(&pl->state_mutex);
1579 }
1580
1581 static void phylink_run_resolve(struct phylink *pl)
1582 {
1583         if (!pl->phylink_disable_state)
1584                 queue_work(system_power_efficient_wq, &pl->resolve);
1585 }
1586
1587 static void phylink_run_resolve_and_disable(struct phylink *pl, int bit)
1588 {
1589         unsigned long state = pl->phylink_disable_state;
1590
1591         set_bit(bit, &pl->phylink_disable_state);
1592         if (state == 0) {
1593                 queue_work(system_power_efficient_wq, &pl->resolve);
1594                 flush_work(&pl->resolve);
1595         }
1596 }
1597
1598 static void phylink_enable_and_run_resolve(struct phylink *pl, int bit)
1599 {
1600         clear_bit(bit, &pl->phylink_disable_state);
1601         phylink_run_resolve(pl);
1602 }
1603
1604 static void phylink_fixed_poll(struct timer_list *t)
1605 {
1606         struct phylink *pl = container_of(t, struct phylink, link_poll);
1607
1608         mod_timer(t, jiffies + HZ);
1609
1610         phylink_run_resolve(pl);
1611 }
1612
1613 static const struct sfp_upstream_ops sfp_phylink_ops;
1614
1615 static int phylink_register_sfp(struct phylink *pl,
1616                                 const struct fwnode_handle *fwnode)
1617 {
1618         struct sfp_bus *bus;
1619         int ret;
1620
1621         if (!fwnode)
1622                 return 0;
1623
1624         bus = sfp_bus_find_fwnode(fwnode);
1625         if (IS_ERR(bus)) {
1626                 phylink_err(pl, "unable to attach SFP bus: %pe\n", bus);
1627                 return PTR_ERR(bus);
1628         }
1629
1630         pl->sfp_bus = bus;
1631
1632         ret = sfp_bus_add_upstream(bus, pl, &sfp_phylink_ops);
1633         sfp_bus_put(bus);
1634
1635         return ret;
1636 }
1637
1638 /**
1639  * phylink_set_fixed_link() - set the fixed link
1640  * @pl: a pointer to a &struct phylink returned from phylink_create()
1641  * @state: a pointer to a struct phylink_link_state.
1642  *
1643  * This function is used when the link parameters are known and do not change,
1644  * making it suitable for certain types of network connections.
1645  *
1646  * Returns: zero on success or negative error code.
1647  */
1648 int phylink_set_fixed_link(struct phylink *pl,
1649                            const struct phylink_link_state *state)
1650 {
1651         const struct phy_setting *s;
1652         unsigned long *adv;
1653
1654         if (pl->cfg_link_an_mode != MLO_AN_PHY || !state ||
1655             !test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state))
1656                 return -EINVAL;
1657
1658         s = phy_lookup_setting(state->speed, state->duplex,
1659                                pl->supported, true);
1660         if (!s)
1661                 return -EINVAL;
1662
1663         adv = pl->link_config.advertising;
1664         linkmode_zero(adv);
1665         linkmode_set_bit(s->bit, adv);
1666         linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, adv);
1667
1668         pl->link_config.speed = state->speed;
1669         pl->link_config.duplex = state->duplex;
1670         pl->link_config.link = 1;
1671         pl->link_config.an_complete = 1;
1672
1673         pl->cfg_link_an_mode = MLO_AN_FIXED;
1674         pl->cur_link_an_mode = pl->cfg_link_an_mode;
1675
1676         return 0;
1677 }
1678 EXPORT_SYMBOL_GPL(phylink_set_fixed_link);
1679
1680 /**
1681  * phylink_create() - create a phylink instance
1682  * @config: a pointer to the target &struct phylink_config
1683  * @fwnode: a pointer to a &struct fwnode_handle describing the network
1684  *      interface
1685  * @iface: the desired link mode defined by &typedef phy_interface_t
1686  * @mac_ops: a pointer to a &struct phylink_mac_ops for the MAC.
1687  *
1688  * Create a new phylink instance, and parse the link parameters found in @np.
1689  * This will parse in-band modes, fixed-link or SFP configuration.
1690  *
1691  * Note: the rtnl lock must not be held when calling this function.
1692  *
1693  * Returns a pointer to a &struct phylink, or an error-pointer value. Users
1694  * must use IS_ERR() to check for errors from this function.
1695  */
1696 struct phylink *phylink_create(struct phylink_config *config,
1697                                const struct fwnode_handle *fwnode,
1698                                phy_interface_t iface,
1699                                const struct phylink_mac_ops *mac_ops)
1700 {
1701         bool using_mac_select_pcs = false;
1702         struct phylink *pl;
1703         int ret;
1704
1705         /* Validate the supplied configuration */
1706         if (phy_interface_empty(config->supported_interfaces)) {
1707                 dev_err(config->dev,
1708                         "phylink: error: empty supported_interfaces\n");
1709                 return ERR_PTR(-EINVAL);
1710         }
1711
1712         if (mac_ops->mac_select_pcs &&
1713             mac_ops->mac_select_pcs(config, PHY_INTERFACE_MODE_NA) !=
1714               ERR_PTR(-EOPNOTSUPP))
1715                 using_mac_select_pcs = true;
1716
1717         pl = kzalloc(sizeof(*pl), GFP_KERNEL);
1718         if (!pl)
1719                 return ERR_PTR(-ENOMEM);
1720
1721         mutex_init(&pl->state_mutex);
1722         INIT_WORK(&pl->resolve, phylink_resolve);
1723
1724         pl->config = config;
1725         if (config->type == PHYLINK_NETDEV) {
1726                 pl->netdev = to_net_dev(config->dev);
1727                 netif_carrier_off(pl->netdev);
1728         } else if (config->type == PHYLINK_DEV) {
1729                 pl->dev = config->dev;
1730         } else {
1731                 kfree(pl);
1732                 return ERR_PTR(-EINVAL);
1733         }
1734
1735         pl->using_mac_select_pcs = using_mac_select_pcs;
1736         pl->phy_state.interface = iface;
1737         pl->link_interface = iface;
1738         if (iface == PHY_INTERFACE_MODE_MOCA)
1739                 pl->link_port = PORT_BNC;
1740         else
1741                 pl->link_port = PORT_MII;
1742         pl->link_config.interface = iface;
1743         pl->link_config.pause = MLO_PAUSE_AN;
1744         pl->link_config.speed = SPEED_UNKNOWN;
1745         pl->link_config.duplex = DUPLEX_UNKNOWN;
1746         pl->pcs_state = PCS_STATE_DOWN;
1747         pl->mac_ops = mac_ops;
1748         __set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state);
1749         timer_setup(&pl->link_poll, phylink_fixed_poll, 0);
1750
1751         linkmode_fill(pl->supported);
1752         linkmode_copy(pl->link_config.advertising, pl->supported);
1753         phylink_validate(pl, pl->supported, &pl->link_config);
1754
1755         ret = phylink_parse_mode(pl, fwnode);
1756         if (ret < 0) {
1757                 kfree(pl);
1758                 return ERR_PTR(ret);
1759         }
1760
1761         if (pl->cfg_link_an_mode == MLO_AN_FIXED) {
1762                 ret = phylink_parse_fixedlink(pl, fwnode);
1763                 if (ret < 0) {
1764                         kfree(pl);
1765                         return ERR_PTR(ret);
1766                 }
1767         }
1768
1769         pl->cur_link_an_mode = pl->cfg_link_an_mode;
1770
1771         ret = phylink_register_sfp(pl, fwnode);
1772         if (ret < 0) {
1773                 kfree(pl);
1774                 return ERR_PTR(ret);
1775         }
1776
1777         return pl;
1778 }
1779 EXPORT_SYMBOL_GPL(phylink_create);
1780
1781 /**
1782  * phylink_destroy() - cleanup and destroy the phylink instance
1783  * @pl: a pointer to a &struct phylink returned from phylink_create()
1784  *
1785  * Destroy a phylink instance. Any PHY that has been attached must have been
1786  * cleaned up via phylink_disconnect_phy() prior to calling this function.
1787  *
1788  * Note: the rtnl lock must not be held when calling this function.
1789  */
1790 void phylink_destroy(struct phylink *pl)
1791 {
1792         sfp_bus_del_upstream(pl->sfp_bus);
1793         if (pl->link_gpio)
1794                 gpiod_put(pl->link_gpio);
1795
1796         cancel_work_sync(&pl->resolve);
1797         kfree(pl);
1798 }
1799 EXPORT_SYMBOL_GPL(phylink_destroy);
1800
1801 /**
1802  * phylink_expects_phy() - Determine if phylink expects a phy to be attached
1803  * @pl: a pointer to a &struct phylink returned from phylink_create()
1804  *
1805  * When using fixed-link mode, or in-band mode with 1000base-X or 2500base-X,
1806  * no PHY is needed.
1807  *
1808  * Returns true if phylink will be expecting a PHY.
1809  */
1810 bool phylink_expects_phy(struct phylink *pl)
1811 {
1812         if (pl->cfg_link_an_mode == MLO_AN_FIXED ||
1813             (pl->cfg_link_an_mode == MLO_AN_INBAND &&
1814              phy_interface_mode_is_8023z(pl->link_config.interface)))
1815                 return false;
1816         return true;
1817 }
1818 EXPORT_SYMBOL_GPL(phylink_expects_phy);
1819
1820 static void phylink_phy_change(struct phy_device *phydev, bool up)
1821 {
1822         struct phylink *pl = phydev->phylink;
1823         bool tx_pause, rx_pause;
1824
1825         phy_get_pause(phydev, &tx_pause, &rx_pause);
1826
1827         mutex_lock(&pl->state_mutex);
1828         pl->phy_state.speed = phydev->speed;
1829         pl->phy_state.duplex = phydev->duplex;
1830         pl->phy_state.rate_matching = phydev->rate_matching;
1831         pl->phy_state.pause = MLO_PAUSE_NONE;
1832         if (tx_pause)
1833                 pl->phy_state.pause |= MLO_PAUSE_TX;
1834         if (rx_pause)
1835                 pl->phy_state.pause |= MLO_PAUSE_RX;
1836         pl->phy_state.interface = phydev->interface;
1837         pl->phy_state.link = up;
1838         mutex_unlock(&pl->state_mutex);
1839
1840         phylink_run_resolve(pl);
1841
1842         phylink_dbg(pl, "phy link %s %s/%s/%s/%s/%s\n", up ? "up" : "down",
1843                     phy_modes(phydev->interface),
1844                     phy_speed_to_str(phydev->speed),
1845                     phy_duplex_to_str(phydev->duplex),
1846                     phy_rate_matching_to_str(phydev->rate_matching),
1847                     phylink_pause_to_str(pl->phy_state.pause));
1848 }
1849
1850 static int phylink_validate_phy(struct phylink *pl, struct phy_device *phy,
1851                                 unsigned long *supported,
1852                                 struct phylink_link_state *state)
1853 {
1854         DECLARE_PHY_INTERFACE_MASK(interfaces);
1855
1856         /* If the PHY provides a bitmap of the interfaces it will be using
1857          * depending on the negotiated media speeds, use this to validate
1858          * which ethtool link modes can be used.
1859          */
1860         if (!phy_interface_empty(phy->possible_interfaces)) {
1861                 /* We only care about the union of the PHY's interfaces and
1862                  * those which the host supports.
1863                  */
1864                 phy_interface_and(interfaces, phy->possible_interfaces,
1865                                   pl->config->supported_interfaces);
1866
1867                 if (phy_interface_empty(interfaces)) {
1868                         phylink_err(pl, "PHY has no common interfaces\n");
1869                         return -EINVAL;
1870                 }
1871
1872                 if (phy_on_sfp(phy)) {
1873                         /* If the PHY is on a SFP, limit the interfaces to
1874                          * those that can be used with a SFP module.
1875                          */
1876                         phy_interface_and(interfaces, interfaces,
1877                                           phylink_sfp_interfaces);
1878
1879                         if (phy_interface_empty(interfaces)) {
1880                                 phylink_err(pl, "SFP PHY's possible interfaces becomes empty\n");
1881                                 return -EINVAL;
1882                         }
1883                 }
1884
1885                 phylink_dbg(pl, "PHY %s uses interfaces %*pbl, validating %*pbl\n",
1886                             phydev_name(phy),
1887                             (int)PHY_INTERFACE_MODE_MAX,
1888                             phy->possible_interfaces,
1889                             (int)PHY_INTERFACE_MODE_MAX, interfaces);
1890
1891                 return phylink_validate_mask(pl, phy, supported, state,
1892                                              interfaces);
1893         }
1894
1895         phylink_dbg(pl, "PHY %s doesn't supply possible interfaces\n",
1896                     phydev_name(phy));
1897
1898         /* Check whether we would use rate matching for the proposed interface
1899          * mode.
1900          */
1901         state->rate_matching = phy_get_rate_matching(phy, state->interface);
1902
1903         /* Clause 45 PHYs may switch their Serdes lane between, e.g. 10GBASE-R,
1904          * 5GBASE-R, 2500BASE-X and SGMII if they are not using rate matching.
1905          * For some interface modes (e.g. RXAUI, XAUI and USXGMII) switching
1906          * their Serdes is either unnecessary or not reasonable.
1907          *
1908          * For these which switch interface modes, we really need to know which
1909          * interface modes the PHY supports to properly work out which ethtool
1910          * linkmodes can be supported. For now, as a work-around, we validate
1911          * against all interface modes, which may lead to more ethtool link
1912          * modes being advertised than are actually supported.
1913          */
1914         if (phy->is_c45 && state->rate_matching == RATE_MATCH_NONE &&
1915             state->interface != PHY_INTERFACE_MODE_RXAUI &&
1916             state->interface != PHY_INTERFACE_MODE_XAUI &&
1917             state->interface != PHY_INTERFACE_MODE_USXGMII)
1918                 state->interface = PHY_INTERFACE_MODE_NA;
1919
1920         return phylink_validate(pl, supported, state);
1921 }
1922
1923 static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy,
1924                                phy_interface_t interface)
1925 {
1926         struct phylink_link_state config;
1927         __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
1928         char *irq_str;
1929         int ret;
1930
1931         /*
1932          * This is the new way of dealing with flow control for PHYs,
1933          * as described by Timur Tabi in commit 529ed1275263 ("net: phy:
1934          * phy drivers should not set SUPPORTED_[Asym_]Pause") except
1935          * using our validate call to the MAC, we rely upon the MAC
1936          * clearing the bits from both supported and advertising fields.
1937          */
1938         phy_support_asym_pause(phy);
1939
1940         memset(&config, 0, sizeof(config));
1941         linkmode_copy(supported, phy->supported);
1942         linkmode_copy(config.advertising, phy->advertising);
1943         config.interface = interface;
1944
1945         ret = phylink_validate_phy(pl, phy, supported, &config);
1946         if (ret) {
1947                 phylink_warn(pl, "validation of %s with support %*pb and advertisement %*pb failed: %pe\n",
1948                              phy_modes(config.interface),
1949                              __ETHTOOL_LINK_MODE_MASK_NBITS, phy->supported,
1950                              __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising,
1951                              ERR_PTR(ret));
1952                 return ret;
1953         }
1954
1955         phy->phylink = pl;
1956         phy->phy_link_change = phylink_phy_change;
1957
1958         irq_str = phy_attached_info_irq(phy);
1959         phylink_info(pl,
1960                      "PHY [%s] driver [%s] (irq=%s)\n",
1961                      dev_name(&phy->mdio.dev), phy->drv->name, irq_str);
1962         kfree(irq_str);
1963
1964         mutex_lock(&phy->lock);
1965         mutex_lock(&pl->state_mutex);
1966         pl->phydev = phy;
1967         pl->phy_state.interface = interface;
1968         pl->phy_state.pause = MLO_PAUSE_NONE;
1969         pl->phy_state.speed = SPEED_UNKNOWN;
1970         pl->phy_state.duplex = DUPLEX_UNKNOWN;
1971         pl->phy_state.rate_matching = RATE_MATCH_NONE;
1972         linkmode_copy(pl->supported, supported);
1973         linkmode_copy(pl->link_config.advertising, config.advertising);
1974
1975         /* Restrict the phy advertisement according to the MAC support. */
1976         linkmode_copy(phy->advertising, config.advertising);
1977         mutex_unlock(&pl->state_mutex);
1978         mutex_unlock(&phy->lock);
1979
1980         phylink_dbg(pl,
1981                     "phy: %s setting supported %*pb advertising %*pb\n",
1982                     phy_modes(interface),
1983                     __ETHTOOL_LINK_MODE_MASK_NBITS, pl->supported,
1984                     __ETHTOOL_LINK_MODE_MASK_NBITS, phy->advertising);
1985
1986         if (phy_interrupt_is_valid(phy))
1987                 phy_request_interrupt(phy);
1988
1989         if (pl->config->mac_managed_pm)
1990                 phy->mac_managed_pm = true;
1991
1992         return 0;
1993 }
1994
1995 static int phylink_attach_phy(struct phylink *pl, struct phy_device *phy,
1996                               phy_interface_t interface)
1997 {
1998         u32 flags = 0;
1999
2000         if (WARN_ON(pl->cfg_link_an_mode == MLO_AN_FIXED ||
2001                     (pl->cfg_link_an_mode == MLO_AN_INBAND &&
2002                      phy_interface_mode_is_8023z(interface) && !pl->sfp_bus)))
2003                 return -EINVAL;
2004
2005         if (pl->phydev)
2006                 return -EBUSY;
2007
2008         if (pl->config->mac_requires_rxc)
2009                 flags |= PHY_F_RXC_ALWAYS_ON;
2010
2011         return phy_attach_direct(pl->netdev, phy, flags, interface);
2012 }
2013
2014 /**
2015  * phylink_connect_phy() - connect a PHY to the phylink instance
2016  * @pl: a pointer to a &struct phylink returned from phylink_create()
2017  * @phy: a pointer to a &struct phy_device.
2018  *
2019  * Connect @phy to the phylink instance specified by @pl by calling
2020  * phy_attach_direct(). Configure the @phy according to the MAC driver's
2021  * capabilities, start the PHYLIB state machine and enable any interrupts
2022  * that the PHY supports.
2023  *
2024  * This updates the phylink's ethtool supported and advertising link mode
2025  * masks.
2026  *
2027  * Returns 0 on success or a negative errno.
2028  */
2029 int phylink_connect_phy(struct phylink *pl, struct phy_device *phy)
2030 {
2031         int ret;
2032
2033         /* Use PHY device/driver interface */
2034         if (pl->link_interface == PHY_INTERFACE_MODE_NA) {
2035                 pl->link_interface = phy->interface;
2036                 pl->link_config.interface = pl->link_interface;
2037         }
2038
2039         ret = phylink_attach_phy(pl, phy, pl->link_interface);
2040         if (ret < 0)
2041                 return ret;
2042
2043         ret = phylink_bringup_phy(pl, phy, pl->link_config.interface);
2044         if (ret)
2045                 phy_detach(phy);
2046
2047         return ret;
2048 }
2049 EXPORT_SYMBOL_GPL(phylink_connect_phy);
2050
2051 /**
2052  * phylink_of_phy_connect() - connect the PHY specified in the DT mode.
2053  * @pl: a pointer to a &struct phylink returned from phylink_create()
2054  * @dn: a pointer to a &struct device_node.
2055  * @flags: PHY-specific flags to communicate to the PHY device driver
2056  *
2057  * Connect the phy specified in the device node @dn to the phylink instance
2058  * specified by @pl. Actions specified in phylink_connect_phy() will be
2059  * performed.
2060  *
2061  * Returns 0 on success or a negative errno.
2062  */
2063 int phylink_of_phy_connect(struct phylink *pl, struct device_node *dn,
2064                            u32 flags)
2065 {
2066         return phylink_fwnode_phy_connect(pl, of_fwnode_handle(dn), flags);
2067 }
2068 EXPORT_SYMBOL_GPL(phylink_of_phy_connect);
2069
2070 /**
2071  * phylink_fwnode_phy_connect() - connect the PHY specified in the fwnode.
2072  * @pl: a pointer to a &struct phylink returned from phylink_create()
2073  * @fwnode: a pointer to a &struct fwnode_handle.
2074  * @flags: PHY-specific flags to communicate to the PHY device driver
2075  *
2076  * Connect the phy specified @fwnode to the phylink instance specified
2077  * by @pl.
2078  *
2079  * Returns 0 on success or a negative errno.
2080  */
2081 int phylink_fwnode_phy_connect(struct phylink *pl,
2082                                const struct fwnode_handle *fwnode,
2083                                u32 flags)
2084 {
2085         struct fwnode_handle *phy_fwnode;
2086         struct phy_device *phy_dev;
2087         int ret;
2088
2089         /* Fixed links and 802.3z are handled without needing a PHY */
2090         if (pl->cfg_link_an_mode == MLO_AN_FIXED ||
2091             (pl->cfg_link_an_mode == MLO_AN_INBAND &&
2092              phy_interface_mode_is_8023z(pl->link_interface)))
2093                 return 0;
2094
2095         phy_fwnode = fwnode_get_phy_node(fwnode);
2096         if (IS_ERR(phy_fwnode)) {
2097                 if (pl->cfg_link_an_mode == MLO_AN_PHY)
2098                         return -ENODEV;
2099                 return 0;
2100         }
2101
2102         phy_dev = fwnode_phy_find_device(phy_fwnode);
2103         /* We're done with the phy_node handle */
2104         fwnode_handle_put(phy_fwnode);
2105         if (!phy_dev)
2106                 return -ENODEV;
2107
2108         /* Use PHY device/driver interface */
2109         if (pl->link_interface == PHY_INTERFACE_MODE_NA) {
2110                 pl->link_interface = phy_dev->interface;
2111                 pl->link_config.interface = pl->link_interface;
2112         }
2113
2114         if (pl->config->mac_requires_rxc)
2115                 flags |= PHY_F_RXC_ALWAYS_ON;
2116
2117         ret = phy_attach_direct(pl->netdev, phy_dev, flags,
2118                                 pl->link_interface);
2119         phy_device_free(phy_dev);
2120         if (ret)
2121                 return ret;
2122
2123         ret = phylink_bringup_phy(pl, phy_dev, pl->link_config.interface);
2124         if (ret)
2125                 phy_detach(phy_dev);
2126
2127         return ret;
2128 }
2129 EXPORT_SYMBOL_GPL(phylink_fwnode_phy_connect);
2130
2131 /**
2132  * phylink_disconnect_phy() - disconnect any PHY attached to the phylink
2133  *   instance.
2134  * @pl: a pointer to a &struct phylink returned from phylink_create()
2135  *
2136  * Disconnect any current PHY from the phylink instance described by @pl.
2137  */
2138 void phylink_disconnect_phy(struct phylink *pl)
2139 {
2140         struct phy_device *phy;
2141
2142         ASSERT_RTNL();
2143
2144         phy = pl->phydev;
2145         if (phy) {
2146                 mutex_lock(&phy->lock);
2147                 mutex_lock(&pl->state_mutex);
2148                 pl->phydev = NULL;
2149                 mutex_unlock(&pl->state_mutex);
2150                 mutex_unlock(&phy->lock);
2151                 flush_work(&pl->resolve);
2152
2153                 phy_disconnect(phy);
2154         }
2155 }
2156 EXPORT_SYMBOL_GPL(phylink_disconnect_phy);
2157
2158 static void phylink_link_changed(struct phylink *pl, bool up, const char *what)
2159 {
2160         if (!up)
2161                 pl->mac_link_dropped = true;
2162         phylink_run_resolve(pl);
2163         phylink_dbg(pl, "%s link %s\n", what, up ? "up" : "down");
2164 }
2165
2166 /**
2167  * phylink_mac_change() - notify phylink of a change in MAC state
2168  * @pl: a pointer to a &struct phylink returned from phylink_create()
2169  * @up: indicates whether the link is currently up.
2170  *
2171  * The MAC driver should call this driver when the state of its link
2172  * changes (eg, link failure, new negotiation results, etc.)
2173  */
2174 void phylink_mac_change(struct phylink *pl, bool up)
2175 {
2176         phylink_link_changed(pl, up, "mac");
2177 }
2178 EXPORT_SYMBOL_GPL(phylink_mac_change);
2179
2180 /**
2181  * phylink_pcs_change() - notify phylink of a change to PCS link state
2182  * @pcs: pointer to &struct phylink_pcs
2183  * @up: indicates whether the link is currently up.
2184  *
2185  * The PCS driver should call this when the state of its link changes
2186  * (e.g. link failure, new negotiation results, etc.) Note: it should
2187  * not determine "up" by reading the BMSR. If in doubt about the link
2188  * state at interrupt time, then pass true if pcs_get_state() returns
2189  * the latched link-down state, otherwise pass false.
2190  */
2191 void phylink_pcs_change(struct phylink_pcs *pcs, bool up)
2192 {
2193         struct phylink *pl = pcs->phylink;
2194
2195         if (pl)
2196                 phylink_link_changed(pl, up, "pcs");
2197 }
2198 EXPORT_SYMBOL_GPL(phylink_pcs_change);
2199
2200 static irqreturn_t phylink_link_handler(int irq, void *data)
2201 {
2202         struct phylink *pl = data;
2203
2204         phylink_run_resolve(pl);
2205
2206         return IRQ_HANDLED;
2207 }
2208
2209 /**
2210  * phylink_start() - start a phylink instance
2211  * @pl: a pointer to a &struct phylink returned from phylink_create()
2212  *
2213  * Start the phylink instance specified by @pl, configuring the MAC for the
2214  * desired link mode(s) and negotiation style. This should be called from the
2215  * network device driver's &struct net_device_ops ndo_open() method.
2216  */
2217 void phylink_start(struct phylink *pl)
2218 {
2219         bool poll = false;
2220
2221         ASSERT_RTNL();
2222
2223         phylink_info(pl, "configuring for %s/%s link mode\n",
2224                      phylink_an_mode_str(pl->cur_link_an_mode),
2225                      phy_modes(pl->link_config.interface));
2226
2227         /* Always set the carrier off */
2228         if (pl->netdev)
2229                 netif_carrier_off(pl->netdev);
2230
2231         pl->pcs_state = PCS_STATE_STARTING;
2232
2233         /* Apply the link configuration to the MAC when starting. This allows
2234          * a fixed-link to start with the correct parameters, and also
2235          * ensures that we set the appropriate advertisement for Serdes links.
2236          *
2237          * Restart autonegotiation if using 802.3z to ensure that the link
2238          * parameters are properly negotiated.  This is necessary for DSA
2239          * switches using 802.3z negotiation to ensure they see our modes.
2240          */
2241         phylink_mac_initial_config(pl, true);
2242
2243         pl->pcs_state = PCS_STATE_STARTED;
2244
2245         phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_STOPPED);
2246
2247         if (pl->cfg_link_an_mode == MLO_AN_FIXED && pl->link_gpio) {
2248                 int irq = gpiod_to_irq(pl->link_gpio);
2249
2250                 if (irq > 0) {
2251                         if (!request_irq(irq, phylink_link_handler,
2252                                          IRQF_TRIGGER_RISING |
2253                                          IRQF_TRIGGER_FALLING,
2254                                          "netdev link", pl))
2255                                 pl->link_irq = irq;
2256                         else
2257                                 irq = 0;
2258                 }
2259                 if (irq <= 0)
2260                         poll = true;
2261         }
2262
2263         if (pl->cfg_link_an_mode == MLO_AN_FIXED)
2264                 poll |= pl->config->poll_fixed_state;
2265
2266         if (poll)
2267                 mod_timer(&pl->link_poll, jiffies + HZ);
2268         if (pl->phydev)
2269                 phy_start(pl->phydev);
2270         if (pl->sfp_bus)
2271                 sfp_upstream_start(pl->sfp_bus);
2272 }
2273 EXPORT_SYMBOL_GPL(phylink_start);
2274
2275 /**
2276  * phylink_stop() - stop a phylink instance
2277  * @pl: a pointer to a &struct phylink returned from phylink_create()
2278  *
2279  * Stop the phylink instance specified by @pl. This should be called from the
2280  * network device driver's &struct net_device_ops ndo_stop() method.  The
2281  * network device's carrier state should not be changed prior to calling this
2282  * function.
2283  *
2284  * This will synchronously bring down the link if the link is not already
2285  * down (in other words, it will trigger a mac_link_down() method call.)
2286  */
2287 void phylink_stop(struct phylink *pl)
2288 {
2289         ASSERT_RTNL();
2290
2291         if (pl->sfp_bus)
2292                 sfp_upstream_stop(pl->sfp_bus);
2293         if (pl->phydev)
2294                 phy_stop(pl->phydev);
2295         del_timer_sync(&pl->link_poll);
2296         if (pl->link_irq) {
2297                 free_irq(pl->link_irq, pl);
2298                 pl->link_irq = 0;
2299         }
2300
2301         phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_STOPPED);
2302
2303         pl->pcs_state = PCS_STATE_DOWN;
2304
2305         phylink_pcs_disable(pl->pcs);
2306 }
2307 EXPORT_SYMBOL_GPL(phylink_stop);
2308
2309 /**
2310  * phylink_suspend() - handle a network device suspend event
2311  * @pl: a pointer to a &struct phylink returned from phylink_create()
2312  * @mac_wol: true if the MAC needs to receive packets for Wake-on-Lan
2313  *
2314  * Handle a network device suspend event. There are several cases:
2315  *
2316  * - If Wake-on-Lan is not active, we can bring down the link between
2317  *   the MAC and PHY by calling phylink_stop().
2318  * - If Wake-on-Lan is active, and being handled only by the PHY, we
2319  *   can also bring down the link between the MAC and PHY.
2320  * - If Wake-on-Lan is active, but being handled by the MAC, the MAC
2321  *   still needs to receive packets, so we can not bring the link down.
2322  */
2323 void phylink_suspend(struct phylink *pl, bool mac_wol)
2324 {
2325         ASSERT_RTNL();
2326
2327         if (mac_wol && (!pl->netdev || pl->netdev->ethtool->wol_enabled)) {
2328                 /* Wake-on-Lan enabled, MAC handling */
2329                 mutex_lock(&pl->state_mutex);
2330
2331                 /* Stop the resolver bringing the link up */
2332                 __set_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state);
2333
2334                 /* Disable the carrier, to prevent transmit timeouts,
2335                  * but one would hope all packets have been sent. This
2336                  * also means phylink_resolve() will do nothing.
2337                  */
2338                 if (pl->netdev)
2339                         netif_carrier_off(pl->netdev);
2340                 else
2341                         pl->old_link_state = false;
2342
2343                 /* We do not call mac_link_down() here as we want the
2344                  * link to remain up to receive the WoL packets.
2345                  */
2346                 mutex_unlock(&pl->state_mutex);
2347         } else {
2348                 phylink_stop(pl);
2349         }
2350 }
2351 EXPORT_SYMBOL_GPL(phylink_suspend);
2352
2353 /**
2354  * phylink_resume() - handle a network device resume event
2355  * @pl: a pointer to a &struct phylink returned from phylink_create()
2356  *
2357  * Undo the effects of phylink_suspend(), returning the link to an
2358  * operational state.
2359  */
2360 void phylink_resume(struct phylink *pl)
2361 {
2362         ASSERT_RTNL();
2363
2364         if (test_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state)) {
2365                 /* Wake-on-Lan enabled, MAC handling */
2366
2367                 /* Call mac_link_down() so we keep the overall state balanced.
2368                  * Do this under the state_mutex lock for consistency. This
2369                  * will cause a "Link Down" message to be printed during
2370                  * resume, which is harmless - the true link state will be
2371                  * printed when we run a resolve.
2372                  */
2373                 mutex_lock(&pl->state_mutex);
2374                 phylink_link_down(pl);
2375                 mutex_unlock(&pl->state_mutex);
2376
2377                 /* Re-apply the link parameters so that all the settings get
2378                  * restored to the MAC.
2379                  */
2380                 phylink_mac_initial_config(pl, true);
2381
2382                 /* Re-enable and re-resolve the link parameters */
2383                 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_MAC_WOL);
2384         } else {
2385                 phylink_start(pl);
2386         }
2387 }
2388 EXPORT_SYMBOL_GPL(phylink_resume);
2389
2390 /**
2391  * phylink_ethtool_get_wol() - get the wake on lan parameters for the PHY
2392  * @pl: a pointer to a &struct phylink returned from phylink_create()
2393  * @wol: a pointer to &struct ethtool_wolinfo to hold the read parameters
2394  *
2395  * Read the wake on lan parameters from the PHY attached to the phylink
2396  * instance specified by @pl. If no PHY is currently attached, report no
2397  * support for wake on lan.
2398  */
2399 void phylink_ethtool_get_wol(struct phylink *pl, struct ethtool_wolinfo *wol)
2400 {
2401         ASSERT_RTNL();
2402
2403         wol->supported = 0;
2404         wol->wolopts = 0;
2405
2406         if (pl->phydev)
2407                 phy_ethtool_get_wol(pl->phydev, wol);
2408 }
2409 EXPORT_SYMBOL_GPL(phylink_ethtool_get_wol);
2410
2411 /**
2412  * phylink_ethtool_set_wol() - set wake on lan parameters
2413  * @pl: a pointer to a &struct phylink returned from phylink_create()
2414  * @wol: a pointer to &struct ethtool_wolinfo for the desired parameters
2415  *
2416  * Set the wake on lan parameters for the PHY attached to the phylink
2417  * instance specified by @pl. If no PHY is attached, returns %EOPNOTSUPP
2418  * error.
2419  *
2420  * Returns zero on success or negative errno code.
2421  */
2422 int phylink_ethtool_set_wol(struct phylink *pl, struct ethtool_wolinfo *wol)
2423 {
2424         int ret = -EOPNOTSUPP;
2425
2426         ASSERT_RTNL();
2427
2428         if (pl->phydev)
2429                 ret = phy_ethtool_set_wol(pl->phydev, wol);
2430
2431         return ret;
2432 }
2433 EXPORT_SYMBOL_GPL(phylink_ethtool_set_wol);
2434
2435 static void phylink_merge_link_mode(unsigned long *dst, const unsigned long *b)
2436 {
2437         __ETHTOOL_DECLARE_LINK_MODE_MASK(mask);
2438
2439         linkmode_zero(mask);
2440         phylink_set_port_modes(mask);
2441
2442         linkmode_and(dst, dst, mask);
2443         linkmode_or(dst, dst, b);
2444 }
2445
2446 static void phylink_get_ksettings(const struct phylink_link_state *state,
2447                                   struct ethtool_link_ksettings *kset)
2448 {
2449         phylink_merge_link_mode(kset->link_modes.advertising, state->advertising);
2450         linkmode_copy(kset->link_modes.lp_advertising, state->lp_advertising);
2451         if (kset->base.rate_matching == RATE_MATCH_NONE) {
2452                 kset->base.speed = state->speed;
2453                 kset->base.duplex = state->duplex;
2454         }
2455         kset->base.autoneg = linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
2456                                                state->advertising) ?
2457                                 AUTONEG_ENABLE : AUTONEG_DISABLE;
2458 }
2459
2460 /**
2461  * phylink_ethtool_ksettings_get() - get the current link settings
2462  * @pl: a pointer to a &struct phylink returned from phylink_create()
2463  * @kset: a pointer to a &struct ethtool_link_ksettings to hold link settings
2464  *
2465  * Read the current link settings for the phylink instance specified by @pl.
2466  * This will be the link settings read from the MAC, PHY or fixed link
2467  * settings depending on the current negotiation mode.
2468  */
2469 int phylink_ethtool_ksettings_get(struct phylink *pl,
2470                                   struct ethtool_link_ksettings *kset)
2471 {
2472         struct phylink_link_state link_state;
2473
2474         ASSERT_RTNL();
2475
2476         if (pl->phydev)
2477                 phy_ethtool_ksettings_get(pl->phydev, kset);
2478         else
2479                 kset->base.port = pl->link_port;
2480
2481         linkmode_copy(kset->link_modes.supported, pl->supported);
2482
2483         switch (pl->cur_link_an_mode) {
2484         case MLO_AN_FIXED:
2485                 /* We are using fixed settings. Report these as the
2486                  * current link settings - and note that these also
2487                  * represent the supported speeds/duplex/pause modes.
2488                  */
2489                 phylink_get_fixed_state(pl, &link_state);
2490                 phylink_get_ksettings(&link_state, kset);
2491                 break;
2492
2493         case MLO_AN_INBAND:
2494                 /* If there is a phy attached, then use the reported
2495                  * settings from the phy with no modification.
2496                  */
2497                 if (pl->phydev)
2498                         break;
2499
2500                 phylink_mac_pcs_get_state(pl, &link_state);
2501
2502                 /* The MAC is reporting the link results from its own PCS
2503                  * layer via in-band status. Report these as the current
2504                  * link settings.
2505                  */
2506                 phylink_get_ksettings(&link_state, kset);
2507                 break;
2508         }
2509
2510         return 0;
2511 }
2512 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_get);
2513
2514 /**
2515  * phylink_ethtool_ksettings_set() - set the link settings
2516  * @pl: a pointer to a &struct phylink returned from phylink_create()
2517  * @kset: a pointer to a &struct ethtool_link_ksettings for the desired modes
2518  */
2519 int phylink_ethtool_ksettings_set(struct phylink *pl,
2520                                   const struct ethtool_link_ksettings *kset)
2521 {
2522         __ETHTOOL_DECLARE_LINK_MODE_MASK(support);
2523         struct phylink_link_state config;
2524         const struct phy_setting *s;
2525
2526         ASSERT_RTNL();
2527
2528         if (pl->phydev) {
2529                 struct ethtool_link_ksettings phy_kset = *kset;
2530
2531                 linkmode_and(phy_kset.link_modes.advertising,
2532                              phy_kset.link_modes.advertising,
2533                              pl->supported);
2534
2535                 /* We can rely on phylib for this update; we also do not need
2536                  * to update the pl->link_config settings:
2537                  * - the configuration returned via ksettings_get() will come
2538                  *   from phylib whenever a PHY is present.
2539                  * - link_config.interface will be updated by the PHY calling
2540                  *   back via phylink_phy_change() and a subsequent resolve.
2541                  * - initial link configuration for PHY mode comes from the
2542                  *   last phy state updated via phylink_phy_change().
2543                  * - other configuration changes (e.g. pause modes) are
2544                  *   performed directly via phylib.
2545                  * - if in in-band mode with a PHY, the link configuration
2546                  *   is passed on the link from the PHY, and all of
2547                  *   link_config.{speed,duplex,an_enabled,pause} are not used.
2548                  * - the only possible use would be link_config.advertising
2549                  *   pause modes when in 1000base-X mode with a PHY, but in
2550                  *   the presence of a PHY, this should not be changed as that
2551                  *   should be determined from the media side advertisement.
2552                  */
2553                 return phy_ethtool_ksettings_set(pl->phydev, &phy_kset);
2554         }
2555
2556         config = pl->link_config;
2557         /* Mask out unsupported advertisements */
2558         linkmode_and(config.advertising, kset->link_modes.advertising,
2559                      pl->supported);
2560
2561         /* FIXME: should we reject autoneg if phy/mac does not support it? */
2562         switch (kset->base.autoneg) {
2563         case AUTONEG_DISABLE:
2564                 /* Autonegotiation disabled, select a suitable speed and
2565                  * duplex.
2566                  */
2567                 s = phy_lookup_setting(kset->base.speed, kset->base.duplex,
2568                                        pl->supported, false);
2569                 if (!s)
2570                         return -EINVAL;
2571
2572                 /* If we have a fixed link, refuse to change link parameters.
2573                  * If the link parameters match, accept them but do nothing.
2574                  */
2575                 if (pl->cur_link_an_mode == MLO_AN_FIXED) {
2576                         if (s->speed != pl->link_config.speed ||
2577                             s->duplex != pl->link_config.duplex)
2578                                 return -EINVAL;
2579                         return 0;
2580                 }
2581
2582                 config.speed = s->speed;
2583                 config.duplex = s->duplex;
2584                 break;
2585
2586         case AUTONEG_ENABLE:
2587                 /* If we have a fixed link, allow autonegotiation (since that
2588                  * is our default case) but do not allow the advertisement to
2589                  * be changed. If the advertisement matches, simply return.
2590                  */
2591                 if (pl->cur_link_an_mode == MLO_AN_FIXED) {
2592                         if (!linkmode_equal(config.advertising,
2593                                             pl->link_config.advertising))
2594                                 return -EINVAL;
2595                         return 0;
2596                 }
2597
2598                 config.speed = SPEED_UNKNOWN;
2599                 config.duplex = DUPLEX_UNKNOWN;
2600                 break;
2601
2602         default:
2603                 return -EINVAL;
2604         }
2605
2606         /* We have ruled out the case with a PHY attached, and the
2607          * fixed-link cases.  All that is left are in-band links.
2608          */
2609         linkmode_mod_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, config.advertising,
2610                          kset->base.autoneg == AUTONEG_ENABLE);
2611
2612         /* If this link is with an SFP, ensure that changes to advertised modes
2613          * also cause the associated interface to be selected such that the
2614          * link can be configured correctly.
2615          */
2616         if (pl->sfp_bus) {
2617                 config.interface = sfp_select_interface(pl->sfp_bus,
2618                                                         config.advertising);
2619                 if (config.interface == PHY_INTERFACE_MODE_NA) {
2620                         phylink_err(pl,
2621                                     "selection of interface failed, advertisement %*pb\n",
2622                                     __ETHTOOL_LINK_MODE_MASK_NBITS,
2623                                     config.advertising);
2624                         return -EINVAL;
2625                 }
2626
2627                 /* Revalidate with the selected interface */
2628                 linkmode_copy(support, pl->supported);
2629                 if (phylink_validate(pl, support, &config)) {
2630                         phylink_err(pl, "validation of %s/%s with support %*pb failed\n",
2631                                     phylink_an_mode_str(pl->cur_link_an_mode),
2632                                     phy_modes(config.interface),
2633                                     __ETHTOOL_LINK_MODE_MASK_NBITS, support);
2634                         return -EINVAL;
2635                 }
2636         } else {
2637                 /* Validate without changing the current supported mask. */
2638                 linkmode_copy(support, pl->supported);
2639                 if (phylink_validate(pl, support, &config))
2640                         return -EINVAL;
2641         }
2642
2643         /* If autonegotiation is enabled, we must have an advertisement */
2644         if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
2645                               config.advertising) &&
2646             phylink_is_empty_linkmode(config.advertising))
2647                 return -EINVAL;
2648
2649         mutex_lock(&pl->state_mutex);
2650         pl->link_config.speed = config.speed;
2651         pl->link_config.duplex = config.duplex;
2652
2653         if (pl->link_config.interface != config.interface) {
2654                 /* The interface changed, e.g. 1000base-X <-> 2500base-X */
2655                 /* We need to force the link down, then change the interface */
2656                 if (pl->old_link_state) {
2657                         phylink_link_down(pl);
2658                         pl->old_link_state = false;
2659                 }
2660                 if (!test_bit(PHYLINK_DISABLE_STOPPED,
2661                               &pl->phylink_disable_state))
2662                         phylink_major_config(pl, false, &config);
2663                 pl->link_config.interface = config.interface;
2664                 linkmode_copy(pl->link_config.advertising, config.advertising);
2665         } else if (!linkmode_equal(pl->link_config.advertising,
2666                                    config.advertising)) {
2667                 linkmode_copy(pl->link_config.advertising, config.advertising);
2668                 phylink_change_inband_advert(pl);
2669         }
2670         mutex_unlock(&pl->state_mutex);
2671
2672         return 0;
2673 }
2674 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_set);
2675
2676 /**
2677  * phylink_ethtool_nway_reset() - restart negotiation
2678  * @pl: a pointer to a &struct phylink returned from phylink_create()
2679  *
2680  * Restart negotiation for the phylink instance specified by @pl. This will
2681  * cause any attached phy to restart negotiation with the link partner, and
2682  * if the MAC is in a BaseX mode, the MAC will also be requested to restart
2683  * negotiation.
2684  *
2685  * Returns zero on success, or negative error code.
2686  */
2687 int phylink_ethtool_nway_reset(struct phylink *pl)
2688 {
2689         int ret = 0;
2690
2691         ASSERT_RTNL();
2692
2693         if (pl->phydev)
2694                 ret = phy_restart_aneg(pl->phydev);
2695         phylink_pcs_an_restart(pl);
2696
2697         return ret;
2698 }
2699 EXPORT_SYMBOL_GPL(phylink_ethtool_nway_reset);
2700
2701 /**
2702  * phylink_ethtool_get_pauseparam() - get the current pause parameters
2703  * @pl: a pointer to a &struct phylink returned from phylink_create()
2704  * @pause: a pointer to a &struct ethtool_pauseparam
2705  */
2706 void phylink_ethtool_get_pauseparam(struct phylink *pl,
2707                                     struct ethtool_pauseparam *pause)
2708 {
2709         ASSERT_RTNL();
2710
2711         pause->autoneg = !!(pl->link_config.pause & MLO_PAUSE_AN);
2712         pause->rx_pause = !!(pl->link_config.pause & MLO_PAUSE_RX);
2713         pause->tx_pause = !!(pl->link_config.pause & MLO_PAUSE_TX);
2714 }
2715 EXPORT_SYMBOL_GPL(phylink_ethtool_get_pauseparam);
2716
2717 /**
2718  * phylink_ethtool_set_pauseparam() - set the current pause parameters
2719  * @pl: a pointer to a &struct phylink returned from phylink_create()
2720  * @pause: a pointer to a &struct ethtool_pauseparam
2721  */
2722 int phylink_ethtool_set_pauseparam(struct phylink *pl,
2723                                    struct ethtool_pauseparam *pause)
2724 {
2725         struct phylink_link_state *config = &pl->link_config;
2726         bool manual_changed;
2727         int pause_state;
2728
2729         ASSERT_RTNL();
2730
2731         if (pl->cur_link_an_mode == MLO_AN_FIXED)
2732                 return -EOPNOTSUPP;
2733
2734         if (!phylink_test(pl->supported, Pause) &&
2735             !phylink_test(pl->supported, Asym_Pause))
2736                 return -EOPNOTSUPP;
2737
2738         if (!phylink_test(pl->supported, Asym_Pause) &&
2739             pause->rx_pause != pause->tx_pause)
2740                 return -EINVAL;
2741
2742         pause_state = 0;
2743         if (pause->autoneg)
2744                 pause_state |= MLO_PAUSE_AN;
2745         if (pause->rx_pause)
2746                 pause_state |= MLO_PAUSE_RX;
2747         if (pause->tx_pause)
2748                 pause_state |= MLO_PAUSE_TX;
2749
2750         mutex_lock(&pl->state_mutex);
2751         /*
2752          * See the comments for linkmode_set_pause(), wrt the deficiencies
2753          * with the current implementation.  A solution to this issue would
2754          * be:
2755          * ethtool  Local device
2756          *  rx  tx  Pause AsymDir
2757          *  0   0   0     0
2758          *  1   0   1     1
2759          *  0   1   0     1
2760          *  1   1   1     1
2761          * and then use the ethtool rx/tx enablement status to mask the
2762          * rx/tx pause resolution.
2763          */
2764         linkmode_set_pause(config->advertising, pause->tx_pause,
2765                            pause->rx_pause);
2766
2767         manual_changed = (config->pause ^ pause_state) & MLO_PAUSE_AN ||
2768                          (!(pause_state & MLO_PAUSE_AN) &&
2769                            (config->pause ^ pause_state) & MLO_PAUSE_TXRX_MASK);
2770
2771         config->pause = pause_state;
2772
2773         /* Update our in-band advertisement, triggering a renegotiation if
2774          * the advertisement changed.
2775          */
2776         if (!pl->phydev)
2777                 phylink_change_inband_advert(pl);
2778
2779         mutex_unlock(&pl->state_mutex);
2780
2781         /* If we have a PHY, a change of the pause frame advertisement will
2782          * cause phylib to renegotiate (if AN is enabled) which will in turn
2783          * call our phylink_phy_change() and trigger a resolve.  Note that
2784          * we can't hold our state mutex while calling phy_set_asym_pause().
2785          */
2786         if (pl->phydev)
2787                 phy_set_asym_pause(pl->phydev, pause->rx_pause,
2788                                    pause->tx_pause);
2789
2790         /* If the manual pause settings changed, make sure we trigger a
2791          * resolve to update their state; we can not guarantee that the
2792          * link will cycle.
2793          */
2794         if (manual_changed) {
2795                 pl->mac_link_dropped = true;
2796                 phylink_run_resolve(pl);
2797         }
2798
2799         return 0;
2800 }
2801 EXPORT_SYMBOL_GPL(phylink_ethtool_set_pauseparam);
2802
2803 /**
2804  * phylink_get_eee_err() - read the energy efficient ethernet error
2805  *   counter
2806  * @pl: a pointer to a &struct phylink returned from phylink_create().
2807  *
2808  * Read the Energy Efficient Ethernet error counter from the PHY associated
2809  * with the phylink instance specified by @pl.
2810  *
2811  * Returns positive error counter value, or negative error code.
2812  */
2813 int phylink_get_eee_err(struct phylink *pl)
2814 {
2815         int ret = 0;
2816
2817         ASSERT_RTNL();
2818
2819         if (pl->phydev)
2820                 ret = phy_get_eee_err(pl->phydev);
2821
2822         return ret;
2823 }
2824 EXPORT_SYMBOL_GPL(phylink_get_eee_err);
2825
2826 /**
2827  * phylink_init_eee() - init and check the EEE features
2828  * @pl: a pointer to a &struct phylink returned from phylink_create()
2829  * @clk_stop_enable: allow PHY to stop receive clock
2830  *
2831  * Must be called either with RTNL held or within mac_link_up()
2832  */
2833 int phylink_init_eee(struct phylink *pl, bool clk_stop_enable)
2834 {
2835         int ret = -EOPNOTSUPP;
2836
2837         if (pl->phydev)
2838                 ret = phy_init_eee(pl->phydev, clk_stop_enable);
2839
2840         return ret;
2841 }
2842 EXPORT_SYMBOL_GPL(phylink_init_eee);
2843
2844 /**
2845  * phylink_ethtool_get_eee() - read the energy efficient ethernet parameters
2846  * @pl: a pointer to a &struct phylink returned from phylink_create()
2847  * @eee: a pointer to a &struct ethtool_keee for the read parameters
2848  */
2849 int phylink_ethtool_get_eee(struct phylink *pl, struct ethtool_keee *eee)
2850 {
2851         int ret = -EOPNOTSUPP;
2852
2853         ASSERT_RTNL();
2854
2855         if (pl->phydev)
2856                 ret = phy_ethtool_get_eee(pl->phydev, eee);
2857
2858         return ret;
2859 }
2860 EXPORT_SYMBOL_GPL(phylink_ethtool_get_eee);
2861
2862 /**
2863  * phylink_ethtool_set_eee() - set the energy efficient ethernet parameters
2864  * @pl: a pointer to a &struct phylink returned from phylink_create()
2865  * @eee: a pointer to a &struct ethtool_keee for the desired parameters
2866  */
2867 int phylink_ethtool_set_eee(struct phylink *pl, struct ethtool_keee *eee)
2868 {
2869         int ret = -EOPNOTSUPP;
2870
2871         ASSERT_RTNL();
2872
2873         if (pl->phydev)
2874                 ret = phy_ethtool_set_eee(pl->phydev, eee);
2875
2876         return ret;
2877 }
2878 EXPORT_SYMBOL_GPL(phylink_ethtool_set_eee);
2879
2880 /* This emulates MII registers for a fixed-mode phy operating as per the
2881  * passed in state. "aneg" defines if we report negotiation is possible.
2882  *
2883  * FIXME: should deal with negotiation state too.
2884  */
2885 static int phylink_mii_emul_read(unsigned int reg,
2886                                  struct phylink_link_state *state)
2887 {
2888         struct fixed_phy_status fs;
2889         unsigned long *lpa = state->lp_advertising;
2890         int val;
2891
2892         fs.link = state->link;
2893         fs.speed = state->speed;
2894         fs.duplex = state->duplex;
2895         fs.pause = test_bit(ETHTOOL_LINK_MODE_Pause_BIT, lpa);
2896         fs.asym_pause = test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, lpa);
2897
2898         val = swphy_read_reg(reg, &fs);
2899         if (reg == MII_BMSR) {
2900                 if (!state->an_complete)
2901                         val &= ~BMSR_ANEGCOMPLETE;
2902         }
2903         return val;
2904 }
2905
2906 static int phylink_phy_read(struct phylink *pl, unsigned int phy_id,
2907                             unsigned int reg)
2908 {
2909         struct phy_device *phydev = pl->phydev;
2910         int prtad, devad;
2911
2912         if (mdio_phy_id_is_c45(phy_id)) {
2913                 prtad = mdio_phy_id_prtad(phy_id);
2914                 devad = mdio_phy_id_devad(phy_id);
2915                 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad,
2916                                         reg);
2917         }
2918
2919         if (phydev->is_c45) {
2920                 switch (reg) {
2921                 case MII_BMCR:
2922                 case MII_BMSR:
2923                 case MII_PHYSID1:
2924                 case MII_PHYSID2:
2925                         devad = __ffs(phydev->c45_ids.mmds_present);
2926                         break;
2927                 case MII_ADVERTISE:
2928                 case MII_LPA:
2929                         if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN))
2930                                 return -EINVAL;
2931                         devad = MDIO_MMD_AN;
2932                         if (reg == MII_ADVERTISE)
2933                                 reg = MDIO_AN_ADVERTISE;
2934                         else
2935                                 reg = MDIO_AN_LPA;
2936                         break;
2937                 default:
2938                         return -EINVAL;
2939                 }
2940                 prtad = phy_id;
2941                 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad,
2942                                         reg);
2943         }
2944
2945         return mdiobus_read(pl->phydev->mdio.bus, phy_id, reg);
2946 }
2947
2948 static int phylink_phy_write(struct phylink *pl, unsigned int phy_id,
2949                              unsigned int reg, unsigned int val)
2950 {
2951         struct phy_device *phydev = pl->phydev;
2952         int prtad, devad;
2953
2954         if (mdio_phy_id_is_c45(phy_id)) {
2955                 prtad = mdio_phy_id_prtad(phy_id);
2956                 devad = mdio_phy_id_devad(phy_id);
2957                 return mdiobus_c45_write(pl->phydev->mdio.bus, prtad, devad,
2958                                          reg, val);
2959         }
2960
2961         if (phydev->is_c45) {
2962                 switch (reg) {
2963                 case MII_BMCR:
2964                 case MII_BMSR:
2965                 case MII_PHYSID1:
2966                 case MII_PHYSID2:
2967                         devad = __ffs(phydev->c45_ids.mmds_present);
2968                         break;
2969                 case MII_ADVERTISE:
2970                 case MII_LPA:
2971                         if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN))
2972                                 return -EINVAL;
2973                         devad = MDIO_MMD_AN;
2974                         if (reg == MII_ADVERTISE)
2975                                 reg = MDIO_AN_ADVERTISE;
2976                         else
2977                                 reg = MDIO_AN_LPA;
2978                         break;
2979                 default:
2980                         return -EINVAL;
2981                 }
2982                 return mdiobus_c45_write(pl->phydev->mdio.bus, phy_id, devad,
2983                                          reg, val);
2984         }
2985
2986         return mdiobus_write(phydev->mdio.bus, phy_id, reg, val);
2987 }
2988
2989 static int phylink_mii_read(struct phylink *pl, unsigned int phy_id,
2990                             unsigned int reg)
2991 {
2992         struct phylink_link_state state;
2993         int val = 0xffff;
2994
2995         switch (pl->cur_link_an_mode) {
2996         case MLO_AN_FIXED:
2997                 if (phy_id == 0) {
2998                         phylink_get_fixed_state(pl, &state);
2999                         val = phylink_mii_emul_read(reg, &state);
3000                 }
3001                 break;
3002
3003         case MLO_AN_PHY:
3004                 return -EOPNOTSUPP;
3005
3006         case MLO_AN_INBAND:
3007                 if (phy_id == 0) {
3008                         phylink_mac_pcs_get_state(pl, &state);
3009                         val = phylink_mii_emul_read(reg, &state);
3010                 }
3011                 break;
3012         }
3013
3014         return val & 0xffff;
3015 }
3016
3017 static int phylink_mii_write(struct phylink *pl, unsigned int phy_id,
3018                              unsigned int reg, unsigned int val)
3019 {
3020         switch (pl->cur_link_an_mode) {
3021         case MLO_AN_FIXED:
3022                 break;
3023
3024         case MLO_AN_PHY:
3025                 return -EOPNOTSUPP;
3026
3027         case MLO_AN_INBAND:
3028                 break;
3029         }
3030
3031         return 0;
3032 }
3033
3034 /**
3035  * phylink_mii_ioctl() - generic mii ioctl interface
3036  * @pl: a pointer to a &struct phylink returned from phylink_create()
3037  * @ifr: a pointer to a &struct ifreq for socket ioctls
3038  * @cmd: ioctl cmd to execute
3039  *
3040  * Perform the specified MII ioctl on the PHY attached to the phylink instance
3041  * specified by @pl. If no PHY is attached, emulate the presence of the PHY.
3042  *
3043  * Returns: zero on success or negative error code.
3044  *
3045  * %SIOCGMIIPHY:
3046  *  read register from the current PHY.
3047  * %SIOCGMIIREG:
3048  *  read register from the specified PHY.
3049  * %SIOCSMIIREG:
3050  *  set a register on the specified PHY.
3051  */
3052 int phylink_mii_ioctl(struct phylink *pl, struct ifreq *ifr, int cmd)
3053 {
3054         struct mii_ioctl_data *mii = if_mii(ifr);
3055         int  ret;
3056
3057         ASSERT_RTNL();
3058
3059         if (pl->phydev) {
3060                 /* PHYs only exist for MLO_AN_PHY and SGMII */
3061                 switch (cmd) {
3062                 case SIOCGMIIPHY:
3063                         mii->phy_id = pl->phydev->mdio.addr;
3064                         fallthrough;
3065
3066                 case SIOCGMIIREG:
3067                         ret = phylink_phy_read(pl, mii->phy_id, mii->reg_num);
3068                         if (ret >= 0) {
3069                                 mii->val_out = ret;
3070                                 ret = 0;
3071                         }
3072                         break;
3073
3074                 case SIOCSMIIREG:
3075                         ret = phylink_phy_write(pl, mii->phy_id, mii->reg_num,
3076                                                 mii->val_in);
3077                         break;
3078
3079                 default:
3080                         ret = phy_mii_ioctl(pl->phydev, ifr, cmd);
3081                         break;
3082                 }
3083         } else {
3084                 switch (cmd) {
3085                 case SIOCGMIIPHY:
3086                         mii->phy_id = 0;
3087                         fallthrough;
3088
3089                 case SIOCGMIIREG:
3090                         ret = phylink_mii_read(pl, mii->phy_id, mii->reg_num);
3091                         if (ret >= 0) {
3092                                 mii->val_out = ret;
3093                                 ret = 0;
3094                         }
3095                         break;
3096
3097                 case SIOCSMIIREG:
3098                         ret = phylink_mii_write(pl, mii->phy_id, mii->reg_num,
3099                                                 mii->val_in);
3100                         break;
3101
3102                 default:
3103                         ret = -EOPNOTSUPP;
3104                         break;
3105                 }
3106         }
3107
3108         return ret;
3109 }
3110 EXPORT_SYMBOL_GPL(phylink_mii_ioctl);
3111
3112 /**
3113  * phylink_speed_down() - set the non-SFP PHY to lowest speed supported by both
3114  *   link partners
3115  * @pl: a pointer to a &struct phylink returned from phylink_create()
3116  * @sync: perform action synchronously
3117  *
3118  * If we have a PHY that is not part of a SFP module, then set the speed
3119  * as described in the phy_speed_down() function. Please see this function
3120  * for a description of the @sync parameter.
3121  *
3122  * Returns zero if there is no PHY, otherwise as per phy_speed_down().
3123  */
3124 int phylink_speed_down(struct phylink *pl, bool sync)
3125 {
3126         int ret = 0;
3127
3128         ASSERT_RTNL();
3129
3130         if (!pl->sfp_bus && pl->phydev)
3131                 ret = phy_speed_down(pl->phydev, sync);
3132
3133         return ret;
3134 }
3135 EXPORT_SYMBOL_GPL(phylink_speed_down);
3136
3137 /**
3138  * phylink_speed_up() - restore the advertised speeds prior to the call to
3139  *   phylink_speed_down()
3140  * @pl: a pointer to a &struct phylink returned from phylink_create()
3141  *
3142  * If we have a PHY that is not part of a SFP module, then restore the
3143  * PHY speeds as per phy_speed_up().
3144  *
3145  * Returns zero if there is no PHY, otherwise as per phy_speed_up().
3146  */
3147 int phylink_speed_up(struct phylink *pl)
3148 {
3149         int ret = 0;
3150
3151         ASSERT_RTNL();
3152
3153         if (!pl->sfp_bus && pl->phydev)
3154                 ret = phy_speed_up(pl->phydev);
3155
3156         return ret;
3157 }
3158 EXPORT_SYMBOL_GPL(phylink_speed_up);
3159
3160 static void phylink_sfp_attach(void *upstream, struct sfp_bus *bus)
3161 {
3162         struct phylink *pl = upstream;
3163
3164         pl->netdev->sfp_bus = bus;
3165 }
3166
3167 static void phylink_sfp_detach(void *upstream, struct sfp_bus *bus)
3168 {
3169         struct phylink *pl = upstream;
3170
3171         pl->netdev->sfp_bus = NULL;
3172 }
3173
3174 static phy_interface_t phylink_choose_sfp_interface(struct phylink *pl,
3175                                                     const unsigned long *intf)
3176 {
3177         phy_interface_t interface;
3178         size_t i;
3179
3180         interface = PHY_INTERFACE_MODE_NA;
3181         for (i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); i++)
3182                 if (test_bit(phylink_sfp_interface_preference[i], intf)) {
3183                         interface = phylink_sfp_interface_preference[i];
3184                         break;
3185                 }
3186
3187         return interface;
3188 }
3189
3190 static void phylink_sfp_set_config(struct phylink *pl, u8 mode,
3191                                    unsigned long *supported,
3192                                    struct phylink_link_state *state)
3193 {
3194         bool changed = false;
3195
3196         phylink_dbg(pl, "requesting link mode %s/%s with support %*pb\n",
3197                     phylink_an_mode_str(mode), phy_modes(state->interface),
3198                     __ETHTOOL_LINK_MODE_MASK_NBITS, supported);
3199
3200         if (!linkmode_equal(pl->supported, supported)) {
3201                 linkmode_copy(pl->supported, supported);
3202                 changed = true;
3203         }
3204
3205         if (!linkmode_equal(pl->link_config.advertising, state->advertising)) {
3206                 linkmode_copy(pl->link_config.advertising, state->advertising);
3207                 changed = true;
3208         }
3209
3210         if (pl->cur_link_an_mode != mode ||
3211             pl->link_config.interface != state->interface) {
3212                 pl->cur_link_an_mode = mode;
3213                 pl->link_config.interface = state->interface;
3214
3215                 changed = true;
3216
3217                 phylink_info(pl, "switched to %s/%s link mode\n",
3218                              phylink_an_mode_str(mode),
3219                              phy_modes(state->interface));
3220         }
3221
3222         if (changed && !test_bit(PHYLINK_DISABLE_STOPPED,
3223                                  &pl->phylink_disable_state))
3224                 phylink_mac_initial_config(pl, false);
3225 }
3226
3227 static int phylink_sfp_config_phy(struct phylink *pl, u8 mode,
3228                                   struct phy_device *phy)
3229 {
3230         __ETHTOOL_DECLARE_LINK_MODE_MASK(support1);
3231         __ETHTOOL_DECLARE_LINK_MODE_MASK(support);
3232         struct phylink_link_state config;
3233         phy_interface_t iface;
3234         int ret;
3235
3236         linkmode_copy(support, phy->supported);
3237
3238         memset(&config, 0, sizeof(config));
3239         linkmode_copy(config.advertising, phy->advertising);
3240         config.interface = PHY_INTERFACE_MODE_NA;
3241         config.speed = SPEED_UNKNOWN;
3242         config.duplex = DUPLEX_UNKNOWN;
3243         config.pause = MLO_PAUSE_AN;
3244
3245         /* Ignore errors if we're expecting a PHY to attach later */
3246         ret = phylink_validate(pl, support, &config);
3247         if (ret) {
3248                 phylink_err(pl, "validation with support %*pb failed: %pe\n",
3249                             __ETHTOOL_LINK_MODE_MASK_NBITS, support,
3250                             ERR_PTR(ret));
3251                 return ret;
3252         }
3253
3254         iface = sfp_select_interface(pl->sfp_bus, config.advertising);
3255         if (iface == PHY_INTERFACE_MODE_NA) {
3256                 phylink_err(pl,
3257                             "selection of interface failed, advertisement %*pb\n",
3258                             __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising);
3259                 return -EINVAL;
3260         }
3261
3262         config.interface = iface;
3263         linkmode_copy(support1, support);
3264         ret = phylink_validate(pl, support1, &config);
3265         if (ret) {
3266                 phylink_err(pl,
3267                             "validation of %s/%s with support %*pb failed: %pe\n",
3268                             phylink_an_mode_str(mode),
3269                             phy_modes(config.interface),
3270                             __ETHTOOL_LINK_MODE_MASK_NBITS, support,
3271                             ERR_PTR(ret));
3272                 return ret;
3273         }
3274
3275         pl->link_port = pl->sfp_port;
3276
3277         phylink_sfp_set_config(pl, mode, support, &config);
3278
3279         return 0;
3280 }
3281
3282 static int phylink_sfp_config_optical(struct phylink *pl)
3283 {
3284         __ETHTOOL_DECLARE_LINK_MODE_MASK(support);
3285         DECLARE_PHY_INTERFACE_MASK(interfaces);
3286         struct phylink_link_state config;
3287         phy_interface_t interface;
3288         int ret;
3289
3290         phylink_dbg(pl, "optical SFP: interfaces=[mac=%*pbl, sfp=%*pbl]\n",
3291                     (int)PHY_INTERFACE_MODE_MAX,
3292                     pl->config->supported_interfaces,
3293                     (int)PHY_INTERFACE_MODE_MAX,
3294                     pl->sfp_interfaces);
3295
3296         /* Find the union of the supported interfaces by the PCS/MAC and
3297          * the SFP module.
3298          */
3299         phy_interface_and(interfaces, pl->config->supported_interfaces,
3300                           pl->sfp_interfaces);
3301         if (phy_interface_empty(interfaces)) {
3302                 phylink_err(pl, "unsupported SFP module: no common interface modes\n");
3303                 return -EINVAL;
3304         }
3305
3306         memset(&config, 0, sizeof(config));
3307         linkmode_copy(support, pl->sfp_support);
3308         linkmode_copy(config.advertising, pl->sfp_support);
3309         config.speed = SPEED_UNKNOWN;
3310         config.duplex = DUPLEX_UNKNOWN;
3311         config.pause = MLO_PAUSE_AN;
3312
3313         /* For all the interfaces that are supported, reduce the sfp_support
3314          * mask to only those link modes that can be supported.
3315          */
3316         ret = phylink_validate_mask(pl, NULL, pl->sfp_support, &config,
3317                                     interfaces);
3318         if (ret) {
3319                 phylink_err(pl, "unsupported SFP module: validation with support %*pb failed\n",
3320                             __ETHTOOL_LINK_MODE_MASK_NBITS, support);
3321                 return ret;
3322         }
3323
3324         interface = phylink_choose_sfp_interface(pl, interfaces);
3325         if (interface == PHY_INTERFACE_MODE_NA) {
3326                 phylink_err(pl, "failed to select SFP interface\n");
3327                 return -EINVAL;
3328         }
3329
3330         phylink_dbg(pl, "optical SFP: chosen %s interface\n",
3331                     phy_modes(interface));
3332
3333         config.interface = interface;
3334
3335         /* Ignore errors if we're expecting a PHY to attach later */
3336         ret = phylink_validate(pl, support, &config);
3337         if (ret) {
3338                 phylink_err(pl, "validation with support %*pb failed: %pe\n",
3339                             __ETHTOOL_LINK_MODE_MASK_NBITS, support,
3340                             ERR_PTR(ret));
3341                 return ret;
3342         }
3343
3344         pl->link_port = pl->sfp_port;
3345
3346         phylink_sfp_set_config(pl, MLO_AN_INBAND, pl->sfp_support, &config);
3347
3348         return 0;
3349 }
3350
3351 static int phylink_sfp_module_insert(void *upstream,
3352                                      const struct sfp_eeprom_id *id)
3353 {
3354         struct phylink *pl = upstream;
3355
3356         ASSERT_RTNL();
3357
3358         linkmode_zero(pl->sfp_support);
3359         phy_interface_zero(pl->sfp_interfaces);
3360         sfp_parse_support(pl->sfp_bus, id, pl->sfp_support, pl->sfp_interfaces);
3361         pl->sfp_port = sfp_parse_port(pl->sfp_bus, id, pl->sfp_support);
3362
3363         /* If this module may have a PHY connecting later, defer until later */
3364         pl->sfp_may_have_phy = sfp_may_have_phy(pl->sfp_bus, id);
3365         if (pl->sfp_may_have_phy)
3366                 return 0;
3367
3368         return phylink_sfp_config_optical(pl);
3369 }
3370
3371 static int phylink_sfp_module_start(void *upstream)
3372 {
3373         struct phylink *pl = upstream;
3374
3375         /* If this SFP module has a PHY, start the PHY now. */
3376         if (pl->phydev) {
3377                 phy_start(pl->phydev);
3378                 return 0;
3379         }
3380
3381         /* If the module may have a PHY but we didn't detect one we
3382          * need to configure the MAC here.
3383          */
3384         if (!pl->sfp_may_have_phy)
3385                 return 0;
3386
3387         return phylink_sfp_config_optical(pl);
3388 }
3389
3390 static void phylink_sfp_module_stop(void *upstream)
3391 {
3392         struct phylink *pl = upstream;
3393
3394         /* If this SFP module has a PHY, stop it. */
3395         if (pl->phydev)
3396                 phy_stop(pl->phydev);
3397 }
3398
3399 static void phylink_sfp_link_down(void *upstream)
3400 {
3401         struct phylink *pl = upstream;
3402
3403         ASSERT_RTNL();
3404
3405         phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_LINK);
3406 }
3407
3408 static void phylink_sfp_link_up(void *upstream)
3409 {
3410         struct phylink *pl = upstream;
3411
3412         ASSERT_RTNL();
3413
3414         phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_LINK);
3415 }
3416
3417 /* The Broadcom BCM84881 in the Methode DM7052 is unable to provide a SGMII
3418  * or 802.3z control word, so inband will not work.
3419  */
3420 static bool phylink_phy_no_inband(struct phy_device *phy)
3421 {
3422         return phy->is_c45 && phy_id_compare(phy->c45_ids.device_ids[1],
3423                                              0xae025150, 0xfffffff0);
3424 }
3425
3426 static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy)
3427 {
3428         struct phylink *pl = upstream;
3429         phy_interface_t interface;
3430         u8 mode;
3431         int ret;
3432
3433         /*
3434          * This is the new way of dealing with flow control for PHYs,
3435          * as described by Timur Tabi in commit 529ed1275263 ("net: phy:
3436          * phy drivers should not set SUPPORTED_[Asym_]Pause") except
3437          * using our validate call to the MAC, we rely upon the MAC
3438          * clearing the bits from both supported and advertising fields.
3439          */
3440         phy_support_asym_pause(phy);
3441
3442         if (phylink_phy_no_inband(phy))
3443                 mode = MLO_AN_PHY;
3444         else
3445                 mode = MLO_AN_INBAND;
3446
3447         /* Set the PHY's host supported interfaces */
3448         phy_interface_and(phy->host_interfaces, phylink_sfp_interfaces,
3449                           pl->config->supported_interfaces);
3450
3451         /* Do the initial configuration */
3452         ret = phylink_sfp_config_phy(pl, mode, phy);
3453         if (ret < 0)
3454                 return ret;
3455
3456         interface = pl->link_config.interface;
3457         ret = phylink_attach_phy(pl, phy, interface);
3458         if (ret < 0)
3459                 return ret;
3460
3461         ret = phylink_bringup_phy(pl, phy, interface);
3462         if (ret)
3463                 phy_detach(phy);
3464
3465         return ret;
3466 }
3467
3468 static void phylink_sfp_disconnect_phy(void *upstream,
3469                                        struct phy_device *phydev)
3470 {
3471         phylink_disconnect_phy(upstream);
3472 }
3473
3474 static const struct sfp_upstream_ops sfp_phylink_ops = {
3475         .attach = phylink_sfp_attach,
3476         .detach = phylink_sfp_detach,
3477         .module_insert = phylink_sfp_module_insert,
3478         .module_start = phylink_sfp_module_start,
3479         .module_stop = phylink_sfp_module_stop,
3480         .link_up = phylink_sfp_link_up,
3481         .link_down = phylink_sfp_link_down,
3482         .connect_phy = phylink_sfp_connect_phy,
3483         .disconnect_phy = phylink_sfp_disconnect_phy,
3484 };
3485
3486 /* Helpers for MAC drivers */
3487
3488 static struct {
3489         int bit;
3490         int speed;
3491 } phylink_c73_priority_resolution[] = {
3492         { ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, SPEED_100000 },
3493         { ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, SPEED_100000 },
3494         /* 100GBASE-KP4 and 100GBASE-CR10 not supported */
3495         { ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, SPEED_40000 },
3496         { ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, SPEED_40000 },
3497         { ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, SPEED_10000 },
3498         { ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, SPEED_10000 },
3499         /* 5GBASE-KR not supported */
3500         { ETHTOOL_LINK_MODE_2500baseX_Full_BIT, SPEED_2500 },
3501         { ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, SPEED_1000 },
3502 };
3503
3504 void phylink_resolve_c73(struct phylink_link_state *state)
3505 {
3506         int i;
3507
3508         for (i = 0; i < ARRAY_SIZE(phylink_c73_priority_resolution); i++) {
3509                 int bit = phylink_c73_priority_resolution[i].bit;
3510                 if (linkmode_test_bit(bit, state->advertising) &&
3511                     linkmode_test_bit(bit, state->lp_advertising))
3512                         break;
3513         }
3514
3515         if (i < ARRAY_SIZE(phylink_c73_priority_resolution)) {
3516                 state->speed = phylink_c73_priority_resolution[i].speed;
3517                 state->duplex = DUPLEX_FULL;
3518         } else {
3519                 /* negotiation failure */
3520                 state->link = false;
3521         }
3522
3523         phylink_resolve_an_pause(state);
3524 }
3525 EXPORT_SYMBOL_GPL(phylink_resolve_c73);
3526
3527 static void phylink_decode_c37_word(struct phylink_link_state *state,
3528                                     uint16_t config_reg, int speed)
3529 {
3530         int fd_bit;
3531
3532         if (speed == SPEED_2500)
3533                 fd_bit = ETHTOOL_LINK_MODE_2500baseX_Full_BIT;
3534         else
3535                 fd_bit = ETHTOOL_LINK_MODE_1000baseX_Full_BIT;
3536
3537         mii_lpa_mod_linkmode_x(state->lp_advertising, config_reg, fd_bit);
3538
3539         if (linkmode_test_bit(fd_bit, state->advertising) &&
3540             linkmode_test_bit(fd_bit, state->lp_advertising)) {
3541                 state->speed = speed;
3542                 state->duplex = DUPLEX_FULL;
3543         } else {
3544                 /* negotiation failure */
3545                 state->link = false;
3546         }
3547
3548         phylink_resolve_an_pause(state);
3549 }
3550
3551 static void phylink_decode_sgmii_word(struct phylink_link_state *state,
3552                                       uint16_t config_reg)
3553 {
3554         if (!(config_reg & LPA_SGMII_LINK)) {
3555                 state->link = false;
3556                 return;
3557         }
3558
3559         switch (config_reg & LPA_SGMII_SPD_MASK) {
3560         case LPA_SGMII_10:
3561                 state->speed = SPEED_10;
3562                 break;
3563         case LPA_SGMII_100:
3564                 state->speed = SPEED_100;
3565                 break;
3566         case LPA_SGMII_1000:
3567                 state->speed = SPEED_1000;
3568                 break;
3569         default:
3570                 state->link = false;
3571                 return;
3572         }
3573         if (config_reg & LPA_SGMII_FULL_DUPLEX)
3574                 state->duplex = DUPLEX_FULL;
3575         else
3576                 state->duplex = DUPLEX_HALF;
3577 }
3578
3579 /**
3580  * phylink_decode_usxgmii_word() - decode the USXGMII word from a MAC PCS
3581  * @state: a pointer to a struct phylink_link_state.
3582  * @lpa: a 16 bit value which stores the USXGMII auto-negotiation word
3583  *
3584  * Helper for MAC PCS supporting the USXGMII protocol and the auto-negotiation
3585  * code word.  Decode the USXGMII code word and populate the corresponding fields
3586  * (speed, duplex) into the phylink_link_state structure.
3587  */
3588 void phylink_decode_usxgmii_word(struct phylink_link_state *state,
3589                                  uint16_t lpa)
3590 {
3591         switch (lpa & MDIO_USXGMII_SPD_MASK) {
3592         case MDIO_USXGMII_10:
3593                 state->speed = SPEED_10;
3594                 break;
3595         case MDIO_USXGMII_100:
3596                 state->speed = SPEED_100;
3597                 break;
3598         case MDIO_USXGMII_1000:
3599                 state->speed = SPEED_1000;
3600                 break;
3601         case MDIO_USXGMII_2500:
3602                 state->speed = SPEED_2500;
3603                 break;
3604         case MDIO_USXGMII_5000:
3605                 state->speed = SPEED_5000;
3606                 break;
3607         case MDIO_USXGMII_10G:
3608                 state->speed = SPEED_10000;
3609                 break;
3610         default:
3611                 state->link = false;
3612                 return;
3613         }
3614
3615         if (lpa & MDIO_USXGMII_FULL_DUPLEX)
3616                 state->duplex = DUPLEX_FULL;
3617         else
3618                 state->duplex = DUPLEX_HALF;
3619 }
3620 EXPORT_SYMBOL_GPL(phylink_decode_usxgmii_word);
3621
3622 /**
3623  * phylink_decode_usgmii_word() - decode the USGMII word from a MAC PCS
3624  * @state: a pointer to a struct phylink_link_state.
3625  * @lpa: a 16 bit value which stores the USGMII auto-negotiation word
3626  *
3627  * Helper for MAC PCS supporting the USGMII protocol and the auto-negotiation
3628  * code word.  Decode the USGMII code word and populate the corresponding fields
3629  * (speed, duplex) into the phylink_link_state structure. The structure for this
3630  * word is the same as the USXGMII word, except it only supports speeds up to
3631  * 1Gbps.
3632  */
3633 static void phylink_decode_usgmii_word(struct phylink_link_state *state,
3634                                        uint16_t lpa)
3635 {
3636         switch (lpa & MDIO_USXGMII_SPD_MASK) {
3637         case MDIO_USXGMII_10:
3638                 state->speed = SPEED_10;
3639                 break;
3640         case MDIO_USXGMII_100:
3641                 state->speed = SPEED_100;
3642                 break;
3643         case MDIO_USXGMII_1000:
3644                 state->speed = SPEED_1000;
3645                 break;
3646         default:
3647                 state->link = false;
3648                 return;
3649         }
3650
3651         if (lpa & MDIO_USXGMII_FULL_DUPLEX)
3652                 state->duplex = DUPLEX_FULL;
3653         else
3654                 state->duplex = DUPLEX_HALF;
3655 }
3656
3657 /**
3658  * phylink_mii_c22_pcs_decode_state() - Decode MAC PCS state from MII registers
3659  * @state: a pointer to a &struct phylink_link_state.
3660  * @bmsr: The value of the %MII_BMSR register
3661  * @lpa: The value of the %MII_LPA register
3662  *
3663  * Helper for MAC PCS supporting the 802.3 clause 22 register set for
3664  * clause 37 negotiation and/or SGMII control.
3665  *
3666  * Parse the Clause 37 or Cisco SGMII link partner negotiation word into
3667  * the phylink @state structure. This is suitable to be used for implementing
3668  * the pcs_get_state() member of the struct phylink_pcs_ops structure if
3669  * accessing @bmsr and @lpa cannot be done with MDIO directly.
3670  */
3671 void phylink_mii_c22_pcs_decode_state(struct phylink_link_state *state,
3672                                       u16 bmsr, u16 lpa)
3673 {
3674         state->link = !!(bmsr & BMSR_LSTATUS);
3675         state->an_complete = !!(bmsr & BMSR_ANEGCOMPLETE);
3676         /* If there is no link or autonegotiation is disabled, the LP advertisement
3677          * data is not meaningful, so don't go any further.
3678          */
3679         if (!state->link || !linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
3680                                                state->advertising))
3681                 return;
3682
3683         switch (state->interface) {
3684         case PHY_INTERFACE_MODE_1000BASEX:
3685                 phylink_decode_c37_word(state, lpa, SPEED_1000);
3686                 break;
3687
3688         case PHY_INTERFACE_MODE_2500BASEX:
3689                 phylink_decode_c37_word(state, lpa, SPEED_2500);
3690                 break;
3691
3692         case PHY_INTERFACE_MODE_SGMII:
3693         case PHY_INTERFACE_MODE_QSGMII:
3694                 phylink_decode_sgmii_word(state, lpa);
3695                 break;
3696         case PHY_INTERFACE_MODE_QUSGMII:
3697                 phylink_decode_usgmii_word(state, lpa);
3698                 break;
3699
3700         default:
3701                 state->link = false;
3702                 break;
3703         }
3704 }
3705 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_decode_state);
3706
3707 /**
3708  * phylink_mii_c22_pcs_get_state() - read the MAC PCS state
3709  * @pcs: a pointer to a &struct mdio_device.
3710  * @state: a pointer to a &struct phylink_link_state.
3711  *
3712  * Helper for MAC PCS supporting the 802.3 clause 22 register set for
3713  * clause 37 negotiation and/or SGMII control.
3714  *
3715  * Read the MAC PCS state from the MII device configured in @config and
3716  * parse the Clause 37 or Cisco SGMII link partner negotiation word into
3717  * the phylink @state structure. This is suitable to be directly plugged
3718  * into the pcs_get_state() member of the struct phylink_pcs_ops
3719  * structure.
3720  */
3721 void phylink_mii_c22_pcs_get_state(struct mdio_device *pcs,
3722                                    struct phylink_link_state *state)
3723 {
3724         int bmsr, lpa;
3725
3726         bmsr = mdiodev_read(pcs, MII_BMSR);
3727         lpa = mdiodev_read(pcs, MII_LPA);
3728         if (bmsr < 0 || lpa < 0) {
3729                 state->link = false;
3730                 return;
3731         }
3732
3733         phylink_mii_c22_pcs_decode_state(state, bmsr, lpa);
3734 }
3735 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_get_state);
3736
3737 /**
3738  * phylink_mii_c22_pcs_encode_advertisement() - configure the clause 37 PCS
3739  *      advertisement
3740  * @interface: the PHY interface mode being configured
3741  * @advertising: the ethtool advertisement mask
3742  *
3743  * Helper for MAC PCS supporting the 802.3 clause 22 register set for
3744  * clause 37 negotiation and/or SGMII control.
3745  *
3746  * Encode the clause 37 PCS advertisement as specified by @interface and
3747  * @advertising.
3748  *
3749  * Return: The new value for @adv, or ``-EINVAL`` if it should not be changed.
3750  */
3751 int phylink_mii_c22_pcs_encode_advertisement(phy_interface_t interface,
3752                                              const unsigned long *advertising)
3753 {
3754         u16 adv;
3755
3756         switch (interface) {
3757         case PHY_INTERFACE_MODE_1000BASEX:
3758         case PHY_INTERFACE_MODE_2500BASEX:
3759                 adv = ADVERTISE_1000XFULL;
3760                 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT,
3761                                       advertising))
3762                         adv |= ADVERTISE_1000XPAUSE;
3763                 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
3764                                       advertising))
3765                         adv |= ADVERTISE_1000XPSE_ASYM;
3766                 return adv;
3767         case PHY_INTERFACE_MODE_SGMII:
3768         case PHY_INTERFACE_MODE_QSGMII:
3769                 return 0x0001;
3770         default:
3771                 /* Nothing to do for other modes */
3772                 return -EINVAL;
3773         }
3774 }
3775 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_encode_advertisement);
3776
3777 /**
3778  * phylink_mii_c22_pcs_config() - configure clause 22 PCS
3779  * @pcs: a pointer to a &struct mdio_device.
3780  * @interface: the PHY interface mode being configured
3781  * @advertising: the ethtool advertisement mask
3782  * @neg_mode: PCS negotiation mode
3783  *
3784  * Configure a Clause 22 PCS PHY with the appropriate negotiation
3785  * parameters for the @mode, @interface and @advertising parameters.
3786  * Returns negative error number on failure, zero if the advertisement
3787  * has not changed, or positive if there is a change.
3788  */
3789 int phylink_mii_c22_pcs_config(struct mdio_device *pcs,
3790                                phy_interface_t interface,
3791                                const unsigned long *advertising,
3792                                unsigned int neg_mode)
3793 {
3794         bool changed = 0;
3795         u16 bmcr;
3796         int ret, adv;
3797
3798         adv = phylink_mii_c22_pcs_encode_advertisement(interface, advertising);
3799         if (adv >= 0) {
3800                 ret = mdiobus_modify_changed(pcs->bus, pcs->addr,
3801                                              MII_ADVERTISE, 0xffff, adv);
3802                 if (ret < 0)
3803                         return ret;
3804                 changed = ret;
3805         }
3806
3807         if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED)
3808                 bmcr = BMCR_ANENABLE;
3809         else
3810                 bmcr = 0;
3811
3812         /* Configure the inband state. Ensure ISOLATE bit is disabled */
3813         ret = mdiodev_modify(pcs, MII_BMCR, BMCR_ANENABLE | BMCR_ISOLATE, bmcr);
3814         if (ret < 0)
3815                 return ret;
3816
3817         return changed;
3818 }
3819 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_config);
3820
3821 /**
3822  * phylink_mii_c22_pcs_an_restart() - restart 802.3z autonegotiation
3823  * @pcs: a pointer to a &struct mdio_device.
3824  *
3825  * Helper for MAC PCS supporting the 802.3 clause 22 register set for
3826  * clause 37 negotiation.
3827  *
3828  * Restart the clause 37 negotiation with the link partner. This is
3829  * suitable to be directly plugged into the pcs_get_state() member
3830  * of the struct phylink_pcs_ops structure.
3831  */
3832 void phylink_mii_c22_pcs_an_restart(struct mdio_device *pcs)
3833 {
3834         int val = mdiodev_read(pcs, MII_BMCR);
3835
3836         if (val >= 0) {
3837                 val |= BMCR_ANRESTART;
3838
3839                 mdiodev_write(pcs, MII_BMCR, val);
3840         }
3841 }
3842 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_an_restart);
3843
3844 void phylink_mii_c45_pcs_get_state(struct mdio_device *pcs,
3845                                    struct phylink_link_state *state)
3846 {
3847         struct mii_bus *bus = pcs->bus;
3848         int addr = pcs->addr;
3849         int stat;
3850
3851         stat = mdiobus_c45_read(bus, addr, MDIO_MMD_PCS, MDIO_STAT1);
3852         if (stat < 0) {
3853                 state->link = false;
3854                 return;
3855         }
3856
3857         state->link = !!(stat & MDIO_STAT1_LSTATUS);
3858         if (!state->link)
3859                 return;
3860
3861         switch (state->interface) {
3862         case PHY_INTERFACE_MODE_10GBASER:
3863                 state->speed = SPEED_10000;
3864                 state->duplex = DUPLEX_FULL;
3865                 break;
3866
3867         default:
3868                 break;
3869         }
3870 }
3871 EXPORT_SYMBOL_GPL(phylink_mii_c45_pcs_get_state);
3872
3873 static int __init phylink_init(void)
3874 {
3875         for (int i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); ++i)
3876                 __set_bit(phylink_sfp_interface_preference[i],
3877                           phylink_sfp_interfaces);
3878
3879         return 0;
3880 }
3881
3882 module_init(phylink_init);
3883
3884 MODULE_LICENSE("GPL v2");
3885 MODULE_DESCRIPTION("phylink models the MAC to optional PHY connection");