1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Driver for the OV5645 camera sensor.
5 * Copyright (c) 2011-2015, The Linux Foundation. All rights reserved.
6 * Copyright (C) 2015 By Tech Design S.L. All Rights Reserved.
7 * Copyright (C) 2012-2013 Freescale Semiconductor, Inc. All Rights Reserved.
10 * - the OV5645 driver from QC msm-3.10 kernel on codeaurora.org:
11 * https://us.codeaurora.org/cgit/quic/la/kernel/msm-3.10/tree/drivers/
12 * media/platform/msm/camera_v2/sensor/ov5645.c?h=LA.BR.1.2.4_rb1.41
13 * - the OV5640 driver posted on linux-media:
14 * https://www.mail-archive.com/linux-media%40vger.kernel.org/msg92671.html
17 #include <linux/bitops.h>
18 #include <linux/clk.h>
19 #include <linux/delay.h>
20 #include <linux/device.h>
21 #include <linux/gpio/consumer.h>
22 #include <linux/i2c.h>
23 #include <linux/init.h>
24 #include <linux/module.h>
26 #include <linux/of_graph.h>
27 #include <linux/pm_runtime.h>
28 #include <linux/regulator/consumer.h>
29 #include <linux/slab.h>
30 #include <linux/types.h>
31 #include <media/v4l2-ctrls.h>
32 #include <media/v4l2-fwnode.h>
33 #include <media/v4l2-subdev.h>
35 #define OV5645_SYSTEM_CTRL0 0x3008
36 #define OV5645_SYSTEM_CTRL0_START 0x02
37 #define OV5645_SYSTEM_CTRL0_STOP 0x42
38 #define OV5645_CHIP_ID_HIGH 0x300a
39 #define OV5645_CHIP_ID_HIGH_BYTE 0x56
40 #define OV5645_CHIP_ID_LOW 0x300b
41 #define OV5645_CHIP_ID_LOW_BYTE 0x45
42 #define OV5645_IO_MIPI_CTRL00 0x300e
43 #define OV5645_PAD_OUTPUT00 0x3019
44 #define OV5645_AWB_MANUAL_CONTROL 0x3406
45 #define OV5645_AWB_MANUAL_ENABLE BIT(0)
46 #define OV5645_AEC_PK_MANUAL 0x3503
47 #define OV5645_AEC_MANUAL_ENABLE BIT(0)
48 #define OV5645_AGC_MANUAL_ENABLE BIT(1)
49 #define OV5645_TIMING_TC_REG20 0x3820
50 #define OV5645_SENSOR_VFLIP BIT(1)
51 #define OV5645_ISP_VFLIP BIT(2)
52 #define OV5645_TIMING_TC_REG21 0x3821
53 #define OV5645_SENSOR_MIRROR BIT(1)
54 #define OV5645_MIPI_CTRL00 0x4800
55 #define OV5645_PRE_ISP_TEST_SETTING_1 0x503d
56 #define OV5645_TEST_PATTERN_MASK 0x3
57 #define OV5645_SET_TEST_PATTERN(x) ((x) & OV5645_TEST_PATTERN_MASK)
58 #define OV5645_TEST_PATTERN_ENABLE BIT(7)
59 #define OV5645_SDE_SAT_U 0x5583
60 #define OV5645_SDE_SAT_V 0x5584
62 /* regulator supplies */
63 static const char * const ov5645_supply_name[] = {
64 "vdddo", /* Digital I/O (1.8V) supply */
65 "vdda", /* Analog (2.8V) supply */
66 "vddd", /* Digital Core (1.5V) supply */
69 #define OV5645_NUM_SUPPLIES ARRAY_SIZE(ov5645_supply_name)
76 struct ov5645_mode_info {
79 const struct reg_value *data;
86 struct i2c_client *i2c_client;
88 struct v4l2_subdev sd;
90 struct v4l2_fwnode_endpoint ep;
91 struct v4l2_mbus_framefmt fmt;
92 struct v4l2_rect crop;
95 struct regulator_bulk_data supplies[OV5645_NUM_SUPPLIES];
97 const struct ov5645_mode_info *current_mode;
99 struct v4l2_ctrl_handler ctrls;
100 struct v4l2_ctrl *pixel_clock;
101 struct v4l2_ctrl *link_freq;
103 /* Cached register values */
108 struct mutex power_lock; /* lock to protect power state */
110 struct gpio_desc *enable_gpio;
111 struct gpio_desc *rst_gpio;
114 static inline struct ov5645 *to_ov5645(struct v4l2_subdev *sd)
116 return container_of(sd, struct ov5645, sd);
119 static const struct reg_value ov5645_global_init_setting[] = {
355 { OV5645_IO_MIPI_CTRL00, 0x40 },
356 { OV5645_MIPI_CTRL00, 0x24 },
357 { OV5645_PAD_OUTPUT00, 0x70 }
360 static const struct reg_value ov5645_setting_sxga[] = {
408 static const struct reg_value ov5645_setting_1080p[] = {
458 static const struct reg_value ov5645_setting_full[] = {
508 static const s64 link_freq[] = {
513 static const struct ov5645_mode_info ov5645_mode_info_data[] = {
517 .data = ov5645_setting_sxga,
518 .data_size = ARRAY_SIZE(ov5645_setting_sxga),
519 .pixel_clock = 112000000,
520 .link_freq = 0 /* an index in link_freq[] */
525 .data = ov5645_setting_1080p,
526 .data_size = ARRAY_SIZE(ov5645_setting_1080p),
527 .pixel_clock = 168000000,
528 .link_freq = 1 /* an index in link_freq[] */
533 .data = ov5645_setting_full,
534 .data_size = ARRAY_SIZE(ov5645_setting_full),
535 .pixel_clock = 168000000,
536 .link_freq = 1 /* an index in link_freq[] */
540 static int ov5645_write_reg(struct ov5645 *ov5645, u16 reg, u8 val)
545 regbuf[0] = reg >> 8;
546 regbuf[1] = reg & 0xff;
549 ret = i2c_master_send(ov5645->i2c_client, regbuf, 3);
551 dev_err(ov5645->dev, "%s: write reg error %d: reg=%x, val=%x\n",
552 __func__, ret, reg, val);
559 static int ov5645_read_reg(struct ov5645 *ov5645, u16 reg, u8 *val)
564 regbuf[0] = reg >> 8;
565 regbuf[1] = reg & 0xff;
567 ret = i2c_master_send(ov5645->i2c_client, regbuf, 2);
569 dev_err(ov5645->dev, "%s: write reg error %d: reg=%x\n",
574 ret = i2c_master_recv(ov5645->i2c_client, val, 1);
576 dev_err(ov5645->dev, "%s: read reg error %d: reg=%x\n",
584 static int ov5645_set_aec_mode(struct ov5645 *ov5645, u32 mode)
586 u8 val = ov5645->aec_pk_manual;
589 if (mode == V4L2_EXPOSURE_AUTO)
590 val &= ~OV5645_AEC_MANUAL_ENABLE;
591 else /* V4L2_EXPOSURE_MANUAL */
592 val |= OV5645_AEC_MANUAL_ENABLE;
594 ret = ov5645_write_reg(ov5645, OV5645_AEC_PK_MANUAL, val);
596 ov5645->aec_pk_manual = val;
601 static int ov5645_set_agc_mode(struct ov5645 *ov5645, u32 enable)
603 u8 val = ov5645->aec_pk_manual;
607 val &= ~OV5645_AGC_MANUAL_ENABLE;
609 val |= OV5645_AGC_MANUAL_ENABLE;
611 ret = ov5645_write_reg(ov5645, OV5645_AEC_PK_MANUAL, val);
613 ov5645->aec_pk_manual = val;
618 static int ov5645_set_register_array(struct ov5645 *ov5645,
619 const struct reg_value *settings,
620 unsigned int num_settings)
625 for (i = 0; i < num_settings; ++i, ++settings) {
626 ret = ov5645_write_reg(ov5645, settings->reg, settings->val);
630 if (settings->reg == OV5645_SYSTEM_CTRL0 &&
631 settings->val == OV5645_SYSTEM_CTRL0_START)
632 usleep_range(1000, 2000);
638 static void __ov5645_set_power_off(struct device *dev)
640 struct v4l2_subdev *sd = dev_get_drvdata(dev);
641 struct ov5645 *ov5645 = to_ov5645(sd);
643 ov5645_write_reg(ov5645, OV5645_IO_MIPI_CTRL00, 0x58);
644 gpiod_set_value_cansleep(ov5645->rst_gpio, 1);
645 gpiod_set_value_cansleep(ov5645->enable_gpio, 0);
646 regulator_bulk_disable(OV5645_NUM_SUPPLIES, ov5645->supplies);
649 static int ov5645_set_power_off(struct device *dev)
651 struct v4l2_subdev *sd = dev_get_drvdata(dev);
652 struct ov5645 *ov5645 = to_ov5645(sd);
654 __ov5645_set_power_off(dev);
655 clk_disable_unprepare(ov5645->xclk);
660 static int ov5645_set_power_on(struct device *dev)
662 struct v4l2_subdev *sd = dev_get_drvdata(dev);
663 struct ov5645 *ov5645 = to_ov5645(sd);
666 ret = regulator_bulk_enable(OV5645_NUM_SUPPLIES, ov5645->supplies);
670 ret = clk_prepare_enable(ov5645->xclk);
672 dev_err(ov5645->dev, "clk prepare enable failed\n");
673 regulator_bulk_disable(OV5645_NUM_SUPPLIES, ov5645->supplies);
677 usleep_range(5000, 15000);
678 gpiod_set_value_cansleep(ov5645->enable_gpio, 1);
680 usleep_range(1000, 2000);
681 gpiod_set_value_cansleep(ov5645->rst_gpio, 0);
685 ret = ov5645_set_register_array(ov5645, ov5645_global_init_setting,
686 ARRAY_SIZE(ov5645_global_init_setting));
688 dev_err(ov5645->dev, "could not set init registers\n");
692 usleep_range(500, 1000);
697 __ov5645_set_power_off(dev);
698 clk_disable_unprepare(ov5645->xclk);
702 static int ov5645_set_saturation(struct ov5645 *ov5645, s32 value)
704 u32 reg_value = (value * 0x10) + 0x40;
707 ret = ov5645_write_reg(ov5645, OV5645_SDE_SAT_U, reg_value);
711 return ov5645_write_reg(ov5645, OV5645_SDE_SAT_V, reg_value);
714 static int ov5645_set_hflip(struct ov5645 *ov5645, s32 value)
716 u8 val = ov5645->timing_tc_reg21;
720 val &= ~(OV5645_SENSOR_MIRROR);
722 val |= (OV5645_SENSOR_MIRROR);
724 ret = ov5645_write_reg(ov5645, OV5645_TIMING_TC_REG21, val);
726 ov5645->timing_tc_reg21 = val;
731 static int ov5645_set_vflip(struct ov5645 *ov5645, s32 value)
733 u8 val = ov5645->timing_tc_reg20;
737 val |= (OV5645_SENSOR_VFLIP | OV5645_ISP_VFLIP);
739 val &= ~(OV5645_SENSOR_VFLIP | OV5645_ISP_VFLIP);
741 ret = ov5645_write_reg(ov5645, OV5645_TIMING_TC_REG20, val);
743 ov5645->timing_tc_reg20 = val;
748 static int ov5645_set_test_pattern(struct ov5645 *ov5645, s32 value)
753 val = OV5645_SET_TEST_PATTERN(value - 1);
754 val |= OV5645_TEST_PATTERN_ENABLE;
757 return ov5645_write_reg(ov5645, OV5645_PRE_ISP_TEST_SETTING_1, val);
760 static const char * const ov5645_test_pattern_menu[] = {
762 "Vertical Color Bars",
763 "Pseudo-Random Data",
768 static int ov5645_set_awb(struct ov5645 *ov5645, s32 enable_auto)
773 val = OV5645_AWB_MANUAL_ENABLE;
775 return ov5645_write_reg(ov5645, OV5645_AWB_MANUAL_CONTROL, val);
778 static int ov5645_s_ctrl(struct v4l2_ctrl *ctrl)
780 struct ov5645 *ov5645 = container_of(ctrl->handler,
781 struct ov5645, ctrls);
784 mutex_lock(&ov5645->power_lock);
785 if (!pm_runtime_get_if_in_use(ov5645->dev)) {
786 mutex_unlock(&ov5645->power_lock);
791 case V4L2_CID_SATURATION:
792 ret = ov5645_set_saturation(ov5645, ctrl->val);
794 case V4L2_CID_AUTO_WHITE_BALANCE:
795 ret = ov5645_set_awb(ov5645, ctrl->val);
797 case V4L2_CID_AUTOGAIN:
798 ret = ov5645_set_agc_mode(ov5645, ctrl->val);
800 case V4L2_CID_EXPOSURE_AUTO:
801 ret = ov5645_set_aec_mode(ov5645, ctrl->val);
803 case V4L2_CID_TEST_PATTERN:
804 ret = ov5645_set_test_pattern(ov5645, ctrl->val);
807 ret = ov5645_set_hflip(ov5645, ctrl->val);
810 ret = ov5645_set_vflip(ov5645, ctrl->val);
817 pm_runtime_mark_last_busy(ov5645->dev);
818 pm_runtime_put_autosuspend(ov5645->dev);
819 mutex_unlock(&ov5645->power_lock);
824 static const struct v4l2_ctrl_ops ov5645_ctrl_ops = {
825 .s_ctrl = ov5645_s_ctrl,
828 static int ov5645_enum_mbus_code(struct v4l2_subdev *sd,
829 struct v4l2_subdev_state *sd_state,
830 struct v4l2_subdev_mbus_code_enum *code)
835 code->code = MEDIA_BUS_FMT_UYVY8_1X16;
840 static int ov5645_enum_frame_size(struct v4l2_subdev *subdev,
841 struct v4l2_subdev_state *sd_state,
842 struct v4l2_subdev_frame_size_enum *fse)
844 if (fse->code != MEDIA_BUS_FMT_UYVY8_1X16)
847 if (fse->index >= ARRAY_SIZE(ov5645_mode_info_data))
850 fse->min_width = ov5645_mode_info_data[fse->index].width;
851 fse->max_width = ov5645_mode_info_data[fse->index].width;
852 fse->min_height = ov5645_mode_info_data[fse->index].height;
853 fse->max_height = ov5645_mode_info_data[fse->index].height;
858 static struct v4l2_mbus_framefmt *
859 __ov5645_get_pad_format(struct ov5645 *ov5645,
860 struct v4l2_subdev_state *sd_state,
862 enum v4l2_subdev_format_whence which)
865 case V4L2_SUBDEV_FORMAT_TRY:
866 return v4l2_subdev_state_get_format(sd_state, pad);
867 case V4L2_SUBDEV_FORMAT_ACTIVE:
874 static int ov5645_get_format(struct v4l2_subdev *sd,
875 struct v4l2_subdev_state *sd_state,
876 struct v4l2_subdev_format *format)
878 struct ov5645 *ov5645 = to_ov5645(sd);
880 format->format = *__ov5645_get_pad_format(ov5645, sd_state,
886 static struct v4l2_rect *
887 __ov5645_get_pad_crop(struct ov5645 *ov5645,
888 struct v4l2_subdev_state *sd_state,
889 unsigned int pad, enum v4l2_subdev_format_whence which)
892 case V4L2_SUBDEV_FORMAT_TRY:
893 return v4l2_subdev_state_get_crop(sd_state, pad);
894 case V4L2_SUBDEV_FORMAT_ACTIVE:
895 return &ov5645->crop;
901 static int ov5645_set_format(struct v4l2_subdev *sd,
902 struct v4l2_subdev_state *sd_state,
903 struct v4l2_subdev_format *format)
905 struct ov5645 *ov5645 = to_ov5645(sd);
906 struct v4l2_mbus_framefmt *__format;
907 struct v4l2_rect *__crop;
908 const struct ov5645_mode_info *new_mode;
911 __crop = __ov5645_get_pad_crop(ov5645, sd_state, format->pad,
914 new_mode = v4l2_find_nearest_size(ov5645_mode_info_data,
915 ARRAY_SIZE(ov5645_mode_info_data),
917 format->format.width, format->format.height);
919 __crop->width = new_mode->width;
920 __crop->height = new_mode->height;
922 if (format->which == V4L2_SUBDEV_FORMAT_ACTIVE) {
923 ret = v4l2_ctrl_s_ctrl_int64(ov5645->pixel_clock,
924 new_mode->pixel_clock);
928 ret = v4l2_ctrl_s_ctrl(ov5645->link_freq,
929 new_mode->link_freq);
933 ov5645->current_mode = new_mode;
936 __format = __ov5645_get_pad_format(ov5645, sd_state, format->pad,
938 __format->width = __crop->width;
939 __format->height = __crop->height;
940 __format->code = MEDIA_BUS_FMT_UYVY8_1X16;
941 __format->field = V4L2_FIELD_NONE;
942 __format->colorspace = V4L2_COLORSPACE_SRGB;
944 format->format = *__format;
949 static int ov5645_init_state(struct v4l2_subdev *subdev,
950 struct v4l2_subdev_state *sd_state)
952 struct v4l2_subdev_format fmt = { 0 };
954 fmt.which = sd_state ? V4L2_SUBDEV_FORMAT_TRY : V4L2_SUBDEV_FORMAT_ACTIVE;
955 fmt.format.width = 1920;
956 fmt.format.height = 1080;
958 ov5645_set_format(subdev, sd_state, &fmt);
963 static int ov5645_get_selection(struct v4l2_subdev *sd,
964 struct v4l2_subdev_state *sd_state,
965 struct v4l2_subdev_selection *sel)
967 struct ov5645 *ov5645 = to_ov5645(sd);
969 if (sel->target != V4L2_SEL_TGT_CROP)
972 sel->r = *__ov5645_get_pad_crop(ov5645, sd_state, sel->pad,
977 static int ov5645_s_stream(struct v4l2_subdev *subdev, int enable)
979 struct ov5645 *ov5645 = to_ov5645(subdev);
983 ret = pm_runtime_resume_and_get(ov5645->dev);
987 ret = ov5645_set_register_array(ov5645,
988 ov5645->current_mode->data,
989 ov5645->current_mode->data_size);
991 dev_err(ov5645->dev, "could not set mode %dx%d\n",
992 ov5645->current_mode->width,
993 ov5645->current_mode->height);
996 ret = v4l2_ctrl_handler_setup(&ov5645->ctrls);
998 dev_err(ov5645->dev, "could not sync v4l2 controls\n");
1002 ret = ov5645_write_reg(ov5645, OV5645_IO_MIPI_CTRL00, 0x45);
1006 ret = ov5645_write_reg(ov5645, OV5645_SYSTEM_CTRL0,
1007 OV5645_SYSTEM_CTRL0_START);
1011 ret = ov5645_write_reg(ov5645, OV5645_IO_MIPI_CTRL00, 0x40);
1013 goto stream_off_rpm_put;
1015 ret = ov5645_write_reg(ov5645, OV5645_SYSTEM_CTRL0,
1016 OV5645_SYSTEM_CTRL0_STOP);
1018 goto stream_off_rpm_put;
1024 pm_runtime_put_sync(ov5645->dev);
1028 pm_runtime_mark_last_busy(ov5645->dev);
1029 pm_runtime_put_autosuspend(ov5645->dev);
1033 static const struct v4l2_subdev_video_ops ov5645_video_ops = {
1034 .s_stream = ov5645_s_stream,
1037 static const struct v4l2_subdev_pad_ops ov5645_subdev_pad_ops = {
1038 .enum_mbus_code = ov5645_enum_mbus_code,
1039 .enum_frame_size = ov5645_enum_frame_size,
1040 .get_fmt = ov5645_get_format,
1041 .set_fmt = ov5645_set_format,
1042 .get_selection = ov5645_get_selection,
1045 static const struct v4l2_subdev_ops ov5645_subdev_ops = {
1046 .video = &ov5645_video_ops,
1047 .pad = &ov5645_subdev_pad_ops,
1050 static const struct v4l2_subdev_internal_ops ov5645_internal_ops = {
1051 .init_state = ov5645_init_state,
1054 static int ov5645_probe(struct i2c_client *client)
1056 struct device *dev = &client->dev;
1057 struct device_node *endpoint;
1058 struct ov5645 *ov5645;
1059 u8 chip_id_high, chip_id_low;
1064 ov5645 = devm_kzalloc(dev, sizeof(struct ov5645), GFP_KERNEL);
1068 ov5645->i2c_client = client;
1071 endpoint = of_graph_get_endpoint_by_regs(dev->of_node, 0, -1);
1073 dev_err(dev, "endpoint node not found\n");
1077 ret = v4l2_fwnode_endpoint_parse(of_fwnode_handle(endpoint),
1080 of_node_put(endpoint);
1083 dev_err(dev, "parsing endpoint node failed\n");
1087 if (ov5645->ep.bus_type != V4L2_MBUS_CSI2_DPHY) {
1088 dev_err(dev, "invalid bus type, must be CSI2\n");
1092 /* get system clock (xclk) */
1093 ov5645->xclk = devm_clk_get(dev, NULL);
1094 if (IS_ERR(ov5645->xclk)) {
1095 dev_err(dev, "could not get xclk");
1096 return PTR_ERR(ov5645->xclk);
1099 ret = of_property_read_u32(dev->of_node, "clock-frequency", &xclk_freq);
1101 dev_err(dev, "could not get xclk frequency\n");
1105 /* external clock must be 24MHz, allow 1% tolerance */
1106 if (xclk_freq < 23760000 || xclk_freq > 24240000) {
1107 dev_err(dev, "external clock frequency %u is not supported\n",
1112 ret = clk_set_rate(ov5645->xclk, xclk_freq);
1114 dev_err(dev, "could not set xclk frequency\n");
1118 for (i = 0; i < OV5645_NUM_SUPPLIES; i++)
1119 ov5645->supplies[i].supply = ov5645_supply_name[i];
1121 ret = devm_regulator_bulk_get(dev, OV5645_NUM_SUPPLIES,
1126 ov5645->enable_gpio = devm_gpiod_get(dev, "enable", GPIOD_OUT_HIGH);
1127 if (IS_ERR(ov5645->enable_gpio)) {
1128 dev_err(dev, "cannot get enable gpio\n");
1129 return PTR_ERR(ov5645->enable_gpio);
1132 ov5645->rst_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
1133 if (IS_ERR(ov5645->rst_gpio)) {
1134 dev_err(dev, "cannot get reset gpio\n");
1135 return PTR_ERR(ov5645->rst_gpio);
1138 mutex_init(&ov5645->power_lock);
1140 v4l2_ctrl_handler_init(&ov5645->ctrls, 9);
1141 v4l2_ctrl_new_std(&ov5645->ctrls, &ov5645_ctrl_ops,
1142 V4L2_CID_SATURATION, -4, 4, 1, 0);
1143 v4l2_ctrl_new_std(&ov5645->ctrls, &ov5645_ctrl_ops,
1144 V4L2_CID_HFLIP, 0, 1, 1, 0);
1145 v4l2_ctrl_new_std(&ov5645->ctrls, &ov5645_ctrl_ops,
1146 V4L2_CID_VFLIP, 0, 1, 1, 0);
1147 v4l2_ctrl_new_std(&ov5645->ctrls, &ov5645_ctrl_ops,
1148 V4L2_CID_AUTOGAIN, 0, 1, 1, 1);
1149 v4l2_ctrl_new_std(&ov5645->ctrls, &ov5645_ctrl_ops,
1150 V4L2_CID_AUTO_WHITE_BALANCE, 0, 1, 1, 1);
1151 v4l2_ctrl_new_std_menu(&ov5645->ctrls, &ov5645_ctrl_ops,
1152 V4L2_CID_EXPOSURE_AUTO, V4L2_EXPOSURE_MANUAL,
1153 0, V4L2_EXPOSURE_AUTO);
1154 v4l2_ctrl_new_std_menu_items(&ov5645->ctrls, &ov5645_ctrl_ops,
1155 V4L2_CID_TEST_PATTERN,
1156 ARRAY_SIZE(ov5645_test_pattern_menu) - 1,
1157 0, 0, ov5645_test_pattern_menu);
1158 ov5645->pixel_clock = v4l2_ctrl_new_std(&ov5645->ctrls,
1160 V4L2_CID_PIXEL_RATE,
1162 ov5645->link_freq = v4l2_ctrl_new_int_menu(&ov5645->ctrls,
1165 ARRAY_SIZE(link_freq) - 1,
1167 if (ov5645->link_freq)
1168 ov5645->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1170 ov5645->sd.ctrl_handler = &ov5645->ctrls;
1172 if (ov5645->ctrls.error) {
1173 dev_err(dev, "%s: control initialization error %d\n",
1174 __func__, ov5645->ctrls.error);
1175 ret = ov5645->ctrls.error;
1179 v4l2_i2c_subdev_init(&ov5645->sd, client, &ov5645_subdev_ops);
1180 ov5645->sd.internal_ops = &ov5645_internal_ops;
1181 ov5645->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
1182 ov5645->pad.flags = MEDIA_PAD_FL_SOURCE;
1183 ov5645->sd.dev = &client->dev;
1184 ov5645->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
1186 ret = media_entity_pads_init(&ov5645->sd.entity, 1, &ov5645->pad);
1188 dev_err(dev, "could not register media entity\n");
1192 ret = ov5645_set_power_on(dev);
1196 ret = ov5645_read_reg(ov5645, OV5645_CHIP_ID_HIGH, &chip_id_high);
1197 if (ret < 0 || chip_id_high != OV5645_CHIP_ID_HIGH_BYTE) {
1198 dev_err(dev, "could not read ID high\n");
1202 ret = ov5645_read_reg(ov5645, OV5645_CHIP_ID_LOW, &chip_id_low);
1203 if (ret < 0 || chip_id_low != OV5645_CHIP_ID_LOW_BYTE) {
1204 dev_err(dev, "could not read ID low\n");
1209 dev_info(dev, "OV5645 detected at address 0x%02x\n", client->addr);
1211 ret = ov5645_read_reg(ov5645, OV5645_AEC_PK_MANUAL,
1212 &ov5645->aec_pk_manual);
1214 dev_err(dev, "could not read AEC/AGC mode\n");
1219 ret = ov5645_read_reg(ov5645, OV5645_TIMING_TC_REG20,
1220 &ov5645->timing_tc_reg20);
1222 dev_err(dev, "could not read vflip value\n");
1227 ret = ov5645_read_reg(ov5645, OV5645_TIMING_TC_REG21,
1228 &ov5645->timing_tc_reg21);
1230 dev_err(dev, "could not read hflip value\n");
1235 pm_runtime_set_active(dev);
1236 pm_runtime_get_noresume(dev);
1237 pm_runtime_enable(dev);
1239 ov5645_init_state(&ov5645->sd, NULL);
1241 ret = v4l2_async_register_subdev(&ov5645->sd);
1243 dev_err(dev, "could not register v4l2 device\n");
1244 goto err_pm_runtime;
1247 pm_runtime_set_autosuspend_delay(dev, 1000);
1248 pm_runtime_use_autosuspend(dev);
1249 pm_runtime_mark_last_busy(dev);
1250 pm_runtime_put_autosuspend(dev);
1255 pm_runtime_disable(dev);
1256 pm_runtime_put_noidle(dev);
1258 ov5645_set_power_off(dev);
1260 media_entity_cleanup(&ov5645->sd.entity);
1262 v4l2_ctrl_handler_free(&ov5645->ctrls);
1263 mutex_destroy(&ov5645->power_lock);
1268 static void ov5645_remove(struct i2c_client *client)
1270 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1271 struct ov5645 *ov5645 = to_ov5645(sd);
1273 v4l2_async_unregister_subdev(&ov5645->sd);
1274 media_entity_cleanup(&ov5645->sd.entity);
1275 v4l2_ctrl_handler_free(&ov5645->ctrls);
1276 pm_runtime_disable(ov5645->dev);
1277 if (!pm_runtime_status_suspended(ov5645->dev))
1278 ov5645_set_power_off(ov5645->dev);
1279 pm_runtime_set_suspended(ov5645->dev);
1280 mutex_destroy(&ov5645->power_lock);
1283 static const struct i2c_device_id ov5645_id[] = {
1287 MODULE_DEVICE_TABLE(i2c, ov5645_id);
1289 static const struct of_device_id ov5645_of_match[] = {
1290 { .compatible = "ovti,ov5645" },
1293 MODULE_DEVICE_TABLE(of, ov5645_of_match);
1295 static const struct dev_pm_ops ov5645_pm_ops = {
1296 SET_RUNTIME_PM_OPS(ov5645_set_power_off, ov5645_set_power_on, NULL)
1299 static struct i2c_driver ov5645_i2c_driver = {
1301 .of_match_table = ov5645_of_match,
1303 .pm = &ov5645_pm_ops,
1305 .probe = ov5645_probe,
1306 .remove = ov5645_remove,
1307 .id_table = ov5645_id,
1310 module_i2c_driver(ov5645_i2c_driver);
1312 MODULE_DESCRIPTION("Omnivision OV5645 Camera Driver");
1314 MODULE_LICENSE("GPL v2");