drivers/gpu/drm/panel/panel-visionox-vtdr6130.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 // Copyright (c) 2023, Linaro Limited
   3
   4 #include <linux/backlight.h>
   5 #include <linux/delay.h>
   6 #include <linux/gpio/consumer.h>
   7 #include <linux/regulator/consumer.h>
   8 #include <linux/module.h>
   9 #include <linux/of.h>
  10
  11 #include <drm/display/drm_dsc.h>
  12 #include <drm/drm_mipi_dsi.h>
  13 #include <drm/drm_modes.h>
  14 #include <drm/drm_panel.h>
  15
  16 #include <video/mipi_display.h>
  17
  18 struct visionox_vtdr6130 {
  19         struct drm_panel panel;
  20         struct mipi_dsi_device *dsi;
  21         struct gpio_desc *reset_gpio;
  22         struct regulator_bulk_data *supplies;
  23 };
  24
  25 static const struct regulator_bulk_data visionox_vtdr6130_supplies[] = {
  26         { .supply = "vddio" },
  27         { .supply = "vci" },
  28         { .supply = "vdd" },
  29 };
  30
  31 static inline struct visionox_vtdr6130 *to_visionox_vtdr6130(struct drm_panel *panel)
  32 {
  33         return container_of(panel, struct visionox_vtdr6130, panel);
  34 }
  35
  36 static void visionox_vtdr6130_reset(struct visionox_vtdr6130 *ctx)
  37 {
  38         gpiod_set_value_cansleep(ctx->reset_gpio, 0);
  39         usleep_range(10000, 11000);
  40         gpiod_set_value_cansleep(ctx->reset_gpio, 1);
  41         usleep_range(10000, 11000);
  42         gpiod_set_value_cansleep(ctx->reset_gpio, 0);
  43         usleep_range(10000, 11000);
  44 }
  45
  46 static int visionox_vtdr6130_on(struct visionox_vtdr6130 *ctx)
  47 {
  48         struct mipi_dsi_device *dsi = ctx->dsi;
  49         struct mipi_dsi_multi_context dsi_ctx = { .dsi = dsi };
  50
  51         dsi->mode_flags |= MIPI_DSI_MODE_LPM;
  52
  53         mipi_dsi_dcs_set_tear_on_multi(&dsi_ctx, MIPI_DSI_DCS_TEAR_MODE_VBLANK);
  54
  55         mipi_dsi_dcs_write_seq_multi(&dsi_ctx,
  56                                      MIPI_DCS_WRITE_CONTROL_DISPLAY, 0x20);
  57         mipi_dsi_dcs_write_seq_multi(&dsi_ctx,
  58                                      MIPI_DCS_SET_DISPLAY_BRIGHTNESS, 0x00,
  59                                      0x00);
  60         mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x59, 0x09);
  61         mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6c, 0x01);
  62         mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6d, 0x00);
  63         mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6f, 0x01);
  64         mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x70, 0x12, 0x00, 0x00, 0xab,
  65                                      0x30, 0x80, 0x09, 0x60, 0x04, 0x38, 0x00,
  66                                      0x28, 0x02, 0x1c, 0x02, 0x1c, 0x02, 0x00,
  67                                      0x02, 0x0e, 0x00, 0x20, 0x03, 0xdd, 0x00,
  68                                      0x07, 0x00, 0x0c, 0x02, 0x77, 0x02, 0x8b,
  69                                      0x18, 0x00, 0x10, 0xf0, 0x07, 0x10, 0x20,
  70                                      0x00, 0x06, 0x0f, 0x0f, 0x33, 0x0e, 0x1c,
  71                                      0x2a, 0x38, 0x46, 0x54, 0x62, 0x69, 0x70,
  72                                      0x77, 0x79, 0x7b, 0x7d, 0x7e, 0x02, 0x02,
  73                                      0x22, 0x00, 0x2a, 0x40, 0x2a, 0xbe, 0x3a,
  74                                      0xfc, 0x3a, 0xfa, 0x3a, 0xf8, 0x3b, 0x38,
  75                                      0x3b, 0x78, 0x3b, 0xb6, 0x4b, 0xb6, 0x4b,
  76                                      0xf4, 0x4b, 0xf4, 0x6c, 0x34, 0x84, 0x74,
  77                                      0x00, 0x00, 0x00, 0x00, 0x00, 0x00);
  78         mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0xaa, 0x10);
  79         mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb1, 0x01, 0x38, 0x00, 0x14,
  80                                      0x00, 0x1c, 0x00, 0x01, 0x66, 0x00, 0x14,
  81                                      0x00, 0x14, 0x00, 0x01, 0x66, 0x00, 0x14,
  82                                      0x05, 0xcc, 0x00);
  83         mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0xaa, 0x13);
  84         mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xce, 0x09, 0x11, 0x09, 0x11,
  85                                      0x08, 0xc1, 0x07, 0xfa, 0x05, 0xa4, 0x00,
  86                                      0x3c, 0x00, 0x34, 0x00, 0x24, 0x00, 0x0c,
  87                                      0x00, 0x0c, 0x04, 0x00, 0x35);
  88         mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0xaa, 0x14);
  89         mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb2, 0x03, 0x33);
  90         mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb4, 0x00, 0x33, 0x00, 0x00,
  91                                      0x00, 0x3e, 0x00, 0x00, 0x00, 0x3e, 0x00,
  92                                      0x00);
  93         mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb5, 0x00, 0x09, 0x09, 0x09,
  94                                      0x09, 0x09, 0x09, 0x06, 0x01);
  95         mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb9, 0x00, 0x00, 0x08, 0x09,
  96                                      0x09, 0x09);
  97         mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xbc, 0x10, 0x00, 0x00, 0x06,
  98                                      0x11, 0x09, 0x3b, 0x09, 0x47, 0x09, 0x47,
  99                                      0x00);
 100         mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xbe, 0x10, 0x10, 0x00, 0x08,
 101                                      0x22, 0x09, 0x19, 0x09, 0x25, 0x09, 0x25,
 102                                      0x00);
 103         mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x5a, 0x80);
 104         mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x65, 0x14);
 105         mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xfa, 0x08, 0x08, 0x08);
 106         mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x5a, 0x81);
 107         mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x65, 0x05);
 108         mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf3, 0x0f);
 109         mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0xaa, 0x00);
 110         mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x5a, 0x82);
 111         mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf9, 0x00);
 112         mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x51, 0x83);
 113         mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x65, 0x04);
 114         mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf8, 0x00);
 115         mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x5a, 0x00);
 116         mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x65, 0x01);
 117         mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf4, 0x9a);
 118         mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x5a, 0x00);
 119
 120         mipi_dsi_dcs_exit_sleep_mode_multi(&dsi_ctx);
 121         mipi_dsi_msleep(&dsi_ctx, 120);
 122
 123         mipi_dsi_dcs_set_display_on_multi(&dsi_ctx);
 124         mipi_dsi_msleep(&dsi_ctx, 20);
 125
 126         return dsi_ctx.accum_err;
 127 }
 128
 129 static void visionox_vtdr6130_off(struct visionox_vtdr6130 *ctx)
 130 {
 131         struct mipi_dsi_device *dsi = ctx->dsi;
 132         struct mipi_dsi_multi_context dsi_ctx = { .dsi = dsi };
 133
 134         dsi->mode_flags &= ~MIPI_DSI_MODE_LPM;
 135
 136         mipi_dsi_dcs_set_display_off_multi(&dsi_ctx);
 137         mipi_dsi_msleep(&dsi_ctx, 20);
 138
 139         mipi_dsi_dcs_enter_sleep_mode_multi(&dsi_ctx);
 140         mipi_dsi_msleep(&dsi_ctx, 120);
 141 }
 142
 143 static int visionox_vtdr6130_prepare(struct drm_panel *panel)
 144 {
 145         struct visionox_vtdr6130 *ctx = to_visionox_vtdr6130(panel);
 146         int ret;
 147
 148         ret = regulator_bulk_enable(ARRAY_SIZE(visionox_vtdr6130_supplies),
 149                                     ctx->supplies);
 150         if (ret < 0)
 151                 return ret;
 152
 153         visionox_vtdr6130_reset(ctx);
 154
 155         ret = visionox_vtdr6130_on(ctx);
 156         if (ret < 0) {
 157                 gpiod_set_value_cansleep(ctx->reset_gpio, 1);
 158                 regulator_bulk_disable(ARRAY_SIZE(visionox_vtdr6130_supplies),
 159                                        ctx->supplies);
 160                 return ret;
 161         }
 162
 163         return 0;
 164 }
 165
 166 static int visionox_vtdr6130_unprepare(struct drm_panel *panel)
 167 {
 168         struct visionox_vtdr6130 *ctx = to_visionox_vtdr6130(panel);
 169
 170         visionox_vtdr6130_off(ctx);
 171
 172         gpiod_set_value_cansleep(ctx->reset_gpio, 1);
 173
 174         regulator_bulk_disable(ARRAY_SIZE(visionox_vtdr6130_supplies),
 175                                ctx->supplies);
 176
 177         return 0;
 178 }
 179
 180 static const struct drm_display_mode visionox_vtdr6130_mode = {
 181         .clock = (1080 + 20 + 2 + 20) * (2400 + 20 + 2 + 18) * 144 / 1000,
 182         .hdisplay = 1080,
 183         .hsync_start = 1080 + 20,
 184         .hsync_end = 1080 + 20 + 2,
 185         .htotal = 1080 + 20 + 2 + 20,
 186         .vdisplay = 2400,
 187         .vsync_start = 2400 + 20,
 188         .vsync_end = 2400 + 20 + 2,
 189         .vtotal = 2400 + 20 + 2 + 18,
 190         .width_mm = 71,
 191         .height_mm = 157,
 192 };
 193
 194 static int visionox_vtdr6130_get_modes(struct drm_panel *panel,
 195                                        struct drm_connector *connector)
 196 {
 197         struct drm_display_mode *mode;
 198
 199         mode = drm_mode_duplicate(connector->dev, &visionox_vtdr6130_mode);
 200         if (!mode)
 201                 return -ENOMEM;
 202
 203         drm_mode_set_name(mode);
 204
 205         mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
 206         connector->display_info.width_mm = mode->width_mm;
 207         connector->display_info.height_mm = mode->height_mm;
 208         drm_mode_probed_add(connector, mode);
 209
 210         return 1;
 211 }
 212
 213 static const struct drm_panel_funcs visionox_vtdr6130_panel_funcs = {
 214         .prepare = visionox_vtdr6130_prepare,
 215         .unprepare = visionox_vtdr6130_unprepare,
 216         .get_modes = visionox_vtdr6130_get_modes,
 217 };
 218
 219 static int visionox_vtdr6130_bl_update_status(struct backlight_device *bl)
 220 {
 221         struct mipi_dsi_device *dsi = bl_get_data(bl);
 222         u16 brightness = backlight_get_brightness(bl);
 223
 224         return mipi_dsi_dcs_set_display_brightness_large(dsi, brightness);
 225 }
 226
 227 static const struct backlight_ops visionox_vtdr6130_bl_ops = {
 228         .update_status = visionox_vtdr6130_bl_update_status,
 229 };
 230
 231 static struct backlight_device *
 232 visionox_vtdr6130_create_backlight(struct mipi_dsi_device *dsi)
 233 {
 234         struct device *dev = &dsi->dev;
 235         const struct backlight_properties props = {
 236                 .type = BACKLIGHT_RAW,
 237                 .brightness = 4095,
 238                 .max_brightness = 4095,
 239         };
 240
 241         return devm_backlight_device_register(dev, dev_name(dev), dev, dsi,
 242                                               &visionox_vtdr6130_bl_ops, &props);
 243 }
 244
 245 static int visionox_vtdr6130_probe(struct mipi_dsi_device *dsi)
 246 {
 247         struct device *dev = &dsi->dev;
 248         struct visionox_vtdr6130 *ctx;
 249         int ret;
 250
 251         ctx = devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL);
 252         if (!ctx)
 253                 return -ENOMEM;
 254
 255         ret = devm_regulator_bulk_get_const(&dsi->dev,
 256                                             ARRAY_SIZE(visionox_vtdr6130_supplies),
 257                                             visionox_vtdr6130_supplies,
 258                                             &ctx->supplies);
 259         if (ret < 0)
 260                 return ret;
 261
 262         ctx->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW);
 263         if (IS_ERR(ctx->reset_gpio))
 264                 return dev_err_probe(dev, PTR_ERR(ctx->reset_gpio),
 265                                      "Failed to get reset-gpios\n");
 266
 267         ctx->dsi = dsi;
 268         mipi_dsi_set_drvdata(dsi, ctx);
 269
 270         dsi->lanes = 4;
 271         dsi->format = MIPI_DSI_FMT_RGB888;
 272         dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_NO_EOT_PACKET |
 273                           MIPI_DSI_CLOCK_NON_CONTINUOUS;
 274         ctx->panel.prepare_prev_first = true;
 275
 276         drm_panel_init(&ctx->panel, dev, &visionox_vtdr6130_panel_funcs,
 277                        DRM_MODE_CONNECTOR_DSI);
 278
 279         ctx->panel.backlight = visionox_vtdr6130_create_backlight(dsi);
 280         if (IS_ERR(ctx->panel.backlight))
 281                 return dev_err_probe(dev, PTR_ERR(ctx->panel.backlight),
 282                                      "Failed to create backlight\n");
 283
 284         drm_panel_add(&ctx->panel);
 285
 286         ret = mipi_dsi_attach(dsi);
 287         if (ret < 0) {
 288                 dev_err(dev, "Failed to attach to DSI host: %d\n", ret);
 289                 drm_panel_remove(&ctx->panel);
 290                 return ret;
 291         }
 292
 293         return 0;
 294 }
 295
 296 static void visionox_vtdr6130_remove(struct mipi_dsi_device *dsi)
 297 {
 298         struct visionox_vtdr6130 *ctx = mipi_dsi_get_drvdata(dsi);
 299         int ret;
 300
 301         ret = mipi_dsi_detach(dsi);
 302         if (ret < 0)
 303                 dev_err(&dsi->dev, "Failed to detach from DSI host: %d\n", ret);
 304
 305         drm_panel_remove(&ctx->panel);
 306 }
 307
 308 static const struct of_device_id visionox_vtdr6130_of_match[] = {
 309         { .compatible = "visionox,vtdr6130" },
 310         { /* sentinel */ }
 311 };
 312 MODULE_DEVICE_TABLE(of, visionox_vtdr6130_of_match);
 313
 314 static struct mipi_dsi_driver visionox_vtdr6130_driver = {
 315         .probe = visionox_vtdr6130_probe,
 316         .remove = visionox_vtdr6130_remove,
 317         .driver = {
 318                 .name = "panel-visionox-vtdr6130",
 319                 .of_match_table = visionox_vtdr6130_of_match,
 320         },
 321 };
 322 module_mipi_dsi_driver(visionox_vtdr6130_driver);
 323
 324 MODULE_AUTHOR("Neil Armstrong <[email protected]>");
 325 MODULE_DESCRIPTION("Panel driver for the Visionox VTDR6130 AMOLED DSI panel");
 326 MODULE_LICENSE("GPL");