1 /* SPDX-License-Identifier: LGPL-2.1 OR MIT */
3 * MIPS specific definitions for NOLIBC
7 #ifndef _NOLIBC_ARCH_MIPS_H
8 #define _NOLIBC_ARCH_MIPS_H
10 /* The struct returned by the stat() syscall. 88 bytes are returned by the
13 struct sys_stat_struct {
18 unsigned int st_nlink;
38 /* Syscalls for MIPS ABI O32 :
39 * - WARNING! there's always a delayed slot!
40 * - WARNING again, the syntax is different, registers take a '$' and numbers
42 * - registers are 32-bit
43 * - stack is 8-byte aligned
44 * - syscall number is passed in v0 (starts at 0xfa0).
45 * - arguments are in a0, a1, a2, a3, then the stack. The caller needs to
46 * leave some room in the stack for the callee to save a0..a3 if needed.
47 * - Many registers are clobbered, in fact only a0..a2 and s0..s8 are
48 * preserved. See: https://www.linux-mips.org/wiki/Syscall as well as
49 * scall32-o32.S in the kernel sources.
50 * - the system call is performed by calling "syscall"
51 * - syscall return comes in v0, and register a3 needs to be checked to know
52 * if an error occurred, in which case errno is in v0.
53 * - the arguments are cast to long and assigned into the target registers
54 * which are then simply passed as registers to the asm code, so that we
55 * don't have to experience issues with register constraints.
58 #define my_syscall0(num) \
60 register long _num __asm__ ("v0") = (num); \
61 register long _arg4 __asm__ ("a3"); \
64 "addiu $sp, $sp, -32\n" \
66 "addiu $sp, $sp, 32\n" \
67 : "=r"(_num), "=r"(_arg4) \
69 : "memory", "cc", "at", "v1", "hi", "lo", \
70 "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", "t8", "t9" \
72 _arg4 ? -_num : _num; \
75 #define my_syscall1(num, arg1) \
77 register long _num __asm__ ("v0") = (num); \
78 register long _arg1 __asm__ ("a0") = (long)(arg1); \
79 register long _arg4 __asm__ ("a3"); \
82 "addiu $sp, $sp, -32\n" \
84 "addiu $sp, $sp, 32\n" \
85 : "=r"(_num), "=r"(_arg4) \
88 : "memory", "cc", "at", "v1", "hi", "lo", \
89 "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", "t8", "t9" \
91 _arg4 ? -_num : _num; \
94 #define my_syscall2(num, arg1, arg2) \
96 register long _num __asm__ ("v0") = (num); \
97 register long _arg1 __asm__ ("a0") = (long)(arg1); \
98 register long _arg2 __asm__ ("a1") = (long)(arg2); \
99 register long _arg4 __asm__ ("a3"); \
102 "addiu $sp, $sp, -32\n" \
104 "addiu $sp, $sp, 32\n" \
105 : "=r"(_num), "=r"(_arg4) \
107 "r"(_arg1), "r"(_arg2) \
108 : "memory", "cc", "at", "v1", "hi", "lo", \
109 "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", "t8", "t9" \
111 _arg4 ? -_num : _num; \
114 #define my_syscall3(num, arg1, arg2, arg3) \
116 register long _num __asm__ ("v0") = (num); \
117 register long _arg1 __asm__ ("a0") = (long)(arg1); \
118 register long _arg2 __asm__ ("a1") = (long)(arg2); \
119 register long _arg3 __asm__ ("a2") = (long)(arg3); \
120 register long _arg4 __asm__ ("a3"); \
123 "addiu $sp, $sp, -32\n" \
125 "addiu $sp, $sp, 32\n" \
126 : "=r"(_num), "=r"(_arg4) \
128 "r"(_arg1), "r"(_arg2), "r"(_arg3) \
129 : "memory", "cc", "at", "v1", "hi", "lo", \
130 "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", "t8", "t9" \
132 _arg4 ? -_num : _num; \
135 #define my_syscall4(num, arg1, arg2, arg3, arg4) \
137 register long _num __asm__ ("v0") = (num); \
138 register long _arg1 __asm__ ("a0") = (long)(arg1); \
139 register long _arg2 __asm__ ("a1") = (long)(arg2); \
140 register long _arg3 __asm__ ("a2") = (long)(arg3); \
141 register long _arg4 __asm__ ("a3") = (long)(arg4); \
144 "addiu $sp, $sp, -32\n" \
146 "addiu $sp, $sp, 32\n" \
147 : "=r" (_num), "=r"(_arg4) \
149 "r"(_arg1), "r"(_arg2), "r"(_arg3), "r"(_arg4) \
150 : "memory", "cc", "at", "v1", "hi", "lo", \
151 "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", "t8", "t9" \
153 _arg4 ? -_num : _num; \
156 #define my_syscall5(num, arg1, arg2, arg3, arg4, arg5) \
158 register long _num __asm__ ("v0") = (num); \
159 register long _arg1 __asm__ ("a0") = (long)(arg1); \
160 register long _arg2 __asm__ ("a1") = (long)(arg2); \
161 register long _arg3 __asm__ ("a2") = (long)(arg3); \
162 register long _arg4 __asm__ ("a3") = (long)(arg4); \
163 register long _arg5 = (long)(arg5); \
166 "addiu $sp, $sp, -32\n" \
169 "addiu $sp, $sp, 32\n" \
170 : "=r" (_num), "=r"(_arg4) \
172 "r"(_arg1), "r"(_arg2), "r"(_arg3), "r"(_arg4), "r"(_arg5) \
173 : "memory", "cc", "at", "v1", "hi", "lo", \
174 "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", "t8", "t9" \
176 _arg4 ? -_num : _num; \
179 char **environ __attribute__((weak));
180 const unsigned long *_auxv __attribute__((weak));
182 /* startup code, note that it's called __start on MIPS */
183 void __attribute__((weak,noreturn,optimize("omit-frame-pointer"))) __start(void)
192 "lw $a0,($sp)\n" // argc was in the stack
193 "addiu $a1, $sp, 4\n" // argv = sp + 4
194 "sll $a2, $a0, 2\n" // a2 = argc * 4
195 "add $a2, $a2, $a1\n" // envp = argv + 4*argc ...
196 "addiu $a2, $a2, 4\n" // ... + 4
197 "lui $a3, %hi(environ)\n" // load environ into a3 (hi)
198 "addiu $a3, %lo(environ)\n" // load environ into a3 (lo)
199 "sw $a2,($a3)\n" // store envp(a2) into environ
201 "move $t0, $a2\n" // iterate t0 over envp, look for NULL
203 "lw $a3, ($t0)\n" // a3=*(t0);
204 "bne $a3, $0, 0b\n" // } while (a3);
205 "addiu $t0, $t0, 4\n" // delayed slot: t0+=4;
206 "lui $a3, %hi(_auxv)\n" // load _auxv into a3 (hi)
207 "addiu $a3, %lo(_auxv)\n" // load _auxv into a3 (lo)
208 "sw $t0, ($a3)\n" // store t0 into _auxv
211 "and $sp, $sp, $t0\n" // sp must be 8-byte aligned
212 "addiu $sp,$sp,-16\n" // the callee expects to save a0..a3 there!
213 "jal main\n" // main() returns the status code, we'll exit with it.
214 "nop\n" // delayed slot
215 "move $a0, $v0\n" // retrieve 32-bit exit code from v0
216 "li $v0, 4001\n" // NR_exit == 4001
221 __builtin_unreachable();
224 #endif // _NOLIBC_ARCH_MIPS_H