2 * Freescale i.MX Frame Buffer device driver
4 * Copyright (C) 2004 Sascha Hauer, Pengutronix
5 * Based on acornfb.c Copyright (C) Russell King.
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file COPYING in the main directory of this archive for
11 * Please direct your questions and comments on this driver to the following
17 #include <linux/module.h>
18 #include <linux/kernel.h>
19 #include <linux/errno.h>
20 #include <linux/string.h>
21 #include <linux/interrupt.h>
22 #include <linux/slab.h>
25 #include <linux/delay.h>
26 #include <linux/init.h>
27 #include <linux/ioport.h>
28 #include <linux/cpufreq.h>
29 #include <linux/clk.h>
30 #include <linux/platform_device.h>
31 #include <linux/dma-mapping.h>
33 #include <linux/lcd.h>
34 #include <linux/math64.h>
36 #include <linux/of_device.h>
38 #include <linux/regulator/consumer.h>
40 #include <video/of_display_timing.h>
41 #include <video/of_videomode.h>
42 #include <video/videomode.h>
44 #define PCR_TFT (1 << 31)
45 #define PCR_BPIX_8 (3 << 25)
46 #define PCR_BPIX_12 (4 << 25)
47 #define PCR_BPIX_16 (5 << 25)
48 #define PCR_BPIX_18 (6 << 25)
50 struct imx_fb_videomode {
51 struct fb_videomode mode;
58 * Complain if VAR is out of range.
62 #define DRIVER_NAME "imx-fb"
66 #define LCDC_SIZE 0x04
67 #define SIZE_XMAX(x) ((((x) >> 4) & 0x3f) << 20)
69 #define YMAX_MASK_IMX1 0x1ff
70 #define YMAX_MASK_IMX21 0x3ff
73 #define VPW_VPW(x) ((x) & 0x3ff)
75 #define LCDC_CPOS 0x0C
76 #define CPOS_CC1 (1<<31)
77 #define CPOS_CC0 (1<<30)
78 #define CPOS_OP (1<<28)
79 #define CPOS_CXP(x) (((x) & 3ff) << 16)
81 #define LCDC_LCWHB 0x10
82 #define LCWHB_BK_EN (1<<31)
83 #define LCWHB_CW(w) (((w) & 0x1f) << 24)
84 #define LCWHB_CH(h) (((h) & 0x1f) << 16)
85 #define LCWHB_BD(x) ((x) & 0xff)
87 #define LCDC_LCHCC 0x14
92 #define HCR_H_WIDTH(x) (((x) & 0x3f) << 26)
93 #define HCR_H_WAIT_1(x) (((x) & 0xff) << 8)
94 #define HCR_H_WAIT_2(x) ((x) & 0xff)
97 #define VCR_V_WIDTH(x) (((x) & 0x3f) << 26)
98 #define VCR_V_WAIT_1(x) (((x) & 0xff) << 8)
99 #define VCR_V_WAIT_2(x) ((x) & 0xff)
101 #define LCDC_POS 0x24
102 #define POS_POS(x) ((x) & 1f)
104 #define LCDC_LSCR1 0x28
105 /* bit fields in imxfb.h */
107 #define LCDC_PWMR 0x2C
108 /* bit fields in imxfb.h */
110 #define LCDC_DMACR 0x30
111 /* bit fields in imxfb.h */
113 #define LCDC_RMCR 0x34
115 #define RMCR_LCDC_EN_MX1 (1<<1)
117 #define RMCR_SELF_REF (1<<0)
119 #define LCDC_LCDICR 0x38
120 #define LCDICR_INT_SYN (1<<2)
121 #define LCDICR_INT_CON (1)
123 #define LCDC_LCDISR 0x40
124 #define LCDISR_UDR_ERR (1<<3)
125 #define LCDISR_ERR_RES (1<<2)
126 #define LCDISR_EOF (1<<1)
127 #define LCDISR_BOF (1<<0)
129 #define IMXFB_LSCR1_DEFAULT 0x00120300
131 #define LCDC_LAUSCR 0x80
132 #define LAUSCR_AUS_MODE (1<<31)
134 /* Used fb-mode. Can be set on kernel command line, therefore file-static. */
135 static const char *fb_mode;
138 * These are the bitfields for each
139 * display depth that we support.
142 struct fb_bitfield red;
143 struct fb_bitfield green;
144 struct fb_bitfield blue;
145 struct fb_bitfield transp;
154 struct platform_device *pdev;
159 enum imxfb_type devtype;
163 * These are the addresses we mapped
164 * the framebuffer memory region to.
182 struct imx_fb_videomode *mode;
185 struct regulator *lcd_pwr;
189 static const struct platform_device_id imxfb_devtype[] = {
192 .driver_data = IMX1_FB,
195 .driver_data = IMX21_FB,
200 MODULE_DEVICE_TABLE(platform, imxfb_devtype);
202 static const struct of_device_id imxfb_of_dev_id[] = {
204 .compatible = "fsl,imx1-fb",
205 .data = &imxfb_devtype[IMX1_FB],
207 .compatible = "fsl,imx21-fb",
208 .data = &imxfb_devtype[IMX21_FB],
213 MODULE_DEVICE_TABLE(of, imxfb_of_dev_id);
215 static inline int is_imx1_fb(struct imxfb_info *fbi)
217 return fbi->devtype == IMX1_FB;
220 #define IMX_NAME "IMX"
223 * Minimum X and Y resolutions
228 /* Actually this really is 18bit support, the lowest 2 bits of each colour
229 * are unused in hardware. We claim to have 24bit support to make software
230 * like X work, which does not support 18bit.
232 static struct imxfb_rgb def_rgb_18 = {
233 .red = {.offset = 16, .length = 8,},
234 .green = {.offset = 8, .length = 8,},
235 .blue = {.offset = 0, .length = 8,},
236 .transp = {.offset = 0, .length = 0,},
239 static struct imxfb_rgb def_rgb_16_tft = {
240 .red = {.offset = 11, .length = 5,},
241 .green = {.offset = 5, .length = 6,},
242 .blue = {.offset = 0, .length = 5,},
243 .transp = {.offset = 0, .length = 0,},
246 static struct imxfb_rgb def_rgb_16_stn = {
247 .red = {.offset = 8, .length = 4,},
248 .green = {.offset = 4, .length = 4,},
249 .blue = {.offset = 0, .length = 4,},
250 .transp = {.offset = 0, .length = 0,},
253 static struct imxfb_rgb def_rgb_8 = {
254 .red = {.offset = 0, .length = 8,},
255 .green = {.offset = 0, .length = 8,},
256 .blue = {.offset = 0, .length = 8,},
257 .transp = {.offset = 0, .length = 0,},
260 static int imxfb_activate_var(struct fb_var_screeninfo *var,
261 struct fb_info *info);
263 static inline u_int chan_to_field(u_int chan, struct fb_bitfield *bf)
266 chan >>= 16 - bf->length;
267 return chan << bf->offset;
270 static int imxfb_setpalettereg(u_int regno, u_int red, u_int green, u_int blue,
271 u_int trans, struct fb_info *info)
273 struct imxfb_info *fbi = info->par;
276 #define CNVT_TOHW(val,width) ((((val)<<(width))+0x7FFF-(val))>>16)
277 if (regno < fbi->palette_size) {
278 val = (CNVT_TOHW(red, 4) << 8) |
279 (CNVT_TOHW(green,4) << 4) |
282 writel(val, fbi->regs + 0x800 + (regno << 2));
288 static int imxfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
289 u_int trans, struct fb_info *info)
291 struct imxfb_info *fbi = info->par;
296 * If inverse mode was selected, invert all the colours
297 * rather than the register number. The register number
298 * is what you poke into the framebuffer to produce the
299 * colour you requested.
301 if (fbi->cmap_inverse) {
303 green = 0xffff - green;
304 blue = 0xffff - blue;
308 * If greyscale is true, then we convert the RGB value
309 * to greyscale no mater what visual we are using.
311 if (info->var.grayscale)
312 red = green = blue = (19595 * red + 38470 * green +
315 switch (info->fix.visual) {
316 case FB_VISUAL_TRUECOLOR:
318 * 12 or 16-bit True Colour. We encode the RGB value
319 * according to the RGB bitfield information.
322 u32 *pal = info->pseudo_palette;
324 val = chan_to_field(red, &info->var.red);
325 val |= chan_to_field(green, &info->var.green);
326 val |= chan_to_field(blue, &info->var.blue);
333 case FB_VISUAL_STATIC_PSEUDOCOLOR:
334 case FB_VISUAL_PSEUDOCOLOR:
335 ret = imxfb_setpalettereg(regno, red, green, blue, trans, info);
342 static const struct imx_fb_videomode *imxfb_find_mode(struct imxfb_info *fbi)
344 struct imx_fb_videomode *m;
348 return &fbi->mode[0];
350 for (i = 0, m = &fbi->mode[0]; i < fbi->num_modes; i++, m++) {
351 if (!strcmp(m->mode.name, fb_mode))
359 * Round up in the following order: bits_per_pixel, xres,
360 * yres, xres_virtual, yres_virtual, xoffset, yoffset, grayscale,
361 * bitfields, horizontal timing, vertical timing.
363 static int imxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
365 struct imxfb_info *fbi = info->par;
366 struct imxfb_rgb *rgb;
367 const struct imx_fb_videomode *imxfb_mode;
368 unsigned long lcd_clk;
369 unsigned long long tmp;
372 if (var->xres < MIN_XRES)
373 var->xres = MIN_XRES;
374 if (var->yres < MIN_YRES)
375 var->yres = MIN_YRES;
377 imxfb_mode = imxfb_find_mode(fbi);
381 var->xres = imxfb_mode->mode.xres;
382 var->yres = imxfb_mode->mode.yres;
383 var->bits_per_pixel = imxfb_mode->bpp;
384 var->pixclock = imxfb_mode->mode.pixclock;
385 var->hsync_len = imxfb_mode->mode.hsync_len;
386 var->left_margin = imxfb_mode->mode.left_margin;
387 var->right_margin = imxfb_mode->mode.right_margin;
388 var->vsync_len = imxfb_mode->mode.vsync_len;
389 var->upper_margin = imxfb_mode->mode.upper_margin;
390 var->lower_margin = imxfb_mode->mode.lower_margin;
391 var->sync = imxfb_mode->mode.sync;
392 var->xres_virtual = max(var->xres_virtual, var->xres);
393 var->yres_virtual = max(var->yres_virtual, var->yres);
395 pr_debug("var->bits_per_pixel=%d\n", var->bits_per_pixel);
397 lcd_clk = clk_get_rate(fbi->clk_per);
399 tmp = var->pixclock * (unsigned long long)lcd_clk;
401 do_div(tmp, 1000000);
403 if (do_div(tmp, 1000000) > 500000)
406 pcr = (unsigned int)tmp;
410 printk(KERN_WARNING "Must limit pixel clock to %luHz\n",
414 switch (var->bits_per_pixel) {
426 if (imxfb_mode->pcr & PCR_TFT)
427 rgb = &def_rgb_16_tft;
429 rgb = &def_rgb_16_stn;
437 /* add sync polarities */
438 pcr |= imxfb_mode->pcr & ~(0x3f | (7 << 25));
442 * The LCDC AUS Mode Control Register does not exist on imx1.
444 if (!is_imx1_fb(fbi) && imxfb_mode->aus_mode)
445 fbi->lauscr = LAUSCR_AUS_MODE;
448 * Copy the RGB parameters for this display
449 * from the machine specific parameters.
452 var->green = rgb->green;
453 var->blue = rgb->blue;
454 var->transp = rgb->transp;
456 pr_debug("RGBT length = %d:%d:%d:%d\n",
457 var->red.length, var->green.length, var->blue.length,
460 pr_debug("RGBT offset = %d:%d:%d:%d\n",
461 var->red.offset, var->green.offset, var->blue.offset,
469 * Set the user defined part of the display for the specified console
471 static int imxfb_set_par(struct fb_info *info)
473 struct imxfb_info *fbi = info->par;
474 struct fb_var_screeninfo *var = &info->var;
476 if (var->bits_per_pixel == 16 || var->bits_per_pixel == 32)
477 info->fix.visual = FB_VISUAL_TRUECOLOR;
478 else if (!fbi->cmap_static)
479 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
482 * Some people have weird ideas about wanting static
483 * pseudocolor maps. I suspect their user space
484 * applications are broken.
486 info->fix.visual = FB_VISUAL_STATIC_PSEUDOCOLOR;
489 info->fix.line_length = var->xres_virtual * var->bits_per_pixel / 8;
490 fbi->palette_size = var->bits_per_pixel == 8 ? 256 : 16;
492 imxfb_activate_var(var, info);
497 static int imxfb_enable_controller(struct imxfb_info *fbi)
504 pr_debug("Enabling LCD controller\n");
506 writel(fbi->map_dma, fbi->regs + LCDC_SSA);
508 /* panning offset 0 (0 pixel offset) */
509 writel(0x00000000, fbi->regs + LCDC_POS);
511 /* disable hardware cursor */
512 writel(readl(fbi->regs + LCDC_CPOS) & ~(CPOS_CC0 | CPOS_CC1),
513 fbi->regs + LCDC_CPOS);
516 * RMCR_LCDC_EN_MX1 is present on i.MX1 only, but doesn't hurt
519 writel(RMCR_LCDC_EN_MX1, fbi->regs + LCDC_RMCR);
521 ret = clk_prepare_enable(fbi->clk_ipg);
525 ret = clk_prepare_enable(fbi->clk_ahb);
529 ret = clk_prepare_enable(fbi->clk_per);
537 clk_disable_unprepare(fbi->clk_ahb);
539 clk_disable_unprepare(fbi->clk_ipg);
541 writel(0, fbi->regs + LCDC_RMCR);
546 static void imxfb_disable_controller(struct imxfb_info *fbi)
551 pr_debug("Disabling LCD controller\n");
553 clk_disable_unprepare(fbi->clk_per);
554 clk_disable_unprepare(fbi->clk_ahb);
555 clk_disable_unprepare(fbi->clk_ipg);
556 fbi->enabled = false;
558 writel(0, fbi->regs + LCDC_RMCR);
561 static int imxfb_blank(int blank, struct fb_info *info)
563 struct imxfb_info *fbi = info->par;
565 pr_debug("imxfb_blank: blank=%d\n", blank);
568 case FB_BLANK_POWERDOWN:
569 case FB_BLANK_VSYNC_SUSPEND:
570 case FB_BLANK_HSYNC_SUSPEND:
571 case FB_BLANK_NORMAL:
572 imxfb_disable_controller(fbi);
575 case FB_BLANK_UNBLANK:
576 return imxfb_enable_controller(fbi);
581 static const struct fb_ops imxfb_ops = {
582 .owner = THIS_MODULE,
583 .fb_check_var = imxfb_check_var,
584 .fb_set_par = imxfb_set_par,
585 .fb_setcolreg = imxfb_setcolreg,
586 .fb_fillrect = cfb_fillrect,
587 .fb_copyarea = cfb_copyarea,
588 .fb_imageblit = cfb_imageblit,
589 .fb_blank = imxfb_blank,
593 * imxfb_activate_var():
594 * Configures LCD Controller based on entries in var parameter. Settings are
595 * only written to the controller if changes were made.
597 static int imxfb_activate_var(struct fb_var_screeninfo *var, struct fb_info *info)
599 struct imxfb_info *fbi = info->par;
600 u32 ymax_mask = is_imx1_fb(fbi) ? YMAX_MASK_IMX1 : YMAX_MASK_IMX21;
602 pr_debug("var: xres=%d hslen=%d lm=%d rm=%d\n",
603 var->xres, var->hsync_len,
604 var->left_margin, var->right_margin);
605 pr_debug("var: yres=%d vslen=%d um=%d bm=%d\n",
606 var->yres, var->vsync_len,
607 var->upper_margin, var->lower_margin);
610 if (var->xres < 16 || var->xres > 1024)
611 printk(KERN_ERR "%s: invalid xres %d\n",
612 info->fix.id, var->xres);
613 if (var->hsync_len < 1 || var->hsync_len > 64)
614 printk(KERN_ERR "%s: invalid hsync_len %d\n",
615 info->fix.id, var->hsync_len);
616 if (var->left_margin > 255)
617 printk(KERN_ERR "%s: invalid left_margin %d\n",
618 info->fix.id, var->left_margin);
619 if (var->right_margin > 255)
620 printk(KERN_ERR "%s: invalid right_margin %d\n",
621 info->fix.id, var->right_margin);
622 if (var->yres < 1 || var->yres > ymax_mask)
623 printk(KERN_ERR "%s: invalid yres %d\n",
624 info->fix.id, var->yres);
625 if (var->vsync_len > 100)
626 printk(KERN_ERR "%s: invalid vsync_len %d\n",
627 info->fix.id, var->vsync_len);
628 if (var->upper_margin > 63)
629 printk(KERN_ERR "%s: invalid upper_margin %d\n",
630 info->fix.id, var->upper_margin);
631 if (var->lower_margin > 255)
632 printk(KERN_ERR "%s: invalid lower_margin %d\n",
633 info->fix.id, var->lower_margin);
636 /* physical screen start address */
637 writel(VPW_VPW(var->xres * var->bits_per_pixel / 8 / 4),
638 fbi->regs + LCDC_VPW);
640 writel(HCR_H_WIDTH(var->hsync_len - 1) |
641 HCR_H_WAIT_1(var->right_margin - 1) |
642 HCR_H_WAIT_2(var->left_margin - 3),
643 fbi->regs + LCDC_HCR);
645 writel(VCR_V_WIDTH(var->vsync_len) |
646 VCR_V_WAIT_1(var->lower_margin) |
647 VCR_V_WAIT_2(var->upper_margin),
648 fbi->regs + LCDC_VCR);
650 writel(SIZE_XMAX(var->xres) | (var->yres & ymax_mask),
651 fbi->regs + LCDC_SIZE);
653 writel(fbi->pcr, fbi->regs + LCDC_PCR);
655 writel(fbi->pwmr, fbi->regs + LCDC_PWMR);
656 writel(fbi->lscr1, fbi->regs + LCDC_LSCR1);
658 /* dmacr = 0 is no valid value, as we need DMA control marks. */
660 writel(fbi->dmacr, fbi->regs + LCDC_DMACR);
663 writel(fbi->lauscr, fbi->regs + LCDC_LAUSCR);
668 static int imxfb_init_fbinfo(struct platform_device *pdev)
670 struct fb_info *info = platform_get_drvdata(pdev);
671 struct imxfb_info *fbi = info->par;
672 struct device_node *np;
674 pr_debug("%s\n",__func__);
676 info->pseudo_palette = kmalloc_array(16, sizeof(u32), GFP_KERNEL);
677 if (!info->pseudo_palette)
680 memset(fbi, 0, sizeof(struct imxfb_info));
682 fbi->devtype = pdev->id_entry->driver_data;
684 strscpy(info->fix.id, IMX_NAME, sizeof(info->fix.id));
686 info->fix.type = FB_TYPE_PACKED_PIXELS;
687 info->fix.type_aux = 0;
688 info->fix.xpanstep = 0;
689 info->fix.ypanstep = 0;
690 info->fix.ywrapstep = 0;
691 info->fix.accel = FB_ACCEL_NONE;
693 info->var.nonstd = 0;
694 info->var.activate = FB_ACTIVATE_NOW;
695 info->var.height = -1;
696 info->var.width = -1;
697 info->var.accel_flags = 0;
698 info->var.vmode = FB_VMODE_NONINTERLACED;
700 info->fbops = &imxfb_ops;
701 info->flags = FBINFO_FLAG_DEFAULT |
704 np = pdev->dev.of_node;
705 info->var.grayscale = of_property_read_bool(np,
707 fbi->cmap_inverse = of_property_read_bool(np, "cmap-inverse");
708 fbi->cmap_static = of_property_read_bool(np, "cmap-static");
710 fbi->lscr1 = IMXFB_LSCR1_DEFAULT;
712 of_property_read_u32(np, "fsl,lpccr", &fbi->pwmr);
714 of_property_read_u32(np, "fsl,lscr1", &fbi->lscr1);
716 of_property_read_u32(np, "fsl,dmacr", &fbi->dmacr);
721 static int imxfb_of_read_mode(struct device *dev, struct device_node *np,
722 struct imx_fb_videomode *imxfb_mode)
725 struct fb_videomode *of_mode = &imxfb_mode->mode;
729 ret = of_property_read_string(np, "model", &of_mode->name);
731 of_mode->name = NULL;
733 ret = of_get_fb_videomode(np, of_mode, OF_USE_NATIVE_MODE);
735 dev_err(dev, "Failed to get videomode from DT\n");
739 ret = of_property_read_u32(np, "bits-per-pixel", &bpp);
740 ret |= of_property_read_u32(np, "fsl,pcr", &pcr);
743 dev_err(dev, "Failed to read bpp and pcr from DT\n");
747 if (bpp < 1 || bpp > 255) {
748 dev_err(dev, "Bits per pixel have to be between 1 and 255\n");
752 imxfb_mode->bpp = bpp;
753 imxfb_mode->pcr = pcr;
756 * fsl,aus-mode is optional
758 imxfb_mode->aus_mode = of_property_read_bool(np, "fsl,aus-mode");
763 static int imxfb_lcd_check_fb(struct lcd_device *lcddev, struct fb_info *fi)
765 struct imxfb_info *fbi = dev_get_drvdata(&lcddev->dev);
767 if (!fi || fi->par == fbi)
773 static int imxfb_lcd_get_contrast(struct lcd_device *lcddev)
775 struct imxfb_info *fbi = dev_get_drvdata(&lcddev->dev);
777 return fbi->pwmr & 0xff;
780 static int imxfb_lcd_set_contrast(struct lcd_device *lcddev, int contrast)
782 struct imxfb_info *fbi = dev_get_drvdata(&lcddev->dev);
784 if (fbi->pwmr && fbi->enabled) {
787 else if (contrast < 0)
791 fbi->pwmr |= contrast;
793 writel(fbi->pwmr, fbi->regs + LCDC_PWMR);
799 static int imxfb_lcd_get_power(struct lcd_device *lcddev)
801 struct imxfb_info *fbi = dev_get_drvdata(&lcddev->dev);
803 if (!IS_ERR(fbi->lcd_pwr) &&
804 !regulator_is_enabled(fbi->lcd_pwr))
805 return FB_BLANK_POWERDOWN;
807 return FB_BLANK_UNBLANK;
810 static int imxfb_regulator_set(struct imxfb_info *fbi, int enable)
814 if (enable == fbi->lcd_pwr_enabled)
818 ret = regulator_enable(fbi->lcd_pwr);
820 ret = regulator_disable(fbi->lcd_pwr);
823 fbi->lcd_pwr_enabled = enable;
828 static int imxfb_lcd_set_power(struct lcd_device *lcddev, int power)
830 struct imxfb_info *fbi = dev_get_drvdata(&lcddev->dev);
832 if (!IS_ERR(fbi->lcd_pwr))
833 return imxfb_regulator_set(fbi, power == FB_BLANK_UNBLANK);
838 static struct lcd_ops imxfb_lcd_ops = {
839 .check_fb = imxfb_lcd_check_fb,
840 .get_contrast = imxfb_lcd_get_contrast,
841 .set_contrast = imxfb_lcd_set_contrast,
842 .get_power = imxfb_lcd_get_power,
843 .set_power = imxfb_lcd_set_power,
846 static int imxfb_setup(void)
848 char *opt, *options = NULL;
850 if (fb_get_options("imxfb", &options))
853 if (!options || !*options)
856 while ((opt = strsep(&options, ",")) != NULL) {
866 static int imxfb_probe(struct platform_device *pdev)
868 struct imxfb_info *fbi;
869 struct lcd_device *lcd;
870 struct fb_info *info;
871 struct resource *res;
872 struct imx_fb_videomode *m;
873 const struct of_device_id *of_id;
874 struct device_node *display_np;
878 dev_info(&pdev->dev, "i.MX Framebuffer driver\n");
884 of_id = of_match_device(imxfb_of_dev_id, &pdev->dev);
886 pdev->id_entry = of_id->data;
888 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
892 info = framebuffer_alloc(sizeof(struct imxfb_info), &pdev->dev);
898 platform_set_drvdata(pdev, info);
900 ret = imxfb_init_fbinfo(pdev);
906 display_np = of_parse_phandle(pdev->dev.of_node, "display", 0);
908 dev_err(&pdev->dev, "No display defined in devicetree\n");
910 goto failed_of_parse;
914 * imxfb does not support more modes, we choose only the native
919 fbi->mode = devm_kzalloc(&pdev->dev,
920 sizeof(struct imx_fb_videomode), GFP_KERNEL);
923 of_node_put(display_np);
924 goto failed_of_parse;
927 ret = imxfb_of_read_mode(&pdev->dev, display_np, fbi->mode);
928 of_node_put(display_np);
930 goto failed_of_parse;
932 /* Calculate maximum bytes used per pixel. In most cases this should
933 * be the same as m->bpp/8 */
935 bytes_per_pixel = (m->bpp + 7) / 8;
936 for (i = 0; i < fbi->num_modes; i++, m++)
937 info->fix.smem_len = max_t(size_t, info->fix.smem_len,
938 m->mode.xres * m->mode.yres * bytes_per_pixel);
940 fbi->clk_ipg = devm_clk_get(&pdev->dev, "ipg");
941 if (IS_ERR(fbi->clk_ipg)) {
942 ret = PTR_ERR(fbi->clk_ipg);
943 goto failed_getclock;
947 * The LCDC controller does not have an enable bit. The
948 * controller starts directly when the clocks are enabled.
949 * If the clocks are enabled when the controller is not yet
950 * programmed with proper register values (enabled at the
951 * bootloader, for example) then it just goes into some undefined
953 * To avoid this issue, let's enable and disable LCDC IPG clock
954 * so that we force some kind of 'reset' to the LCDC block.
956 ret = clk_prepare_enable(fbi->clk_ipg);
958 goto failed_getclock;
959 clk_disable_unprepare(fbi->clk_ipg);
961 fbi->clk_ahb = devm_clk_get(&pdev->dev, "ahb");
962 if (IS_ERR(fbi->clk_ahb)) {
963 ret = PTR_ERR(fbi->clk_ahb);
964 goto failed_getclock;
967 fbi->clk_per = devm_clk_get(&pdev->dev, "per");
968 if (IS_ERR(fbi->clk_per)) {
969 ret = PTR_ERR(fbi->clk_per);
970 goto failed_getclock;
973 fbi->regs = devm_ioremap_resource(&pdev->dev, res);
974 if (IS_ERR(fbi->regs)) {
975 ret = PTR_ERR(fbi->regs);
979 fbi->map_size = PAGE_ALIGN(info->fix.smem_len);
980 info->screen_buffer = dma_alloc_wc(&pdev->dev, fbi->map_size,
981 &fbi->map_dma, GFP_KERNEL);
982 if (!info->screen_buffer) {
983 dev_err(&pdev->dev, "Failed to allocate video RAM\n");
988 info->fix.smem_start = fbi->map_dma;
990 INIT_LIST_HEAD(&info->modelist);
991 for (i = 0; i < fbi->num_modes; i++)
992 fb_add_videomode(&fbi->mode[i].mode, &info->modelist);
995 * This makes sure that our colour bitfield
996 * descriptors are correctly initialised.
998 imxfb_check_var(&info->var, info);
1001 * For modes > 8bpp, the color map is bypassed.
1002 * Therefore, 256 entries are enough.
1004 ret = fb_alloc_cmap(&info->cmap, 256, 0);
1008 imxfb_set_par(info);
1009 ret = register_framebuffer(info);
1011 dev_err(&pdev->dev, "failed to register framebuffer\n");
1012 goto failed_register;
1015 fbi->lcd_pwr = devm_regulator_get(&pdev->dev, "lcd");
1016 if (PTR_ERR(fbi->lcd_pwr) == -EPROBE_DEFER) {
1017 ret = -EPROBE_DEFER;
1021 lcd = devm_lcd_device_register(&pdev->dev, "imxfb-lcd", &pdev->dev, fbi,
1028 lcd->props.max_contrast = 0xff;
1030 imxfb_enable_controller(fbi);
1036 unregister_framebuffer(info);
1039 fb_dealloc_cmap(&info->cmap);
1041 dma_free_wc(&pdev->dev, fbi->map_size, info->screen_buffer,
1046 release_mem_region(res->start, resource_size(res));
1048 kfree(info->pseudo_palette);
1050 framebuffer_release(info);
1054 static void imxfb_remove(struct platform_device *pdev)
1056 struct fb_info *info = platform_get_drvdata(pdev);
1057 struct imxfb_info *fbi = info->par;
1059 imxfb_disable_controller(fbi);
1061 unregister_framebuffer(info);
1062 fb_dealloc_cmap(&info->cmap);
1063 dma_free_wc(&pdev->dev, fbi->map_size, info->screen_buffer,
1065 kfree(info->pseudo_palette);
1066 framebuffer_release(info);
1069 static int __maybe_unused imxfb_suspend(struct device *dev)
1071 struct fb_info *info = dev_get_drvdata(dev);
1072 struct imxfb_info *fbi = info->par;
1074 imxfb_disable_controller(fbi);
1079 static int __maybe_unused imxfb_resume(struct device *dev)
1081 struct fb_info *info = dev_get_drvdata(dev);
1082 struct imxfb_info *fbi = info->par;
1084 imxfb_enable_controller(fbi);
1089 static SIMPLE_DEV_PM_OPS(imxfb_pm_ops, imxfb_suspend, imxfb_resume);
1091 static struct platform_driver imxfb_driver = {
1093 .name = DRIVER_NAME,
1094 .of_match_table = imxfb_of_dev_id,
1095 .pm = &imxfb_pm_ops,
1097 .probe = imxfb_probe,
1098 .remove_new = imxfb_remove,
1099 .id_table = imxfb_devtype,
1101 module_platform_driver(imxfb_driver);
1103 MODULE_DESCRIPTION("Freescale i.MX framebuffer driver");
1104 MODULE_AUTHOR("Sascha Hauer, Pengutronix");
1105 MODULE_LICENSE("GPL");