1 // SPDX-License-Identifier: GPL-2.0-only
3 * cooling device driver that activates the processor throttling by
4 * programming the TCC Offset register.
5 * Copyright (c) 2021, Intel Corporation.
7 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
9 #include <linux/device.h>
10 #include <linux/intel_tcc.h>
11 #include <linux/module.h>
12 #include <linux/thermal.h>
13 #include <asm/cpu_device_id.h>
15 #define TCC_PROGRAMMABLE BIT(30)
16 #define TCC_LOCKED BIT(31)
18 static struct thermal_cooling_device *tcc_cdev;
20 static int tcc_get_max_state(struct thermal_cooling_device *cdev, unsigned long
27 static int tcc_get_cur_state(struct thermal_cooling_device *cdev, unsigned long
30 int offset = intel_tcc_get_offset(-1);
39 static int tcc_set_cur_state(struct thermal_cooling_device *cdev, unsigned long
42 return intel_tcc_set_offset(-1, (int)state);
45 static const struct thermal_cooling_device_ops tcc_cooling_ops = {
46 .get_max_state = tcc_get_max_state,
47 .get_cur_state = tcc_get_cur_state,
48 .set_cur_state = tcc_set_cur_state,
51 static const struct x86_cpu_id tcc_ids[] __initconst = {
52 X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE, NULL),
53 X86_MATCH_INTEL_FAM6_MODEL(SKYLAKE_L, NULL),
54 X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE, NULL),
55 X86_MATCH_INTEL_FAM6_MODEL(KABYLAKE_L, NULL),
56 X86_MATCH_INTEL_FAM6_MODEL(ICELAKE, NULL),
57 X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_L, NULL),
58 X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE, NULL),
59 X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE_L, NULL),
60 X86_MATCH_INTEL_FAM6_MODEL(COMETLAKE, NULL),
61 X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE, NULL),
62 X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L, NULL),
63 X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_N, NULL),
64 X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE, NULL),
65 X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_P, NULL),
66 X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_S, NULL),
70 MODULE_DEVICE_TABLE(x86cpu, tcc_ids);
72 static int __init tcc_cooling_init(void)
76 const struct x86_cpu_id *id;
80 id = x86_match_cpu(tcc_ids);
84 err = rdmsrl_safe(MSR_PLATFORM_INFO, &val);
88 if (!(val & TCC_PROGRAMMABLE))
91 err = rdmsrl_safe(MSR_IA32_TEMPERATURE_TARGET, &val);
95 if (val & TCC_LOCKED) {
96 pr_info("TCC Offset locked\n");
100 pr_info("Programmable TCC Offset detected\n");
103 thermal_cooling_device_register("TCC Offset", NULL,
105 if (IS_ERR(tcc_cdev)) {
106 ret = PTR_ERR(tcc_cdev);
112 module_init(tcc_cooling_init)
114 static void __exit tcc_cooling_exit(void)
116 thermal_cooling_device_unregister(tcc_cdev);
119 module_exit(tcc_cooling_exit)
121 MODULE_IMPORT_NS(INTEL_TCC);
122 MODULE_DESCRIPTION("TCC offset cooling device Driver");
124 MODULE_LICENSE("GPL v2");