1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * vpx3220a, vpx3216b & vpx3214c video decoder driver version 0.0.1
8 #include <linux/module.h>
9 #include <linux/init.h>
10 #include <linux/delay.h>
11 #include <linux/types.h>
12 #include <linux/slab.h>
13 #include <linux/uaccess.h>
14 #include <linux/i2c.h>
15 #include <linux/videodev2.h>
16 #include <media/v4l2-device.h>
17 #include <media/v4l2-ctrls.h>
19 MODULE_DESCRIPTION("vpx3220a/vpx3216b/vpx3214c video decoder driver");
20 MODULE_AUTHOR("Laurent Pinchart");
21 MODULE_LICENSE("GPL");
24 module_param(debug, int, 0);
25 MODULE_PARM_DESC(debug, "Debug level (0-1)");
28 #define VPX_TIMEOUT_COUNT 10
30 /* ----------------------------------------------------------------------- */
33 struct v4l2_subdev sd;
34 struct v4l2_ctrl_handler hdl;
35 unsigned char reg[255];
42 static inline struct vpx3220 *to_vpx3220(struct v4l2_subdev *sd)
44 return container_of(sd, struct vpx3220, sd);
47 static inline struct v4l2_subdev *to_sd(struct v4l2_ctrl *ctrl)
49 return &container_of(ctrl->handler, struct vpx3220, hdl)->sd;
52 static char *inputs[] = { "internal", "composite", "svideo" };
54 /* ----------------------------------------------------------------------- */
56 static inline int vpx3220_write(struct v4l2_subdev *sd, u8 reg, u8 value)
58 struct i2c_client *client = v4l2_get_subdevdata(sd);
59 struct vpx3220 *decoder = i2c_get_clientdata(client);
61 decoder->reg[reg] = value;
62 return i2c_smbus_write_byte_data(client, reg, value);
65 static inline int vpx3220_read(struct v4l2_subdev *sd, u8 reg)
67 struct i2c_client *client = v4l2_get_subdevdata(sd);
69 return i2c_smbus_read_byte_data(client, reg);
72 static int vpx3220_fp_status(struct v4l2_subdev *sd)
77 for (i = 0; i < VPX_TIMEOUT_COUNT; i++) {
78 status = vpx3220_read(sd, 0x29);
92 static int vpx3220_fp_write(struct v4l2_subdev *sd, u8 fpaddr, u16 data)
94 struct i2c_client *client = v4l2_get_subdevdata(sd);
96 /* Write the 16-bit address to the FPWR register */
97 if (i2c_smbus_write_word_data(client, 0x27, swab16(fpaddr)) == -1) {
98 v4l2_dbg(1, debug, sd, "%s: failed\n", __func__);
102 if (vpx3220_fp_status(sd) < 0)
105 /* Write the 16-bit data to the FPDAT register */
106 if (i2c_smbus_write_word_data(client, 0x28, swab16(data)) == -1) {
107 v4l2_dbg(1, debug, sd, "%s: failed\n", __func__);
114 static int vpx3220_fp_read(struct v4l2_subdev *sd, u16 fpaddr)
116 struct i2c_client *client = v4l2_get_subdevdata(sd);
119 /* Write the 16-bit address to the FPRD register */
120 if (i2c_smbus_write_word_data(client, 0x26, swab16(fpaddr)) == -1) {
121 v4l2_dbg(1, debug, sd, "%s: failed\n", __func__);
125 if (vpx3220_fp_status(sd) < 0)
128 /* Read the 16-bit data from the FPDAT register */
129 data = i2c_smbus_read_word_data(client, 0x28);
131 v4l2_dbg(1, debug, sd, "%s: failed\n", __func__);
138 static int vpx3220_write_block(struct v4l2_subdev *sd, const u8 *data, unsigned int len)
145 ret = vpx3220_write(sd, reg, *data++);
154 static int vpx3220_write_fp_block(struct v4l2_subdev *sd,
155 const u16 *data, unsigned int len)
162 ret |= vpx3220_fp_write(sd, reg, *data++);
169 /* ---------------------------------------------------------------------- */
171 static const unsigned short init_ntsc[] = {
172 0x1c, 0x00, /* NTSC tint angle */
173 0x88, 17, /* Window 1 vertical */
174 0x89, 240, /* Vertical lines in */
175 0x8a, 240, /* Vertical lines out */
176 0x8b, 000, /* Horizontal begin */
177 0x8c, 640, /* Horizontal length */
178 0x8d, 640, /* Number of pixels */
179 0x8f, 0xc00, /* Disable window 2 */
180 0xf0, 0x73, /* 13.5 MHz transport, Forced
181 * mode, latch windows */
182 0xf2, 0x13, /* NTSC M, composite input */
183 0xe7, 0x1e1, /* Enable vertical standard
184 * locking @ 240 lines */
187 static const unsigned short init_pal[] = {
188 0x88, 23, /* Window 1 vertical begin */
189 0x89, 288, /* Vertical lines in (16 lines
190 * skipped by the VFE) */
191 0x8a, 288, /* Vertical lines out (16 lines
192 * skipped by the VFE) */
193 0x8b, 16, /* Horizontal begin */
194 0x8c, 768, /* Horizontal length */
195 0x8d, 784, /* Number of pixels
196 * Must be >= Horizontal begin + Horizontal length */
197 0x8f, 0xc00, /* Disable window 2 */
198 0xf0, 0x77, /* 13.5 MHz transport, Forced
199 * mode, latch windows */
200 0xf2, 0x3d1, /* PAL B,G,H,I, composite input */
201 0xe7, 0x241, /* PAL/SECAM set to 288 lines */
204 static const unsigned short init_secam[] = {
205 0x88, 23, /* Window 1 vertical begin */
206 0x89, 288, /* Vertical lines in (16 lines
207 * skipped by the VFE) */
208 0x8a, 288, /* Vertical lines out (16 lines
209 * skipped by the VFE) */
210 0x8b, 16, /* Horizontal begin */
211 0x8c, 768, /* Horizontal length */
212 0x8d, 784, /* Number of pixels
213 * Must be >= Horizontal begin + Horizontal length */
214 0x8f, 0xc00, /* Disable window 2 */
215 0xf0, 0x77, /* 13.5 MHz transport, Forced
216 * mode, latch windows */
217 0xf2, 0x3d5, /* SECAM, composite input */
218 0xe7, 0x241, /* PAL/SECAM set to 288 lines */
221 static const unsigned char init_common[] = {
222 0xf2, 0x00, /* Disable all outputs */
223 0x33, 0x0d, /* Luma : VIN2, Chroma : CIN
225 0xd8, 0xa8, /* HREF/VREF active high, VREF
226 * pulse = 2, Odd/Even flag */
227 0x20, 0x03, /* IF compensation 0dB/oct */
228 0xe0, 0xff, /* Open up all comparators */
234 0xe6, 0x00, /* Brightness set to 0 */
235 0xe7, 0xe0, /* Contrast to 1.0, noise shaping
236 * 10 to 8 2-bit error diffusion */
237 0xe8, 0xf8, /* YUV422, CbCr binary offset,
239 0xea, 0x18, /* LLC2 connected, output FIFO
240 * reset with VACTintern */
241 0xf0, 0x8a, /* Half full level to 10, bus
242 * shuffler [7:0, 23:16, 15:8] */
243 0xf1, 0x18, /* Single clock, sync mode, no
244 * FE delay, no HLEN counter */
245 0xf8, 0x12, /* Port A, PIXCLK, HF# & FE#
247 0xf9, 0x24, /* Port B, HREF, VREF, PREF &
248 * ALPHA strength to 4 */
251 static const unsigned short init_fp[] = {
253 0xa0, 2070, /* ACC reference */
261 0x4b, 0x298, /* PLL gain */
265 static int vpx3220_init(struct v4l2_subdev *sd, u32 val)
267 struct vpx3220 *decoder = to_vpx3220(sd);
269 vpx3220_write_block(sd, init_common, sizeof(init_common));
270 vpx3220_write_fp_block(sd, init_fp, sizeof(init_fp) >> 1);
271 if (decoder->norm & V4L2_STD_NTSC)
272 vpx3220_write_fp_block(sd, init_ntsc, sizeof(init_ntsc) >> 1);
273 else if (decoder->norm & V4L2_STD_PAL)
274 vpx3220_write_fp_block(sd, init_pal, sizeof(init_pal) >> 1);
275 else if (decoder->norm & V4L2_STD_SECAM)
276 vpx3220_write_fp_block(sd, init_secam, sizeof(init_secam) >> 1);
278 vpx3220_write_fp_block(sd, init_pal, sizeof(init_pal) >> 1);
282 static int vpx3220_status(struct v4l2_subdev *sd, u32 *pstatus, v4l2_std_id *pstd)
284 int res = V4L2_IN_ST_NO_SIGNAL, status;
285 v4l2_std_id std = pstd ? *pstd : V4L2_STD_ALL;
287 status = vpx3220_fp_read(sd, 0x0f3);
289 v4l2_dbg(1, debug, sd, "status: 0x%04x\n", status);
294 if ((status & 0x20) == 0) {
297 switch (status & 0x18) {
306 std &= V4L2_STD_SECAM;
312 std &= V4L2_STD_NTSC;
316 std = V4L2_STD_UNKNOWN;
325 static int vpx3220_querystd(struct v4l2_subdev *sd, v4l2_std_id *std)
327 v4l2_dbg(1, debug, sd, "querystd\n");
328 return vpx3220_status(sd, NULL, std);
331 static int vpx3220_g_input_status(struct v4l2_subdev *sd, u32 *status)
333 v4l2_dbg(1, debug, sd, "g_input_status\n");
334 return vpx3220_status(sd, status, NULL);
337 static int vpx3220_s_std(struct v4l2_subdev *sd, v4l2_std_id std)
339 struct vpx3220 *decoder = to_vpx3220(sd);
342 /* Here we back up the input selection because it gets
343 overwritten when we fill the registers with the
345 temp_input = vpx3220_fp_read(sd, 0xf2);
347 v4l2_dbg(1, debug, sd, "s_std %llx\n", (unsigned long long)std);
348 if (std & V4L2_STD_NTSC) {
349 vpx3220_write_fp_block(sd, init_ntsc, sizeof(init_ntsc) >> 1);
350 v4l2_dbg(1, debug, sd, "norm switched to NTSC\n");
351 } else if (std & V4L2_STD_PAL) {
352 vpx3220_write_fp_block(sd, init_pal, sizeof(init_pal) >> 1);
353 v4l2_dbg(1, debug, sd, "norm switched to PAL\n");
354 } else if (std & V4L2_STD_SECAM) {
355 vpx3220_write_fp_block(sd, init_secam, sizeof(init_secam) >> 1);
356 v4l2_dbg(1, debug, sd, "norm switched to SECAM\n");
363 /* And here we set the backed up video input again */
364 vpx3220_fp_write(sd, 0xf2, temp_input | 0x0010);
369 static int vpx3220_s_routing(struct v4l2_subdev *sd,
370 u32 input, u32 output, u32 config)
374 /* RJ: input = 0: ST8 (PCTV) input
375 input = 1: COMPOSITE input
376 input = 2: SVHS input */
378 static const int input_vals[3][2] = {
387 v4l2_dbg(1, debug, sd, "input switched to %s\n", inputs[input]);
389 vpx3220_write(sd, 0x33, input_vals[input][0]);
391 data = vpx3220_fp_read(sd, 0xf2) & ~(0x0020);
394 /* 0x0010 is required to latch the setting */
395 vpx3220_fp_write(sd, 0xf2,
396 data | (input_vals[input][1] << 5) | 0x0010);
402 static int vpx3220_s_stream(struct v4l2_subdev *sd, int enable)
404 v4l2_dbg(1, debug, sd, "s_stream %s\n", enable ? "on" : "off");
406 vpx3220_write(sd, 0xf2, (enable ? 0x1b : 0x00));
410 static int vpx3220_s_ctrl(struct v4l2_ctrl *ctrl)
412 struct v4l2_subdev *sd = to_sd(ctrl);
415 case V4L2_CID_BRIGHTNESS:
416 vpx3220_write(sd, 0xe6, ctrl->val);
418 case V4L2_CID_CONTRAST:
419 /* Bit 7 and 8 is for noise shaping */
420 vpx3220_write(sd, 0xe7, ctrl->val + 192);
422 case V4L2_CID_SATURATION:
423 vpx3220_fp_write(sd, 0xa0, ctrl->val);
426 vpx3220_fp_write(sd, 0x1c, ctrl->val);
432 /* ----------------------------------------------------------------------- */
434 static const struct v4l2_ctrl_ops vpx3220_ctrl_ops = {
435 .s_ctrl = vpx3220_s_ctrl,
438 static const struct v4l2_subdev_core_ops vpx3220_core_ops = {
439 .init = vpx3220_init,
442 static const struct v4l2_subdev_video_ops vpx3220_video_ops = {
443 .s_std = vpx3220_s_std,
444 .s_routing = vpx3220_s_routing,
445 .s_stream = vpx3220_s_stream,
446 .querystd = vpx3220_querystd,
447 .g_input_status = vpx3220_g_input_status,
450 static const struct v4l2_subdev_ops vpx3220_ops = {
451 .core = &vpx3220_core_ops,
452 .video = &vpx3220_video_ops,
455 /* -----------------------------------------------------------------------
456 * Client management code
459 static int vpx3220_probe(struct i2c_client *client)
461 struct vpx3220 *decoder;
462 struct v4l2_subdev *sd;
463 const char *name = NULL;
467 /* Check if the adapter supports the needed features */
468 if (!i2c_check_functionality(client->adapter,
469 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA))
472 decoder = devm_kzalloc(&client->dev, sizeof(*decoder), GFP_KERNEL);
476 v4l2_i2c_subdev_init(sd, client, &vpx3220_ops);
477 decoder->norm = V4L2_STD_PAL;
480 v4l2_ctrl_handler_init(&decoder->hdl, 4);
481 v4l2_ctrl_new_std(&decoder->hdl, &vpx3220_ctrl_ops,
482 V4L2_CID_BRIGHTNESS, -128, 127, 1, 0);
483 v4l2_ctrl_new_std(&decoder->hdl, &vpx3220_ctrl_ops,
484 V4L2_CID_CONTRAST, 0, 63, 1, 32);
485 v4l2_ctrl_new_std(&decoder->hdl, &vpx3220_ctrl_ops,
486 V4L2_CID_SATURATION, 0, 4095, 1, 2048);
487 v4l2_ctrl_new_std(&decoder->hdl, &vpx3220_ctrl_ops,
488 V4L2_CID_HUE, -512, 511, 1, 0);
489 sd->ctrl_handler = &decoder->hdl;
490 if (decoder->hdl.error) {
491 int err = decoder->hdl.error;
493 v4l2_ctrl_handler_free(&decoder->hdl);
496 v4l2_ctrl_handler_setup(&decoder->hdl);
498 ver = i2c_smbus_read_byte_data(client, 0x00);
499 pn = (i2c_smbus_read_byte_data(client, 0x02) << 8) +
500 i2c_smbus_read_byte_data(client, 0x01);
515 v4l2_info(sd, "%s found @ 0x%x (%s)\n", name,
516 client->addr << 1, client->adapter->name);
518 v4l2_info(sd, "chip (%02x:%04x) found @ 0x%x (%s)\n",
519 ver, pn, client->addr << 1, client->adapter->name);
521 vpx3220_write_block(sd, init_common, sizeof(init_common));
522 vpx3220_write_fp_block(sd, init_fp, sizeof(init_fp) >> 1);
524 vpx3220_write_fp_block(sd, init_pal, sizeof(init_pal) >> 1);
528 static void vpx3220_remove(struct i2c_client *client)
530 struct v4l2_subdev *sd = i2c_get_clientdata(client);
531 struct vpx3220 *decoder = to_vpx3220(sd);
533 v4l2_device_unregister_subdev(sd);
534 v4l2_ctrl_handler_free(&decoder->hdl);
537 static const struct i2c_device_id vpx3220_id[] = {
543 MODULE_DEVICE_TABLE(i2c, vpx3220_id);
545 static struct i2c_driver vpx3220_driver = {
549 .probe_new = vpx3220_probe,
550 .remove = vpx3220_remove,
551 .id_table = vpx3220_id,
554 module_i2c_driver(vpx3220_driver);