drivers/media/i2c/ov5675.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 // Copyright (c) 2019 Intel Corporation.
   3
   4 #include <asm/unaligned.h>
   5 #include <linux/acpi.h>
   6 #include <linux/clk.h>
   7 #include <linux/delay.h>
   8 #include <linux/gpio/consumer.h>
   9 #include <linux/i2c.h>
  10 #include <linux/mod_devicetable.h>
  11 #include <linux/module.h>
  12 #include <linux/pm_runtime.h>
  13 #include <linux/regulator/consumer.h>
  14 #include <media/v4l2-ctrls.h>
  15 #include <media/v4l2-device.h>
  16 #include <media/v4l2-fwnode.h>
  17
  18 #define OV5675_REG_VALUE_08BIT          1
  19 #define OV5675_REG_VALUE_16BIT          2
  20 #define OV5675_REG_VALUE_24BIT          3
  21
  22 #define OV5675_LINK_FREQ_450MHZ         450000000ULL
  23 #define OV5675_SCLK                     90000000LL
  24 #define OV5675_XVCLK_19_2               19200000
  25 #define OV5675_DATA_LANES               2
  26 #define OV5675_RGB_DEPTH                10
  27
  28 #define OV5675_REG_CHIP_ID              0x300a
  29 #define OV5675_CHIP_ID                  0x5675
  30
  31 #define OV5675_REG_MODE_SELECT          0x0100
  32 #define OV5675_MODE_STANDBY             0x00
  33 #define OV5675_MODE_STREAMING           0x01
  34
  35 /* vertical-timings from sensor */
  36 #define OV5675_REG_VTS                  0x380e
  37 #define OV5675_VTS_30FPS                0x07e4
  38 #define OV5675_VTS_30FPS_MIN            0x07e4
  39 #define OV5675_VTS_MAX                  0x7fff
  40
  41 /* horizontal-timings from sensor */
  42 #define OV5675_REG_HTS                  0x380c
  43
  44 /* Exposure controls from sensor */
  45 #define OV5675_REG_EXPOSURE             0x3500
  46 #define OV5675_EXPOSURE_MIN             4
  47 #define OV5675_EXPOSURE_MAX_MARGIN      4
  48 #define OV5675_EXPOSURE_STEP            1
  49
  50 /* Analog gain controls from sensor */
  51 #define OV5675_REG_ANALOG_GAIN          0x3508
  52 #define OV5675_ANAL_GAIN_MIN            128
  53 #define OV5675_ANAL_GAIN_MAX            2047
  54 #define OV5675_ANAL_GAIN_STEP           1
  55
  56 /* Digital gain controls from sensor */
  57 #define OV5675_REG_DIGITAL_GAIN         0x350a
  58 #define OV5675_REG_MWB_R_GAIN           0x5019
  59 #define OV5675_REG_MWB_G_GAIN           0x501b
  60 #define OV5675_REG_MWB_B_GAIN           0x501d
  61 #define OV5675_DGTL_GAIN_MIN            1024
  62 #define OV5675_DGTL_GAIN_MAX            4095
  63 #define OV5675_DGTL_GAIN_STEP           1
  64 #define OV5675_DGTL_GAIN_DEFAULT        1024
  65
  66 /* Group Access */
  67 #define OV5675_REG_GROUP_ACCESS         0x3208
  68 #define OV5675_GROUP_HOLD_START         0x0
  69 #define OV5675_GROUP_HOLD_END           0x10
  70 #define OV5675_GROUP_HOLD_LAUNCH        0xa0
  71
  72 /* Test Pattern Control */
  73 #define OV5675_REG_TEST_PATTERN         0x4503
  74 #define OV5675_TEST_PATTERN_ENABLE      BIT(7)
  75 #define OV5675_TEST_PATTERN_BAR_SHIFT   2
  76
  77 /* Flip Mirror Controls from sensor */
  78 #define OV5675_REG_FORMAT1              0x3820
  79 #define OV5675_REG_FORMAT2              0x373d
  80
  81 #define to_ov5675(_sd)                  container_of(_sd, struct ov5675, sd)
  82
  83 static const char * const ov5675_supply_names[] = {
  84         "avdd",         /* Analog power */
  85         "dovdd",        /* Digital I/O power */
  86         "dvdd",         /* Digital core power */
  87 };
  88
  89 #define OV5675_NUM_SUPPLIES     ARRAY_SIZE(ov5675_supply_names)
  90
  91 enum {
  92         OV5675_LINK_FREQ_900MBPS,
  93 };
  94
  95 struct ov5675_reg {
  96         u16 address;
  97         u8 val;
  98 };
  99
 100 struct ov5675_reg_list {
 101         u32 num_of_regs;
 102         const struct ov5675_reg *regs;
 103 };
 104
 105 struct ov5675_link_freq_config {
 106         const struct ov5675_reg_list reg_list;
 107 };
 108
 109 struct ov5675_mode {
 110         /* Frame width in pixels */
 111         u32 width;
 112
 113         /* Frame height in pixels */
 114         u32 height;
 115
 116         /* Horizontal timining size */
 117         u32 hts;
 118
 119         /* Default vertical timining size */
 120         u32 vts_def;
 121
 122         /* Min vertical timining size */
 123         u32 vts_min;
 124
 125         /* Link frequency needed for this resolution */
 126         u32 link_freq_index;
 127
 128         /* Sensor register settings for this resolution */
 129         const struct ov5675_reg_list reg_list;
 130 };
 131
 132 static const struct ov5675_reg mipi_data_rate_900mbps[] = {
 133         {0x0103, 0x01},
 134         {0x0100, 0x00},
 135         {0x0300, 0x04},
 136         {0x0302, 0x8d},
 137         {0x0303, 0x00},
 138         {0x030d, 0x26},
 139 };
 140
 141 static const struct ov5675_reg mode_2592x1944_regs[] = {
 142         {0x3002, 0x21},
 143         {0x3107, 0x23},
 144         {0x3501, 0x20},
 145         {0x3503, 0x0c},
 146         {0x3508, 0x03},
 147         {0x3509, 0x00},
 148         {0x3600, 0x66},
 149         {0x3602, 0x30},
 150         {0x3610, 0xa5},
 151         {0x3612, 0x93},
 152         {0x3620, 0x80},
 153         {0x3642, 0x0e},
 154         {0x3661, 0x00},
 155         {0x3662, 0x10},
 156         {0x3664, 0xf3},
 157         {0x3665, 0x9e},
 158         {0x3667, 0xa5},
 159         {0x366e, 0x55},
 160         {0x366f, 0x55},
 161         {0x3670, 0x11},
 162         {0x3671, 0x11},
 163         {0x3672, 0x11},
 164         {0x3673, 0x11},
 165         {0x3714, 0x24},
 166         {0x371a, 0x3e},
 167         {0x3733, 0x10},
 168         {0x3734, 0x00},
 169         {0x373d, 0x24},
 170         {0x3764, 0x20},
 171         {0x3765, 0x20},
 172         {0x3766, 0x12},
 173         {0x37a1, 0x14},
 174         {0x37a8, 0x1c},
 175         {0x37ab, 0x0f},
 176         {0x37c2, 0x04},
 177         {0x37cb, 0x00},
 178         {0x37cc, 0x00},
 179         {0x37cd, 0x00},
 180         {0x37ce, 0x00},
 181         {0x37d8, 0x02},
 182         {0x37d9, 0x08},
 183         {0x37dc, 0x04},
 184         {0x3800, 0x00},
 185         {0x3801, 0x00},
 186         {0x3802, 0x00},
 187         {0x3803, 0x04},
 188         {0x3804, 0x0a},
 189         {0x3805, 0x3f},
 190         {0x3806, 0x07},
 191         {0x3807, 0xb3},
 192         {0x3808, 0x0a},
 193         {0x3809, 0x20},
 194         {0x380a, 0x07},
 195         {0x380b, 0x98},
 196         {0x380c, 0x02},
 197         {0x380d, 0xee},
 198         {0x380e, 0x07},
 199         {0x380f, 0xe4},
 200         {0x3811, 0x10},
 201         {0x3813, 0x0d},
 202         {0x3814, 0x01},
 203         {0x3815, 0x01},
 204         {0x3816, 0x01},
 205         {0x3817, 0x01},
 206         {0x381e, 0x02},
 207         {0x3820, 0x88},
 208         {0x3821, 0x01},
 209         {0x3832, 0x04},
 210         {0x3c80, 0x01},
 211         {0x3c82, 0x00},
 212         {0x3c83, 0xc8},
 213         {0x3c8c, 0x0f},
 214         {0x3c8d, 0xa0},
 215         {0x3c90, 0x07},
 216         {0x3c91, 0x00},
 217         {0x3c92, 0x00},
 218         {0x3c93, 0x00},
 219         {0x3c94, 0xd0},
 220         {0x3c95, 0x50},
 221         {0x3c96, 0x35},
 222         {0x3c97, 0x00},
 223         {0x4001, 0xe0},
 224         {0x4008, 0x02},
 225         {0x4009, 0x0d},
 226         {0x400f, 0x80},
 227         {0x4013, 0x02},
 228         {0x4040, 0x00},
 229         {0x4041, 0x07},
 230         {0x404c, 0x50},
 231         {0x404e, 0x20},
 232         {0x4500, 0x06},
 233         {0x4503, 0x00},
 234         {0x450a, 0x04},
 235         {0x4809, 0x04},
 236         {0x480c, 0x12},
 237         {0x4819, 0x70},
 238         {0x4825, 0x32},
 239         {0x4826, 0x32},
 240         {0x482a, 0x06},
 241         {0x4833, 0x08},
 242         {0x4837, 0x0d},
 243         {0x5000, 0x77},
 244         {0x5b00, 0x01},
 245         {0x5b01, 0x10},
 246         {0x5b02, 0x01},
 247         {0x5b03, 0xdb},
 248         {0x5b05, 0x6c},
 249         {0x5e10, 0xfc},
 250         {0x3500, 0x00},
 251         {0x3501, 0x3E},
 252         {0x3502, 0x60},
 253         {0x3503, 0x08},
 254         {0x3508, 0x04},
 255         {0x3509, 0x00},
 256         {0x3832, 0x48},
 257         {0x5780, 0x3e},
 258         {0x5781, 0x0f},
 259         {0x5782, 0x44},
 260         {0x5783, 0x02},
 261         {0x5784, 0x01},
 262         {0x5785, 0x01},
 263         {0x5786, 0x00},
 264         {0x5787, 0x04},
 265         {0x5788, 0x02},
 266         {0x5789, 0x0f},
 267         {0x578a, 0xfd},
 268         {0x578b, 0xf5},
 269         {0x578c, 0xf5},
 270         {0x578d, 0x03},
 271         {0x578e, 0x08},
 272         {0x578f, 0x0c},
 273         {0x5790, 0x08},
 274         {0x5791, 0x06},
 275         {0x5792, 0x00},
 276         {0x5793, 0x52},
 277         {0x5794, 0xa3},
 278         {0x4003, 0x40},
 279         {0x3107, 0x01},
 280         {0x3c80, 0x08},
 281         {0x3c83, 0xb1},
 282         {0x3c8c, 0x10},
 283         {0x3c8d, 0x00},
 284         {0x3c90, 0x00},
 285         {0x3c94, 0x00},
 286         {0x3c95, 0x00},
 287         {0x3c96, 0x00},
 288         {0x37cb, 0x09},
 289         {0x37cc, 0x15},
 290         {0x37cd, 0x1f},
 291         {0x37ce, 0x1f},
 292 };
 293
 294 static const struct ov5675_reg mode_1296x972_regs[] = {
 295         {0x3002, 0x21},
 296         {0x3107, 0x23},
 297         {0x3501, 0x20},
 298         {0x3503, 0x0c},
 299         {0x3508, 0x03},
 300         {0x3509, 0x00},
 301         {0x3600, 0x66},
 302         {0x3602, 0x30},
 303         {0x3610, 0xa5},
 304         {0x3612, 0x93},
 305         {0x3620, 0x80},
 306         {0x3642, 0x0e},
 307         {0x3661, 0x00},
 308         {0x3662, 0x08},
 309         {0x3664, 0xf3},
 310         {0x3665, 0x9e},
 311         {0x3667, 0xa5},
 312         {0x366e, 0x55},
 313         {0x366f, 0x55},
 314         {0x3670, 0x11},
 315         {0x3671, 0x11},
 316         {0x3672, 0x11},
 317         {0x3673, 0x11},
 318         {0x3714, 0x28},
 319         {0x371a, 0x3e},
 320         {0x3733, 0x10},
 321         {0x3734, 0x00},
 322         {0x373d, 0x24},
 323         {0x3764, 0x20},
 324         {0x3765, 0x20},
 325         {0x3766, 0x12},
 326         {0x37a1, 0x14},
 327         {0x37a8, 0x1c},
 328         {0x37ab, 0x0f},
 329         {0x37c2, 0x14},
 330         {0x37cb, 0x00},
 331         {0x37cc, 0x00},
 332         {0x37cd, 0x00},
 333         {0x37ce, 0x00},
 334         {0x37d8, 0x02},
 335         {0x37d9, 0x04},
 336         {0x37dc, 0x04},
 337         {0x3800, 0x00},
 338         {0x3801, 0x00},
 339         {0x3802, 0x00},
 340         {0x3803, 0x00},
 341         {0x3804, 0x0a},
 342         {0x3805, 0x3f},
 343         {0x3806, 0x07},
 344         {0x3807, 0xb7},
 345         {0x3808, 0x05},
 346         {0x3809, 0x10},
 347         {0x380a, 0x03},
 348         {0x380b, 0xcc},
 349         {0x380c, 0x02},
 350         {0x380d, 0xee},
 351         {0x380e, 0x07},
 352         {0x380f, 0xd0},
 353         {0x3811, 0x08},
 354         {0x3813, 0x0d},
 355         {0x3814, 0x03},
 356         {0x3815, 0x01},
 357         {0x3816, 0x03},
 358         {0x3817, 0x01},
 359         {0x381e, 0x02},
 360         {0x3820, 0x8b},
 361         {0x3821, 0x01},
 362         {0x3832, 0x04},
 363         {0x3c80, 0x01},
 364         {0x3c82, 0x00},
 365         {0x3c83, 0xc8},
 366         {0x3c8c, 0x0f},
 367         {0x3c8d, 0xa0},
 368         {0x3c90, 0x07},
 369         {0x3c91, 0x00},
 370         {0x3c92, 0x00},
 371         {0x3c93, 0x00},
 372         {0x3c94, 0xd0},
 373         {0x3c95, 0x50},
 374         {0x3c96, 0x35},
 375         {0x3c97, 0x00},
 376         {0x4001, 0xe0},
 377         {0x4008, 0x00},
 378         {0x4009, 0x07},
 379         {0x400f, 0x80},
 380         {0x4013, 0x02},
 381         {0x4040, 0x00},
 382         {0x4041, 0x03},
 383         {0x404c, 0x50},
 384         {0x404e, 0x20},
 385         {0x4500, 0x06},
 386         {0x4503, 0x00},
 387         {0x450a, 0x04},
 388         {0x4809, 0x04},
 389         {0x480c, 0x12},
 390         {0x4819, 0x70},
 391         {0x4825, 0x32},
 392         {0x4826, 0x32},
 393         {0x482a, 0x06},
 394         {0x4833, 0x08},
 395         {0x4837, 0x0d},
 396         {0x5000, 0x77},
 397         {0x5b00, 0x01},
 398         {0x5b01, 0x10},
 399         {0x5b02, 0x01},
 400         {0x5b03, 0xdb},
 401         {0x5b05, 0x6c},
 402         {0x5e10, 0xfc},
 403         {0x3500, 0x00},
 404         {0x3501, 0x1F},
 405         {0x3502, 0x20},
 406         {0x3503, 0x08},
 407         {0x3508, 0x04},
 408         {0x3509, 0x00},
 409         {0x3832, 0x48},
 410         {0x5780, 0x3e},
 411         {0x5781, 0x0f},
 412         {0x5782, 0x44},
 413         {0x5783, 0x02},
 414         {0x5784, 0x01},
 415         {0x5785, 0x01},
 416         {0x5786, 0x00},
 417         {0x5787, 0x04},
 418         {0x5788, 0x02},
 419         {0x5789, 0x0f},
 420         {0x578a, 0xfd},
 421         {0x578b, 0xf5},
 422         {0x578c, 0xf5},
 423         {0x578d, 0x03},
 424         {0x578e, 0x08},
 425         {0x578f, 0x0c},
 426         {0x5790, 0x08},
 427         {0x5791, 0x06},
 428         {0x5792, 0x00},
 429         {0x5793, 0x52},
 430         {0x5794, 0xa3},
 431         {0x4003, 0x40},
 432         {0x3107, 0x01},
 433         {0x3c80, 0x08},
 434         {0x3c83, 0xb1},
 435         {0x3c8c, 0x10},
 436         {0x3c8d, 0x00},
 437         {0x3c90, 0x00},
 438         {0x3c94, 0x00},
 439         {0x3c95, 0x00},
 440         {0x3c96, 0x00},
 441         {0x37cb, 0x09},
 442         {0x37cc, 0x15},
 443         {0x37cd, 0x1f},
 444         {0x37ce, 0x1f},
 445 };
 446
 447 static const char * const ov5675_test_pattern_menu[] = {
 448         "Disabled",
 449         "Standard Color Bar",
 450         "Top-Bottom Darker Color Bar",
 451         "Right-Left Darker Color Bar",
 452         "Bottom-Top Darker Color Bar"
 453 };
 454
 455 static const s64 link_freq_menu_items[] = {
 456         OV5675_LINK_FREQ_450MHZ,
 457 };
 458
 459 static const struct ov5675_link_freq_config link_freq_configs[] = {
 460         [OV5675_LINK_FREQ_900MBPS] = {
 461                 .reg_list = {
 462                         .num_of_regs = ARRAY_SIZE(mipi_data_rate_900mbps),
 463                         .regs = mipi_data_rate_900mbps,
 464                 }
 465         }
 466 };
 467
 468 static const struct ov5675_mode supported_modes[] = {
 469         {
 470                 .width = 2592,
 471                 .height = 1944,
 472                 .hts = 1500,
 473                 .vts_def = OV5675_VTS_30FPS,
 474                 .vts_min = OV5675_VTS_30FPS_MIN,
 475                 .reg_list = {
 476                         .num_of_regs = ARRAY_SIZE(mode_2592x1944_regs),
 477                         .regs = mode_2592x1944_regs,
 478                 },
 479                 .link_freq_index = OV5675_LINK_FREQ_900MBPS,
 480         },
 481         {
 482                 .width = 1296,
 483                 .height = 972,
 484                 .hts = 1500,
 485                 .vts_def = OV5675_VTS_30FPS,
 486                 .vts_min = OV5675_VTS_30FPS_MIN,
 487                 .reg_list = {
 488                         .num_of_regs = ARRAY_SIZE(mode_1296x972_regs),
 489                         .regs = mode_1296x972_regs,
 490                 },
 491                 .link_freq_index = OV5675_LINK_FREQ_900MBPS,
 492         }
 493 };
 494
 495 struct ov5675 {
 496         struct v4l2_subdev sd;
 497         struct media_pad pad;
 498         struct v4l2_ctrl_handler ctrl_handler;
 499         struct clk *xvclk;
 500         struct gpio_desc *reset_gpio;
 501         struct regulator_bulk_data supplies[OV5675_NUM_SUPPLIES];
 502
 503         /* V4L2 Controls */
 504         struct v4l2_ctrl *link_freq;
 505         struct v4l2_ctrl *pixel_rate;
 506         struct v4l2_ctrl *vblank;
 507         struct v4l2_ctrl *hblank;
 508         struct v4l2_ctrl *exposure;
 509
 510         /* Current mode */
 511         const struct ov5675_mode *cur_mode;
 512
 513         /* To serialize asynchronus callbacks */
 514         struct mutex mutex;
 515
 516         /* Streaming on/off */
 517         bool streaming;
 518
 519         /* True if the device has been identified */
 520         bool identified;
 521 };
 522
 523 static u64 to_pixel_rate(u32 f_index)
 524 {
 525         u64 pixel_rate = link_freq_menu_items[f_index] * 2 * OV5675_DATA_LANES;
 526
 527         do_div(pixel_rate, OV5675_RGB_DEPTH);
 528
 529         return pixel_rate;
 530 }
 531
 532 static u64 to_pixels_per_line(u32 hts, u32 f_index)
 533 {
 534         u64 ppl = hts * to_pixel_rate(f_index);
 535
 536         do_div(ppl, OV5675_SCLK);
 537
 538         return ppl;
 539 }
 540
 541 static int ov5675_read_reg(struct ov5675 *ov5675, u16 reg, u16 len, u32 *val)
 542 {
 543         struct i2c_client *client = v4l2_get_subdevdata(&ov5675->sd);
 544         struct i2c_msg msgs[2];
 545         u8 addr_buf[2];
 546         u8 data_buf[4] = {0};
 547         int ret;
 548
 549         if (len > 4)
 550                 return -EINVAL;
 551
 552         put_unaligned_be16(reg, addr_buf);
 553         msgs[0].addr = client->addr;
 554         msgs[0].flags = 0;
 555         msgs[0].len = sizeof(addr_buf);
 556         msgs[0].buf = addr_buf;
 557         msgs[1].addr = client->addr;
 558         msgs[1].flags = I2C_M_RD;
 559         msgs[1].len = len;
 560         msgs[1].buf = &data_buf[4 - len];
 561
 562         ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
 563         if (ret != ARRAY_SIZE(msgs))
 564                 return -EIO;
 565
 566         *val = get_unaligned_be32(data_buf);
 567
 568         return 0;
 569 }
 570
 571 static int ov5675_write_reg(struct ov5675 *ov5675, u16 reg, u16 len, u32 val)
 572 {
 573         struct i2c_client *client = v4l2_get_subdevdata(&ov5675->sd);
 574         u8 buf[6];
 575
 576         if (len > 4)
 577                 return -EINVAL;
 578
 579         put_unaligned_be16(reg, buf);
 580         put_unaligned_be32(val << 8 * (4 - len), buf + 2);
 581         if (i2c_master_send(client, buf, len + 2) != len + 2)
 582                 return -EIO;
 583
 584         return 0;
 585 }
 586
 587 static int ov5675_write_reg_list(struct ov5675 *ov5675,
 588                                  const struct ov5675_reg_list *r_list)
 589 {
 590         struct i2c_client *client = v4l2_get_subdevdata(&ov5675->sd);
 591         unsigned int i;
 592         int ret;
 593
 594         for (i = 0; i < r_list->num_of_regs; i++) {
 595                 ret = ov5675_write_reg(ov5675, r_list->regs[i].address, 1,
 596                                        r_list->regs[i].val);
 597                 if (ret) {
 598                         dev_err_ratelimited(&client->dev,
 599                                     "failed to write reg 0x%4.4x. error = %d",
 600                                     r_list->regs[i].address, ret);
 601                         return ret;
 602                 }
 603         }
 604
 605         return 0;
 606 }
 607
 608 static int ov5675_update_digital_gain(struct ov5675 *ov5675, u32 d_gain)
 609 {
 610         int ret;
 611
 612         ret = ov5675_write_reg(ov5675, OV5675_REG_GROUP_ACCESS,
 613                                OV5675_REG_VALUE_08BIT,
 614                                OV5675_GROUP_HOLD_START);
 615         if (ret)
 616                 return ret;
 617
 618         ret = ov5675_write_reg(ov5675, OV5675_REG_MWB_R_GAIN,
 619                                OV5675_REG_VALUE_16BIT, d_gain);
 620         if (ret)
 621                 return ret;
 622
 623         ret = ov5675_write_reg(ov5675, OV5675_REG_MWB_G_GAIN,
 624                                OV5675_REG_VALUE_16BIT, d_gain);
 625         if (ret)
 626                 return ret;
 627
 628         ret = ov5675_write_reg(ov5675, OV5675_REG_MWB_B_GAIN,
 629                                OV5675_REG_VALUE_16BIT, d_gain);
 630         if (ret)
 631                 return ret;
 632
 633         ret = ov5675_write_reg(ov5675, OV5675_REG_GROUP_ACCESS,
 634                                OV5675_REG_VALUE_08BIT,
 635                                OV5675_GROUP_HOLD_END);
 636         if (ret)
 637                 return ret;
 638
 639         ret = ov5675_write_reg(ov5675, OV5675_REG_GROUP_ACCESS,
 640                                OV5675_REG_VALUE_08BIT,
 641                                OV5675_GROUP_HOLD_LAUNCH);
 642         return ret;
 643 }
 644
 645 static int ov5675_test_pattern(struct ov5675 *ov5675, u32 pattern)
 646 {
 647         if (pattern)
 648                 pattern = (pattern - 1) << OV5675_TEST_PATTERN_BAR_SHIFT |
 649                           OV5675_TEST_PATTERN_ENABLE;
 650
 651         return ov5675_write_reg(ov5675, OV5675_REG_TEST_PATTERN,
 652                                 OV5675_REG_VALUE_08BIT, pattern);
 653 }
 654
 655 /*
 656  * OV5675 supports keeping the pixel order by mirror and flip function
 657  * The Bayer order isn't affected by the flip controls
 658  */
 659 static int ov5675_set_ctrl_hflip(struct ov5675 *ov5675, u32 ctrl_val)
 660 {
 661         int ret;
 662         u32 val;
 663
 664         ret = ov5675_read_reg(ov5675, OV5675_REG_FORMAT1,
 665                               OV5675_REG_VALUE_08BIT, &val);
 666         if (ret)
 667                 return ret;
 668
 669         return ov5675_write_reg(ov5675, OV5675_REG_FORMAT1,
 670                                 OV5675_REG_VALUE_08BIT,
 671                                 ctrl_val ? val & ~BIT(3) : val | BIT(3));
 672 }
 673
 674 static int ov5675_set_ctrl_vflip(struct ov5675 *ov5675, u8 ctrl_val)
 675 {
 676         int ret;
 677         u32 val;
 678
 679         ret = ov5675_read_reg(ov5675, OV5675_REG_FORMAT1,
 680                               OV5675_REG_VALUE_08BIT, &val);
 681         if (ret)
 682                 return ret;
 683
 684         ret = ov5675_write_reg(ov5675, OV5675_REG_FORMAT1,
 685                                OV5675_REG_VALUE_08BIT,
 686                                ctrl_val ? val | BIT(4) | BIT(5)  : val & ~BIT(4) & ~BIT(5));
 687
 688         if (ret)
 689                 return ret;
 690
 691         ret = ov5675_read_reg(ov5675, OV5675_REG_FORMAT2,
 692                               OV5675_REG_VALUE_08BIT, &val);
 693
 694         if (ret)
 695                 return ret;
 696
 697         return ov5675_write_reg(ov5675, OV5675_REG_FORMAT2,
 698                                 OV5675_REG_VALUE_08BIT,
 699                                 ctrl_val ? val | BIT(1) : val & ~BIT(1));
 700 }
 701
 702 static int ov5675_set_ctrl(struct v4l2_ctrl *ctrl)
 703 {
 704         struct ov5675 *ov5675 = container_of(ctrl->handler,
 705                                              struct ov5675, ctrl_handler);
 706         struct i2c_client *client = v4l2_get_subdevdata(&ov5675->sd);
 707         s64 exposure_max;
 708         int ret = 0;
 709
 710         /* Propagate change of current control to all related controls */
 711         if (ctrl->id == V4L2_CID_VBLANK) {
 712                 /* Update max exposure while meeting expected vblanking */
 713                 exposure_max = ov5675->cur_mode->height + ctrl->val -
 714                         OV5675_EXPOSURE_MAX_MARGIN;
 715                 __v4l2_ctrl_modify_range(ov5675->exposure,
 716                                          ov5675->exposure->minimum,
 717                                          exposure_max, ov5675->exposure->step,
 718                                          exposure_max);
 719         }
 720
 721         /* V4L2 controls values will be applied only when power is already up */
 722         if (!pm_runtime_get_if_in_use(&client->dev))
 723                 return 0;
 724
 725         switch (ctrl->id) {
 726         case V4L2_CID_ANALOGUE_GAIN:
 727                 ret = ov5675_write_reg(ov5675, OV5675_REG_ANALOG_GAIN,
 728                                        OV5675_REG_VALUE_16BIT, ctrl->val);
 729                 break;
 730
 731         case V4L2_CID_DIGITAL_GAIN:
 732                 ret = ov5675_update_digital_gain(ov5675, ctrl->val);
 733                 break;
 734
 735         case V4L2_CID_EXPOSURE:
 736                 /* 4 least significant bits of expsoure are fractional part
 737                  * val = val << 4
 738                  * for ov5675, the unit of exposure is differnt from other
 739                  * OmniVision sensors, its exposure value is twice of the
 740                  * register value, the exposure should be divided by 2 before
 741                  * set register, e.g. val << 3.
 742                  */
 743                 ret = ov5675_write_reg(ov5675, OV5675_REG_EXPOSURE,
 744                                        OV5675_REG_VALUE_24BIT, ctrl->val << 3);
 745                 break;
 746
 747         case V4L2_CID_VBLANK:
 748                 ret = ov5675_write_reg(ov5675, OV5675_REG_VTS,
 749                                        OV5675_REG_VALUE_16BIT,
 750                                        ov5675->cur_mode->height + ctrl->val +
 751                                        10);
 752                 break;
 753
 754         case V4L2_CID_TEST_PATTERN:
 755                 ret = ov5675_test_pattern(ov5675, ctrl->val);
 756                 break;
 757
 758         case V4L2_CID_HFLIP:
 759                 ov5675_set_ctrl_hflip(ov5675, ctrl->val);
 760                 break;
 761
 762         case V4L2_CID_VFLIP:
 763                 ov5675_set_ctrl_vflip(ov5675, ctrl->val);
 764                 break;
 765
 766         default:
 767                 ret = -EINVAL;
 768                 break;
 769         }
 770
 771         pm_runtime_put(&client->dev);
 772
 773         return ret;
 774 }
 775
 776 static const struct v4l2_ctrl_ops ov5675_ctrl_ops = {
 777         .s_ctrl = ov5675_set_ctrl,
 778 };
 779
 780 static int ov5675_init_controls(struct ov5675 *ov5675)
 781 {
 782         struct i2c_client *client = v4l2_get_subdevdata(&ov5675->sd);
 783         struct v4l2_fwnode_device_properties props;
 784         struct v4l2_ctrl_handler *ctrl_hdlr;
 785         s64 exposure_max, h_blank;
 786         int ret;
 787
 788         ctrl_hdlr = &ov5675->ctrl_handler;
 789         ret = v4l2_ctrl_handler_init(ctrl_hdlr, 10);
 790         if (ret)
 791                 return ret;
 792
 793         ctrl_hdlr->lock = &ov5675->mutex;
 794         ov5675->link_freq = v4l2_ctrl_new_int_menu(ctrl_hdlr, &ov5675_ctrl_ops,
 795                                            V4L2_CID_LINK_FREQ,
 796                                            ARRAY_SIZE(link_freq_menu_items) - 1,
 797                                            0, link_freq_menu_items);
 798         if (ov5675->link_freq)
 799                 ov5675->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
 800
 801         ov5675->pixel_rate = v4l2_ctrl_new_std(ctrl_hdlr, &ov5675_ctrl_ops,
 802                                        V4L2_CID_PIXEL_RATE, 0,
 803                                        to_pixel_rate(OV5675_LINK_FREQ_900MBPS),
 804                                        1,
 805                                        to_pixel_rate(OV5675_LINK_FREQ_900MBPS));
 806         ov5675->vblank = v4l2_ctrl_new_std(ctrl_hdlr, &ov5675_ctrl_ops,
 807                           V4L2_CID_VBLANK,
 808                           ov5675->cur_mode->vts_min - ov5675->cur_mode->height,
 809                           OV5675_VTS_MAX - ov5675->cur_mode->height, 1,
 810                           ov5675->cur_mode->vts_def - ov5675->cur_mode->height);
 811         h_blank = to_pixels_per_line(ov5675->cur_mode->hts,
 812                   ov5675->cur_mode->link_freq_index) - ov5675->cur_mode->width;
 813         ov5675->hblank = v4l2_ctrl_new_std(ctrl_hdlr, &ov5675_ctrl_ops,
 814                                            V4L2_CID_HBLANK, h_blank, h_blank, 1,
 815                                            h_blank);
 816         if (ov5675->hblank)
 817                 ov5675->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
 818
 819         v4l2_ctrl_new_std(ctrl_hdlr, &ov5675_ctrl_ops, V4L2_CID_ANALOGUE_GAIN,
 820                           OV5675_ANAL_GAIN_MIN, OV5675_ANAL_GAIN_MAX,
 821                           OV5675_ANAL_GAIN_STEP, OV5675_ANAL_GAIN_MIN);
 822         v4l2_ctrl_new_std(ctrl_hdlr, &ov5675_ctrl_ops, V4L2_CID_DIGITAL_GAIN,
 823                           OV5675_DGTL_GAIN_MIN, OV5675_DGTL_GAIN_MAX,
 824                           OV5675_DGTL_GAIN_STEP, OV5675_DGTL_GAIN_DEFAULT);
 825         exposure_max = (ov5675->cur_mode->vts_def - OV5675_EXPOSURE_MAX_MARGIN);
 826         ov5675->exposure = v4l2_ctrl_new_std(ctrl_hdlr, &ov5675_ctrl_ops,
 827                                              V4L2_CID_EXPOSURE,
 828                                              OV5675_EXPOSURE_MIN, exposure_max,
 829                                              OV5675_EXPOSURE_STEP,
 830                                              exposure_max);
 831         v4l2_ctrl_new_std_menu_items(ctrl_hdlr, &ov5675_ctrl_ops,
 832                                      V4L2_CID_TEST_PATTERN,
 833                                      ARRAY_SIZE(ov5675_test_pattern_menu) - 1,
 834                                      0, 0, ov5675_test_pattern_menu);
 835         v4l2_ctrl_new_std(ctrl_hdlr, &ov5675_ctrl_ops,
 836                           V4L2_CID_HFLIP, 0, 1, 1, 0);
 837         v4l2_ctrl_new_std(ctrl_hdlr, &ov5675_ctrl_ops,
 838                           V4L2_CID_VFLIP, 0, 1, 1, 0);
 839
 840         if (ctrl_hdlr->error) {
 841                 v4l2_ctrl_handler_free(ctrl_hdlr);
 842                 return ctrl_hdlr->error;
 843         }
 844
 845         ret = v4l2_fwnode_device_parse(&client->dev, &props);
 846         if (ret)
 847                 goto error;
 848
 849         ret = v4l2_ctrl_new_fwnode_properties(ctrl_hdlr, &ov5675_ctrl_ops,
 850                                               &props);
 851         if (ret)
 852                 goto error;
 853
 854         ov5675->sd.ctrl_handler = ctrl_hdlr;
 855
 856         return 0;
 857
 858 error:
 859         v4l2_ctrl_handler_free(ctrl_hdlr);
 860
 861         return ret;
 862 }
 863
 864 static void ov5675_update_pad_format(const struct ov5675_mode *mode,
 865                                      struct v4l2_mbus_framefmt *fmt)
 866 {
 867         fmt->width = mode->width;
 868         fmt->height = mode->height;
 869         fmt->code = MEDIA_BUS_FMT_SGRBG10_1X10;
 870         fmt->field = V4L2_FIELD_NONE;
 871 }
 872
 873 static int ov5675_identify_module(struct ov5675 *ov5675)
 874 {
 875         struct i2c_client *client = v4l2_get_subdevdata(&ov5675->sd);
 876         int ret;
 877         u32 val;
 878
 879         if (ov5675->identified)
 880                 return 0;
 881
 882         ret = ov5675_read_reg(ov5675, OV5675_REG_CHIP_ID,
 883                               OV5675_REG_VALUE_24BIT, &val);
 884         if (ret)
 885                 return ret;
 886
 887         if (val != OV5675_CHIP_ID) {
 888                 dev_err(&client->dev, "chip id mismatch: %x!=%x",
 889                         OV5675_CHIP_ID, val);
 890                 return -ENXIO;
 891         }
 892
 893         ov5675->identified = true;
 894
 895         return 0;
 896 }
 897
 898 static int ov5675_start_streaming(struct ov5675 *ov5675)
 899 {
 900         struct i2c_client *client = v4l2_get_subdevdata(&ov5675->sd);
 901         const struct ov5675_reg_list *reg_list;
 902         int link_freq_index, ret;
 903
 904         ret = ov5675_identify_module(ov5675);
 905         if (ret)
 906                 return ret;
 907
 908         link_freq_index = ov5675->cur_mode->link_freq_index;
 909         reg_list = &link_freq_configs[link_freq_index].reg_list;
 910         ret = ov5675_write_reg_list(ov5675, reg_list);
 911         if (ret) {
 912                 dev_err(&client->dev, "failed to set plls");
 913                 return ret;
 914         }
 915
 916         reg_list = &ov5675->cur_mode->reg_list;
 917         ret = ov5675_write_reg_list(ov5675, reg_list);
 918         if (ret) {
 919                 dev_err(&client->dev, "failed to set mode");
 920                 return ret;
 921         }
 922
 923         ret = __v4l2_ctrl_handler_setup(ov5675->sd.ctrl_handler);
 924         if (ret)
 925                 return ret;
 926
 927         ret = ov5675_write_reg(ov5675, OV5675_REG_MODE_SELECT,
 928                                OV5675_REG_VALUE_08BIT, OV5675_MODE_STREAMING);
 929         if (ret) {
 930                 dev_err(&client->dev, "failed to set stream");
 931                 return ret;
 932         }
 933
 934         return 0;
 935 }
 936
 937 static void ov5675_stop_streaming(struct ov5675 *ov5675)
 938 {
 939         struct i2c_client *client = v4l2_get_subdevdata(&ov5675->sd);
 940
 941         if (ov5675_write_reg(ov5675, OV5675_REG_MODE_SELECT,
 942                              OV5675_REG_VALUE_08BIT, OV5675_MODE_STANDBY))
 943                 dev_err(&client->dev, "failed to set stream");
 944 }
 945
 946 static int ov5675_set_stream(struct v4l2_subdev *sd, int enable)
 947 {
 948         struct ov5675 *ov5675 = to_ov5675(sd);
 949         struct i2c_client *client = v4l2_get_subdevdata(sd);
 950         int ret = 0;
 951
 952         if (ov5675->streaming == enable)
 953                 return 0;
 954
 955         mutex_lock(&ov5675->mutex);
 956         if (enable) {
 957                 ret = pm_runtime_resume_and_get(&client->dev);
 958                 if (ret < 0) {
 959                         mutex_unlock(&ov5675->mutex);
 960                         return ret;
 961                 }
 962
 963                 ret = ov5675_start_streaming(ov5675);
 964                 if (ret) {
 965                         enable = 0;
 966                         ov5675_stop_streaming(ov5675);
 967                         pm_runtime_put(&client->dev);
 968                 }
 969         } else {
 970                 ov5675_stop_streaming(ov5675);
 971                 pm_runtime_put(&client->dev);
 972         }
 973
 974         ov5675->streaming = enable;
 975         mutex_unlock(&ov5675->mutex);
 976
 977         return ret;
 978 }
 979
 980 static int ov5675_power_off(struct device *dev)
 981 {
 982         /* 512 xvclk cycles after the last SCCB transation or MIPI frame end */
 983         u32 delay_us = DIV_ROUND_UP(512, OV5675_XVCLK_19_2 / 1000 / 1000);
 984         struct v4l2_subdev *sd = dev_get_drvdata(dev);
 985         struct ov5675 *ov5675 = to_ov5675(sd);
 986
 987         usleep_range(delay_us, delay_us * 2);
 988
 989         clk_disable_unprepare(ov5675->xvclk);
 990         gpiod_set_value_cansleep(ov5675->reset_gpio, 1);
 991         regulator_bulk_disable(OV5675_NUM_SUPPLIES, ov5675->supplies);
 992
 993         return 0;
 994 }
 995
 996 static int ov5675_power_on(struct device *dev)
 997 {
 998         u32 delay_us = DIV_ROUND_UP(8192, OV5675_XVCLK_19_2 / 1000 / 1000);
 999         struct v4l2_subdev *sd = dev_get_drvdata(dev);
1000         struct ov5675 *ov5675 = to_ov5675(sd);
1001         int ret;
1002
1003         ret = clk_prepare_enable(ov5675->xvclk);
1004         if (ret < 0) {
1005                 dev_err(dev, "failed to enable xvclk: %d\n", ret);
1006                 return ret;
1007         }
1008
1009         gpiod_set_value_cansleep(ov5675->reset_gpio, 1);
1010
1011         ret = regulator_bulk_enable(OV5675_NUM_SUPPLIES, ov5675->supplies);
1012         if (ret) {
1013                 clk_disable_unprepare(ov5675->xvclk);
1014                 return ret;
1015         }
1016
1017         /* Reset pulse should be at least 2ms and reset gpio released only once
1018          * regulators are stable.
1019          */
1020         usleep_range(2000, 2200);
1021
1022         gpiod_set_value_cansleep(ov5675->reset_gpio, 0);
1023
1024         /* 8192 xvclk cycles prior to the first SCCB transation */
1025         usleep_range(delay_us, delay_us * 2);
1026
1027         return 0;
1028 }
1029
1030 static int __maybe_unused ov5675_suspend(struct device *dev)
1031 {
1032         struct v4l2_subdev *sd = dev_get_drvdata(dev);
1033         struct ov5675 *ov5675 = to_ov5675(sd);
1034
1035         mutex_lock(&ov5675->mutex);
1036         if (ov5675->streaming)
1037                 ov5675_stop_streaming(ov5675);
1038
1039         mutex_unlock(&ov5675->mutex);
1040
1041         return 0;
1042 }
1043
1044 static int __maybe_unused ov5675_resume(struct device *dev)
1045 {
1046         struct v4l2_subdev *sd = dev_get_drvdata(dev);
1047         struct ov5675 *ov5675 = to_ov5675(sd);
1048         int ret;
1049
1050         mutex_lock(&ov5675->mutex);
1051         if (ov5675->streaming) {
1052                 ret = ov5675_start_streaming(ov5675);
1053                 if (ret) {
1054                         ov5675->streaming = false;
1055                         ov5675_stop_streaming(ov5675);
1056                         mutex_unlock(&ov5675->mutex);
1057                         return ret;
1058                 }
1059         }
1060
1061         mutex_unlock(&ov5675->mutex);
1062
1063         return 0;
1064 }
1065
1066 static int ov5675_set_format(struct v4l2_subdev *sd,
1067                              struct v4l2_subdev_state *sd_state,
1068                              struct v4l2_subdev_format *fmt)
1069 {
1070         struct ov5675 *ov5675 = to_ov5675(sd);
1071         const struct ov5675_mode *mode;
1072         s32 vblank_def, h_blank;
1073
1074         mode = v4l2_find_nearest_size(supported_modes,
1075                                       ARRAY_SIZE(supported_modes), width,
1076                                       height, fmt->format.width,
1077                                       fmt->format.height);
1078
1079         mutex_lock(&ov5675->mutex);
1080         ov5675_update_pad_format(mode, &fmt->format);
1081         if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
1082                 *v4l2_subdev_get_try_format(sd, sd_state, fmt->pad) = fmt->format;
1083         } else {
1084                 ov5675->cur_mode = mode;
1085                 __v4l2_ctrl_s_ctrl(ov5675->link_freq, mode->link_freq_index);
1086                 __v4l2_ctrl_s_ctrl_int64(ov5675->pixel_rate,
1087                                          to_pixel_rate(mode->link_freq_index));
1088
1089                 /* Update limits and set FPS to default */
1090                 vblank_def = mode->vts_def - mode->height;
1091                 __v4l2_ctrl_modify_range(ov5675->vblank,
1092                                          mode->vts_min - mode->height,
1093                                          OV5675_VTS_MAX - mode->height, 1,
1094                                          vblank_def);
1095                 __v4l2_ctrl_s_ctrl(ov5675->vblank, vblank_def);
1096                 h_blank = to_pixels_per_line(mode->hts, mode->link_freq_index) -
1097                           mode->width;
1098                 __v4l2_ctrl_modify_range(ov5675->hblank, h_blank, h_blank, 1,
1099                                          h_blank);
1100         }
1101
1102         mutex_unlock(&ov5675->mutex);
1103
1104         return 0;
1105 }
1106
1107 static int ov5675_get_format(struct v4l2_subdev *sd,
1108                              struct v4l2_subdev_state *sd_state,
1109                              struct v4l2_subdev_format *fmt)
1110 {
1111         struct ov5675 *ov5675 = to_ov5675(sd);
1112
1113         mutex_lock(&ov5675->mutex);
1114         if (fmt->which == V4L2_SUBDEV_FORMAT_TRY)
1115                 fmt->format = *v4l2_subdev_get_try_format(&ov5675->sd,
1116                                                           sd_state,
1117                                                           fmt->pad);
1118         else
1119                 ov5675_update_pad_format(ov5675->cur_mode, &fmt->format);
1120
1121         mutex_unlock(&ov5675->mutex);
1122
1123         return 0;
1124 }
1125
1126 static int ov5675_get_selection(struct v4l2_subdev *sd,
1127                                 struct v4l2_subdev_state *state,
1128                                 struct v4l2_subdev_selection *sel)
1129 {
1130         if (sel->which != V4L2_SUBDEV_FORMAT_ACTIVE)
1131                 return -EINVAL;
1132
1133         switch (sel->target) {
1134         case V4L2_SEL_TGT_CROP_BOUNDS:
1135                 sel->r.top = 0;
1136                 sel->r.left = 0;
1137                 sel->r.width = 2624;
1138                 sel->r.height = 2000;
1139                 return 0;
1140         case V4L2_SEL_TGT_CROP:
1141         case V4L2_SEL_TGT_CROP_DEFAULT:
1142                 sel->r.top = 16;
1143                 sel->r.left = 16;
1144                 sel->r.width = 2592;
1145                 sel->r.height = 1944;
1146                 return 0;
1147         }
1148         return -EINVAL;
1149 }
1150
1151 static int ov5675_enum_mbus_code(struct v4l2_subdev *sd,
1152                                  struct v4l2_subdev_state *sd_state,
1153                                  struct v4l2_subdev_mbus_code_enum *code)
1154 {
1155         if (code->index > 0)
1156                 return -EINVAL;
1157
1158         code->code = MEDIA_BUS_FMT_SGRBG10_1X10;
1159
1160         return 0;
1161 }
1162
1163 static int ov5675_enum_frame_size(struct v4l2_subdev *sd,
1164                                   struct v4l2_subdev_state *sd_state,
1165                                   struct v4l2_subdev_frame_size_enum *fse)
1166 {
1167         if (fse->index >= ARRAY_SIZE(supported_modes))
1168                 return -EINVAL;
1169
1170         if (fse->code != MEDIA_BUS_FMT_SGRBG10_1X10)
1171                 return -EINVAL;
1172
1173         fse->min_width = supported_modes[fse->index].width;
1174         fse->max_width = fse->min_width;
1175         fse->min_height = supported_modes[fse->index].height;
1176         fse->max_height = fse->min_height;
1177
1178         return 0;
1179 }
1180
1181 static int ov5675_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
1182 {
1183         struct ov5675 *ov5675 = to_ov5675(sd);
1184
1185         mutex_lock(&ov5675->mutex);
1186         ov5675_update_pad_format(&supported_modes[0],
1187                                  v4l2_subdev_get_try_format(sd, fh->state, 0));
1188         mutex_unlock(&ov5675->mutex);
1189
1190         return 0;
1191 }
1192
1193 static const struct v4l2_subdev_video_ops ov5675_video_ops = {
1194         .s_stream = ov5675_set_stream,
1195 };
1196
1197 static const struct v4l2_subdev_pad_ops ov5675_pad_ops = {
1198         .set_fmt = ov5675_set_format,
1199         .get_fmt = ov5675_get_format,
1200         .get_selection = ov5675_get_selection,
1201         .enum_mbus_code = ov5675_enum_mbus_code,
1202         .enum_frame_size = ov5675_enum_frame_size,
1203 };
1204
1205 static const struct v4l2_subdev_ops ov5675_subdev_ops = {
1206         .video = &ov5675_video_ops,
1207         .pad = &ov5675_pad_ops,
1208 };
1209
1210 static const struct media_entity_operations ov5675_subdev_entity_ops = {
1211         .link_validate = v4l2_subdev_link_validate,
1212 };
1213
1214 static const struct v4l2_subdev_internal_ops ov5675_internal_ops = {
1215         .open = ov5675_open,
1216 };
1217
1218 static int ov5675_get_hwcfg(struct ov5675 *ov5675, struct device *dev)
1219 {
1220         struct fwnode_handle *ep;
1221         struct fwnode_handle *fwnode = dev_fwnode(dev);
1222         struct v4l2_fwnode_endpoint bus_cfg = {
1223                 .bus_type = V4L2_MBUS_CSI2_DPHY
1224         };
1225         u32 xvclk_rate;
1226         int ret;
1227         unsigned int i, j;
1228
1229         if (!fwnode)
1230                 return -ENXIO;
1231
1232         ov5675->xvclk = devm_clk_get_optional(dev, NULL);
1233         if (IS_ERR(ov5675->xvclk))
1234                 return dev_err_probe(dev, PTR_ERR(ov5675->xvclk),
1235                                      "failed to get xvclk: %ld\n",
1236                                      PTR_ERR(ov5675->xvclk));
1237
1238         if (ov5675->xvclk) {
1239                 xvclk_rate = clk_get_rate(ov5675->xvclk);
1240         } else {
1241                 ret = fwnode_property_read_u32(fwnode, "clock-frequency",
1242                                                &xvclk_rate);
1243
1244                 if (ret) {
1245                         dev_err(dev, "can't get clock frequency");
1246                         return ret;
1247                 }
1248         }
1249
1250         if (xvclk_rate != OV5675_XVCLK_19_2) {
1251                 dev_err(dev, "external clock rate %u is unsupported",
1252                         xvclk_rate);
1253                 return -EINVAL;
1254         }
1255
1256         ov5675->reset_gpio = devm_gpiod_get_optional(dev, "reset",
1257                                                      GPIOD_OUT_HIGH);
1258         if (IS_ERR(ov5675->reset_gpio)) {
1259                 ret = PTR_ERR(ov5675->reset_gpio);
1260                 dev_err(dev, "failed to get reset-gpios: %d\n", ret);
1261                 return ret;
1262         }
1263
1264         for (i = 0; i < OV5675_NUM_SUPPLIES; i++)
1265                 ov5675->supplies[i].supply = ov5675_supply_names[i];
1266
1267         ret = devm_regulator_bulk_get(dev, OV5675_NUM_SUPPLIES,
1268                                       ov5675->supplies);
1269         if (ret)
1270                 return ret;
1271
1272         ep = fwnode_graph_get_next_endpoint(fwnode, NULL);
1273         if (!ep)
1274                 return -ENXIO;
1275
1276         ret = v4l2_fwnode_endpoint_alloc_parse(ep, &bus_cfg);
1277         fwnode_handle_put(ep);
1278         if (ret)
1279                 return ret;
1280
1281         if (bus_cfg.bus.mipi_csi2.num_data_lanes != OV5675_DATA_LANES) {
1282                 dev_err(dev, "number of CSI2 data lanes %d is not supported",
1283                         bus_cfg.bus.mipi_csi2.num_data_lanes);
1284                 ret = -EINVAL;
1285                 goto check_hwcfg_error;
1286         }
1287
1288         if (!bus_cfg.nr_of_link_frequencies) {
1289                 dev_err(dev, "no link frequencies defined");
1290                 ret = -EINVAL;
1291                 goto check_hwcfg_error;
1292         }
1293
1294         for (i = 0; i < ARRAY_SIZE(link_freq_menu_items); i++) {
1295                 for (j = 0; j < bus_cfg.nr_of_link_frequencies; j++) {
1296                         if (link_freq_menu_items[i] ==
1297                                 bus_cfg.link_frequencies[j])
1298                                 break;
1299                 }
1300
1301                 if (j == bus_cfg.nr_of_link_frequencies) {
1302                         dev_err(dev, "no link frequency %lld supported",
1303                                 link_freq_menu_items[i]);
1304                         ret = -EINVAL;
1305                         goto check_hwcfg_error;
1306                 }
1307         }
1308
1309 check_hwcfg_error:
1310         v4l2_fwnode_endpoint_free(&bus_cfg);
1311
1312         return ret;
1313 }
1314
1315 static void ov5675_remove(struct i2c_client *client)
1316 {
1317         struct v4l2_subdev *sd = i2c_get_clientdata(client);
1318         struct ov5675 *ov5675 = to_ov5675(sd);
1319
1320         v4l2_async_unregister_subdev(sd);
1321         media_entity_cleanup(&sd->entity);
1322         v4l2_ctrl_handler_free(sd->ctrl_handler);
1323         pm_runtime_disable(&client->dev);
1324         mutex_destroy(&ov5675->mutex);
1325
1326         if (!pm_runtime_status_suspended(&client->dev))
1327                 ov5675_power_off(&client->dev);
1328         pm_runtime_set_suspended(&client->dev);
1329 }
1330
1331 static int ov5675_probe(struct i2c_client *client)
1332 {
1333         struct ov5675 *ov5675;
1334         bool full_power;
1335         int ret;
1336
1337         ov5675 = devm_kzalloc(&client->dev, sizeof(*ov5675), GFP_KERNEL);
1338         if (!ov5675)
1339                 return -ENOMEM;
1340
1341         ret = ov5675_get_hwcfg(ov5675, &client->dev);
1342         if (ret) {
1343                 dev_err(&client->dev, "failed to get HW configuration: %d",
1344                         ret);
1345                 return ret;
1346         }
1347
1348         v4l2_i2c_subdev_init(&ov5675->sd, client, &ov5675_subdev_ops);
1349
1350         ret = ov5675_power_on(&client->dev);
1351         if (ret) {
1352                 dev_err(&client->dev, "failed to power on: %d\n", ret);
1353                 return ret;
1354         }
1355
1356         full_power = acpi_dev_state_d0(&client->dev);
1357         if (full_power) {
1358                 ret = ov5675_identify_module(ov5675);
1359                 if (ret) {
1360                         dev_err(&client->dev, "failed to find sensor: %d", ret);
1361                         goto probe_power_off;
1362                 }
1363         }
1364
1365         mutex_init(&ov5675->mutex);
1366         ov5675->cur_mode = &supported_modes[0];
1367         ret = ov5675_init_controls(ov5675);
1368         if (ret) {
1369                 dev_err(&client->dev, "failed to init controls: %d", ret);
1370                 goto probe_error_v4l2_ctrl_handler_free;
1371         }
1372
1373         ov5675->sd.internal_ops = &ov5675_internal_ops;
1374         ov5675->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
1375         ov5675->sd.entity.ops = &ov5675_subdev_entity_ops;
1376         ov5675->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
1377         ov5675->pad.flags = MEDIA_PAD_FL_SOURCE;
1378         ret = media_entity_pads_init(&ov5675->sd.entity, 1, &ov5675->pad);
1379         if (ret) {
1380                 dev_err(&client->dev, "failed to init entity pads: %d", ret);
1381                 goto probe_error_v4l2_ctrl_handler_free;
1382         }
1383
1384         ret = v4l2_async_register_subdev_sensor(&ov5675->sd);
1385         if (ret < 0) {
1386                 dev_err(&client->dev, "failed to register V4L2 subdev: %d",
1387                         ret);
1388                 goto probe_error_media_entity_cleanup;
1389         }
1390
1391         /* Set the device's state to active if it's in D0 state. */
1392         if (full_power)
1393                 pm_runtime_set_active(&client->dev);
1394         pm_runtime_enable(&client->dev);
1395         pm_runtime_idle(&client->dev);
1396
1397         return 0;
1398
1399 probe_error_media_entity_cleanup:
1400         media_entity_cleanup(&ov5675->sd.entity);
1401
1402 probe_error_v4l2_ctrl_handler_free:
1403         v4l2_ctrl_handler_free(ov5675->sd.ctrl_handler);
1404         mutex_destroy(&ov5675->mutex);
1405 probe_power_off:
1406         ov5675_power_off(&client->dev);
1407
1408         return ret;
1409 }
1410
1411 static const struct dev_pm_ops ov5675_pm_ops = {
1412         SET_SYSTEM_SLEEP_PM_OPS(ov5675_suspend, ov5675_resume)
1413         SET_RUNTIME_PM_OPS(ov5675_power_off, ov5675_power_on, NULL)
1414 };
1415
1416 #ifdef CONFIG_ACPI
1417 static const struct acpi_device_id ov5675_acpi_ids[] = {
1418         {"OVTI5675"},
1419         {}
1420 };
1421
1422 MODULE_DEVICE_TABLE(acpi, ov5675_acpi_ids);
1423 #endif
1424
1425 static const struct of_device_id ov5675_of_match[] = {
1426         { .compatible = "ovti,ov5675", },
1427         { /* sentinel */ },
1428 };
1429 MODULE_DEVICE_TABLE(of, ov5675_of_match);
1430
1431 static struct i2c_driver ov5675_i2c_driver = {
1432         .driver = {
1433                 .name = "ov5675",
1434                 .pm = &ov5675_pm_ops,
1435                 .acpi_match_table = ACPI_PTR(ov5675_acpi_ids),
1436                 .of_match_table = ov5675_of_match,
1437         },
1438         .probe_new = ov5675_probe,
1439         .remove = ov5675_remove,
1440         .flags = I2C_DRV_ACPI_WAIVE_D0_PROBE,
1441 };
1442
1443 module_i2c_driver(ov5675_i2c_driver);
1444
1445 MODULE_AUTHOR("Shawn Tu <[email protected]>");
1446 MODULE_DESCRIPTION("OmniVision OV5675 sensor driver");
1447 MODULE_LICENSE("GPL v2");