drivers/iio/addac/ad74413r.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Copyright (C) 2021 Analog Devices, Inc.
   4  * Author: Cosmin Tanislav <[email protected]>
   5  */
   6
   7 #include <asm/unaligned.h>
   8 #include <linux/bitfield.h>
   9 #include <linux/crc8.h>
  10 #include <linux/device.h>
  11 #include <linux/err.h>
  12 #include <linux/gpio/driver.h>
  13 #include <linux/iio/buffer.h>
  14 #include <linux/iio/iio.h>
  15 #include <linux/iio/sysfs.h>
  16 #include <linux/iio/trigger.h>
  17 #include <linux/iio/trigger_consumer.h>
  18 #include <linux/iio/triggered_buffer.h>
  19 #include <linux/interrupt.h>
  20 #include <linux/mod_devicetable.h>
  21 #include <linux/property.h>
  22 #include <linux/regmap.h>
  23 #include <linux/regulator/consumer.h>
  24 #include <linux/spi/spi.h>
  25
  26 #include <dt-bindings/iio/addac/adi,ad74413r.h>
  27
  28 #define AD74413R_CRC_POLYNOMIAL 0x7
  29 DECLARE_CRC8_TABLE(ad74413r_crc8_table);
  30
  31 #define AD74413R_CHANNEL_MAX    4
  32
  33 #define AD74413R_FRAME_SIZE     4
  34
  35 struct ad74413r_chip_info {
  36         const char      *name;
  37         bool            hart_support;
  38 };
  39
  40 struct ad74413r_channel_config {
  41         u32             func;
  42         u32             drive_strength;
  43         bool            gpo_comparator;
  44         bool            initialized;
  45 };
  46
  47 struct ad74413r_channels {
  48         struct iio_chan_spec    *channels;
  49         unsigned int            num_channels;
  50 };
  51
  52 struct ad74413r_state {
  53         struct ad74413r_channel_config  channel_configs[AD74413R_CHANNEL_MAX];
  54         unsigned int                    gpo_gpio_offsets[AD74413R_CHANNEL_MAX];
  55         unsigned int                    comp_gpio_offsets[AD74413R_CHANNEL_MAX];
  56         struct gpio_chip                gpo_gpiochip;
  57         struct gpio_chip                comp_gpiochip;
  58         struct completion               adc_data_completion;
  59         unsigned int                    num_gpo_gpios;
  60         unsigned int                    num_comparator_gpios;
  61         u32                             sense_resistor_ohms;
  62
  63         /*
  64          * Synchronize consecutive operations when doing a one-shot
  65          * conversion and when updating the ADC samples SPI message.
  66          */
  67         struct mutex                    lock;
  68
  69         const struct ad74413r_chip_info *chip_info;
  70         struct spi_device               *spi;
  71         struct regulator                *refin_reg;
  72         struct regmap                   *regmap;
  73         struct device                   *dev;
  74         struct iio_trigger              *trig;
  75         struct gpio_desc                *reset_gpio;
  76
  77         size_t                  adc_active_channels;
  78         struct spi_message      adc_samples_msg;
  79         struct spi_transfer     adc_samples_xfer[AD74413R_CHANNEL_MAX + 1];
  80
  81         /*
  82          * DMA (thus cache coherency maintenance) may require the
  83          * transfer buffers to live in their own cache lines.
  84          */
  85         struct {
  86                 u8 rx_buf[AD74413R_FRAME_SIZE * AD74413R_CHANNEL_MAX];
  87                 s64 timestamp;
  88         } adc_samples_buf __aligned(IIO_DMA_MINALIGN);
  89
  90         u8      adc_samples_tx_buf[AD74413R_FRAME_SIZE * AD74413R_CHANNEL_MAX];
  91         u8      reg_tx_buf[AD74413R_FRAME_SIZE];
  92         u8      reg_rx_buf[AD74413R_FRAME_SIZE];
  93 };
  94
  95 #define AD74413R_REG_NOP                0x00
  96
  97 #define AD74413R_REG_CH_FUNC_SETUP_X(x) (0x01 + (x))
  98 #define AD74413R_CH_FUNC_SETUP_MASK     GENMASK(3, 0)
  99
 100 #define AD74413R_REG_ADC_CONFIG_X(x)            (0x05 + (x))
 101 #define AD74413R_ADC_CONFIG_RANGE_MASK          GENMASK(7, 5)
 102 #define AD74413R_ADC_CONFIG_REJECTION_MASK      GENMASK(4, 3)
 103 #define AD74413R_ADC_CONFIG_CH_200K_TO_GND      BIT(2)
 104 #define AD74413R_ADC_RANGE_10V                  0b000
 105 #define AD74413R_ADC_RANGE_2P5V_EXT_POW         0b001
 106 #define AD74413R_ADC_RANGE_2P5V_INT_POW         0b010
 107 #define AD74413R_ADC_RANGE_5V_BI_DIR            0b011
 108 #define AD74413R_ADC_REJECTION_50_60            0b00
 109 #define AD74413R_ADC_REJECTION_NONE             0b01
 110 #define AD74413R_ADC_REJECTION_50_60_HART       0b10
 111 #define AD74413R_ADC_REJECTION_HART             0b11
 112
 113 #define AD74413R_REG_DIN_CONFIG_X(x)    (0x09 + (x))
 114 #define AD74413R_DIN_DEBOUNCE_MASK      GENMASK(4, 0)
 115 #define AD74413R_DIN_DEBOUNCE_LEN       BIT(5)
 116 #define AD74413R_DIN_SINK_MASK          GENMASK(9, 6)
 117
 118 #define AD74413R_REG_DAC_CODE_X(x)      (0x16 + (x))
 119 #define AD74413R_DAC_CODE_MAX           GENMASK(12, 0)
 120 #define AD74413R_DAC_VOLTAGE_MAX        11000
 121
 122 #define AD74413R_REG_GPO_PAR_DATA               0x0d
 123 #define AD74413R_REG_GPO_CONFIG_X(x)            (0x0e + (x))
 124 #define AD74413R_GPO_CONFIG_DATA_MASK   BIT(3)
 125 #define AD74413R_GPO_CONFIG_SELECT_MASK         GENMASK(2, 0)
 126 #define AD74413R_GPO_CONFIG_100K_PULL_DOWN      0b000
 127 #define AD74413R_GPO_CONFIG_LOGIC               0b001
 128 #define AD74413R_GPO_CONFIG_LOGIC_PARALLEL      0b010
 129 #define AD74413R_GPO_CONFIG_COMPARATOR          0b011
 130 #define AD74413R_GPO_CONFIG_HIGH_IMPEDANCE      0b100
 131
 132 #define AD74413R_REG_ADC_CONV_CTRL      0x23
 133 #define AD74413R_CONV_SEQ_MASK          GENMASK(9, 8)
 134 #define AD74413R_CONV_SEQ_ON            0b00
 135 #define AD74413R_CONV_SEQ_SINGLE        0b01
 136 #define AD74413R_CONV_SEQ_CONTINUOUS    0b10
 137 #define AD74413R_CONV_SEQ_OFF           0b11
 138 #define AD74413R_CH_EN_MASK(x)          BIT(x)
 139
 140 #define AD74413R_REG_DIN_COMP_OUT               0x25
 141
 142 #define AD74413R_REG_ADC_RESULT_X(x)    (0x26 + (x))
 143 #define AD74413R_ADC_RESULT_MAX         GENMASK(15, 0)
 144
 145 #define AD74413R_REG_READ_SELECT        0x41
 146
 147 #define AD74413R_REG_CMD_KEY            0x44
 148 #define AD74413R_CMD_KEY_LDAC           0x953a
 149 #define AD74413R_CMD_KEY_RESET1         0x15fa
 150 #define AD74413R_CMD_KEY_RESET2         0xaf51
 151
 152 static const int ad74413r_adc_sampling_rates[] = {
 153         20, 4800,
 154 };
 155
 156 static const int ad74413r_adc_sampling_rates_hart[] = {
 157         10, 20, 1200, 4800,
 158 };
 159
 160 static int ad74413r_crc(u8 *buf)
 161 {
 162         return crc8(ad74413r_crc8_table, buf, 3, 0);
 163 }
 164
 165 static void ad74413r_format_reg_write(u8 reg, u16 val, u8 *buf)
 166 {
 167         buf[0] = reg;
 168         put_unaligned_be16(val, &buf[1]);
 169         buf[3] = ad74413r_crc(buf);
 170 }
 171
 172 static int ad74413r_reg_write(void *context, unsigned int reg, unsigned int val)
 173 {
 174         struct ad74413r_state *st = context;
 175
 176         ad74413r_format_reg_write(reg, val, st->reg_tx_buf);
 177
 178         return spi_write(st->spi, st->reg_tx_buf, AD74413R_FRAME_SIZE);
 179 }
 180
 181 static int ad74413r_crc_check(struct ad74413r_state *st, u8 *buf)
 182 {
 183         u8 expected_crc = ad74413r_crc(buf);
 184
 185         if (buf[3] != expected_crc) {
 186                 dev_err(st->dev, "Bad CRC %02x for %02x%02x%02x\n",
 187                         buf[3], buf[0], buf[1], buf[2]);
 188                 return -EINVAL;
 189         }
 190
 191         return 0;
 192 }
 193
 194 static int ad74413r_reg_read(void *context, unsigned int reg, unsigned int *val)
 195 {
 196         struct ad74413r_state *st = context;
 197         struct spi_transfer reg_read_xfer[] = {
 198                 {
 199                         .tx_buf = st->reg_tx_buf,
 200                         .len = AD74413R_FRAME_SIZE,
 201                         .cs_change = 1,
 202                 },
 203                 {
 204                         .rx_buf = st->reg_rx_buf,
 205                         .len = AD74413R_FRAME_SIZE,
 206                 },
 207         };
 208         int ret;
 209
 210         ad74413r_format_reg_write(AD74413R_REG_READ_SELECT, reg,
 211                                   st->reg_tx_buf);
 212
 213         ret = spi_sync_transfer(st->spi, reg_read_xfer,
 214                                 ARRAY_SIZE(reg_read_xfer));
 215         if (ret)
 216                 return ret;
 217
 218         ret = ad74413r_crc_check(st, st->reg_rx_buf);
 219         if (ret)
 220                 return ret;
 221
 222         *val = get_unaligned_be16(&st->reg_rx_buf[1]);
 223
 224         return 0;
 225 }
 226
 227 static const struct regmap_config ad74413r_regmap_config = {
 228         .reg_bits = 8,
 229         .val_bits = 16,
 230         .reg_read = ad74413r_reg_read,
 231         .reg_write = ad74413r_reg_write,
 232 };
 233
 234 static int ad74413r_set_gpo_config(struct ad74413r_state *st,
 235                                    unsigned int offset, u8 mode)
 236 {
 237         return regmap_update_bits(st->regmap, AD74413R_REG_GPO_CONFIG_X(offset),
 238                                   AD74413R_GPO_CONFIG_SELECT_MASK, mode);
 239 }
 240
 241 static const unsigned int ad74413r_debounce_map[AD74413R_DIN_DEBOUNCE_LEN] = {
 242         0,     13,    18,    24,    32,    42,    56,    75,
 243         100,   130,   180,   240,   320,   420,   560,   750,
 244         1000,  1300,  1800,  2400,  3200,  4200,  5600,  7500,
 245         10000, 13000, 18000, 24000, 32000, 42000, 56000, 75000,
 246 };
 247
 248 static int ad74413r_set_comp_debounce(struct ad74413r_state *st,
 249                                       unsigned int offset,
 250                                       unsigned int debounce)
 251 {
 252         unsigned int val = AD74413R_DIN_DEBOUNCE_LEN - 1;
 253         unsigned int i;
 254
 255         for (i = 0; i < AD74413R_DIN_DEBOUNCE_LEN; i++)
 256                 if (debounce <= ad74413r_debounce_map[i]) {
 257                         val = i;
 258                         break;
 259                 }
 260
 261         return regmap_update_bits(st->regmap,
 262                                   AD74413R_REG_DIN_CONFIG_X(offset),
 263                                   AD74413R_DIN_DEBOUNCE_MASK,
 264                                   val);
 265 }
 266
 267 static int ad74413r_set_comp_drive_strength(struct ad74413r_state *st,
 268                                             unsigned int offset,
 269                                             unsigned int strength)
 270 {
 271         strength = min(strength, 1800U);
 272
 273         return regmap_update_bits(st->regmap, AD74413R_REG_DIN_CONFIG_X(offset),
 274                                   AD74413R_DIN_SINK_MASK,
 275                                   FIELD_PREP(AD74413R_DIN_SINK_MASK, strength / 120));
 276 }
 277
 278
 279 static void ad74413r_gpio_set(struct gpio_chip *chip,
 280                               unsigned int offset, int val)
 281 {
 282         struct ad74413r_state *st = gpiochip_get_data(chip);
 283         unsigned int real_offset = st->gpo_gpio_offsets[offset];
 284         int ret;
 285
 286         ret = ad74413r_set_gpo_config(st, real_offset,
 287                                       AD74413R_GPO_CONFIG_LOGIC);
 288         if (ret)
 289                 return;
 290
 291         regmap_update_bits(st->regmap, AD74413R_REG_GPO_CONFIG_X(real_offset),
 292                            AD74413R_GPO_CONFIG_DATA_MASK,
 293                            val ? AD74413R_GPO_CONFIG_DATA_MASK : 0);
 294 }
 295
 296 static void ad74413r_gpio_set_multiple(struct gpio_chip *chip,
 297                                        unsigned long *mask,
 298                                        unsigned long *bits)
 299 {
 300         struct ad74413r_state *st = gpiochip_get_data(chip);
 301         unsigned long real_mask = 0;
 302         unsigned long real_bits = 0;
 303         unsigned int offset;
 304         int ret;
 305
 306         for_each_set_bit(offset, mask, chip->ngpio) {
 307                 unsigned int real_offset = st->gpo_gpio_offsets[offset];
 308
 309                 ret = ad74413r_set_gpo_config(st, real_offset,
 310                         AD74413R_GPO_CONFIG_LOGIC_PARALLEL);
 311                 if (ret)
 312                         return;
 313
 314                 real_mask |= BIT(real_offset);
 315                 if (*bits & offset)
 316                         real_bits |= BIT(real_offset);
 317         }
 318
 319         regmap_update_bits(st->regmap, AD74413R_REG_GPO_PAR_DATA,
 320                            real_mask, real_bits);
 321 }
 322
 323 static int ad74413r_gpio_get(struct gpio_chip *chip, unsigned int offset)
 324 {
 325         struct ad74413r_state *st = gpiochip_get_data(chip);
 326         unsigned int real_offset = st->comp_gpio_offsets[offset];
 327         unsigned int status;
 328         int ret;
 329
 330         ret = regmap_read(st->regmap, AD74413R_REG_DIN_COMP_OUT, &status);
 331         if (ret)
 332                 return ret;
 333
 334         status &= BIT(real_offset);
 335
 336         return status ? 1 : 0;
 337 }
 338
 339 static int ad74413r_gpio_get_multiple(struct gpio_chip *chip,
 340                                       unsigned long *mask,
 341                                       unsigned long *bits)
 342 {
 343         struct ad74413r_state *st = gpiochip_get_data(chip);
 344         unsigned int offset;
 345         unsigned int val;
 346         int ret;
 347
 348         ret = regmap_read(st->regmap, AD74413R_REG_DIN_COMP_OUT, &val);
 349         if (ret)
 350                 return ret;
 351
 352         for_each_set_bit(offset, mask, chip->ngpio) {
 353                 unsigned int real_offset = st->comp_gpio_offsets[offset];
 354
 355                 __assign_bit(offset, bits, val & BIT(real_offset));
 356         }
 357
 358         return ret;
 359 }
 360
 361 static int ad74413r_gpio_get_gpo_direction(struct gpio_chip *chip,
 362                                            unsigned int offset)
 363 {
 364         return GPIO_LINE_DIRECTION_OUT;
 365 }
 366
 367 static int ad74413r_gpio_get_comp_direction(struct gpio_chip *chip,
 368                                             unsigned int offset)
 369 {
 370         return GPIO_LINE_DIRECTION_IN;
 371 }
 372
 373 static int ad74413r_gpio_set_gpo_config(struct gpio_chip *chip,
 374                                         unsigned int offset,
 375                                         unsigned long config)
 376 {
 377         struct ad74413r_state *st = gpiochip_get_data(chip);
 378         unsigned int real_offset = st->gpo_gpio_offsets[offset];
 379
 380         switch (pinconf_to_config_param(config)) {
 381         case PIN_CONFIG_BIAS_PULL_DOWN:
 382                 return ad74413r_set_gpo_config(st, real_offset,
 383                         AD74413R_GPO_CONFIG_100K_PULL_DOWN);
 384         case PIN_CONFIG_BIAS_HIGH_IMPEDANCE:
 385                 return ad74413r_set_gpo_config(st, real_offset,
 386                         AD74413R_GPO_CONFIG_HIGH_IMPEDANCE);
 387         default:
 388                 return -ENOTSUPP;
 389         }
 390 }
 391
 392 static int ad74413r_gpio_set_comp_config(struct gpio_chip *chip,
 393                                          unsigned int offset,
 394                                          unsigned long config)
 395 {
 396         struct ad74413r_state *st = gpiochip_get_data(chip);
 397         unsigned int real_offset = st->comp_gpio_offsets[offset];
 398
 399         switch (pinconf_to_config_param(config)) {
 400         case PIN_CONFIG_INPUT_DEBOUNCE:
 401                 return ad74413r_set_comp_debounce(st, real_offset,
 402                         pinconf_to_config_argument(config));
 403         default:
 404                 return -ENOTSUPP;
 405         }
 406 }
 407
 408 static int ad74413r_reset(struct ad74413r_state *st)
 409 {
 410         int ret;
 411
 412         if (st->reset_gpio) {
 413                 gpiod_set_value_cansleep(st->reset_gpio, 1);
 414                 fsleep(50);
 415                 gpiod_set_value_cansleep(st->reset_gpio, 0);
 416                 return 0;
 417         }
 418
 419         ret = regmap_write(st->regmap, AD74413R_REG_CMD_KEY,
 420                            AD74413R_CMD_KEY_RESET1);
 421         if (ret)
 422                 return ret;
 423
 424         return regmap_write(st->regmap, AD74413R_REG_CMD_KEY,
 425                             AD74413R_CMD_KEY_RESET2);
 426 }
 427
 428 static int ad74413r_set_channel_dac_code(struct ad74413r_state *st,
 429                                          unsigned int channel, int dac_code)
 430 {
 431         struct reg_sequence reg_seq[2] = {
 432                 { AD74413R_REG_DAC_CODE_X(channel), dac_code },
 433                 { AD74413R_REG_CMD_KEY, AD74413R_CMD_KEY_LDAC },
 434         };
 435
 436         return regmap_multi_reg_write(st->regmap, reg_seq, 2);
 437 }
 438
 439 static int ad74413r_set_channel_function(struct ad74413r_state *st,
 440                                          unsigned int channel, u8 func)
 441 {
 442         int ret;
 443
 444         ret = regmap_update_bits(st->regmap,
 445                                   AD74413R_REG_CH_FUNC_SETUP_X(channel),
 446                                   AD74413R_CH_FUNC_SETUP_MASK, func);
 447         if (ret)
 448                 return ret;
 449
 450         if (func == CH_FUNC_CURRENT_INPUT_LOOP_POWER)
 451                 ret = regmap_set_bits(st->regmap,
 452                                       AD74413R_REG_ADC_CONFIG_X(channel),
 453                                       AD74413R_ADC_CONFIG_CH_200K_TO_GND);
 454
 455         return ret;
 456 }
 457
 458 static int ad74413r_set_adc_conv_seq(struct ad74413r_state *st,
 459                                      unsigned int status)
 460 {
 461         int ret;
 462
 463         /*
 464          * These bits do not clear when a conversion completes.
 465          * To enable a subsequent conversion, repeat the write.
 466          */
 467         ret = regmap_write_bits(st->regmap, AD74413R_REG_ADC_CONV_CTRL,
 468                                 AD74413R_CONV_SEQ_MASK,
 469                                 FIELD_PREP(AD74413R_CONV_SEQ_MASK, status));
 470         if (ret)
 471                 return ret;
 472
 473         /*
 474          * Wait 100us before starting conversions.
 475          */
 476         usleep_range(100, 120);
 477
 478         return 0;
 479 }
 480
 481 static int ad74413r_set_adc_channel_enable(struct ad74413r_state *st,
 482                                            unsigned int channel,
 483                                            bool status)
 484 {
 485         return regmap_update_bits(st->regmap, AD74413R_REG_ADC_CONV_CTRL,
 486                                   AD74413R_CH_EN_MASK(channel),
 487                                   status ? AD74413R_CH_EN_MASK(channel) : 0);
 488 }
 489
 490 static int ad74413r_get_adc_range(struct ad74413r_state *st,
 491                                   unsigned int channel,
 492                                   unsigned int *val)
 493 {
 494         int ret;
 495
 496         ret = regmap_read(st->regmap, AD74413R_REG_ADC_CONFIG_X(channel), val);
 497         if (ret)
 498                 return ret;
 499
 500         *val = FIELD_GET(AD74413R_ADC_CONFIG_RANGE_MASK, *val);
 501
 502         return 0;
 503 }
 504
 505 static int ad74413r_get_adc_rejection(struct ad74413r_state *st,
 506                                       unsigned int channel,
 507                                       unsigned int *val)
 508 {
 509         int ret;
 510
 511         ret = regmap_read(st->regmap, AD74413R_REG_ADC_CONFIG_X(channel), val);
 512         if (ret)
 513                 return ret;
 514
 515         *val = FIELD_GET(AD74413R_ADC_CONFIG_REJECTION_MASK, *val);
 516
 517         return 0;
 518 }
 519
 520 static int ad74413r_set_adc_rejection(struct ad74413r_state *st,
 521                                       unsigned int channel,
 522                                       unsigned int val)
 523 {
 524         return regmap_update_bits(st->regmap,
 525                                   AD74413R_REG_ADC_CONFIG_X(channel),
 526                                   AD74413R_ADC_CONFIG_REJECTION_MASK,
 527                                   FIELD_PREP(AD74413R_ADC_CONFIG_REJECTION_MASK,
 528                                              val));
 529 }
 530
 531 static int ad74413r_rejection_to_rate(struct ad74413r_state *st,
 532                                       unsigned int rej, int *val)
 533 {
 534         switch (rej) {
 535         case AD74413R_ADC_REJECTION_50_60:
 536                 *val = 20;
 537                 return 0;
 538         case AD74413R_ADC_REJECTION_NONE:
 539                 *val = 4800;
 540                 return 0;
 541         case AD74413R_ADC_REJECTION_50_60_HART:
 542                 *val = 10;
 543                 return 0;
 544         case AD74413R_ADC_REJECTION_HART:
 545                 *val = 1200;
 546                 return 0;
 547         default:
 548                 dev_err(st->dev, "ADC rejection invalid\n");
 549                 return -EINVAL;
 550         }
 551 }
 552
 553 static int ad74413r_rate_to_rejection(struct ad74413r_state *st,
 554                                       int rate, unsigned int *val)
 555 {
 556         switch (rate) {
 557         case 20:
 558                 *val = AD74413R_ADC_REJECTION_50_60;
 559                 return 0;
 560         case 4800:
 561                 *val = AD74413R_ADC_REJECTION_NONE;
 562                 return 0;
 563         case 10:
 564                 *val = AD74413R_ADC_REJECTION_50_60_HART;
 565                 return 0;
 566         case 1200:
 567                 *val = AD74413R_ADC_REJECTION_HART;
 568                 return 0;
 569         default:
 570                 dev_err(st->dev, "ADC rate invalid\n");
 571                 return -EINVAL;
 572         }
 573 }
 574
 575 static int ad74413r_range_to_voltage_range(struct ad74413r_state *st,
 576                                            unsigned int range, int *val)
 577 {
 578         switch (range) {
 579         case AD74413R_ADC_RANGE_10V:
 580                 *val = 10000;
 581                 return 0;
 582         case AD74413R_ADC_RANGE_2P5V_EXT_POW:
 583         case AD74413R_ADC_RANGE_2P5V_INT_POW:
 584                 *val = 2500;
 585                 return 0;
 586         case AD74413R_ADC_RANGE_5V_BI_DIR:
 587                 *val = 5000;
 588                 return 0;
 589         default:
 590                 dev_err(st->dev, "ADC range invalid\n");
 591                 return -EINVAL;
 592         }
 593 }
 594
 595 static int ad74413r_range_to_voltage_offset(struct ad74413r_state *st,
 596                                             unsigned int range, int *val)
 597 {
 598         switch (range) {
 599         case AD74413R_ADC_RANGE_10V:
 600         case AD74413R_ADC_RANGE_2P5V_EXT_POW:
 601                 *val = 0;
 602                 return 0;
 603         case AD74413R_ADC_RANGE_2P5V_INT_POW:
 604         case AD74413R_ADC_RANGE_5V_BI_DIR:
 605                 *val = -2500;
 606                 return 0;
 607         default:
 608                 dev_err(st->dev, "ADC range invalid\n");
 609                 return -EINVAL;
 610         }
 611 }
 612
 613 static int ad74413r_range_to_voltage_offset_raw(struct ad74413r_state *st,
 614                                                 unsigned int range, int *val)
 615 {
 616         switch (range) {
 617         case AD74413R_ADC_RANGE_10V:
 618         case AD74413R_ADC_RANGE_2P5V_EXT_POW:
 619                 *val = 0;
 620                 return 0;
 621         case AD74413R_ADC_RANGE_2P5V_INT_POW:
 622                 *val = -((int)AD74413R_ADC_RESULT_MAX);
 623                 return 0;
 624         case AD74413R_ADC_RANGE_5V_BI_DIR:
 625                 *val = -((int)AD74413R_ADC_RESULT_MAX / 2);
 626                 return 0;
 627         default:
 628                 dev_err(st->dev, "ADC range invalid\n");
 629                 return -EINVAL;
 630         }
 631 }
 632
 633 static int ad74413r_get_output_voltage_scale(struct ad74413r_state *st,
 634                                              int *val, int *val2)
 635 {
 636         *val = AD74413R_DAC_VOLTAGE_MAX;
 637         *val2 = AD74413R_DAC_CODE_MAX;
 638
 639         return IIO_VAL_FRACTIONAL;
 640 }
 641
 642 static int ad74413r_get_output_current_scale(struct ad74413r_state *st,
 643                                              int *val, int *val2)
 644 {
 645         *val = regulator_get_voltage(st->refin_reg);
 646         *val2 = st->sense_resistor_ohms * AD74413R_DAC_CODE_MAX * 1000;
 647
 648         return IIO_VAL_FRACTIONAL;
 649 }
 650
 651 static int ad74413r_get_input_voltage_scale(struct ad74413r_state *st,
 652                                             unsigned int channel,
 653                                             int *val, int *val2)
 654 {
 655         unsigned int range;
 656         int ret;
 657
 658         ret = ad74413r_get_adc_range(st, channel, &range);
 659         if (ret)
 660                 return ret;
 661
 662         ret = ad74413r_range_to_voltage_range(st, range, val);
 663         if (ret)
 664                 return ret;
 665
 666         *val2 = AD74413R_ADC_RESULT_MAX;
 667
 668         return IIO_VAL_FRACTIONAL;
 669 }
 670
 671 static int ad74413r_get_input_voltage_offset(struct ad74413r_state *st,
 672                                              unsigned int channel, int *val)
 673 {
 674         unsigned int range;
 675         int ret;
 676
 677         ret = ad74413r_get_adc_range(st, channel, &range);
 678         if (ret)
 679                 return ret;
 680
 681         ret = ad74413r_range_to_voltage_offset_raw(st, range, val);
 682         if (ret)
 683                 return ret;
 684
 685         return IIO_VAL_INT;
 686 }
 687
 688 static int ad74413r_get_input_current_scale(struct ad74413r_state *st,
 689                                             unsigned int channel, int *val,
 690                                             int *val2)
 691 {
 692         unsigned int range;
 693         int ret;
 694
 695         ret = ad74413r_get_adc_range(st, channel, &range);
 696         if (ret)
 697                 return ret;
 698
 699         ret = ad74413r_range_to_voltage_range(st, range, val);
 700         if (ret)
 701                 return ret;
 702
 703         *val2 = AD74413R_ADC_RESULT_MAX * st->sense_resistor_ohms;
 704
 705         return IIO_VAL_FRACTIONAL;
 706 }
 707
 708 static int ad74413_get_input_current_offset(struct ad74413r_state *st,
 709                                             unsigned int channel, int *val)
 710 {
 711         unsigned int range;
 712         int voltage_range;
 713         int voltage_offset;
 714         int ret;
 715
 716         ret = ad74413r_get_adc_range(st, channel, &range);
 717         if (ret)
 718                 return ret;
 719
 720         ret = ad74413r_range_to_voltage_range(st, range, &voltage_range);
 721         if (ret)
 722                 return ret;
 723
 724         ret = ad74413r_range_to_voltage_offset(st, range, &voltage_offset);
 725         if (ret)
 726                 return ret;
 727
 728         *val = voltage_offset * (int)AD74413R_ADC_RESULT_MAX / voltage_range;
 729
 730         return IIO_VAL_INT;
 731 }
 732
 733 static int ad74413r_get_adc_rate(struct ad74413r_state *st,
 734                                  unsigned int channel, int *val)
 735 {
 736         unsigned int rejection;
 737         int ret;
 738
 739         ret = ad74413r_get_adc_rejection(st, channel, &rejection);
 740         if (ret)
 741                 return ret;
 742
 743         ret = ad74413r_rejection_to_rate(st, rejection, val);
 744         if (ret)
 745                 return ret;
 746
 747         return IIO_VAL_INT;
 748 }
 749
 750 static int ad74413r_set_adc_rate(struct ad74413r_state *st,
 751                                  unsigned int channel, int val)
 752 {
 753         unsigned int rejection;
 754         int ret;
 755
 756         ret = ad74413r_rate_to_rejection(st, val, &rejection);
 757         if (ret)
 758                 return ret;
 759
 760         return ad74413r_set_adc_rejection(st, channel, rejection);
 761 }
 762
 763 static irqreturn_t ad74413r_trigger_handler(int irq, void *p)
 764 {
 765         struct iio_poll_func *pf = p;
 766         struct iio_dev *indio_dev = pf->indio_dev;
 767         struct ad74413r_state *st = iio_priv(indio_dev);
 768         u8 *rx_buf = st->adc_samples_buf.rx_buf;
 769         unsigned int i;
 770         int ret;
 771
 772         ret = spi_sync(st->spi, &st->adc_samples_msg);
 773         if (ret)
 774                 goto out;
 775
 776         for (i = 0; i < st->adc_active_channels; i++)
 777                 ad74413r_crc_check(st, &rx_buf[i * AD74413R_FRAME_SIZE]);
 778
 779         iio_push_to_buffers_with_timestamp(indio_dev, &st->adc_samples_buf,
 780                                            iio_get_time_ns(indio_dev));
 781
 782 out:
 783         iio_trigger_notify_done(indio_dev->trig);
 784
 785         return IRQ_HANDLED;
 786 }
 787
 788 static irqreturn_t ad74413r_adc_data_interrupt(int irq, void *data)
 789 {
 790         struct iio_dev *indio_dev = data;
 791         struct ad74413r_state *st = iio_priv(indio_dev);
 792
 793         if (iio_buffer_enabled(indio_dev))
 794                 iio_trigger_poll(st->trig);
 795         else
 796                 complete(&st->adc_data_completion);
 797
 798         return IRQ_HANDLED;
 799 }
 800
 801 static int _ad74413r_get_single_adc_result(struct ad74413r_state *st,
 802                                            unsigned int channel, int *val)
 803 {
 804         unsigned int uval;
 805         int ret;
 806
 807         reinit_completion(&st->adc_data_completion);
 808
 809         ret = ad74413r_set_adc_channel_enable(st, channel, true);
 810         if (ret)
 811                 return ret;
 812
 813         ret = ad74413r_set_adc_conv_seq(st, AD74413R_CONV_SEQ_SINGLE);
 814         if (ret)
 815                 return ret;
 816
 817         ret = wait_for_completion_timeout(&st->adc_data_completion,
 818                                           msecs_to_jiffies(1000));
 819         if (!ret) {
 820                 ret = -ETIMEDOUT;
 821                 return ret;
 822         }
 823
 824         ret = regmap_read(st->regmap, AD74413R_REG_ADC_RESULT_X(channel),
 825                           &uval);
 826         if (ret)
 827                 return ret;
 828
 829         ret = ad74413r_set_adc_conv_seq(st, AD74413R_CONV_SEQ_OFF);
 830         if (ret)
 831                 return ret;
 832
 833         ret = ad74413r_set_adc_channel_enable(st, channel, false);
 834         if (ret)
 835                 return ret;
 836
 837         *val = uval;
 838
 839         return IIO_VAL_INT;
 840 }
 841
 842 static int ad74413r_get_single_adc_result(struct iio_dev *indio_dev,
 843                                           unsigned int channel, int *val)
 844 {
 845         struct ad74413r_state *st = iio_priv(indio_dev);
 846         int ret;
 847
 848         ret = iio_device_claim_direct_mode(indio_dev);
 849         if (ret)
 850                 return ret;
 851
 852         mutex_lock(&st->lock);
 853         ret = _ad74413r_get_single_adc_result(st, channel, val);
 854         mutex_unlock(&st->lock);
 855
 856         iio_device_release_direct_mode(indio_dev);
 857
 858         return ret;
 859 }
 860
 861 static void ad74413r_adc_to_resistance_result(int adc_result, int *val)
 862 {
 863         if (adc_result == AD74413R_ADC_RESULT_MAX)
 864                 adc_result = AD74413R_ADC_RESULT_MAX - 1;
 865
 866         *val = DIV_ROUND_CLOSEST(adc_result * 2100,
 867                                  AD74413R_ADC_RESULT_MAX - adc_result);
 868 }
 869
 870 static int ad74413r_update_scan_mode(struct iio_dev *indio_dev,
 871                                      const unsigned long *active_scan_mask)
 872 {
 873         struct ad74413r_state *st = iio_priv(indio_dev);
 874         struct spi_transfer *xfer = st->adc_samples_xfer;
 875         u8 *rx_buf = st->adc_samples_buf.rx_buf;
 876         u8 *tx_buf = st->adc_samples_tx_buf;
 877         unsigned int channel;
 878         int ret = -EINVAL;
 879
 880         mutex_lock(&st->lock);
 881
 882         spi_message_init(&st->adc_samples_msg);
 883         st->adc_active_channels = 0;
 884
 885         for_each_clear_bit(channel, active_scan_mask, AD74413R_CHANNEL_MAX) {
 886                 ret = ad74413r_set_adc_channel_enable(st, channel, false);
 887                 if (ret)
 888                         goto out;
 889         }
 890
 891         if (*active_scan_mask == 0)
 892                 goto out;
 893
 894         /*
 895          * The read select register is used to select which register's value
 896          * will be sent by the slave on the next SPI frame.
 897          *
 898          * Create an SPI message that, on each step, writes to the read select
 899          * register to select the ADC result of the next enabled channel, and
 900          * reads the ADC result of the previous enabled channel.
 901          *
 902          * Example:
 903          * W: [WCH1] [WCH2] [WCH2] [WCH3] [    ]
 904          * R: [    ] [RCH1] [RCH2] [RCH3] [RCH4]
 905          */
 906
 907         for_each_set_bit(channel, active_scan_mask, AD74413R_CHANNEL_MAX) {
 908                 ret = ad74413r_set_adc_channel_enable(st, channel, true);
 909                 if (ret)
 910                         goto out;
 911
 912                 st->adc_active_channels++;
 913
 914                 if (xfer == st->adc_samples_xfer)
 915                         xfer->rx_buf = NULL;
 916                 else
 917                         xfer->rx_buf = rx_buf;
 918
 919                 xfer->tx_buf = tx_buf;
 920                 xfer->len = AD74413R_FRAME_SIZE;
 921                 xfer->cs_change = 1;
 922
 923                 ad74413r_format_reg_write(AD74413R_REG_READ_SELECT,
 924                                           AD74413R_REG_ADC_RESULT_X(channel),
 925                                           tx_buf);
 926
 927                 spi_message_add_tail(xfer, &st->adc_samples_msg);
 928
 929                 tx_buf += AD74413R_FRAME_SIZE;
 930                 if (xfer != st->adc_samples_xfer)
 931                         rx_buf += AD74413R_FRAME_SIZE;
 932                 xfer++;
 933         }
 934
 935         xfer->rx_buf = rx_buf;
 936         xfer->tx_buf = NULL;
 937         xfer->len = AD74413R_FRAME_SIZE;
 938         xfer->cs_change = 0;
 939
 940         spi_message_add_tail(xfer, &st->adc_samples_msg);
 941
 942 out:
 943         mutex_unlock(&st->lock);
 944
 945         return ret;
 946 }
 947
 948 static int ad74413r_buffer_postenable(struct iio_dev *indio_dev)
 949 {
 950         struct ad74413r_state *st = iio_priv(indio_dev);
 951
 952         return ad74413r_set_adc_conv_seq(st, AD74413R_CONV_SEQ_CONTINUOUS);
 953 }
 954
 955 static int ad74413r_buffer_predisable(struct iio_dev *indio_dev)
 956 {
 957         struct ad74413r_state *st = iio_priv(indio_dev);
 958
 959         return ad74413r_set_adc_conv_seq(st, AD74413R_CONV_SEQ_OFF);
 960 }
 961
 962 static int ad74413r_read_raw(struct iio_dev *indio_dev,
 963                              struct iio_chan_spec const *chan,
 964                              int *val, int *val2, long info)
 965 {
 966         struct ad74413r_state *st = iio_priv(indio_dev);
 967
 968         switch (info) {
 969         case IIO_CHAN_INFO_SCALE:
 970                 switch (chan->type) {
 971                 case IIO_VOLTAGE:
 972                         if (chan->output)
 973                                 return ad74413r_get_output_voltage_scale(st,
 974                                         val, val2);
 975                         else
 976                                 return ad74413r_get_input_voltage_scale(st,
 977                                         chan->channel, val, val2);
 978                 case IIO_CURRENT:
 979                         if (chan->output)
 980                                 return ad74413r_get_output_current_scale(st,
 981                                         val, val2);
 982                         else
 983                                 return ad74413r_get_input_current_scale(st,
 984                                         chan->channel, val, val2);
 985                 default:
 986                         return -EINVAL;
 987                 }
 988         case IIO_CHAN_INFO_OFFSET:
 989                 switch (chan->type) {
 990                 case IIO_VOLTAGE:
 991                         return ad74413r_get_input_voltage_offset(st,
 992                                 chan->channel, val);
 993                 case IIO_CURRENT:
 994                         return ad74413_get_input_current_offset(st,
 995                                 chan->channel, val);
 996                 default:
 997                         return -EINVAL;
 998                 }
 999         case IIO_CHAN_INFO_RAW:
1000                 if (chan->output)
1001                         return -EINVAL;
1002
1003                 return ad74413r_get_single_adc_result(indio_dev, chan->channel,
1004                                                       val);
1005         case IIO_CHAN_INFO_PROCESSED: {
1006                 int ret;
1007
1008                 ret = ad74413r_get_single_adc_result(indio_dev, chan->channel,
1009                                                      val);
1010                 if (ret)
1011                         return ret;
1012
1013                 ad74413r_adc_to_resistance_result(*val, val);
1014
1015                 return ret;
1016         }
1017         case IIO_CHAN_INFO_SAMP_FREQ:
1018                 return ad74413r_get_adc_rate(st, chan->channel, val);
1019         default:
1020                 return -EINVAL;
1021         }
1022 }
1023
1024 static int ad74413r_write_raw(struct iio_dev *indio_dev,
1025                               struct iio_chan_spec const *chan,
1026                               int val, int val2, long info)
1027 {
1028         struct ad74413r_state *st = iio_priv(indio_dev);
1029
1030         switch (info) {
1031         case IIO_CHAN_INFO_RAW:
1032                 if (!chan->output)
1033                         return -EINVAL;
1034
1035                 if (val < 0 || val > AD74413R_DAC_CODE_MAX) {
1036                         dev_err(st->dev, "Invalid DAC code\n");
1037                         return -EINVAL;
1038                 }
1039
1040                 return ad74413r_set_channel_dac_code(st, chan->channel, val);
1041         case IIO_CHAN_INFO_SAMP_FREQ:
1042                 return ad74413r_set_adc_rate(st, chan->channel, val);
1043         default:
1044                 return -EINVAL;
1045         }
1046 }
1047
1048 static int ad74413r_read_avail(struct iio_dev *indio_dev,
1049                                struct iio_chan_spec const *chan,
1050                                const int **vals, int *type, int *length,
1051                                long info)
1052 {
1053         struct ad74413r_state *st = iio_priv(indio_dev);
1054
1055         switch (info) {
1056         case IIO_CHAN_INFO_SAMP_FREQ:
1057                 if (st->chip_info->hart_support) {
1058                         *vals = ad74413r_adc_sampling_rates_hart;
1059                         *length = ARRAY_SIZE(ad74413r_adc_sampling_rates_hart);
1060                 } else {
1061                         *vals = ad74413r_adc_sampling_rates;
1062                         *length = ARRAY_SIZE(ad74413r_adc_sampling_rates);
1063                 }
1064                 *type = IIO_VAL_INT;
1065                 return IIO_AVAIL_LIST;
1066         default:
1067                 return -EINVAL;
1068         }
1069 }
1070
1071 static const struct iio_buffer_setup_ops ad74413r_buffer_ops = {
1072         .postenable = &ad74413r_buffer_postenable,
1073         .predisable = &ad74413r_buffer_predisable,
1074 };
1075
1076 static const struct iio_trigger_ops ad74413r_trigger_ops = {
1077         .validate_device = iio_trigger_validate_own_device,
1078 };
1079
1080 static const struct iio_info ad74413r_info = {
1081         .read_raw = &ad74413r_read_raw,
1082         .write_raw = &ad74413r_write_raw,
1083         .read_avail = &ad74413r_read_avail,
1084         .update_scan_mode = &ad74413r_update_scan_mode,
1085 };
1086
1087 #define AD74413R_DAC_CHANNEL(_type, extra_mask_separate)                \
1088         {                                                               \
1089                 .type = (_type),                                        \
1090                 .indexed = 1,                                           \
1091                 .output = 1,                                            \
1092                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW)            \
1093                                       | (extra_mask_separate),          \
1094         }
1095
1096 #define AD74413R_ADC_CHANNEL(_type, extra_mask_separate)                \
1097         {                                                               \
1098                 .type = (_type),                                        \
1099                 .indexed = 1,                                           \
1100                 .output = 0,                                            \
1101                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW)            \
1102                                       | BIT(IIO_CHAN_INFO_SAMP_FREQ)    \
1103                                       | (extra_mask_separate),          \
1104                 .info_mask_separate_available =                         \
1105                                         BIT(IIO_CHAN_INFO_SAMP_FREQ),   \
1106                 .scan_type = {                                          \
1107                         .sign = 'u',                                    \
1108                         .realbits = 16,                                 \
1109                         .storagebits = 32,                              \
1110                         .shift = 8,                                     \
1111                         .endianness = IIO_BE,                           \
1112                 },                                                      \
1113         }
1114
1115 #define AD74413R_ADC_VOLTAGE_CHANNEL                                    \
1116         AD74413R_ADC_CHANNEL(IIO_VOLTAGE, BIT(IIO_CHAN_INFO_SCALE)      \
1117                              | BIT(IIO_CHAN_INFO_OFFSET))
1118
1119 #define AD74413R_ADC_CURRENT_CHANNEL                                    \
1120         AD74413R_ADC_CHANNEL(IIO_CURRENT,  BIT(IIO_CHAN_INFO_SCALE)     \
1121                              | BIT(IIO_CHAN_INFO_OFFSET))
1122
1123 static struct iio_chan_spec ad74413r_voltage_output_channels[] = {
1124         AD74413R_DAC_CHANNEL(IIO_VOLTAGE, BIT(IIO_CHAN_INFO_SCALE)),
1125         AD74413R_ADC_CURRENT_CHANNEL,
1126 };
1127
1128 static struct iio_chan_spec ad74413r_current_output_channels[] = {
1129         AD74413R_DAC_CHANNEL(IIO_CURRENT, BIT(IIO_CHAN_INFO_SCALE)),
1130         AD74413R_ADC_VOLTAGE_CHANNEL,
1131 };
1132
1133 static struct iio_chan_spec ad74413r_voltage_input_channels[] = {
1134         AD74413R_ADC_VOLTAGE_CHANNEL,
1135 };
1136
1137 static struct iio_chan_spec ad74413r_current_input_channels[] = {
1138         AD74413R_ADC_CURRENT_CHANNEL,
1139 };
1140
1141 static struct iio_chan_spec ad74413r_current_input_loop_channels[] = {
1142         AD74413R_DAC_CHANNEL(IIO_CURRENT, BIT(IIO_CHAN_INFO_SCALE)),
1143         AD74413R_ADC_CURRENT_CHANNEL,
1144 };
1145
1146 static struct iio_chan_spec ad74413r_resistance_input_channels[] = {
1147         AD74413R_ADC_CHANNEL(IIO_RESISTANCE, BIT(IIO_CHAN_INFO_PROCESSED)),
1148 };
1149
1150 static struct iio_chan_spec ad74413r_digital_input_channels[] = {
1151         AD74413R_ADC_VOLTAGE_CHANNEL,
1152 };
1153
1154 #define _AD74413R_CHANNELS(_channels)                   \
1155         {                                               \
1156                 .channels = _channels,                  \
1157                 .num_channels = ARRAY_SIZE(_channels),  \
1158         }
1159
1160 #define AD74413R_CHANNELS(name) \
1161         _AD74413R_CHANNELS(ad74413r_ ## name ## _channels)
1162
1163 static const struct ad74413r_channels ad74413r_channels_map[] = {
1164         [CH_FUNC_HIGH_IMPEDANCE] = AD74413R_CHANNELS(voltage_input),
1165         [CH_FUNC_VOLTAGE_OUTPUT] = AD74413R_CHANNELS(voltage_output),
1166         [CH_FUNC_CURRENT_OUTPUT] = AD74413R_CHANNELS(current_output),
1167         [CH_FUNC_VOLTAGE_INPUT] = AD74413R_CHANNELS(voltage_input),
1168         [CH_FUNC_CURRENT_INPUT_EXT_POWER] = AD74413R_CHANNELS(current_input),
1169         [CH_FUNC_CURRENT_INPUT_LOOP_POWER] = AD74413R_CHANNELS(current_input_loop),
1170         [CH_FUNC_RESISTANCE_INPUT] = AD74413R_CHANNELS(resistance_input),
1171         [CH_FUNC_DIGITAL_INPUT_LOGIC] = AD74413R_CHANNELS(digital_input),
1172         [CH_FUNC_DIGITAL_INPUT_LOOP_POWER] = AD74413R_CHANNELS(digital_input),
1173         [CH_FUNC_CURRENT_INPUT_EXT_POWER_HART] = AD74413R_CHANNELS(current_input),
1174         [CH_FUNC_CURRENT_INPUT_LOOP_POWER_HART] = AD74413R_CHANNELS(current_input),
1175 };
1176
1177 static int ad74413r_parse_channel_config(struct iio_dev *indio_dev,
1178                                          struct fwnode_handle *channel_node)
1179 {
1180         struct ad74413r_state *st = iio_priv(indio_dev);
1181         struct ad74413r_channel_config *config;
1182         u32 index;
1183         int ret;
1184
1185         ret = fwnode_property_read_u32(channel_node, "reg", &index);
1186         if (ret) {
1187                 dev_err(st->dev, "Failed to read channel reg: %d\n", ret);
1188                 return ret;
1189         }
1190
1191         if (index >= AD74413R_CHANNEL_MAX) {
1192                 dev_err(st->dev, "Channel index %u is too large\n", index);
1193                 return -EINVAL;
1194         }
1195
1196         config = &st->channel_configs[index];
1197         if (config->initialized) {
1198                 dev_err(st->dev, "Channel %u already initialized\n", index);
1199                 return -EINVAL;
1200         }
1201
1202         config->func = CH_FUNC_HIGH_IMPEDANCE;
1203         fwnode_property_read_u32(channel_node, "adi,ch-func", &config->func);
1204
1205         if (config->func < CH_FUNC_MIN || config->func > CH_FUNC_MAX) {
1206                 dev_err(st->dev, "Invalid channel function %u\n", config->func);
1207                 return -EINVAL;
1208         }
1209
1210         if (!st->chip_info->hart_support &&
1211             (config->func == CH_FUNC_CURRENT_INPUT_EXT_POWER_HART ||
1212              config->func == CH_FUNC_CURRENT_INPUT_LOOP_POWER_HART)) {
1213                 dev_err(st->dev, "Unsupported HART function %u\n", config->func);
1214                 return -EINVAL;
1215         }
1216
1217         if (config->func == CH_FUNC_DIGITAL_INPUT_LOGIC ||
1218             config->func == CH_FUNC_DIGITAL_INPUT_LOOP_POWER)
1219                 st->num_comparator_gpios++;
1220
1221         config->gpo_comparator = fwnode_property_read_bool(channel_node,
1222                 "adi,gpo-comparator");
1223
1224         fwnode_property_read_u32(channel_node, "drive-strength-microamp",
1225                                  &config->drive_strength);
1226
1227         if (!config->gpo_comparator)
1228                 st->num_gpo_gpios++;
1229
1230         indio_dev->num_channels += ad74413r_channels_map[config->func].num_channels;
1231
1232         config->initialized = true;
1233
1234         return 0;
1235 }
1236
1237 static int ad74413r_parse_channel_configs(struct iio_dev *indio_dev)
1238 {
1239         struct ad74413r_state *st = iio_priv(indio_dev);
1240         struct fwnode_handle *channel_node = NULL;
1241         int ret;
1242
1243         fwnode_for_each_available_child_node(dev_fwnode(st->dev), channel_node) {
1244                 ret = ad74413r_parse_channel_config(indio_dev, channel_node);
1245                 if (ret)
1246                         goto put_channel_node;
1247         }
1248
1249         return 0;
1250
1251 put_channel_node:
1252         fwnode_handle_put(channel_node);
1253
1254         return ret;
1255 }
1256
1257 static int ad74413r_setup_channels(struct iio_dev *indio_dev)
1258 {
1259         struct ad74413r_state *st = iio_priv(indio_dev);
1260         struct ad74413r_channel_config *config;
1261         struct iio_chan_spec *channels, *chans;
1262         unsigned int i, num_chans, chan_i;
1263         int ret;
1264
1265         channels = devm_kcalloc(st->dev, sizeof(*channels),
1266                                 indio_dev->num_channels, GFP_KERNEL);
1267         if (!channels)
1268                 return -ENOMEM;
1269
1270         indio_dev->channels = channels;
1271
1272         for (i = 0; i < AD74413R_CHANNEL_MAX; i++) {
1273                 config = &st->channel_configs[i];
1274                 chans = ad74413r_channels_map[config->func].channels;
1275                 num_chans = ad74413r_channels_map[config->func].num_channels;
1276
1277                 memcpy(channels, chans, num_chans * sizeof(*chans));
1278
1279                 for (chan_i = 0; chan_i < num_chans; chan_i++) {
1280                         struct iio_chan_spec *chan = &channels[chan_i];
1281
1282                         chan->channel = i;
1283                         if (chan->output)
1284                                 chan->scan_index = -1;
1285                         else
1286                                 chan->scan_index = i;
1287                 }
1288
1289                 ret = ad74413r_set_channel_function(st, i, config->func);
1290                 if (ret)
1291                         return ret;
1292
1293                 channels += num_chans;
1294         }
1295
1296         return 0;
1297 }
1298
1299 static int ad74413r_setup_gpios(struct ad74413r_state *st)
1300 {
1301         struct ad74413r_channel_config *config;
1302         unsigned int comp_gpio_i = 0;
1303         unsigned int gpo_gpio_i = 0;
1304         unsigned int i;
1305         u8 gpo_config;
1306         u32 strength;
1307         int ret;
1308
1309         for (i = 0; i < AD74413R_CHANNEL_MAX; i++) {
1310                 config = &st->channel_configs[i];
1311
1312                 if (config->gpo_comparator) {
1313                         gpo_config = AD74413R_GPO_CONFIG_COMPARATOR;
1314                 } else {
1315                         gpo_config = AD74413R_GPO_CONFIG_LOGIC;
1316                         st->gpo_gpio_offsets[gpo_gpio_i++] = i;
1317                 }
1318
1319                 if (config->func == CH_FUNC_DIGITAL_INPUT_LOGIC ||
1320                     config->func == CH_FUNC_DIGITAL_INPUT_LOOP_POWER)
1321                         st->comp_gpio_offsets[comp_gpio_i++] = i;
1322
1323                 strength = config->drive_strength;
1324                 ret = ad74413r_set_comp_drive_strength(st, i, strength);
1325                 if (ret)
1326                         return ret;
1327
1328                 ret = ad74413r_set_gpo_config(st, i, gpo_config);
1329                 if (ret)
1330                         return ret;
1331         }
1332
1333         return 0;
1334 }
1335
1336 static void ad74413r_regulator_disable(void *regulator)
1337 {
1338         regulator_disable(regulator);
1339 }
1340
1341 static int ad74413r_probe(struct spi_device *spi)
1342 {
1343         struct ad74413r_state *st;
1344         struct iio_dev *indio_dev;
1345         int ret;
1346
1347         indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
1348         if (!indio_dev)
1349                 return -ENOMEM;
1350
1351         st = iio_priv(indio_dev);
1352
1353         st->spi = spi;
1354         st->dev = &spi->dev;
1355         st->chip_info = device_get_match_data(&spi->dev);
1356         if (!st->chip_info) {
1357                 const struct spi_device_id *id = spi_get_device_id(spi);
1358
1359                 if (id)
1360                         st->chip_info =
1361                                 (struct ad74413r_chip_info *)id->driver_data;
1362                 if (!st->chip_info)
1363                         return -EINVAL;
1364         }
1365
1366         mutex_init(&st->lock);
1367         init_completion(&st->adc_data_completion);
1368
1369         st->regmap = devm_regmap_init(st->dev, NULL, st,
1370                                       &ad74413r_regmap_config);
1371         if (IS_ERR(st->regmap))
1372                 return PTR_ERR(st->regmap);
1373
1374         st->reset_gpio = devm_gpiod_get_optional(st->dev, "reset", GPIOD_OUT_LOW);
1375         if (IS_ERR(st->reset_gpio))
1376                 return PTR_ERR(st->reset_gpio);
1377
1378         st->refin_reg = devm_regulator_get(st->dev, "refin");
1379         if (IS_ERR(st->refin_reg))
1380                 return dev_err_probe(st->dev, PTR_ERR(st->refin_reg),
1381                                      "Failed to get refin regulator\n");
1382
1383         ret = regulator_enable(st->refin_reg);
1384         if (ret)
1385                 return ret;
1386
1387         ret = devm_add_action_or_reset(st->dev, ad74413r_regulator_disable,
1388                                        st->refin_reg);
1389         if (ret)
1390                 return ret;
1391
1392         st->sense_resistor_ohms = 100000000;
1393         device_property_read_u32(st->dev, "shunt-resistor-micro-ohms",
1394                                  &st->sense_resistor_ohms);
1395         st->sense_resistor_ohms /= 1000000;
1396
1397         st->trig = devm_iio_trigger_alloc(st->dev, "%s-dev%d",
1398                                           st->chip_info->name, iio_device_id(indio_dev));
1399         if (!st->trig)
1400                 return -ENOMEM;
1401
1402         st->trig->ops = &ad74413r_trigger_ops;
1403         iio_trigger_set_drvdata(st->trig, st);
1404
1405         ret = devm_iio_trigger_register(st->dev, st->trig);
1406         if (ret)
1407                 return ret;
1408
1409         indio_dev->name = st->chip_info->name;
1410         indio_dev->modes = INDIO_DIRECT_MODE;
1411         indio_dev->info = &ad74413r_info;
1412         indio_dev->trig = iio_trigger_get(st->trig);
1413
1414         ret = ad74413r_reset(st);
1415         if (ret)
1416                 return ret;
1417
1418         ret = ad74413r_parse_channel_configs(indio_dev);
1419         if (ret)
1420                 return ret;
1421
1422         ret = ad74413r_setup_channels(indio_dev);
1423         if (ret)
1424                 return ret;
1425
1426         ret = ad74413r_setup_gpios(st);
1427         if (ret)
1428                 return ret;
1429
1430         if (st->num_gpo_gpios) {
1431                 st->gpo_gpiochip.owner = THIS_MODULE;
1432                 st->gpo_gpiochip.label = st->chip_info->name;
1433                 st->gpo_gpiochip.base = -1;
1434                 st->gpo_gpiochip.ngpio = st->num_gpo_gpios;
1435                 st->gpo_gpiochip.parent = st->dev;
1436                 st->gpo_gpiochip.can_sleep = true;
1437                 st->gpo_gpiochip.set = ad74413r_gpio_set;
1438                 st->gpo_gpiochip.set_multiple = ad74413r_gpio_set_multiple;
1439                 st->gpo_gpiochip.set_config = ad74413r_gpio_set_gpo_config;
1440                 st->gpo_gpiochip.get_direction =
1441                         ad74413r_gpio_get_gpo_direction;
1442
1443                 ret = devm_gpiochip_add_data(st->dev, &st->gpo_gpiochip, st);
1444                 if (ret)
1445                         return ret;
1446         }
1447
1448         if (st->num_comparator_gpios) {
1449                 st->comp_gpiochip.owner = THIS_MODULE;
1450                 st->comp_gpiochip.label = st->chip_info->name;
1451                 st->comp_gpiochip.base = -1;
1452                 st->comp_gpiochip.ngpio = st->num_comparator_gpios;
1453                 st->comp_gpiochip.parent = st->dev;
1454                 st->comp_gpiochip.can_sleep = true;
1455                 st->comp_gpiochip.get = ad74413r_gpio_get;
1456                 st->comp_gpiochip.get_multiple = ad74413r_gpio_get_multiple;
1457                 st->comp_gpiochip.set_config = ad74413r_gpio_set_comp_config;
1458                 st->comp_gpiochip.get_direction =
1459                         ad74413r_gpio_get_comp_direction;
1460
1461                 ret = devm_gpiochip_add_data(st->dev, &st->comp_gpiochip, st);
1462                 if (ret)
1463                         return ret;
1464         }
1465
1466         ret = ad74413r_set_adc_conv_seq(st, AD74413R_CONV_SEQ_OFF);
1467         if (ret)
1468                 return ret;
1469
1470         ret = devm_request_irq(st->dev, spi->irq, ad74413r_adc_data_interrupt,
1471                                0, st->chip_info->name, indio_dev);
1472         if (ret)
1473                 return dev_err_probe(st->dev, ret, "Failed to request irq\n");
1474
1475         ret = devm_iio_triggered_buffer_setup(st->dev, indio_dev,
1476                                               &iio_pollfunc_store_time,
1477                                               &ad74413r_trigger_handler,
1478                                               &ad74413r_buffer_ops);
1479         if (ret)
1480                 return ret;
1481
1482         return devm_iio_device_register(st->dev, indio_dev);
1483 }
1484
1485 static int ad74413r_unregister_driver(struct spi_driver *spi)
1486 {
1487         spi_unregister_driver(spi);
1488
1489         return 0;
1490 }
1491
1492 static int __init ad74413r_register_driver(struct spi_driver *spi)
1493 {
1494         crc8_populate_msb(ad74413r_crc8_table, AD74413R_CRC_POLYNOMIAL);
1495
1496         return spi_register_driver(spi);
1497 }
1498
1499 static const struct ad74413r_chip_info ad74412r_chip_info_data = {
1500         .hart_support = false,
1501         .name = "ad74412r",
1502 };
1503
1504 static const struct ad74413r_chip_info ad74413r_chip_info_data = {
1505         .hart_support = true,
1506         .name = "ad74413r",
1507 };
1508
1509 static const struct of_device_id ad74413r_dt_id[] = {
1510         {
1511                 .compatible = "adi,ad74412r",
1512                 .data = &ad74412r_chip_info_data,
1513         },
1514         {
1515                 .compatible = "adi,ad74413r",
1516                 .data = &ad74413r_chip_info_data,
1517         },
1518         {},
1519 };
1520 MODULE_DEVICE_TABLE(of, ad74413r_dt_id);
1521
1522 static const struct spi_device_id ad74413r_spi_id[] = {
1523         { .name = "ad74412r", .driver_data = (kernel_ulong_t)&ad74412r_chip_info_data },
1524         { .name = "ad74413r", .driver_data = (kernel_ulong_t)&ad74413r_chip_info_data },
1525         {}
1526 };
1527 MODULE_DEVICE_TABLE(spi, ad74413r_spi_id);
1528
1529 static struct spi_driver ad74413r_driver = {
1530         .driver = {
1531                    .name = "ad74413r",
1532                    .of_match_table = ad74413r_dt_id,
1533         },
1534         .probe = ad74413r_probe,
1535         .id_table = ad74413r_spi_id,
1536 };
1537
1538 module_driver(ad74413r_driver,
1539               ad74413r_register_driver,
1540               ad74413r_unregister_driver);
1541
1542 MODULE_AUTHOR("Cosmin Tanislav <[email protected]>");
1543 MODULE_DESCRIPTION("Analog Devices AD74413R ADDAC");
1544 MODULE_LICENSE("GPL v2");