2 * EBI driver for Atmel chips
3 * inspired by the fsl weim bus driver
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
12 #include <linux/clk.h>
14 #include <linux/mfd/syscon.h>
15 #include <linux/mfd/syscon/atmel-matrix.h>
16 #include <linux/mfd/syscon/atmel-smc.h>
17 #include <linux/init.h>
18 #include <linux/of_device.h>
19 #include <linux/regmap.h>
21 struct at91sam9_smc_timings {
35 struct at91sam9_smc_generic_fields {
36 struct regmap_field *setup;
37 struct regmap_field *pulse;
38 struct regmap_field *cycle;
39 struct regmap_field *mode;
42 struct at91sam9_ebi_dev_config {
43 struct at91sam9_smc_timings timings;
47 struct at91_ebi_dev_config {
50 struct at91sam9_ebi_dev_config sam9;
57 struct list_head node;
61 struct at91_ebi_dev_config configs[];
64 struct at91_ebi_caps {
65 unsigned int available_cs;
66 const struct reg_field *ebi_csa;
67 void (*get_config)(struct at91_ebi_dev *ebid,
68 struct at91_ebi_dev_config *conf);
69 int (*xlate_config)(struct at91_ebi_dev *ebid,
70 struct device_node *configs_np,
71 struct at91_ebi_dev_config *conf);
72 int (*apply_config)(struct at91_ebi_dev *ebid,
73 struct at91_ebi_dev_config *conf);
74 int (*init)(struct at91_ebi *ebi);
79 struct regmap *matrix;
81 struct regmap *regmap;
84 struct regmap_field *ebi_csa;
87 const struct at91_ebi_caps *caps;
88 struct list_head devs;
90 struct at91sam9_smc_generic_fields sam9;
94 static void at91sam9_ebi_get_config(struct at91_ebi_dev *ebid,
95 struct at91_ebi_dev_config *conf)
97 struct at91sam9_smc_generic_fields *fields = &ebid->ebi->sam9;
98 unsigned int clk_period = NSEC_PER_SEC / clk_get_rate(ebid->ebi->clk);
99 struct at91sam9_ebi_dev_config *config = &conf->sam9;
100 struct at91sam9_smc_timings *timings = &config->timings;
103 regmap_fields_read(fields->mode, conf->cs, &val);
104 config->mode = val & ~AT91_SMC_TDF;
106 val = (val & AT91_SMC_TDF) >> 16;
107 timings->tdf_ns = clk_period * val;
109 regmap_fields_read(fields->setup, conf->cs, &val);
110 timings->ncs_rd_setup_ns = (val >> 24) & 0x1f;
111 timings->ncs_rd_setup_ns += ((val >> 29) & 0x1) * 128;
112 timings->ncs_rd_setup_ns *= clk_period;
113 timings->nrd_setup_ns = (val >> 16) & 0x1f;
114 timings->nrd_setup_ns += ((val >> 21) & 0x1) * 128;
115 timings->nrd_setup_ns *= clk_period;
116 timings->ncs_wr_setup_ns = (val >> 8) & 0x1f;
117 timings->ncs_wr_setup_ns += ((val >> 13) & 0x1) * 128;
118 timings->ncs_wr_setup_ns *= clk_period;
119 timings->nwe_setup_ns = val & 0x1f;
120 timings->nwe_setup_ns += ((val >> 5) & 0x1) * 128;
121 timings->nwe_setup_ns *= clk_period;
123 regmap_fields_read(fields->pulse, conf->cs, &val);
124 timings->ncs_rd_pulse_ns = (val >> 24) & 0x3f;
125 timings->ncs_rd_pulse_ns += ((val >> 30) & 0x1) * 256;
126 timings->ncs_rd_pulse_ns *= clk_period;
127 timings->nrd_pulse_ns = (val >> 16) & 0x3f;
128 timings->nrd_pulse_ns += ((val >> 22) & 0x1) * 256;
129 timings->nrd_pulse_ns *= clk_period;
130 timings->ncs_wr_pulse_ns = (val >> 8) & 0x3f;
131 timings->ncs_wr_pulse_ns += ((val >> 14) & 0x1) * 256;
132 timings->ncs_wr_pulse_ns *= clk_period;
133 timings->nwe_pulse_ns = val & 0x3f;
134 timings->nwe_pulse_ns += ((val >> 6) & 0x1) * 256;
135 timings->nwe_pulse_ns *= clk_period;
137 regmap_fields_read(fields->cycle, conf->cs, &val);
138 timings->nrd_cycle_ns = (val >> 16) & 0x7f;
139 timings->nrd_cycle_ns += ((val >> 23) & 0x3) * 256;
140 timings->nrd_cycle_ns *= clk_period;
141 timings->nwe_cycle_ns = val & 0x7f;
142 timings->nwe_cycle_ns += ((val >> 7) & 0x3) * 256;
143 timings->nwe_cycle_ns *= clk_period;
146 static int at91_xlate_timing(struct device_node *np, const char *prop,
147 u32 *val, bool *required)
149 if (!of_property_read_u32(np, prop, val)) {
160 static int at91sam9_smc_xslate_timings(struct at91_ebi_dev *ebid,
161 struct device_node *np,
162 struct at91sam9_smc_timings *timings,
167 ret = at91_xlate_timing(np, "atmel,smc-ncs-rd-setup-ns",
168 &timings->ncs_rd_setup_ns, required);
172 ret = at91_xlate_timing(np, "atmel,smc-nrd-setup-ns",
173 &timings->nrd_setup_ns, required);
177 ret = at91_xlate_timing(np, "atmel,smc-ncs-wr-setup-ns",
178 &timings->ncs_wr_setup_ns, required);
182 ret = at91_xlate_timing(np, "atmel,smc-nwe-setup-ns",
183 &timings->nwe_setup_ns, required);
187 ret = at91_xlate_timing(np, "atmel,smc-ncs-rd-pulse-ns",
188 &timings->ncs_rd_pulse_ns, required);
192 ret = at91_xlate_timing(np, "atmel,smc-nrd-pulse-ns",
193 &timings->nrd_pulse_ns, required);
197 ret = at91_xlate_timing(np, "atmel,smc-ncs-wr-pulse-ns",
198 &timings->ncs_wr_pulse_ns, required);
202 ret = at91_xlate_timing(np, "atmel,smc-nwe-pulse-ns",
203 &timings->nwe_pulse_ns, required);
207 ret = at91_xlate_timing(np, "atmel,smc-nwe-cycle-ns",
208 &timings->nwe_cycle_ns, required);
212 ret = at91_xlate_timing(np, "atmel,smc-nrd-cycle-ns",
213 &timings->nrd_cycle_ns, required);
217 ret = at91_xlate_timing(np, "atmel,smc-tdf-ns",
218 &timings->tdf_ns, required);
222 dev_err(ebid->ebi->dev,
223 "missing or invalid timings definition in %s",
229 static int at91sam9_ebi_xslate_config(struct at91_ebi_dev *ebid,
230 struct device_node *np,
231 struct at91_ebi_dev_config *conf)
233 struct at91sam9_ebi_dev_config *config = &conf->sam9;
234 bool required = false;
239 ret = of_property_read_u32(np, "atmel,smc-bus-width", &tmp);
243 config->mode |= AT91_SMC_DBW_8;
247 config->mode |= AT91_SMC_DBW_16;
251 config->mode |= AT91_SMC_DBW_32;
261 if (of_property_read_bool(np, "atmel,smc-tdf-optimized")) {
262 config->mode |= AT91_SMC_TDFMODE_OPTIMIZED;
267 of_property_read_string(np, "atmel,smc-byte-access-type", &tmp_str);
268 if (tmp_str && !strcmp(tmp_str, "write")) {
269 config->mode |= AT91_SMC_BAT_WRITE;
274 of_property_read_string(np, "atmel,smc-read-mode", &tmp_str);
275 if (tmp_str && !strcmp(tmp_str, "nrd")) {
276 config->mode |= AT91_SMC_READMODE_NRD;
281 of_property_read_string(np, "atmel,smc-write-mode", &tmp_str);
282 if (tmp_str && !strcmp(tmp_str, "nwe")) {
283 config->mode |= AT91_SMC_WRITEMODE_NWE;
288 of_property_read_string(np, "atmel,smc-exnw-mode", &tmp_str);
290 if (!strcmp(tmp_str, "frozen"))
291 config->mode |= AT91_SMC_EXNWMODE_FROZEN;
292 else if (!strcmp(tmp_str, "ready"))
293 config->mode |= AT91_SMC_EXNWMODE_READY;
294 else if (strcmp(tmp_str, "disabled"))
300 ret = of_property_read_u32(np, "atmel,smc-page-mode", &tmp);
304 config->mode |= AT91_SMC_PS_4;
308 config->mode |= AT91_SMC_PS_8;
312 config->mode |= AT91_SMC_PS_16;
316 config->mode |= AT91_SMC_PS_32;
323 config->mode |= AT91_SMC_PMEN;
327 ret = at91sam9_smc_xslate_timings(ebid, np, &config->timings,
335 static int at91sam9_ebi_apply_config(struct at91_ebi_dev *ebid,
336 struct at91_ebi_dev_config *conf)
338 unsigned int clk_rate = clk_get_rate(ebid->ebi->clk);
339 unsigned int clk_period = NSEC_PER_SEC / clk_rate;
340 struct at91sam9_ebi_dev_config *config = &conf->sam9;
341 struct at91sam9_smc_timings *timings = &config->timings;
342 struct at91sam9_smc_generic_fields *fields = &ebid->ebi->sam9;
346 coded_val = at91sam9_smc_setup_ns_to_cycles(clk_rate,
347 timings->ncs_rd_setup_ns);
348 val = AT91SAM9_SMC_NCS_NRDSETUP(coded_val);
349 coded_val = at91sam9_smc_setup_ns_to_cycles(clk_rate,
350 timings->nrd_setup_ns);
351 val |= AT91SAM9_SMC_NRDSETUP(coded_val);
352 coded_val = at91sam9_smc_setup_ns_to_cycles(clk_rate,
353 timings->ncs_wr_setup_ns);
354 val |= AT91SAM9_SMC_NCS_WRSETUP(coded_val);
355 coded_val = at91sam9_smc_setup_ns_to_cycles(clk_rate,
356 timings->nwe_setup_ns);
357 val |= AT91SAM9_SMC_NWESETUP(coded_val);
358 regmap_fields_write(fields->setup, conf->cs, val);
360 coded_val = at91sam9_smc_pulse_ns_to_cycles(clk_rate,
361 timings->ncs_rd_pulse_ns);
362 val = AT91SAM9_SMC_NCS_NRDPULSE(coded_val);
363 coded_val = at91sam9_smc_pulse_ns_to_cycles(clk_rate,
364 timings->nrd_pulse_ns);
365 val |= AT91SAM9_SMC_NRDPULSE(coded_val);
366 coded_val = at91sam9_smc_pulse_ns_to_cycles(clk_rate,
367 timings->ncs_wr_pulse_ns);
368 val |= AT91SAM9_SMC_NCS_WRPULSE(coded_val);
369 coded_val = at91sam9_smc_pulse_ns_to_cycles(clk_rate,
370 timings->nwe_pulse_ns);
371 val |= AT91SAM9_SMC_NWEPULSE(coded_val);
372 regmap_fields_write(fields->pulse, conf->cs, val);
374 coded_val = at91sam9_smc_cycle_ns_to_cycles(clk_rate,
375 timings->nrd_cycle_ns);
376 val = AT91SAM9_SMC_NRDCYCLE(coded_val);
377 coded_val = at91sam9_smc_cycle_ns_to_cycles(clk_rate,
378 timings->nwe_cycle_ns);
379 val |= AT91SAM9_SMC_NWECYCLE(coded_val);
380 regmap_fields_write(fields->cycle, conf->cs, val);
382 val = DIV_ROUND_UP(timings->tdf_ns, clk_period);
383 if (val > AT91_SMC_TDF_MAX)
384 val = AT91_SMC_TDF_MAX;
385 regmap_fields_write(fields->mode, conf->cs,
386 config->mode | AT91_SMC_TDF_(val));
391 static int at91sam9_ebi_init(struct at91_ebi *ebi)
393 struct at91sam9_smc_generic_fields *fields = &ebi->sam9;
394 struct reg_field field = REG_FIELD(0, 0, 31);
396 field.id_size = fls(ebi->caps->available_cs);
397 field.id_offset = AT91SAM9_SMC_GENERIC_BLK_SZ;
399 field.reg = AT91SAM9_SMC_SETUP(AT91SAM9_SMC_GENERIC);
400 fields->setup = devm_regmap_field_alloc(ebi->dev, ebi->smc.regmap,
402 if (IS_ERR(fields->setup))
403 return PTR_ERR(fields->setup);
405 field.reg = AT91SAM9_SMC_PULSE(AT91SAM9_SMC_GENERIC);
406 fields->pulse = devm_regmap_field_alloc(ebi->dev, ebi->smc.regmap,
408 if (IS_ERR(fields->pulse))
409 return PTR_ERR(fields->pulse);
411 field.reg = AT91SAM9_SMC_CYCLE(AT91SAM9_SMC_GENERIC);
412 fields->cycle = devm_regmap_field_alloc(ebi->dev, ebi->smc.regmap,
414 if (IS_ERR(fields->cycle))
415 return PTR_ERR(fields->cycle);
417 field.reg = AT91SAM9_SMC_MODE(AT91SAM9_SMC_GENERIC);
418 fields->mode = devm_regmap_field_alloc(ebi->dev, ebi->smc.regmap,
420 return PTR_ERR_OR_ZERO(fields->mode);
423 static int sama5d3_ebi_init(struct at91_ebi *ebi)
425 struct at91sam9_smc_generic_fields *fields = &ebi->sam9;
426 struct reg_field field = REG_FIELD(0, 0, 31);
428 field.id_size = fls(ebi->caps->available_cs);
429 field.id_offset = SAMA5_SMC_GENERIC_BLK_SZ;
431 field.reg = AT91SAM9_SMC_SETUP(SAMA5_SMC_GENERIC);
432 fields->setup = devm_regmap_field_alloc(ebi->dev, ebi->smc.regmap,
434 if (IS_ERR(fields->setup))
435 return PTR_ERR(fields->setup);
437 field.reg = AT91SAM9_SMC_PULSE(SAMA5_SMC_GENERIC);
438 fields->pulse = devm_regmap_field_alloc(ebi->dev, ebi->smc.regmap,
440 if (IS_ERR(fields->pulse))
441 return PTR_ERR(fields->pulse);
443 field.reg = AT91SAM9_SMC_CYCLE(SAMA5_SMC_GENERIC);
444 fields->cycle = devm_regmap_field_alloc(ebi->dev, ebi->smc.regmap,
446 if (IS_ERR(fields->cycle))
447 return PTR_ERR(fields->cycle);
449 field.reg = SAMA5_SMC_MODE(SAMA5_SMC_GENERIC);
450 fields->mode = devm_regmap_field_alloc(ebi->dev, ebi->smc.regmap,
452 return PTR_ERR_OR_ZERO(fields->mode);
455 static int at91_ebi_dev_setup(struct at91_ebi *ebi, struct device_node *np,
458 const struct at91_ebi_caps *caps = ebi->caps;
459 struct at91_ebi_dev_config conf = { };
460 struct device *dev = ebi->dev;
461 struct at91_ebi_dev *ebid;
462 unsigned long cslines = 0;
463 int ret, numcs = 0, nentries, i;
467 nentries = of_property_count_elems_of_size(np, "reg",
468 reg_cells * sizeof(u32));
469 for (i = 0; i < nentries; i++) {
470 ret = of_property_read_u32_index(np, "reg", i * reg_cells,
475 if (cs >= AT91_MATRIX_EBI_NUM_CS ||
476 !(ebi->caps->available_cs & BIT(cs))) {
477 dev_err(dev, "invalid reg property in %s\n",
482 if (!test_and_set_bit(cs, &cslines))
487 dev_err(dev, "invalid reg property in %s\n", np->full_name);
491 ebid = devm_kzalloc(ebi->dev,
492 sizeof(*ebid) + (numcs * sizeof(*ebid->configs)),
499 ret = caps->xlate_config(ebid, np, &conf);
506 for_each_set_bit(cs, &cslines, AT91_MATRIX_EBI_NUM_CS) {
507 ebid->configs[i].cs = cs;
511 ret = caps->apply_config(ebid, &conf);
516 caps->get_config(ebid, &ebid->configs[i]);
519 * Attach the EBI device to the generic SMC logic if at least
520 * one "atmel,smc-" property is present.
522 if (ebi->ebi_csa && apply)
523 regmap_field_update_bits(ebi->ebi_csa,
529 list_add_tail(&ebid->node, &ebi->devs);
534 static const struct reg_field at91sam9260_ebi_csa =
535 REG_FIELD(AT91SAM9260_MATRIX_EBICSA, 0,
536 AT91_MATRIX_EBI_NUM_CS - 1);
538 static const struct at91_ebi_caps at91sam9260_ebi_caps = {
539 .available_cs = 0xff,
540 .ebi_csa = &at91sam9260_ebi_csa,
541 .get_config = at91sam9_ebi_get_config,
542 .xlate_config = at91sam9_ebi_xslate_config,
543 .apply_config = at91sam9_ebi_apply_config,
544 .init = at91sam9_ebi_init,
547 static const struct reg_field at91sam9261_ebi_csa =
548 REG_FIELD(AT91SAM9261_MATRIX_EBICSA, 0,
549 AT91_MATRIX_EBI_NUM_CS - 1);
551 static const struct at91_ebi_caps at91sam9261_ebi_caps = {
552 .available_cs = 0xff,
553 .ebi_csa = &at91sam9261_ebi_csa,
554 .get_config = at91sam9_ebi_get_config,
555 .xlate_config = at91sam9_ebi_xslate_config,
556 .apply_config = at91sam9_ebi_apply_config,
557 .init = at91sam9_ebi_init,
560 static const struct reg_field at91sam9263_ebi0_csa =
561 REG_FIELD(AT91SAM9263_MATRIX_EBI0CSA, 0,
562 AT91_MATRIX_EBI_NUM_CS - 1);
564 static const struct at91_ebi_caps at91sam9263_ebi0_caps = {
565 .available_cs = 0x3f,
566 .ebi_csa = &at91sam9263_ebi0_csa,
567 .get_config = at91sam9_ebi_get_config,
568 .xlate_config = at91sam9_ebi_xslate_config,
569 .apply_config = at91sam9_ebi_apply_config,
570 .init = at91sam9_ebi_init,
573 static const struct reg_field at91sam9263_ebi1_csa =
574 REG_FIELD(AT91SAM9263_MATRIX_EBI1CSA, 0,
575 AT91_MATRIX_EBI_NUM_CS - 1);
577 static const struct at91_ebi_caps at91sam9263_ebi1_caps = {
579 .ebi_csa = &at91sam9263_ebi1_csa,
580 .get_config = at91sam9_ebi_get_config,
581 .xlate_config = at91sam9_ebi_xslate_config,
582 .apply_config = at91sam9_ebi_apply_config,
583 .init = at91sam9_ebi_init,
586 static const struct reg_field at91sam9rl_ebi_csa =
587 REG_FIELD(AT91SAM9RL_MATRIX_EBICSA, 0,
588 AT91_MATRIX_EBI_NUM_CS - 1);
590 static const struct at91_ebi_caps at91sam9rl_ebi_caps = {
591 .available_cs = 0x3f,
592 .ebi_csa = &at91sam9rl_ebi_csa,
593 .get_config = at91sam9_ebi_get_config,
594 .xlate_config = at91sam9_ebi_xslate_config,
595 .apply_config = at91sam9_ebi_apply_config,
596 .init = at91sam9_ebi_init,
599 static const struct reg_field at91sam9g45_ebi_csa =
600 REG_FIELD(AT91SAM9G45_MATRIX_EBICSA, 0,
601 AT91_MATRIX_EBI_NUM_CS - 1);
603 static const struct at91_ebi_caps at91sam9g45_ebi_caps = {
604 .available_cs = 0x3f,
605 .ebi_csa = &at91sam9g45_ebi_csa,
606 .get_config = at91sam9_ebi_get_config,
607 .xlate_config = at91sam9_ebi_xslate_config,
608 .apply_config = at91sam9_ebi_apply_config,
609 .init = at91sam9_ebi_init,
612 static const struct at91_ebi_caps at91sam9x5_ebi_caps = {
613 .available_cs = 0x3f,
614 .ebi_csa = &at91sam9263_ebi0_csa,
615 .get_config = at91sam9_ebi_get_config,
616 .xlate_config = at91sam9_ebi_xslate_config,
617 .apply_config = at91sam9_ebi_apply_config,
618 .init = at91sam9_ebi_init,
621 static const struct at91_ebi_caps sama5d3_ebi_caps = {
623 .get_config = at91sam9_ebi_get_config,
624 .xlate_config = at91sam9_ebi_xslate_config,
625 .apply_config = at91sam9_ebi_apply_config,
626 .init = sama5d3_ebi_init,
629 static const struct of_device_id at91_ebi_id_table[] = {
631 .compatible = "atmel,at91sam9260-ebi",
632 .data = &at91sam9260_ebi_caps,
635 .compatible = "atmel,at91sam9261-ebi",
636 .data = &at91sam9261_ebi_caps,
639 .compatible = "atmel,at91sam9263-ebi0",
640 .data = &at91sam9263_ebi0_caps,
643 .compatible = "atmel,at91sam9263-ebi1",
644 .data = &at91sam9263_ebi1_caps,
647 .compatible = "atmel,at91sam9rl-ebi",
648 .data = &at91sam9rl_ebi_caps,
651 .compatible = "atmel,at91sam9g45-ebi",
652 .data = &at91sam9g45_ebi_caps,
655 .compatible = "atmel,at91sam9x5-ebi",
656 .data = &at91sam9x5_ebi_caps,
659 .compatible = "atmel,sama5d3-ebi",
660 .data = &sama5d3_ebi_caps,
665 static int at91_ebi_dev_disable(struct at91_ebi *ebi, struct device_node *np)
667 struct device *dev = ebi->dev;
668 struct property *newprop;
670 newprop = devm_kzalloc(dev, sizeof(*newprop), GFP_KERNEL);
674 newprop->name = devm_kstrdup(dev, "status", GFP_KERNEL);
678 newprop->value = devm_kstrdup(dev, "disabled", GFP_KERNEL);
682 newprop->length = sizeof("disabled");
684 return of_update_property(np, newprop);
687 static int at91_ebi_probe(struct platform_device *pdev)
689 struct device *dev = &pdev->dev;
690 struct device_node *child, *np = dev->of_node, *smc_np;
691 const struct of_device_id *match;
692 struct at91_ebi *ebi;
697 match = of_match_device(at91_ebi_id_table, dev);
698 if (!match || !match->data)
701 ebi = devm_kzalloc(dev, sizeof(*ebi), GFP_KERNEL);
705 INIT_LIST_HEAD(&ebi->devs);
706 ebi->caps = match->data;
709 clk = devm_clk_get(dev, NULL);
715 smc_np = of_parse_phandle(dev->of_node, "atmel,smc", 0);
717 ebi->smc.regmap = syscon_node_to_regmap(smc_np);
718 if (IS_ERR(ebi->smc.regmap))
719 return PTR_ERR(ebi->smc.regmap);
721 ebi->smc.clk = of_clk_get(smc_np, 0);
722 if (IS_ERR(ebi->smc.clk)) {
723 if (PTR_ERR(ebi->smc.clk) != -ENOENT)
724 return PTR_ERR(ebi->smc.clk);
728 ret = clk_prepare_enable(ebi->smc.clk);
733 * The sama5d3 does not provide an EBICSA register and thus does need
734 * to access the matrix registers.
736 if (ebi->caps->ebi_csa) {
738 syscon_regmap_lookup_by_phandle(np, "atmel,matrix");
739 if (IS_ERR(ebi->matrix))
740 return PTR_ERR(ebi->matrix);
742 ebi->ebi_csa = regmap_field_alloc(ebi->matrix,
743 *ebi->caps->ebi_csa);
744 if (IS_ERR(ebi->ebi_csa))
745 return PTR_ERR(ebi->ebi_csa);
748 ret = ebi->caps->init(ebi);
752 ret = of_property_read_u32(np, "#address-cells", &val);
754 dev_err(dev, "missing #address-cells property\n");
760 ret = of_property_read_u32(np, "#size-cells", &val);
762 dev_err(dev, "missing #address-cells property\n");
768 for_each_available_child_of_node(np, child) {
769 if (!of_find_property(child, "reg", NULL))
772 ret = at91_ebi_dev_setup(ebi, child, reg_cells);
774 dev_err(dev, "failed to configure EBI bus for %s, disabling the device",
777 ret = at91_ebi_dev_disable(ebi, child);
783 return of_platform_populate(np, NULL, NULL, dev);
786 static struct platform_driver at91_ebi_driver = {
789 .of_match_table = at91_ebi_id_table,
792 builtin_platform_driver_probe(at91_ebi_driver, at91_ebi_probe);