drivers/gpu/drm/i915/display/intel_dp_mst.c

   1 /*
   2  * Copyright © 2008 Intel Corporation
   3  *             2014 Red Hat Inc.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  22  * IN THE SOFTWARE.
  23  *
  24  */
  25
  26 #include <drm/drm_atomic.h>
  27 #include <drm/drm_atomic_helper.h>
  28 #include <drm/drm_edid.h>
  29 #include <drm/drm_probe_helper.h>
  30
  31 #include "i915_drv.h"
  32 #include "intel_atomic.h"
  33 #include "intel_audio.h"
  34 #include "intel_connector.h"
  35 #include "intel_crtc.h"
  36 #include "intel_ddi.h"
  37 #include "intel_de.h"
  38 #include "intel_display_types.h"
  39 #include "intel_dp.h"
  40 #include "intel_dp_hdcp.h"
  41 #include "intel_dp_mst.h"
  42 #include "intel_dpio_phy.h"
  43 #include "intel_hdcp.h"
  44 #include "intel_hotplug.h"
  45 #include "skl_scaler.h"
  46
  47 static int intel_dp_mst_compute_link_config(struct intel_encoder *encoder,
  48                                             struct intel_crtc_state *crtc_state,
  49                                             struct drm_connector_state *conn_state,
  50                                             struct link_config_limits *limits)
  51 {
  52         struct drm_atomic_state *state = crtc_state->uapi.state;
  53         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
  54         struct intel_dp *intel_dp = &intel_mst->primary->dp;
  55         struct drm_dp_mst_topology_state *mst_state;
  56         struct intel_connector *connector =
  57                 to_intel_connector(conn_state->connector);
  58         struct drm_i915_private *i915 = to_i915(connector->base.dev);
  59         const struct drm_display_mode *adjusted_mode =
  60                 &crtc_state->hw.adjusted_mode;
  61         int bpp, slots = -EINVAL;
  62
  63         mst_state = drm_atomic_get_mst_topology_state(state, &intel_dp->mst_mgr);
  64         if (IS_ERR(mst_state))
  65                 return PTR_ERR(mst_state);
  66
  67         crtc_state->lane_count = limits->max_lane_count;
  68         crtc_state->port_clock = limits->max_rate;
  69
  70         // TODO: Handle pbn_div changes by adding a new MST helper
  71         if (!mst_state->pbn_div) {
  72                 mst_state->pbn_div = drm_dp_get_vc_payload_bw(&intel_dp->mst_mgr,
  73                                                               limits->max_rate,
  74                                                               limits->max_lane_count);
  75         }
  76
  77         for (bpp = limits->max_bpp; bpp >= limits->min_bpp; bpp -= 2 * 3) {
  78                 crtc_state->pipe_bpp = bpp;
  79
  80                 crtc_state->pbn = drm_dp_calc_pbn_mode(adjusted_mode->crtc_clock,
  81                                                        crtc_state->pipe_bpp,
  82                                                        false);
  83                 slots = drm_dp_atomic_find_time_slots(state, &intel_dp->mst_mgr,
  84                                                       connector->port, crtc_state->pbn);
  85                 if (slots == -EDEADLK)
  86                         return slots;
  87                 if (slots >= 0)
  88                         break;
  89         }
  90
  91         if (slots < 0) {
  92                 drm_dbg_kms(&i915->drm, "failed finding vcpi slots:%d\n",
  93                             slots);
  94                 return slots;
  95         }
  96
  97         intel_link_compute_m_n(crtc_state->pipe_bpp,
  98                                crtc_state->lane_count,
  99                                adjusted_mode->crtc_clock,
 100                                crtc_state->port_clock,
 101                                &crtc_state->dp_m_n,
 102                                crtc_state->fec_enable);
 103         crtc_state->dp_m_n.tu = slots;
 104
 105         return 0;
 106 }
 107
 108 static int intel_dp_mst_update_slots(struct intel_encoder *encoder,
 109                                      struct intel_crtc_state *crtc_state,
 110                                      struct drm_connector_state *conn_state)
 111 {
 112         struct drm_i915_private *i915 = to_i915(encoder->base.dev);
 113         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
 114         struct intel_dp *intel_dp = &intel_mst->primary->dp;
 115         struct drm_dp_mst_topology_mgr *mgr = &intel_dp->mst_mgr;
 116         struct drm_dp_mst_topology_state *topology_state;
 117         u8 link_coding_cap = intel_dp_is_uhbr(crtc_state) ?
 118                 DP_CAP_ANSI_128B132B : DP_CAP_ANSI_8B10B;
 119
 120         topology_state = drm_atomic_get_mst_topology_state(conn_state->state, mgr);
 121         if (IS_ERR(topology_state)) {
 122                 drm_dbg_kms(&i915->drm, "slot update failed\n");
 123                 return PTR_ERR(topology_state);
 124         }
 125
 126         drm_dp_mst_update_slots(topology_state, link_coding_cap);
 127
 128         return 0;
 129 }
 130
 131 static int intel_dp_mst_compute_config(struct intel_encoder *encoder,
 132                                        struct intel_crtc_state *pipe_config,
 133                                        struct drm_connector_state *conn_state)
 134 {
 135         struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 136         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
 137         struct intel_dp *intel_dp = &intel_mst->primary->dp;
 138         struct intel_connector *connector =
 139                 to_intel_connector(conn_state->connector);
 140         struct intel_digital_connector_state *intel_conn_state =
 141                 to_intel_digital_connector_state(conn_state);
 142         const struct drm_display_mode *adjusted_mode =
 143                 &pipe_config->hw.adjusted_mode;
 144         struct link_config_limits limits;
 145         int ret;
 146
 147         if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
 148                 return -EINVAL;
 149
 150         pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
 151         pipe_config->has_pch_encoder = false;
 152
 153         if (intel_conn_state->force_audio == HDMI_AUDIO_AUTO)
 154                 pipe_config->has_audio = connector->port->has_audio;
 155         else
 156                 pipe_config->has_audio =
 157                         intel_conn_state->force_audio == HDMI_AUDIO_ON;
 158
 159         /*
 160          * for MST we always configure max link bw - the spec doesn't
 161          * seem to suggest we should do otherwise.
 162          */
 163         limits.min_rate =
 164         limits.max_rate = intel_dp_max_link_rate(intel_dp);
 165
 166         limits.min_lane_count =
 167         limits.max_lane_count = intel_dp_max_lane_count(intel_dp);
 168
 169         limits.min_bpp = intel_dp_min_bpp(pipe_config->output_format);
 170         /*
 171          * FIXME: If all the streams can't fit into the link with
 172          * their current pipe_bpp we should reduce pipe_bpp across
 173          * the board until things start to fit. Until then we
 174          * limit to <= 8bpc since that's what was hardcoded for all
 175          * MST streams previously. This hack should be removed once
 176          * we have the proper retry logic in place.
 177          */
 178         limits.max_bpp = min(pipe_config->pipe_bpp, 24);
 179
 180         intel_dp_adjust_compliance_config(intel_dp, pipe_config, &limits);
 181
 182         ret = intel_dp_mst_compute_link_config(encoder, pipe_config,
 183                                                conn_state, &limits);
 184         if (ret)
 185                 return ret;
 186
 187         ret = intel_dp_mst_update_slots(encoder, pipe_config, conn_state);
 188         if (ret)
 189                 return ret;
 190
 191         pipe_config->limited_color_range =
 192                 intel_dp_limited_color_range(pipe_config, conn_state);
 193
 194         if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv))
 195                 pipe_config->lane_lat_optim_mask =
 196                         bxt_ddi_phy_calc_lane_lat_optim_mask(pipe_config->lane_count);
 197
 198         intel_ddi_compute_min_voltage_level(dev_priv, pipe_config);
 199
 200         return 0;
 201 }
 202
 203 /*
 204  * Iterate over all connectors and return a mask of
 205  * all CPU transcoders streaming over the same DP link.
 206  */
 207 static unsigned int
 208 intel_dp_mst_transcoder_mask(struct intel_atomic_state *state,
 209                              struct intel_dp *mst_port)
 210 {
 211         struct drm_i915_private *dev_priv = to_i915(state->base.dev);
 212         const struct intel_digital_connector_state *conn_state;
 213         struct intel_connector *connector;
 214         u8 transcoders = 0;
 215         int i;
 216
 217         if (DISPLAY_VER(dev_priv) < 12)
 218                 return 0;
 219
 220         for_each_new_intel_connector_in_state(state, connector, conn_state, i) {
 221                 const struct intel_crtc_state *crtc_state;
 222                 struct intel_crtc *crtc;
 223
 224                 if (connector->mst_port != mst_port || !conn_state->base.crtc)
 225                         continue;
 226
 227                 crtc = to_intel_crtc(conn_state->base.crtc);
 228                 crtc_state = intel_atomic_get_new_crtc_state(state, crtc);
 229
 230                 if (!crtc_state->hw.active)
 231                         continue;
 232
 233                 transcoders |= BIT(crtc_state->cpu_transcoder);
 234         }
 235
 236         return transcoders;
 237 }
 238
 239 static int intel_dp_mst_compute_config_late(struct intel_encoder *encoder,
 240                                             struct intel_crtc_state *crtc_state,
 241                                             struct drm_connector_state *conn_state)
 242 {
 243         struct intel_atomic_state *state = to_intel_atomic_state(conn_state->state);
 244         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
 245         struct intel_dp *intel_dp = &intel_mst->primary->dp;
 246
 247         /* lowest numbered transcoder will be designated master */
 248         crtc_state->mst_master_transcoder =
 249                 ffs(intel_dp_mst_transcoder_mask(state, intel_dp)) - 1;
 250
 251         return 0;
 252 }
 253
 254 /*
 255  * If one of the connectors in a MST stream needs a modeset, mark all CRTCs
 256  * that shares the same MST stream as mode changed,
 257  * intel_modeset_pipe_config()+intel_crtc_check_fastset() will take care to do
 258  * a fastset when possible.
 259  */
 260 static int
 261 intel_dp_mst_atomic_master_trans_check(struct intel_connector *connector,
 262                                        struct intel_atomic_state *state)
 263 {
 264         struct drm_i915_private *dev_priv = to_i915(state->base.dev);
 265         struct drm_connector_list_iter connector_list_iter;
 266         struct intel_connector *connector_iter;
 267         int ret = 0;
 268
 269         if (DISPLAY_VER(dev_priv) < 12)
 270                 return  0;
 271
 272         if (!intel_connector_needs_modeset(state, &connector->base))
 273                 return 0;
 274
 275         drm_connector_list_iter_begin(&dev_priv->drm, &connector_list_iter);
 276         for_each_intel_connector_iter(connector_iter, &connector_list_iter) {
 277                 struct intel_digital_connector_state *conn_iter_state;
 278                 struct intel_crtc_state *crtc_state;
 279                 struct intel_crtc *crtc;
 280
 281                 if (connector_iter->mst_port != connector->mst_port ||
 282                     connector_iter == connector)
 283                         continue;
 284
 285                 conn_iter_state = intel_atomic_get_digital_connector_state(state,
 286                                                                            connector_iter);
 287                 if (IS_ERR(conn_iter_state)) {
 288                         ret = PTR_ERR(conn_iter_state);
 289                         break;
 290                 }
 291
 292                 if (!conn_iter_state->base.crtc)
 293                         continue;
 294
 295                 crtc = to_intel_crtc(conn_iter_state->base.crtc);
 296                 crtc_state = intel_atomic_get_crtc_state(&state->base, crtc);
 297                 if (IS_ERR(crtc_state)) {
 298                         ret = PTR_ERR(crtc_state);
 299                         break;
 300                 }
 301
 302                 ret = drm_atomic_add_affected_planes(&state->base, &crtc->base);
 303                 if (ret)
 304                         break;
 305                 crtc_state->uapi.mode_changed = true;
 306         }
 307         drm_connector_list_iter_end(&connector_list_iter);
 308
 309         return ret;
 310 }
 311
 312 static int
 313 intel_dp_mst_atomic_check(struct drm_connector *connector,
 314                           struct drm_atomic_state *_state)
 315 {
 316         struct intel_atomic_state *state = to_intel_atomic_state(_state);
 317         struct intel_connector *intel_connector =
 318                 to_intel_connector(connector);
 319         int ret;
 320
 321         ret = intel_digital_connector_atomic_check(connector, &state->base);
 322         if (ret)
 323                 return ret;
 324
 325         ret = intel_dp_mst_atomic_master_trans_check(intel_connector, state);
 326         if (ret)
 327                 return ret;
 328
 329         return drm_dp_atomic_release_time_slots(&state->base,
 330                                                 &intel_connector->mst_port->mst_mgr,
 331                                                 intel_connector->port);
 332 }
 333
 334 static void clear_act_sent(struct intel_encoder *encoder,
 335                            const struct intel_crtc_state *crtc_state)
 336 {
 337         struct drm_i915_private *i915 = to_i915(encoder->base.dev);
 338
 339         intel_de_write(i915, dp_tp_status_reg(encoder, crtc_state),
 340                        DP_TP_STATUS_ACT_SENT);
 341 }
 342
 343 static void wait_for_act_sent(struct intel_encoder *encoder,
 344                               const struct intel_crtc_state *crtc_state)
 345 {
 346         struct drm_i915_private *i915 = to_i915(encoder->base.dev);
 347         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
 348         struct intel_dp *intel_dp = &intel_mst->primary->dp;
 349
 350         if (intel_de_wait_for_set(i915, dp_tp_status_reg(encoder, crtc_state),
 351                                   DP_TP_STATUS_ACT_SENT, 1))
 352                 drm_err(&i915->drm, "Timed out waiting for ACT sent\n");
 353
 354         drm_dp_check_act_status(&intel_dp->mst_mgr);
 355 }
 356
 357 static void intel_mst_disable_dp(struct intel_atomic_state *state,
 358                                  struct intel_encoder *encoder,
 359                                  const struct intel_crtc_state *old_crtc_state,
 360                                  const struct drm_connector_state *old_conn_state)
 361 {
 362         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
 363         struct intel_digital_port *dig_port = intel_mst->primary;
 364         struct intel_dp *intel_dp = &dig_port->dp;
 365         struct intel_connector *connector =
 366                 to_intel_connector(old_conn_state->connector);
 367         struct drm_dp_mst_topology_state *mst_state =
 368                 drm_atomic_get_mst_topology_state(&state->base, &intel_dp->mst_mgr);
 369         struct drm_i915_private *i915 = to_i915(connector->base.dev);
 370
 371         drm_dbg_kms(&i915->drm, "active links %d\n",
 372                     intel_dp->active_mst_links);
 373
 374         intel_hdcp_disable(intel_mst->connector);
 375
 376         drm_dp_remove_payload(&intel_dp->mst_mgr, mst_state,
 377                               drm_atomic_get_mst_payload_state(mst_state, connector->port));
 378
 379         intel_audio_codec_disable(encoder, old_crtc_state, old_conn_state);
 380 }
 381
 382 static void intel_mst_post_disable_dp(struct intel_atomic_state *state,
 383                                       struct intel_encoder *encoder,
 384                                       const struct intel_crtc_state *old_crtc_state,
 385                                       const struct drm_connector_state *old_conn_state)
 386 {
 387         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
 388         struct intel_digital_port *dig_port = intel_mst->primary;
 389         struct intel_dp *intel_dp = &dig_port->dp;
 390         struct intel_connector *connector =
 391                 to_intel_connector(old_conn_state->connector);
 392         struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 393         bool last_mst_stream;
 394
 395         intel_dp->active_mst_links--;
 396         last_mst_stream = intel_dp->active_mst_links == 0;
 397         drm_WARN_ON(&dev_priv->drm,
 398                     DISPLAY_VER(dev_priv) >= 12 && last_mst_stream &&
 399                     !intel_dp_mst_is_master_trans(old_crtc_state));
 400
 401         intel_crtc_vblank_off(old_crtc_state);
 402
 403         intel_disable_transcoder(old_crtc_state);
 404
 405         clear_act_sent(encoder, old_crtc_state);
 406
 407         intel_de_rmw(dev_priv, TRANS_DDI_FUNC_CTL(old_crtc_state->cpu_transcoder),
 408                      TRANS_DDI_DP_VC_PAYLOAD_ALLOC, 0);
 409
 410         wait_for_act_sent(encoder, old_crtc_state);
 411
 412         intel_ddi_disable_transcoder_func(old_crtc_state);
 413
 414         if (DISPLAY_VER(dev_priv) >= 9)
 415                 skl_scaler_disable(old_crtc_state);
 416         else
 417                 ilk_pfit_disable(old_crtc_state);
 418
 419         /*
 420          * Power down mst path before disabling the port, otherwise we end
 421          * up getting interrupts from the sink upon detecting link loss.
 422          */
 423         drm_dp_send_power_updown_phy(&intel_dp->mst_mgr, connector->port,
 424                                      false);
 425
 426         /*
 427          * BSpec 4287: disable DIP after the transcoder is disabled and before
 428          * the transcoder clock select is set to none.
 429          */
 430         if (last_mst_stream)
 431                 intel_dp_set_infoframes(&dig_port->base, false,
 432                                         old_crtc_state, NULL);
 433         /*
 434          * From TGL spec: "If multi-stream slave transcoder: Configure
 435          * Transcoder Clock Select to direct no clock to the transcoder"
 436          *
 437          * From older GENs spec: "Configure Transcoder Clock Select to direct
 438          * no clock to the transcoder"
 439          */
 440         if (DISPLAY_VER(dev_priv) < 12 || !last_mst_stream)
 441                 intel_ddi_disable_pipe_clock(old_crtc_state);
 442
 443
 444         intel_mst->connector = NULL;
 445         if (last_mst_stream)
 446                 dig_port->base.post_disable(state, &dig_port->base,
 447                                                   old_crtc_state, NULL);
 448
 449         drm_dbg_kms(&dev_priv->drm, "active links %d\n",
 450                     intel_dp->active_mst_links);
 451 }
 452
 453 static void intel_mst_pre_pll_enable_dp(struct intel_atomic_state *state,
 454                                         struct intel_encoder *encoder,
 455                                         const struct intel_crtc_state *pipe_config,
 456                                         const struct drm_connector_state *conn_state)
 457 {
 458         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
 459         struct intel_digital_port *dig_port = intel_mst->primary;
 460         struct intel_dp *intel_dp = &dig_port->dp;
 461
 462         if (intel_dp->active_mst_links == 0)
 463                 dig_port->base.pre_pll_enable(state, &dig_port->base,
 464                                                     pipe_config, NULL);
 465 }
 466
 467 static void intel_mst_pre_enable_dp(struct intel_atomic_state *state,
 468                                     struct intel_encoder *encoder,
 469                                     const struct intel_crtc_state *pipe_config,
 470                                     const struct drm_connector_state *conn_state)
 471 {
 472         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
 473         struct intel_digital_port *dig_port = intel_mst->primary;
 474         struct intel_dp *intel_dp = &dig_port->dp;
 475         struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 476         struct intel_connector *connector =
 477                 to_intel_connector(conn_state->connector);
 478         struct drm_dp_mst_topology_state *mst_state =
 479                 drm_atomic_get_new_mst_topology_state(&state->base, &intel_dp->mst_mgr);
 480         int ret;
 481         bool first_mst_stream;
 482
 483         /* MST encoders are bound to a crtc, not to a connector,
 484          * force the mapping here for get_hw_state.
 485          */
 486         connector->encoder = encoder;
 487         intel_mst->connector = connector;
 488         first_mst_stream = intel_dp->active_mst_links == 0;
 489         drm_WARN_ON(&dev_priv->drm,
 490                     DISPLAY_VER(dev_priv) >= 12 && first_mst_stream &&
 491                     !intel_dp_mst_is_master_trans(pipe_config));
 492
 493         drm_dbg_kms(&dev_priv->drm, "active links %d\n",
 494                     intel_dp->active_mst_links);
 495
 496         if (first_mst_stream)
 497                 intel_dp_set_power(intel_dp, DP_SET_POWER_D0);
 498
 499         drm_dp_send_power_updown_phy(&intel_dp->mst_mgr, connector->port, true);
 500
 501         if (first_mst_stream)
 502                 dig_port->base.pre_enable(state, &dig_port->base,
 503                                                 pipe_config, NULL);
 504
 505         intel_dp->active_mst_links++;
 506
 507         ret = drm_dp_add_payload_part1(&intel_dp->mst_mgr, mst_state,
 508                                        drm_atomic_get_mst_payload_state(mst_state, connector->port));
 509         if (ret < 0)
 510                 drm_err(&dev_priv->drm, "Failed to create MST payload for %s: %d\n",
 511                         connector->base.name, ret);
 512
 513         /*
 514          * Before Gen 12 this is not done as part of
 515          * dig_port->base.pre_enable() and should be done here. For
 516          * Gen 12+ the step in which this should be done is different for the
 517          * first MST stream, so it's done on the DDI for the first stream and
 518          * here for the following ones.
 519          */
 520         if (DISPLAY_VER(dev_priv) < 12 || !first_mst_stream)
 521                 intel_ddi_enable_pipe_clock(encoder, pipe_config);
 522
 523         intel_ddi_set_dp_msa(pipe_config, conn_state);
 524 }
 525
 526 static void intel_mst_enable_dp(struct intel_atomic_state *state,
 527                                 struct intel_encoder *encoder,
 528                                 const struct intel_crtc_state *pipe_config,
 529                                 const struct drm_connector_state *conn_state)
 530 {
 531         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
 532         struct intel_digital_port *dig_port = intel_mst->primary;
 533         struct intel_dp *intel_dp = &dig_port->dp;
 534         struct intel_connector *connector = to_intel_connector(conn_state->connector);
 535         struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 536         struct drm_dp_mst_topology_state *mst_state =
 537                 drm_atomic_get_new_mst_topology_state(&state->base, &intel_dp->mst_mgr);
 538         enum transcoder trans = pipe_config->cpu_transcoder;
 539
 540         drm_WARN_ON(&dev_priv->drm, pipe_config->has_pch_encoder);
 541
 542         clear_act_sent(encoder, pipe_config);
 543
 544         if (intel_dp_is_uhbr(pipe_config)) {
 545                 const struct drm_display_mode *adjusted_mode =
 546                         &pipe_config->hw.adjusted_mode;
 547                 u64 crtc_clock_hz = KHz(adjusted_mode->crtc_clock);
 548
 549                 intel_de_write(dev_priv, TRANS_DP2_VFREQHIGH(pipe_config->cpu_transcoder),
 550                                TRANS_DP2_VFREQ_PIXEL_CLOCK(crtc_clock_hz >> 24));
 551                 intel_de_write(dev_priv, TRANS_DP2_VFREQLOW(pipe_config->cpu_transcoder),
 552                                TRANS_DP2_VFREQ_PIXEL_CLOCK(crtc_clock_hz & 0xffffff));
 553         }
 554
 555         intel_ddi_enable_transcoder_func(encoder, pipe_config);
 556
 557         intel_de_rmw(dev_priv, TRANS_DDI_FUNC_CTL(trans), 0,
 558                      TRANS_DDI_DP_VC_PAYLOAD_ALLOC);
 559
 560         drm_dbg_kms(&dev_priv->drm, "active links %d\n",
 561                     intel_dp->active_mst_links);
 562
 563         wait_for_act_sent(encoder, pipe_config);
 564
 565         drm_dp_add_payload_part2(&intel_dp->mst_mgr, &state->base,
 566                                  drm_atomic_get_mst_payload_state(mst_state, connector->port));
 567
 568         if (DISPLAY_VER(dev_priv) >= 14 && pipe_config->fec_enable)
 569                 intel_de_rmw(dev_priv, MTL_CHICKEN_TRANS(trans), 0,
 570                              FECSTALL_DIS_DPTSTREAM_DPTTG);
 571         else if (DISPLAY_VER(dev_priv) >= 12 && pipe_config->fec_enable)
 572                 intel_de_rmw(dev_priv, CHICKEN_TRANS(trans), 0,
 573                              FECSTALL_DIS_DPTSTREAM_DPTTG);
 574
 575         intel_enable_transcoder(pipe_config);
 576
 577         intel_crtc_vblank_on(pipe_config);
 578
 579         intel_audio_codec_enable(encoder, pipe_config, conn_state);
 580
 581         /* Enable hdcp if it's desired */
 582         if (conn_state->content_protection ==
 583             DRM_MODE_CONTENT_PROTECTION_DESIRED)
 584                 intel_hdcp_enable(to_intel_connector(conn_state->connector),
 585                                   pipe_config,
 586                                   (u8)conn_state->hdcp_content_type);
 587 }
 588
 589 static bool intel_dp_mst_enc_get_hw_state(struct intel_encoder *encoder,
 590                                       enum pipe *pipe)
 591 {
 592         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
 593         *pipe = intel_mst->pipe;
 594         if (intel_mst->connector)
 595                 return true;
 596         return false;
 597 }
 598
 599 static void intel_dp_mst_enc_get_config(struct intel_encoder *encoder,
 600                                         struct intel_crtc_state *pipe_config)
 601 {
 602         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
 603         struct intel_digital_port *dig_port = intel_mst->primary;
 604
 605         dig_port->base.get_config(&dig_port->base, pipe_config);
 606 }
 607
 608 static bool intel_dp_mst_initial_fastset_check(struct intel_encoder *encoder,
 609                                                struct intel_crtc_state *crtc_state)
 610 {
 611         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
 612         struct intel_digital_port *dig_port = intel_mst->primary;
 613
 614         return intel_dp_initial_fastset_check(&dig_port->base, crtc_state);
 615 }
 616
 617 static int intel_dp_mst_get_ddc_modes(struct drm_connector *connector)
 618 {
 619         struct intel_connector *intel_connector = to_intel_connector(connector);
 620         struct intel_dp *intel_dp = intel_connector->mst_port;
 621         struct edid *edid;
 622         int ret;
 623
 624         if (drm_connector_is_unregistered(connector))
 625                 return intel_connector_update_modes(connector, NULL);
 626
 627         edid = drm_dp_mst_get_edid(connector, &intel_dp->mst_mgr, intel_connector->port);
 628         ret = intel_connector_update_modes(connector, edid);
 629         kfree(edid);
 630
 631         return ret;
 632 }
 633
 634 static int
 635 intel_dp_mst_connector_late_register(struct drm_connector *connector)
 636 {
 637         struct intel_connector *intel_connector = to_intel_connector(connector);
 638         int ret;
 639
 640         ret = drm_dp_mst_connector_late_register(connector,
 641                                                  intel_connector->port);
 642         if (ret < 0)
 643                 return ret;
 644
 645         ret = intel_connector_register(connector);
 646         if (ret < 0)
 647                 drm_dp_mst_connector_early_unregister(connector,
 648                                                       intel_connector->port);
 649
 650         return ret;
 651 }
 652
 653 static void
 654 intel_dp_mst_connector_early_unregister(struct drm_connector *connector)
 655 {
 656         struct intel_connector *intel_connector = to_intel_connector(connector);
 657
 658         intel_connector_unregister(connector);
 659         drm_dp_mst_connector_early_unregister(connector,
 660                                               intel_connector->port);
 661 }
 662
 663 static const struct drm_connector_funcs intel_dp_mst_connector_funcs = {
 664         .fill_modes = drm_helper_probe_single_connector_modes,
 665         .atomic_get_property = intel_digital_connector_atomic_get_property,
 666         .atomic_set_property = intel_digital_connector_atomic_set_property,
 667         .late_register = intel_dp_mst_connector_late_register,
 668         .early_unregister = intel_dp_mst_connector_early_unregister,
 669         .destroy = intel_connector_destroy,
 670         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
 671         .atomic_duplicate_state = intel_digital_connector_duplicate_state,
 672 };
 673
 674 static int intel_dp_mst_get_modes(struct drm_connector *connector)
 675 {
 676         return intel_dp_mst_get_ddc_modes(connector);
 677 }
 678
 679 static int
 680 intel_dp_mst_mode_valid_ctx(struct drm_connector *connector,
 681                             struct drm_display_mode *mode,
 682                             struct drm_modeset_acquire_ctx *ctx,
 683                             enum drm_mode_status *status)
 684 {
 685         struct drm_i915_private *dev_priv = to_i915(connector->dev);
 686         struct intel_connector *intel_connector = to_intel_connector(connector);
 687         struct intel_dp *intel_dp = intel_connector->mst_port;
 688         struct drm_dp_mst_topology_mgr *mgr = &intel_dp->mst_mgr;
 689         struct drm_dp_mst_port *port = intel_connector->port;
 690         const int min_bpp = 18;
 691         int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
 692         int max_rate, mode_rate, max_lanes, max_link_clock;
 693         int ret;
 694
 695         if (drm_connector_is_unregistered(connector)) {
 696                 *status = MODE_ERROR;
 697                 return 0;
 698         }
 699
 700         if (mode->flags & DRM_MODE_FLAG_DBLSCAN) {
 701                 *status = MODE_NO_DBLESCAN;
 702                 return 0;
 703         }
 704
 705         max_link_clock = intel_dp_max_link_rate(intel_dp);
 706         max_lanes = intel_dp_max_lane_count(intel_dp);
 707
 708         max_rate = intel_dp_max_data_rate(max_link_clock, max_lanes);
 709         mode_rate = intel_dp_link_required(mode->clock, min_bpp);
 710
 711         ret = drm_modeset_lock(&mgr->base.lock, ctx);
 712         if (ret)
 713                 return ret;
 714
 715         if (mode_rate > max_rate || mode->clock > max_dotclk ||
 716             drm_dp_calc_pbn_mode(mode->clock, min_bpp, false) > port->full_pbn) {
 717                 *status = MODE_CLOCK_HIGH;
 718                 return 0;
 719         }
 720
 721         if (mode->clock < 10000) {
 722                 *status = MODE_CLOCK_LOW;
 723                 return 0;
 724         }
 725
 726         if (mode->flags & DRM_MODE_FLAG_DBLCLK) {
 727                 *status = MODE_H_ILLEGAL;
 728                 return 0;
 729         }
 730
 731         *status = intel_mode_valid_max_plane_size(dev_priv, mode, false);
 732         return 0;
 733 }
 734
 735 static struct drm_encoder *intel_mst_atomic_best_encoder(struct drm_connector *connector,
 736                                                          struct drm_atomic_state *state)
 737 {
 738         struct drm_connector_state *connector_state = drm_atomic_get_new_connector_state(state,
 739                                                                                          connector);
 740         struct intel_connector *intel_connector = to_intel_connector(connector);
 741         struct intel_dp *intel_dp = intel_connector->mst_port;
 742         struct intel_crtc *crtc = to_intel_crtc(connector_state->crtc);
 743
 744         return &intel_dp->mst_encoders[crtc->pipe]->base.base;
 745 }
 746
 747 static int
 748 intel_dp_mst_detect(struct drm_connector *connector,
 749                     struct drm_modeset_acquire_ctx *ctx, bool force)
 750 {
 751         struct drm_i915_private *i915 = to_i915(connector->dev);
 752         struct intel_connector *intel_connector = to_intel_connector(connector);
 753         struct intel_dp *intel_dp = intel_connector->mst_port;
 754
 755         if (!INTEL_DISPLAY_ENABLED(i915))
 756                 return connector_status_disconnected;
 757
 758         if (drm_connector_is_unregistered(connector))
 759                 return connector_status_disconnected;
 760
 761         return drm_dp_mst_detect_port(connector, ctx, &intel_dp->mst_mgr,
 762                                       intel_connector->port);
 763 }
 764
 765 static const struct drm_connector_helper_funcs intel_dp_mst_connector_helper_funcs = {
 766         .get_modes = intel_dp_mst_get_modes,
 767         .mode_valid_ctx = intel_dp_mst_mode_valid_ctx,
 768         .atomic_best_encoder = intel_mst_atomic_best_encoder,
 769         .atomic_check = intel_dp_mst_atomic_check,
 770         .detect_ctx = intel_dp_mst_detect,
 771 };
 772
 773 static void intel_dp_mst_encoder_destroy(struct drm_encoder *encoder)
 774 {
 775         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(to_intel_encoder(encoder));
 776
 777         drm_encoder_cleanup(encoder);
 778         kfree(intel_mst);
 779 }
 780
 781 static const struct drm_encoder_funcs intel_dp_mst_enc_funcs = {
 782         .destroy = intel_dp_mst_encoder_destroy,
 783 };
 784
 785 static bool intel_dp_mst_get_hw_state(struct intel_connector *connector)
 786 {
 787         if (intel_attached_encoder(connector) && connector->base.state->crtc) {
 788                 enum pipe pipe;
 789                 if (!intel_attached_encoder(connector)->get_hw_state(intel_attached_encoder(connector), &pipe))
 790                         return false;
 791                 return true;
 792         }
 793         return false;
 794 }
 795
 796 static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, const char *pathprop)
 797 {
 798         struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr);
 799         struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
 800         struct drm_device *dev = dig_port->base.base.dev;
 801         struct drm_i915_private *dev_priv = to_i915(dev);
 802         struct intel_connector *intel_connector;
 803         struct drm_connector *connector;
 804         enum pipe pipe;
 805         int ret;
 806
 807         intel_connector = intel_connector_alloc();
 808         if (!intel_connector)
 809                 return NULL;
 810
 811         intel_connector->get_hw_state = intel_dp_mst_get_hw_state;
 812         intel_connector->mst_port = intel_dp;
 813         intel_connector->port = port;
 814         drm_dp_mst_get_port_malloc(port);
 815
 816         connector = &intel_connector->base;
 817         ret = drm_connector_init(dev, connector, &intel_dp_mst_connector_funcs,
 818                                  DRM_MODE_CONNECTOR_DisplayPort);
 819         if (ret) {
 820                 drm_dp_mst_put_port_malloc(port);
 821                 intel_connector_free(intel_connector);
 822                 return NULL;
 823         }
 824
 825         drm_connector_helper_add(connector, &intel_dp_mst_connector_helper_funcs);
 826
 827         for_each_pipe(dev_priv, pipe) {
 828                 struct drm_encoder *enc =
 829                         &intel_dp->mst_encoders[pipe]->base.base;
 830
 831                 ret = drm_connector_attach_encoder(&intel_connector->base, enc);
 832                 if (ret)
 833                         goto err;
 834         }
 835
 836         drm_object_attach_property(&connector->base, dev->mode_config.path_property, 0);
 837         drm_object_attach_property(&connector->base, dev->mode_config.tile_property, 0);
 838
 839         ret = drm_connector_set_path_property(connector, pathprop);
 840         if (ret)
 841                 goto err;
 842
 843         intel_attach_force_audio_property(connector);
 844         intel_attach_broadcast_rgb_property(connector);
 845
 846         ret = intel_dp_hdcp_init(dig_port, intel_connector);
 847         if (ret)
 848                 drm_dbg_kms(&dev_priv->drm, "[%s:%d] HDCP MST init failed, skipping.\n",
 849                             connector->name, connector->base.id);
 850         /*
 851          * Reuse the prop from the SST connector because we're
 852          * not allowed to create new props after device registration.
 853          */
 854         connector->max_bpc_property =
 855                 intel_dp->attached_connector->base.max_bpc_property;
 856         if (connector->max_bpc_property)
 857                 drm_connector_attach_max_bpc_property(connector, 6, 12);
 858
 859         return connector;
 860
 861 err:
 862         drm_connector_cleanup(connector);
 863         return NULL;
 864 }
 865
 866 static void
 867 intel_dp_mst_poll_hpd_irq(struct drm_dp_mst_topology_mgr *mgr)
 868 {
 869         struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr);
 870
 871         intel_hpd_trigger_irq(dp_to_dig_port(intel_dp));
 872 }
 873
 874 static const struct drm_dp_mst_topology_cbs mst_cbs = {
 875         .add_connector = intel_dp_add_mst_connector,
 876         .poll_hpd_irq = intel_dp_mst_poll_hpd_irq,
 877 };
 878
 879 static struct intel_dp_mst_encoder *
 880 intel_dp_create_fake_mst_encoder(struct intel_digital_port *dig_port, enum pipe pipe)
 881 {
 882         struct intel_dp_mst_encoder *intel_mst;
 883         struct intel_encoder *intel_encoder;
 884         struct drm_device *dev = dig_port->base.base.dev;
 885
 886         intel_mst = kzalloc(sizeof(*intel_mst), GFP_KERNEL);
 887
 888         if (!intel_mst)
 889                 return NULL;
 890
 891         intel_mst->pipe = pipe;
 892         intel_encoder = &intel_mst->base;
 893         intel_mst->primary = dig_port;
 894
 895         drm_encoder_init(dev, &intel_encoder->base, &intel_dp_mst_enc_funcs,
 896                          DRM_MODE_ENCODER_DPMST, "DP-MST %c", pipe_name(pipe));
 897
 898         intel_encoder->type = INTEL_OUTPUT_DP_MST;
 899         intel_encoder->power_domain = dig_port->base.power_domain;
 900         intel_encoder->port = dig_port->base.port;
 901         intel_encoder->cloneable = 0;
 902         /*
 903          * This is wrong, but broken userspace uses the intersection
 904          * of possible_crtcs of all the encoders of a given connector
 905          * to figure out which crtcs can drive said connector. What
 906          * should be used instead is the union of possible_crtcs.
 907          * To keep such userspace functioning we must misconfigure
 908          * this to make sure the intersection is not empty :(
 909          */
 910         intel_encoder->pipe_mask = ~0;
 911
 912         intel_encoder->compute_config = intel_dp_mst_compute_config;
 913         intel_encoder->compute_config_late = intel_dp_mst_compute_config_late;
 914         intel_encoder->disable = intel_mst_disable_dp;
 915         intel_encoder->post_disable = intel_mst_post_disable_dp;
 916         intel_encoder->update_pipe = intel_ddi_update_pipe;
 917         intel_encoder->pre_pll_enable = intel_mst_pre_pll_enable_dp;
 918         intel_encoder->pre_enable = intel_mst_pre_enable_dp;
 919         intel_encoder->enable = intel_mst_enable_dp;
 920         intel_encoder->get_hw_state = intel_dp_mst_enc_get_hw_state;
 921         intel_encoder->get_config = intel_dp_mst_enc_get_config;
 922         intel_encoder->initial_fastset_check = intel_dp_mst_initial_fastset_check;
 923
 924         return intel_mst;
 925
 926 }
 927
 928 static bool
 929 intel_dp_create_fake_mst_encoders(struct intel_digital_port *dig_port)
 930 {
 931         struct intel_dp *intel_dp = &dig_port->dp;
 932         struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev);
 933         enum pipe pipe;
 934
 935         for_each_pipe(dev_priv, pipe)
 936                 intel_dp->mst_encoders[pipe] = intel_dp_create_fake_mst_encoder(dig_port, pipe);
 937         return true;
 938 }
 939
 940 int
 941 intel_dp_mst_encoder_active_links(struct intel_digital_port *dig_port)
 942 {
 943         return dig_port->dp.active_mst_links;
 944 }
 945
 946 int
 947 intel_dp_mst_encoder_init(struct intel_digital_port *dig_port, int conn_base_id)
 948 {
 949         struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
 950         struct intel_dp *intel_dp = &dig_port->dp;
 951         enum port port = dig_port->base.port;
 952         int ret;
 953
 954         if (!HAS_DP_MST(i915) || intel_dp_is_edp(intel_dp))
 955                 return 0;
 956
 957         if (DISPLAY_VER(i915) < 12 && port == PORT_A)
 958                 return 0;
 959
 960         if (DISPLAY_VER(i915) < 11 && port == PORT_E)
 961                 return 0;
 962
 963         intel_dp->mst_mgr.cbs = &mst_cbs;
 964
 965         /* create encoders */
 966         intel_dp_create_fake_mst_encoders(dig_port);
 967         ret = drm_dp_mst_topology_mgr_init(&intel_dp->mst_mgr, &i915->drm,
 968                                            &intel_dp->aux, 16, 3, conn_base_id);
 969         if (ret) {
 970                 intel_dp->mst_mgr.cbs = NULL;
 971                 return ret;
 972         }
 973
 974         return 0;
 975 }
 976
 977 bool intel_dp_mst_source_support(struct intel_dp *intel_dp)
 978 {
 979         return intel_dp->mst_mgr.cbs;
 980 }
 981
 982 void
 983 intel_dp_mst_encoder_cleanup(struct intel_digital_port *dig_port)
 984 {
 985         struct intel_dp *intel_dp = &dig_port->dp;
 986
 987         if (!intel_dp_mst_source_support(intel_dp))
 988                 return;
 989
 990         drm_dp_mst_topology_mgr_destroy(&intel_dp->mst_mgr);
 991         /* encoders will get killed by normal cleanup */
 992
 993         intel_dp->mst_mgr.cbs = NULL;
 994 }
 995
 996 bool intel_dp_mst_is_master_trans(const struct intel_crtc_state *crtc_state)
 997 {
 998         return crtc_state->mst_master_transcoder == crtc_state->cpu_transcoder;
 999 }
1000
1001 bool intel_dp_mst_is_slave_trans(const struct intel_crtc_state *crtc_state)
1002 {
1003         return crtc_state->mst_master_transcoder != INVALID_TRANSCODER &&
1004                crtc_state->mst_master_transcoder != crtc_state->cpu_transcoder;
1005 }