drivers/thermal/intel/intel_pch_thermal.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /* intel_pch_thermal.c - Intel PCH Thermal driver
   3  *
   4  * Copyright (c) 2015, Intel Corporation.
   5  *
   6  * Authors:
   7  *     Tushar Dave <[email protected]>
   8  */
   9
  10 #include <linux/acpi.h>
  11 #include <linux/delay.h>
  12 #include <linux/module.h>
  13 #include <linux/init.h>
  14 #include <linux/pci.h>
  15 #include <linux/pm.h>
  16 #include <linux/suspend.h>
  17 #include <linux/thermal.h>
  18 #include <linux/types.h>
  19 #include <linux/units.h>
  20
  21 /* Intel PCH thermal Device IDs */
  22 #define PCH_THERMAL_DID_HSW_1   0x9C24 /* Haswell PCH */
  23 #define PCH_THERMAL_DID_HSW_2   0x8C24 /* Haswell PCH */
  24 #define PCH_THERMAL_DID_WPT     0x9CA4 /* Wildcat Point */
  25 #define PCH_THERMAL_DID_SKL     0x9D31 /* Skylake PCH */
  26 #define PCH_THERMAL_DID_SKL_H   0xA131 /* Skylake PCH 100 series */
  27 #define PCH_THERMAL_DID_CNL     0x9Df9 /* CNL PCH */
  28 #define PCH_THERMAL_DID_CNL_H   0xA379 /* CNL-H PCH */
  29 #define PCH_THERMAL_DID_CNL_LP  0x02F9 /* CNL-LP PCH */
  30 #define PCH_THERMAL_DID_CML_H   0X06F9 /* CML-H PCH */
  31 #define PCH_THERMAL_DID_LWB     0xA1B1 /* Lewisburg PCH */
  32 #define PCH_THERMAL_DID_WBG     0x8D24 /* Wellsburg PCH */
  33
  34 /* Wildcat Point-LP  PCH Thermal registers */
  35 #define WPT_TEMP        0x0000  /* Temperature */
  36 #define WPT_TSC 0x04    /* Thermal Sensor Control */
  37 #define WPT_TSS 0x06    /* Thermal Sensor Status */
  38 #define WPT_TSEL        0x08    /* Thermal Sensor Enable and Lock */
  39 #define WPT_TSREL       0x0A    /* Thermal Sensor Report Enable and Lock */
  40 #define WPT_TSMIC       0x0C    /* Thermal Sensor SMI Control */
  41 #define WPT_CTT 0x0010  /* Catastrophic Trip Point */
  42 #define WPT_TSPM        0x001C  /* Thermal Sensor Power Management */
  43 #define WPT_TAHV        0x0014  /* Thermal Alert High Value */
  44 #define WPT_TALV        0x0018  /* Thermal Alert Low Value */
  45 #define WPT_TL          0x00000040      /* Throttle Value */
  46 #define WPT_PHL 0x0060  /* PCH Hot Level */
  47 #define WPT_PHLC        0x62    /* PHL Control */
  48 #define WPT_TAS 0x80    /* Thermal Alert Status */
  49 #define WPT_TSPIEN      0x82    /* PCI Interrupt Event Enables */
  50 #define WPT_TSGPEN      0x84    /* General Purpose Event Enables */
  51
  52 /*  Wildcat Point-LP  PCH Thermal Register bit definitions */
  53 #define WPT_TEMP_TSR    0x01ff  /* Temp TS Reading */
  54 #define WPT_TSC_CPDE    0x01    /* Catastrophic Power-Down Enable */
  55 #define WPT_TSS_TSDSS   0x10    /* Thermal Sensor Dynamic Shutdown Status */
  56 #define WPT_TSS_GPES    0x08    /* GPE status */
  57 #define WPT_TSEL_ETS    0x01    /* Enable TS */
  58 #define WPT_TSEL_PLDB   0x80    /* TSEL Policy Lock-Down Bit */
  59 #define WPT_TL_TOL      0x000001FF      /* T0 Level */
  60 #define WPT_TL_T1L      0x1ff00000      /* T1 Level */
  61 #define WPT_TL_TTEN     0x20000000      /* TT Enable */
  62
  63 /* Resolution of 1/2 degree C and an offset of -50C */
  64 #define PCH_TEMP_OFFSET (-50)
  65 #define GET_WPT_TEMP(x) ((x) * MILLIDEGREE_PER_DEGREE / 2 + WPT_TEMP_OFFSET)
  66 #define WPT_TEMP_OFFSET (PCH_TEMP_OFFSET * MILLIDEGREE_PER_DEGREE)
  67 #define GET_PCH_TEMP(x) (((x) / 2) + PCH_TEMP_OFFSET)
  68
  69 #define PCH_MAX_TRIPS 3 /* critical, hot, passive */
  70
  71 /* Amount of time for each cooling delay, 100ms by default for now */
  72 static unsigned int delay_timeout = 100;
  73 module_param(delay_timeout, int, 0644);
  74 MODULE_PARM_DESC(delay_timeout, "amount of time delay for each iteration.");
  75
  76 /* Number of iterations for cooling delay, 600 counts by default for now */
  77 static unsigned int delay_cnt = 600;
  78 module_param(delay_cnt, int, 0644);
  79 MODULE_PARM_DESC(delay_cnt, "total number of iterations for time delay.");
  80
  81 static char driver_name[] = "Intel PCH thermal driver";
  82
  83 struct pch_thermal_device {
  84         void __iomem *hw_base;
  85         struct pci_dev *pdev;
  86         struct thermal_zone_device *tzd;
  87         struct thermal_trip trips[PCH_MAX_TRIPS];
  88         bool bios_enabled;
  89 };
  90
  91 #ifdef CONFIG_ACPI
  92 /*
  93  * On some platforms, there is a companion ACPI device, which adds
  94  * passive trip temperature using _PSV method. There is no specific
  95  * passive temperature setting in MMIO interface of this PCI device.
  96  */
  97 static int pch_wpt_add_acpi_psv_trip(struct pch_thermal_device *ptd, int trip)
  98 {
  99         struct acpi_device *adev;
 100         int temp;
 101
 102         adev = ACPI_COMPANION(&ptd->pdev->dev);
 103         if (!adev)
 104                 return 0;
 105
 106         if (thermal_acpi_passive_trip_temp(adev, &temp) || temp <= 0)
 107                 return 0;
 108
 109         ptd->trips[trip].type = THERMAL_TRIP_PASSIVE;
 110         ptd->trips[trip].temperature = temp;
 111         return 1;
 112 }
 113 #else
 114 static int pch_wpt_add_acpi_psv_trip(struct pch_thermal_device *ptd, int trip)
 115 {
 116         return 0;
 117 }
 118 #endif
 119
 120 static int pch_thermal_get_temp(struct thermal_zone_device *tzd, int *temp)
 121 {
 122         struct pch_thermal_device *ptd = tzd->devdata;
 123
 124         *temp = GET_WPT_TEMP(WPT_TEMP_TSR & readw(ptd->hw_base + WPT_TEMP));
 125         return 0;
 126 }
 127
 128 static void pch_critical(struct thermal_zone_device *tzd)
 129 {
 130         dev_dbg(&tzd->device, "%s: critical temperature reached\n", tzd->type);
 131 }
 132
 133 static struct thermal_zone_device_ops tzd_ops = {
 134         .get_temp = pch_thermal_get_temp,
 135         .critical = pch_critical,
 136 };
 137
 138 enum pch_board_ids {
 139         PCH_BOARD_HSW = 0,
 140         PCH_BOARD_WPT,
 141         PCH_BOARD_SKL,
 142         PCH_BOARD_CNL,
 143         PCH_BOARD_CML,
 144         PCH_BOARD_LWB,
 145         PCH_BOARD_WBG,
 146 };
 147
 148 static const char *board_names[] = {
 149         [PCH_BOARD_HSW] = "pch_haswell",
 150         [PCH_BOARD_WPT] = "pch_wildcat_point",
 151         [PCH_BOARD_SKL] = "pch_skylake",
 152         [PCH_BOARD_CNL] = "pch_cannonlake",
 153         [PCH_BOARD_CML] = "pch_cometlake",
 154         [PCH_BOARD_LWB] = "pch_lewisburg",
 155         [PCH_BOARD_WBG] = "pch_wellsburg",
 156 };
 157
 158 static int intel_pch_thermal_probe(struct pci_dev *pdev,
 159                                    const struct pci_device_id *id)
 160 {
 161         enum pch_board_ids board_id = id->driver_data;
 162         struct pch_thermal_device *ptd;
 163         int nr_trips = 0;
 164         u16 trip_temp;
 165         u8 tsel;
 166         int err;
 167
 168         ptd = devm_kzalloc(&pdev->dev, sizeof(*ptd), GFP_KERNEL);
 169         if (!ptd)
 170                 return -ENOMEM;
 171
 172         pci_set_drvdata(pdev, ptd);
 173         ptd->pdev = pdev;
 174
 175         err = pci_enable_device(pdev);
 176         if (err) {
 177                 dev_err(&pdev->dev, "failed to enable pci device\n");
 178                 return err;
 179         }
 180
 181         err = pci_request_regions(pdev, driver_name);
 182         if (err) {
 183                 dev_err(&pdev->dev, "failed to request pci region\n");
 184                 goto error_disable;
 185         }
 186
 187         ptd->hw_base = pci_ioremap_bar(pdev, 0);
 188         if (!ptd->hw_base) {
 189                 err = -ENOMEM;
 190                 dev_err(&pdev->dev, "failed to map mem base\n");
 191                 goto error_release;
 192         }
 193
 194         /* Check if BIOS has already enabled thermal sensor */
 195         if (WPT_TSEL_ETS & readb(ptd->hw_base + WPT_TSEL)) {
 196                 ptd->bios_enabled = true;
 197                 goto read_trips;
 198         }
 199
 200         tsel = readb(ptd->hw_base + WPT_TSEL);
 201         /*
 202          * When TSEL's Policy Lock-Down bit is 1, TSEL become RO.
 203          * If so, thermal sensor cannot enable. Bail out.
 204          */
 205         if (tsel & WPT_TSEL_PLDB) {
 206                 dev_err(&ptd->pdev->dev, "Sensor can't be enabled\n");
 207                 err = -ENODEV;
 208                 goto error_cleanup;
 209         }
 210
 211         writeb(tsel|WPT_TSEL_ETS, ptd->hw_base + WPT_TSEL);
 212         if (!(WPT_TSEL_ETS & readb(ptd->hw_base + WPT_TSEL))) {
 213                 dev_err(&ptd->pdev->dev, "Sensor can't be enabled\n");
 214                 err = -ENODEV;
 215                 goto error_cleanup;
 216         }
 217
 218 read_trips:
 219         trip_temp = readw(ptd->hw_base + WPT_CTT);
 220         trip_temp &= 0x1FF;
 221         if (trip_temp) {
 222                 ptd->trips[nr_trips].temperature = GET_WPT_TEMP(trip_temp);
 223                 ptd->trips[nr_trips++].type = THERMAL_TRIP_CRITICAL;
 224         }
 225
 226         trip_temp = readw(ptd->hw_base + WPT_PHL);
 227         trip_temp &= 0x1FF;
 228         if (trip_temp) {
 229                 ptd->trips[nr_trips].temperature = GET_WPT_TEMP(trip_temp);
 230                 ptd->trips[nr_trips++].type = THERMAL_TRIP_HOT;
 231         }
 232
 233         nr_trips += pch_wpt_add_acpi_psv_trip(ptd, nr_trips);
 234
 235         ptd->tzd = thermal_zone_device_register_with_trips(board_names[board_id],
 236                                                            ptd->trips, nr_trips,
 237                                                            0, ptd, &tzd_ops,
 238                                                            NULL, 0, 0);
 239         if (IS_ERR(ptd->tzd)) {
 240                 dev_err(&pdev->dev, "Failed to register thermal zone %s\n",
 241                         board_names[board_id]);
 242                 err = PTR_ERR(ptd->tzd);
 243                 goto error_cleanup;
 244         }
 245         err = thermal_zone_device_enable(ptd->tzd);
 246         if (err)
 247                 goto err_unregister;
 248
 249         return 0;
 250
 251 err_unregister:
 252         thermal_zone_device_unregister(ptd->tzd);
 253 error_cleanup:
 254         iounmap(ptd->hw_base);
 255 error_release:
 256         pci_release_regions(pdev);
 257 error_disable:
 258         pci_disable_device(pdev);
 259         dev_err(&pdev->dev, "pci device failed to probe\n");
 260         return err;
 261 }
 262
 263 static void intel_pch_thermal_remove(struct pci_dev *pdev)
 264 {
 265         struct pch_thermal_device *ptd = pci_get_drvdata(pdev);
 266
 267         thermal_zone_device_unregister(ptd->tzd);
 268         iounmap(ptd->hw_base);
 269         pci_set_drvdata(pdev, NULL);
 270         pci_release_regions(pdev);
 271         pci_disable_device(pdev);
 272 }
 273
 274 static int intel_pch_thermal_suspend_noirq(struct device *device)
 275 {
 276         struct pch_thermal_device *ptd = dev_get_drvdata(device);
 277         u16 pch_thr_temp, pch_cur_temp;
 278         int pch_delay_cnt = 0;
 279         u8 tsel;
 280
 281         /* Shutdown the thermal sensor if it is not enabled by BIOS */
 282         if (!ptd->bios_enabled) {
 283                 tsel = readb(ptd->hw_base + WPT_TSEL);
 284                 writeb(tsel & 0xFE, ptd->hw_base + WPT_TSEL);
 285                 return 0;
 286         }
 287
 288         /* Do not check temperature if it is not s2idle */
 289         if (pm_suspend_via_firmware())
 290                 return 0;
 291
 292         /* Get the PCH temperature threshold value */
 293         pch_thr_temp = GET_PCH_TEMP(WPT_TEMP_TSR & readw(ptd->hw_base + WPT_TSPM));
 294
 295         /* Get the PCH current temperature value */
 296         pch_cur_temp = GET_PCH_TEMP(WPT_TEMP_TSR & readw(ptd->hw_base + WPT_TEMP));
 297
 298         /*
 299          * If current PCH temperature is higher than configured PCH threshold
 300          * value, run some delay loop with sleep to let the current temperature
 301          * go down below the threshold value which helps to allow system enter
 302          * lower power S0ix suspend state. Even after delay loop if PCH current
 303          * temperature stays above threshold, notify the warning message
 304          * which helps to indentify the reason why S0ix entry was rejected.
 305          */
 306         while (pch_delay_cnt < delay_cnt) {
 307                 if (pch_cur_temp < pch_thr_temp)
 308                         break;
 309
 310                 if (pm_wakeup_pending()) {
 311                         dev_warn(&ptd->pdev->dev, "Wakeup event detected, abort cooling\n");
 312                         return 0;
 313                 }
 314
 315                 pch_delay_cnt++;
 316                 dev_dbg(&ptd->pdev->dev,
 317                         "CPU-PCH current temp [%dC] higher than the threshold temp [%dC], sleep %d times for %d ms duration\n",
 318                         pch_cur_temp, pch_thr_temp, pch_delay_cnt, delay_timeout);
 319                 msleep(delay_timeout);
 320                 /* Read the PCH current temperature for next cycle. */
 321                 pch_cur_temp = GET_PCH_TEMP(WPT_TEMP_TSR & readw(ptd->hw_base + WPT_TEMP));
 322         }
 323
 324         if (pch_cur_temp >= pch_thr_temp)
 325                 dev_warn(&ptd->pdev->dev,
 326                         "CPU-PCH is hot [%dC] after %d ms delay. S0ix might fail\n",
 327                         pch_cur_temp, pch_delay_cnt * delay_timeout);
 328         else {
 329                 if (pch_delay_cnt)
 330                         dev_info(&ptd->pdev->dev,
 331                                 "CPU-PCH is cool [%dC] after %d ms delay\n",
 332                                 pch_cur_temp, pch_delay_cnt * delay_timeout);
 333                 else
 334                         dev_info(&ptd->pdev->dev,
 335                                 "CPU-PCH is cool [%dC]\n",
 336                                 pch_cur_temp);
 337         }
 338
 339         return 0;
 340 }
 341
 342 static int intel_pch_thermal_resume(struct device *device)
 343 {
 344         struct pch_thermal_device *ptd = dev_get_drvdata(device);
 345         u8 tsel;
 346
 347         if (ptd->bios_enabled)
 348                 return 0;
 349
 350         tsel = readb(ptd->hw_base + WPT_TSEL);
 351
 352         writeb(tsel | WPT_TSEL_ETS, ptd->hw_base + WPT_TSEL);
 353
 354         return 0;
 355 }
 356
 357 static const struct pci_device_id intel_pch_thermal_id[] = {
 358         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_HSW_1),
 359                 .driver_data = PCH_BOARD_HSW, },
 360         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_HSW_2),
 361                 .driver_data = PCH_BOARD_HSW, },
 362         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_WPT),
 363                 .driver_data = PCH_BOARD_WPT, },
 364         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_SKL),
 365                 .driver_data = PCH_BOARD_SKL, },
 366         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_SKL_H),
 367                 .driver_data = PCH_BOARD_SKL, },
 368         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_CNL),
 369                 .driver_data = PCH_BOARD_CNL, },
 370         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_CNL_H),
 371                 .driver_data = PCH_BOARD_CNL, },
 372         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_CNL_LP),
 373                 .driver_data = PCH_BOARD_CNL, },
 374         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_CML_H),
 375                 .driver_data = PCH_BOARD_CML, },
 376         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_LWB),
 377                 .driver_data = PCH_BOARD_LWB, },
 378         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_WBG),
 379                 .driver_data = PCH_BOARD_WBG, },
 380         { 0, },
 381 };
 382 MODULE_DEVICE_TABLE(pci, intel_pch_thermal_id);
 383
 384 static const struct dev_pm_ops intel_pch_pm_ops = {
 385         .suspend_noirq = intel_pch_thermal_suspend_noirq,
 386         .resume = intel_pch_thermal_resume,
 387 };
 388
 389 static struct pci_driver intel_pch_thermal_driver = {
 390         .name           = "intel_pch_thermal",
 391         .id_table       = intel_pch_thermal_id,
 392         .probe          = intel_pch_thermal_probe,
 393         .remove         = intel_pch_thermal_remove,
 394         .driver.pm      = &intel_pch_pm_ops,
 395 };
 396
 397 module_pci_driver(intel_pch_thermal_driver);
 398
 399 MODULE_LICENSE("GPL v2");
 400 MODULE_DESCRIPTION("Intel PCH Thermal driver");