1 // SPDX-License-Identifier: GPL-2.0-only
5 * Device driver supporting CBR for IDT 77201/77211 "NICStAR" based cards.
7 * IMPORTANT: The included file nicstarmac.c was NOT WRITTEN BY ME.
8 * It was taken from the frle-0.22 device driver.
9 * As the file doesn't have a copyright notice, in the file
10 * nicstarmac.copyright I put the copyright notice from the
11 * frle-0.22 device driver.
12 * Some code is based on the nicstar driver by M. Welsh.
22 * IMPORTANT INFORMATION
24 * There are currently three types of spinlocks:
26 * 1 - Per card interrupt spinlock (to protect structures and such)
27 * 2 - Per SCQ scq spinlock
28 * 3 - Per card resource spinlock (to access registers, etc.)
30 * These must NEVER be grabbed in reverse order.
36 #include <linux/module.h>
37 #include <linux/kernel.h>
38 #include <linux/skbuff.h>
39 #include <linux/atmdev.h>
40 #include <linux/atm.h>
41 #include <linux/pci.h>
42 #include <linux/dma-mapping.h>
43 #include <linux/types.h>
44 #include <linux/string.h>
45 #include <linux/delay.h>
46 #include <linux/init.h>
47 #include <linux/sched.h>
48 #include <linux/timer.h>
49 #include <linux/interrupt.h>
50 #include <linux/bitops.h>
51 #include <linux/slab.h>
52 #include <linux/idr.h>
54 #include <linux/uaccess.h>
55 #include <linux/atomic.h>
56 #include <linux/etherdevice.h>
58 #ifdef CONFIG_ATM_NICSTAR_USE_SUNI
60 #endif /* CONFIG_ATM_NICSTAR_USE_SUNI */
61 #ifdef CONFIG_ATM_NICSTAR_USE_IDT77105
63 #endif /* CONFIG_ATM_NICSTAR_USE_IDT77105 */
67 #include "nicstarmac.c"
69 /* Configurable parameters */
77 /* Do not touch these */
80 #define TXPRINTK(args...) printk(args)
82 #define TXPRINTK(args...)
86 #define RXPRINTK(args...) printk(args)
88 #define RXPRINTK(args...)
92 #define PRINTK(args...) printk(args)
94 #define PRINTK(args...) do {} while (0)
95 #endif /* GENERAL_DEBUG */
98 #define XPRINTK(args...) printk(args)
100 #define XPRINTK(args...)
101 #endif /* EXTRA_DEBUG */
105 #define CMD_BUSY(card) (readl((card)->membase + STAT) & NS_STAT_CMDBZ)
107 #define NS_DELAY mdelay(1)
109 #define PTR_DIFF(a, b) ((u32)((unsigned long)(a) - (unsigned long)(b)))
112 #define ATM_SKB(s) (&(s)->atm)
115 #define scq_virt_to_bus(scq, p) \
116 (scq->dma + ((unsigned long)(p) - (unsigned long)(scq)->org))
118 /* Function declarations */
120 static u32 ns_read_sram(ns_dev * card, u32 sram_address);
121 static void ns_write_sram(ns_dev * card, u32 sram_address, u32 * value,
123 static int ns_init_card(int i, struct pci_dev *pcidev);
124 static void ns_init_card_error(ns_dev * card, int error);
125 static scq_info *get_scq(ns_dev *card, int size, u32 scd);
126 static void free_scq(ns_dev *card, scq_info * scq, struct atm_vcc *vcc);
127 static void push_rxbufs(ns_dev *, struct sk_buff *);
128 static irqreturn_t ns_irq_handler(int irq, void *dev_id);
129 static int ns_open(struct atm_vcc *vcc);
130 static void ns_close(struct atm_vcc *vcc);
131 static void fill_tst(ns_dev * card, int n, vc_map * vc);
132 static int ns_send(struct atm_vcc *vcc, struct sk_buff *skb);
133 static int ns_send_bh(struct atm_vcc *vcc, struct sk_buff *skb);
134 static int push_scqe(ns_dev * card, vc_map * vc, scq_info * scq, ns_scqe * tbd,
135 struct sk_buff *skb, bool may_sleep);
136 static void process_tsq(ns_dev * card);
137 static void drain_scq(ns_dev * card, scq_info * scq, int pos);
138 static void process_rsq(ns_dev * card);
139 static void dequeue_rx(ns_dev * card, ns_rsqe * rsqe);
140 static void recycle_rx_buf(ns_dev * card, struct sk_buff *skb);
141 static void recycle_iovec_rx_bufs(ns_dev * card, struct iovec *iov, int count);
142 static void recycle_iov_buf(ns_dev * card, struct sk_buff *iovb);
143 static void dequeue_sm_buf(ns_dev * card, struct sk_buff *sb);
144 static void dequeue_lg_buf(ns_dev * card, struct sk_buff *lb);
145 static int ns_proc_read(struct atm_dev *dev, loff_t * pos, char *page);
146 static int ns_ioctl(struct atm_dev *dev, unsigned int cmd, void __user * arg);
148 static void which_list(ns_dev * card, struct sk_buff *skb);
150 static void ns_poll(struct timer_list *unused);
151 static void ns_phy_put(struct atm_dev *dev, unsigned char value,
153 static unsigned char ns_phy_get(struct atm_dev *dev, unsigned long addr);
155 /* Global variables */
157 static struct ns_dev *cards[NS_MAX_CARDS];
158 static unsigned num_cards;
159 static const struct atmdev_ops atm_ops = {
164 .send_bh = ns_send_bh,
165 .phy_put = ns_phy_put,
166 .phy_get = ns_phy_get,
167 .proc_read = ns_proc_read,
168 .owner = THIS_MODULE,
171 static struct timer_list ns_timer;
172 static char *mac[NS_MAX_CARDS];
173 module_param_array(mac, charp, NULL, 0);
174 MODULE_LICENSE("GPL");
178 static int nicstar_init_one(struct pci_dev *pcidev,
179 const struct pci_device_id *ent)
181 static int index = -1;
187 error = ns_init_card(index, pcidev);
189 cards[index--] = NULL; /* don't increment index */
198 static void nicstar_remove_one(struct pci_dev *pcidev)
201 ns_dev *card = pci_get_drvdata(pcidev);
203 struct sk_buff *iovb;
209 if (cards[i] == NULL)
212 if (card->atmdev->phy && card->atmdev->phy->stop)
213 card->atmdev->phy->stop(card->atmdev);
215 /* Stop everything */
216 writel(0x00000000, card->membase + CFG);
218 /* De-register device */
219 atm_dev_deregister(card->atmdev);
221 /* Disable PCI device */
222 pci_disable_device(pcidev);
224 /* Free up resources */
226 PRINTK("nicstar%d: freeing %d huge buffers.\n", i, card->hbpool.count);
227 while ((hb = skb_dequeue(&card->hbpool.queue)) != NULL) {
228 dev_kfree_skb_any(hb);
231 PRINTK("nicstar%d: %d huge buffers freed.\n", i, j);
233 PRINTK("nicstar%d: freeing %d iovec buffers.\n", i,
234 card->iovpool.count);
235 while ((iovb = skb_dequeue(&card->iovpool.queue)) != NULL) {
236 dev_kfree_skb_any(iovb);
239 PRINTK("nicstar%d: %d iovec buffers freed.\n", i, j);
240 while ((lb = skb_dequeue(&card->lbpool.queue)) != NULL)
241 dev_kfree_skb_any(lb);
242 while ((sb = skb_dequeue(&card->sbpool.queue)) != NULL)
243 dev_kfree_skb_any(sb);
244 free_scq(card, card->scq0, NULL);
245 for (j = 0; j < NS_FRSCD_NUM; j++) {
246 if (card->scd2vc[j] != NULL)
247 free_scq(card, card->scd2vc[j]->scq, card->scd2vc[j]->tx_vcc);
249 idr_destroy(&card->idr);
250 dma_free_coherent(&card->pcidev->dev, NS_RSQSIZE + NS_RSQ_ALIGNMENT,
251 card->rsq.org, card->rsq.dma);
252 dma_free_coherent(&card->pcidev->dev, NS_TSQSIZE + NS_TSQ_ALIGNMENT,
253 card->tsq.org, card->tsq.dma);
254 free_irq(card->pcidev->irq, card);
255 iounmap(card->membase);
259 static const struct pci_device_id nicstar_pci_tbl[] = {
260 { PCI_VDEVICE(IDT, PCI_DEVICE_ID_IDT_IDT77201), 0 },
261 {0,} /* terminate list */
264 MODULE_DEVICE_TABLE(pci, nicstar_pci_tbl);
266 static struct pci_driver nicstar_driver = {
268 .id_table = nicstar_pci_tbl,
269 .probe = nicstar_init_one,
270 .remove = nicstar_remove_one,
273 static int __init nicstar_init(void)
275 unsigned error = 0; /* Initialized to remove compile warning */
277 XPRINTK("nicstar: nicstar_init() called.\n");
279 error = pci_register_driver(&nicstar_driver);
281 TXPRINTK("nicstar: TX debug enabled.\n");
282 RXPRINTK("nicstar: RX debug enabled.\n");
283 PRINTK("nicstar: General debug enabled.\n");
285 printk("nicstar: using PHY loopback.\n");
286 #endif /* PHY_LOOPBACK */
287 XPRINTK("nicstar: nicstar_init() returned.\n");
290 timer_setup(&ns_timer, ns_poll, 0);
291 ns_timer.expires = jiffies + NS_POLL_PERIOD;
292 add_timer(&ns_timer);
298 static void __exit nicstar_cleanup(void)
300 XPRINTK("nicstar: nicstar_cleanup() called.\n");
302 del_timer(&ns_timer);
304 pci_unregister_driver(&nicstar_driver);
306 XPRINTK("nicstar: nicstar_cleanup() returned.\n");
309 static u32 ns_read_sram(ns_dev * card, u32 sram_address)
314 sram_address &= 0x0007FFFC; /* address must be dword aligned */
315 sram_address |= 0x50000000; /* SRAM read command */
316 spin_lock_irqsave(&card->res_lock, flags);
317 while (CMD_BUSY(card)) ;
318 writel(sram_address, card->membase + CMD);
319 while (CMD_BUSY(card)) ;
320 data = readl(card->membase + DR0);
321 spin_unlock_irqrestore(&card->res_lock, flags);
325 static void ns_write_sram(ns_dev * card, u32 sram_address, u32 * value,
330 count--; /* count range now is 0..3 instead of 1..4 */
332 c <<= 2; /* to use increments of 4 */
333 spin_lock_irqsave(&card->res_lock, flags);
334 while (CMD_BUSY(card)) ;
335 for (i = 0; i <= c; i += 4)
336 writel(*(value++), card->membase + i);
337 /* Note: DR# registers are the first 4 dwords in nicstar's memspace,
338 so card->membase + DR0 == card->membase */
340 sram_address &= 0x0007FFFC;
341 sram_address |= (0x40000000 | count);
342 writel(sram_address, card->membase + CMD);
343 spin_unlock_irqrestore(&card->res_lock, flags);
346 static int ns_init_card(int i, struct pci_dev *pcidev)
349 struct ns_dev *card = NULL;
350 unsigned char pci_latency;
356 unsigned long membase;
360 if (pci_enable_device(pcidev)) {
361 printk("nicstar%d: can't enable PCI device\n", i);
363 ns_init_card_error(card, error);
366 if (dma_set_mask_and_coherent(&pcidev->dev, DMA_BIT_MASK(32)) != 0) {
368 "nicstar%d: No suitable DMA available.\n", i);
370 ns_init_card_error(card, error);
374 card = kmalloc(sizeof(*card), GFP_KERNEL);
377 ("nicstar%d: can't allocate memory for device structure.\n",
380 ns_init_card_error(card, error);
384 spin_lock_init(&card->int_lock);
385 spin_lock_init(&card->res_lock);
387 pci_set_drvdata(pcidev, card);
391 card->pcidev = pcidev;
392 membase = pci_resource_start(pcidev, 1);
393 card->membase = ioremap(membase, NS_IOREMAP_SIZE);
394 if (!card->membase) {
395 printk("nicstar%d: can't ioremap() membase.\n", i);
397 ns_init_card_error(card, error);
400 PRINTK("nicstar%d: membase at 0x%p.\n", i, card->membase);
402 pci_set_master(pcidev);
404 if (pci_read_config_byte(pcidev, PCI_LATENCY_TIMER, &pci_latency) != 0) {
405 printk("nicstar%d: can't read PCI latency timer.\n", i);
407 ns_init_card_error(card, error);
410 #ifdef NS_PCI_LATENCY
411 if (pci_latency < NS_PCI_LATENCY) {
412 PRINTK("nicstar%d: setting PCI latency timer to %d.\n", i,
414 for (j = 1; j < 4; j++) {
415 if (pci_write_config_byte
416 (pcidev, PCI_LATENCY_TIMER, NS_PCI_LATENCY) != 0)
421 ("nicstar%d: can't set PCI latency timer to %d.\n",
424 ns_init_card_error(card, error);
428 #endif /* NS_PCI_LATENCY */
430 /* Clear timer overflow */
431 data = readl(card->membase + STAT);
432 if (data & NS_STAT_TMROF)
433 writel(NS_STAT_TMROF, card->membase + STAT);
436 writel(NS_CFG_SWRST, card->membase + CFG);
438 writel(0x00000000, card->membase + CFG);
441 writel(0x00000008, card->membase + GP);
443 writel(0x00000001, card->membase + GP);
445 while (CMD_BUSY(card)) ;
446 writel(NS_CMD_WRITE_UTILITY | 0x00000100, card->membase + CMD); /* Sync UTOPIA with SAR clock */
449 /* Detect PHY type */
450 while (CMD_BUSY(card)) ;
451 writel(NS_CMD_READ_UTILITY | 0x00000200, card->membase + CMD);
452 while (CMD_BUSY(card)) ;
453 data = readl(card->membase + DR0);
456 printk("nicstar%d: PHY seems to be 25 Mbps.\n", i);
457 card->max_pcr = ATM_25_PCR;
458 while (CMD_BUSY(card)) ;
459 writel(0x00000008, card->membase + DR0);
460 writel(NS_CMD_WRITE_UTILITY | 0x00000200, card->membase + CMD);
461 /* Clear an eventual pending interrupt */
462 writel(NS_STAT_SFBQF, card->membase + STAT);
464 while (CMD_BUSY(card)) ;
465 writel(0x00000022, card->membase + DR0);
466 writel(NS_CMD_WRITE_UTILITY | 0x00000202, card->membase + CMD);
467 #endif /* PHY_LOOPBACK */
471 printk("nicstar%d: PHY seems to be 155 Mbps.\n", i);
472 card->max_pcr = ATM_OC3_PCR;
474 while (CMD_BUSY(card)) ;
475 writel(0x00000002, card->membase + DR0);
476 writel(NS_CMD_WRITE_UTILITY | 0x00000205, card->membase + CMD);
477 #endif /* PHY_LOOPBACK */
480 printk("nicstar%d: unknown PHY type (0x%08X).\n", i, data);
482 ns_init_card_error(card, error);
485 writel(0x00000000, card->membase + GP);
487 /* Determine SRAM size */
489 ns_write_sram(card, 0x1C003, &data, 1);
491 ns_write_sram(card, 0x14003, &data, 1);
492 if (ns_read_sram(card, 0x14003) == 0x89ABCDEF &&
493 ns_read_sram(card, 0x1C003) == 0x76543210)
494 card->sram_size = 128;
496 card->sram_size = 32;
497 PRINTK("nicstar%d: %dK x 32bit SRAM size.\n", i, card->sram_size);
499 card->rct_size = NS_MAX_RCTSIZE;
501 #if (NS_MAX_RCTSIZE == 4096)
502 if (card->sram_size == 128)
504 ("nicstar%d: limiting maximum VCI. See NS_MAX_RCTSIZE in nicstar.h\n",
506 #elif (NS_MAX_RCTSIZE == 16384)
507 if (card->sram_size == 32) {
509 ("nicstar%d: wasting memory. See NS_MAX_RCTSIZE in nicstar.h\n",
511 card->rct_size = 4096;
514 #error NS_MAX_RCTSIZE must be either 4096 or 16384 in nicstar.c
517 card->vpibits = NS_VPIBITS;
518 if (card->rct_size == 4096)
519 card->vcibits = 12 - NS_VPIBITS;
520 else /* card->rct_size == 16384 */
521 card->vcibits = 14 - NS_VPIBITS;
523 /* Initialize the nicstar eeprom/eprom stuff, for the MAC addr */
525 nicstar_init_eprom(card->membase);
527 /* Set the VPI/VCI MSb mask to zero so we can receive OAM cells */
528 writel(0x00000000, card->membase + VPM);
531 card->tsq.org = dma_alloc_coherent(&card->pcidev->dev,
532 NS_TSQSIZE + NS_TSQ_ALIGNMENT,
533 &card->tsq.dma, GFP_KERNEL);
534 if (card->tsq.org == NULL) {
535 printk("nicstar%d: can't allocate TSQ.\n", i);
537 ns_init_card_error(card, error);
540 card->tsq.base = PTR_ALIGN(card->tsq.org, NS_TSQ_ALIGNMENT);
541 card->tsq.next = card->tsq.base;
542 card->tsq.last = card->tsq.base + (NS_TSQ_NUM_ENTRIES - 1);
543 for (j = 0; j < NS_TSQ_NUM_ENTRIES; j++)
544 ns_tsi_init(card->tsq.base + j);
545 writel(0x00000000, card->membase + TSQH);
546 writel(ALIGN(card->tsq.dma, NS_TSQ_ALIGNMENT), card->membase + TSQB);
547 PRINTK("nicstar%d: TSQ base at 0x%p.\n", i, card->tsq.base);
550 card->rsq.org = dma_alloc_coherent(&card->pcidev->dev,
551 NS_RSQSIZE + NS_RSQ_ALIGNMENT,
552 &card->rsq.dma, GFP_KERNEL);
553 if (card->rsq.org == NULL) {
554 printk("nicstar%d: can't allocate RSQ.\n", i);
556 ns_init_card_error(card, error);
559 card->rsq.base = PTR_ALIGN(card->rsq.org, NS_RSQ_ALIGNMENT);
560 card->rsq.next = card->rsq.base;
561 card->rsq.last = card->rsq.base + (NS_RSQ_NUM_ENTRIES - 1);
562 for (j = 0; j < NS_RSQ_NUM_ENTRIES; j++)
563 ns_rsqe_init(card->rsq.base + j);
564 writel(0x00000000, card->membase + RSQH);
565 writel(ALIGN(card->rsq.dma, NS_RSQ_ALIGNMENT), card->membase + RSQB);
566 PRINTK("nicstar%d: RSQ base at 0x%p.\n", i, card->rsq.base);
568 /* Initialize SCQ0, the only VBR SCQ used */
571 card->scq0 = get_scq(card, VBR_SCQSIZE, NS_VRSCD0);
572 if (card->scq0 == NULL) {
573 printk("nicstar%d: can't get SCQ0.\n", i);
575 ns_init_card_error(card, error);
578 u32d[0] = scq_virt_to_bus(card->scq0, card->scq0->base);
579 u32d[1] = (u32) 0x00000000;
580 u32d[2] = (u32) 0xffffffff;
581 u32d[3] = (u32) 0x00000000;
582 ns_write_sram(card, NS_VRSCD0, u32d, 4);
583 ns_write_sram(card, NS_VRSCD1, u32d, 4); /* These last two won't be used */
584 ns_write_sram(card, NS_VRSCD2, u32d, 4); /* but are initialized, just in case... */
585 card->scq0->scd = NS_VRSCD0;
586 PRINTK("nicstar%d: VBR-SCQ0 base at 0x%p.\n", i, card->scq0->base);
588 /* Initialize TSTs */
589 card->tst_addr = NS_TST0;
590 card->tst_free_entries = NS_TST_NUM_ENTRIES;
591 data = NS_TST_OPCODE_VARIABLE;
592 for (j = 0; j < NS_TST_NUM_ENTRIES; j++)
593 ns_write_sram(card, NS_TST0 + j, &data, 1);
594 data = ns_tste_make(NS_TST_OPCODE_END, NS_TST0);
595 ns_write_sram(card, NS_TST0 + NS_TST_NUM_ENTRIES, &data, 1);
596 for (j = 0; j < NS_TST_NUM_ENTRIES; j++)
597 ns_write_sram(card, NS_TST1 + j, &data, 1);
598 data = ns_tste_make(NS_TST_OPCODE_END, NS_TST1);
599 ns_write_sram(card, NS_TST1 + NS_TST_NUM_ENTRIES, &data, 1);
600 for (j = 0; j < NS_TST_NUM_ENTRIES; j++)
601 card->tste2vc[j] = NULL;
602 writel(NS_TST0 << 2, card->membase + TSTB);
604 /* Initialize RCT. AAL type is set on opening the VC. */
606 u32d[0] = NS_RCTE_RAWCELLINTEN;
608 u32d[0] = 0x00000000;
609 #endif /* RCQ_SUPPORT */
610 u32d[1] = 0x00000000;
611 u32d[2] = 0x00000000;
612 u32d[3] = 0xFFFFFFFF;
613 for (j = 0; j < card->rct_size; j++)
614 ns_write_sram(card, j * 4, u32d, 4);
616 memset(card->vcmap, 0, sizeof(card->vcmap));
618 for (j = 0; j < NS_FRSCD_NUM; j++)
619 card->scd2vc[j] = NULL;
621 /* Initialize buffer levels */
622 card->sbnr.min = MIN_SB;
623 card->sbnr.init = NUM_SB;
624 card->sbnr.max = MAX_SB;
625 card->lbnr.min = MIN_LB;
626 card->lbnr.init = NUM_LB;
627 card->lbnr.max = MAX_LB;
628 card->iovnr.min = MIN_IOVB;
629 card->iovnr.init = NUM_IOVB;
630 card->iovnr.max = MAX_IOVB;
631 card->hbnr.min = MIN_HB;
632 card->hbnr.init = NUM_HB;
633 card->hbnr.max = MAX_HB;
635 card->sm_handle = NULL;
636 card->sm_addr = 0x00000000;
637 card->lg_handle = NULL;
638 card->lg_addr = 0x00000000;
640 card->efbie = 1; /* To prevent push_rxbufs from enabling the interrupt */
642 idr_init(&card->idr);
644 /* Pre-allocate some huge buffers */
645 skb_queue_head_init(&card->hbpool.queue);
646 card->hbpool.count = 0;
647 for (j = 0; j < NUM_HB; j++) {
649 hb = __dev_alloc_skb(NS_HBUFSIZE, GFP_KERNEL);
652 ("nicstar%d: can't allocate %dth of %d huge buffers.\n",
655 ns_init_card_error(card, error);
658 NS_PRV_BUFTYPE(hb) = BUF_NONE;
659 skb_queue_tail(&card->hbpool.queue, hb);
660 card->hbpool.count++;
663 /* Allocate large buffers */
664 skb_queue_head_init(&card->lbpool.queue);
665 card->lbpool.count = 0; /* Not used */
666 for (j = 0; j < NUM_LB; j++) {
668 lb = __dev_alloc_skb(NS_LGSKBSIZE, GFP_KERNEL);
671 ("nicstar%d: can't allocate %dth of %d large buffers.\n",
674 ns_init_card_error(card, error);
677 NS_PRV_BUFTYPE(lb) = BUF_LG;
678 skb_queue_tail(&card->lbpool.queue, lb);
679 skb_reserve(lb, NS_SMBUFSIZE);
680 push_rxbufs(card, lb);
681 /* Due to the implementation of push_rxbufs() this is 1, not 0 */
684 card->rawcell = (struct ns_rcqe *) lb->data;
685 card->rawch = NS_PRV_DMA(lb);
688 /* Test for strange behaviour which leads to crashes */
690 ns_stat_lfbqc_get(readl(card->membase + STAT))) < card->lbnr.min) {
692 ("nicstar%d: Strange... Just allocated %d large buffers and lfbqc = %d.\n",
695 ns_init_card_error(card, error);
699 /* Allocate small buffers */
700 skb_queue_head_init(&card->sbpool.queue);
701 card->sbpool.count = 0; /* Not used */
702 for (j = 0; j < NUM_SB; j++) {
704 sb = __dev_alloc_skb(NS_SMSKBSIZE, GFP_KERNEL);
707 ("nicstar%d: can't allocate %dth of %d small buffers.\n",
710 ns_init_card_error(card, error);
713 NS_PRV_BUFTYPE(sb) = BUF_SM;
714 skb_queue_tail(&card->sbpool.queue, sb);
715 skb_reserve(sb, NS_AAL0_HEADER);
716 push_rxbufs(card, sb);
718 /* Test for strange behaviour which leads to crashes */
720 ns_stat_sfbqc_get(readl(card->membase + STAT))) < card->sbnr.min) {
722 ("nicstar%d: Strange... Just allocated %d small buffers and sfbqc = %d.\n",
725 ns_init_card_error(card, error);
729 /* Allocate iovec buffers */
730 skb_queue_head_init(&card->iovpool.queue);
731 card->iovpool.count = 0;
732 for (j = 0; j < NUM_IOVB; j++) {
733 struct sk_buff *iovb;
734 iovb = alloc_skb(NS_IOVBUFSIZE, GFP_KERNEL);
737 ("nicstar%d: can't allocate %dth of %d iovec buffers.\n",
740 ns_init_card_error(card, error);
743 NS_PRV_BUFTYPE(iovb) = BUF_NONE;
744 skb_queue_tail(&card->iovpool.queue, iovb);
745 card->iovpool.count++;
748 /* Configure NICStAR */
749 if (card->rct_size == 4096)
750 ns_cfg_rctsize = NS_CFG_RCTSIZE_4096_ENTRIES;
751 else /* (card->rct_size == 16384) */
752 ns_cfg_rctsize = NS_CFG_RCTSIZE_16384_ENTRIES;
758 (pcidev->irq, &ns_irq_handler, IRQF_SHARED, "nicstar", card) != 0) {
759 printk("nicstar%d: can't allocate IRQ %d.\n", i, pcidev->irq);
761 ns_init_card_error(card, error);
765 /* Register device */
766 card->atmdev = atm_dev_register("nicstar", &card->pcidev->dev, &atm_ops,
768 if (card->atmdev == NULL) {
769 printk("nicstar%d: can't register device.\n", i);
771 ns_init_card_error(card, error);
775 if (mac[i] == NULL || !mac_pton(mac[i], card->atmdev->esi)) {
776 nicstar_read_eprom(card->membase, NICSTAR_EPROM_MAC_ADDR_OFFSET,
777 card->atmdev->esi, 6);
778 if (ether_addr_equal(card->atmdev->esi, "\x00\x00\x00\x00\x00\x00")) {
779 nicstar_read_eprom(card->membase,
780 NICSTAR_EPROM_MAC_ADDR_OFFSET_ALT,
781 card->atmdev->esi, 6);
785 printk("nicstar%d: MAC address %pM\n", i, card->atmdev->esi);
787 card->atmdev->dev_data = card;
788 card->atmdev->ci_range.vpi_bits = card->vpibits;
789 card->atmdev->ci_range.vci_bits = card->vcibits;
790 card->atmdev->link_rate = card->max_pcr;
791 card->atmdev->phy = NULL;
793 #ifdef CONFIG_ATM_NICSTAR_USE_SUNI
794 if (card->max_pcr == ATM_OC3_PCR)
795 suni_init(card->atmdev);
796 #endif /* CONFIG_ATM_NICSTAR_USE_SUNI */
798 #ifdef CONFIG_ATM_NICSTAR_USE_IDT77105
799 if (card->max_pcr == ATM_25_PCR)
800 idt77105_init(card->atmdev);
801 #endif /* CONFIG_ATM_NICSTAR_USE_IDT77105 */
803 if (card->atmdev->phy && card->atmdev->phy->start)
804 card->atmdev->phy->start(card->atmdev);
806 writel(NS_CFG_RXPATH | NS_CFG_SMBUFSIZE | NS_CFG_LGBUFSIZE | NS_CFG_EFBIE | NS_CFG_RSQSIZE | NS_CFG_VPIBITS | ns_cfg_rctsize | NS_CFG_RXINT_NODELAY | NS_CFG_RAWIE | /* Only enabled if RCQ_SUPPORT */
807 NS_CFG_RSQAFIE | NS_CFG_TXEN | NS_CFG_TXIE | NS_CFG_TSQFIE_OPT | /* Only enabled if ENABLE_TSQFIE */
808 NS_CFG_PHYIE, card->membase + CFG);
815 static void ns_init_card_error(ns_dev *card, int error)
818 writel(0x00000000, card->membase + CFG);
821 struct sk_buff *iovb;
822 while ((iovb = skb_dequeue(&card->iovpool.queue)) != NULL)
823 dev_kfree_skb_any(iovb);
827 while ((sb = skb_dequeue(&card->sbpool.queue)) != NULL)
828 dev_kfree_skb_any(sb);
829 free_scq(card, card->scq0, NULL);
833 while ((lb = skb_dequeue(&card->lbpool.queue)) != NULL)
834 dev_kfree_skb_any(lb);
838 while ((hb = skb_dequeue(&card->hbpool.queue)) != NULL)
839 dev_kfree_skb_any(hb);
842 kfree(card->rsq.org);
845 kfree(card->tsq.org);
848 free_irq(card->pcidev->irq, card);
851 iounmap(card->membase);
854 pci_disable_device(card->pcidev);
859 static scq_info *get_scq(ns_dev *card, int size, u32 scd)
864 if (size != VBR_SCQSIZE && size != CBR_SCQSIZE)
867 scq = kmalloc(sizeof(*scq), GFP_KERNEL);
870 scq->org = dma_alloc_coherent(&card->pcidev->dev,
871 2 * size, &scq->dma, GFP_KERNEL);
876 scq->skb = kmalloc_array(size / NS_SCQE_SIZE,
880 dma_free_coherent(&card->pcidev->dev,
881 2 * size, scq->org, scq->dma);
885 scq->num_entries = size / NS_SCQE_SIZE;
886 scq->base = PTR_ALIGN(scq->org, size);
887 scq->next = scq->base;
888 scq->last = scq->base + (scq->num_entries - 1);
889 scq->tail = scq->last;
891 scq->num_entries = size / NS_SCQE_SIZE;
893 init_waitqueue_head(&scq->scqfull_waitq);
895 spin_lock_init(&scq->lock);
897 for (i = 0; i < scq->num_entries; i++)
903 /* For variable rate SCQ vcc must be NULL */
904 static void free_scq(ns_dev *card, scq_info *scq, struct atm_vcc *vcc)
908 if (scq->num_entries == VBR_SCQ_NUM_ENTRIES)
909 for (i = 0; i < scq->num_entries; i++) {
910 if (scq->skb[i] != NULL) {
911 vcc = ATM_SKB(scq->skb[i])->vcc;
912 if (vcc->pop != NULL)
913 vcc->pop(vcc, scq->skb[i]);
915 dev_kfree_skb_any(scq->skb[i]);
917 } else { /* vcc must be != NULL */
921 ("nicstar: free_scq() called with vcc == NULL for fixed rate scq.");
922 for (i = 0; i < scq->num_entries; i++)
923 dev_kfree_skb_any(scq->skb[i]);
925 for (i = 0; i < scq->num_entries; i++) {
926 if (scq->skb[i] != NULL) {
927 if (vcc->pop != NULL)
928 vcc->pop(vcc, scq->skb[i]);
930 dev_kfree_skb_any(scq->skb[i]);
935 dma_free_coherent(&card->pcidev->dev,
936 2 * (scq->num_entries == VBR_SCQ_NUM_ENTRIES ?
937 VBR_SCQSIZE : CBR_SCQSIZE),
942 /* The handles passed must be pointers to the sk_buff containing the small
943 or large buffer(s) cast to u32. */
944 static void push_rxbufs(ns_dev * card, struct sk_buff *skb)
946 struct sk_buff *handle1, *handle2;
956 addr1 = dma_map_single(&card->pcidev->dev,
958 (NS_PRV_BUFTYPE(skb) == BUF_SM
959 ? NS_SMSKBSIZE : NS_LGSKBSIZE),
961 NS_PRV_DMA(skb) = addr1; /* save so we can unmap later */
965 printk("nicstar%d: push_rxbufs called with addr1 = 0.\n",
967 #endif /* GENERAL_DEBUG */
969 stat = readl(card->membase + STAT);
970 card->sbfqc = ns_stat_sfbqc_get(stat);
971 card->lbfqc = ns_stat_lfbqc_get(stat);
972 if (NS_PRV_BUFTYPE(skb) == BUF_SM) {
975 addr2 = card->sm_addr;
976 handle2 = card->sm_handle;
977 card->sm_addr = 0x00000000;
978 card->sm_handle = NULL;
979 } else { /* (!sm_addr) */
981 card->sm_addr = addr1;
982 card->sm_handle = handle1;
985 } else { /* buf_type == BUF_LG */
989 addr2 = card->lg_addr;
990 handle2 = card->lg_handle;
991 card->lg_addr = 0x00000000;
992 card->lg_handle = NULL;
993 } else { /* (!lg_addr) */
995 card->lg_addr = addr1;
996 card->lg_handle = handle1;
1002 if (NS_PRV_BUFTYPE(skb) == BUF_SM) {
1003 if (card->sbfqc >= card->sbnr.max) {
1004 skb_unlink(handle1, &card->sbpool.queue);
1005 dev_kfree_skb_any(handle1);
1006 skb_unlink(handle2, &card->sbpool.queue);
1007 dev_kfree_skb_any(handle2);
1011 } else { /* (buf_type == BUF_LG) */
1013 if (card->lbfqc >= card->lbnr.max) {
1014 skb_unlink(handle1, &card->lbpool.queue);
1015 dev_kfree_skb_any(handle1);
1016 skb_unlink(handle2, &card->lbpool.queue);
1017 dev_kfree_skb_any(handle2);
1023 id1 = idr_alloc(&card->idr, handle1, 0, 0, GFP_ATOMIC);
1027 id2 = idr_alloc(&card->idr, handle2, 0, 0, GFP_ATOMIC);
1031 spin_lock_irqsave(&card->res_lock, flags);
1032 while (CMD_BUSY(card)) ;
1033 writel(addr2, card->membase + DR3);
1034 writel(id2, card->membase + DR2);
1035 writel(addr1, card->membase + DR1);
1036 writel(id1, card->membase + DR0);
1037 writel(NS_CMD_WRITE_FREEBUFQ | NS_PRV_BUFTYPE(skb),
1038 card->membase + CMD);
1039 spin_unlock_irqrestore(&card->res_lock, flags);
1041 XPRINTK("nicstar%d: Pushing %s buffers at 0x%x and 0x%x.\n",
1043 (NS_PRV_BUFTYPE(skb) == BUF_SM ? "small" : "large"),
1047 if (!card->efbie && card->sbfqc >= card->sbnr.min &&
1048 card->lbfqc >= card->lbnr.min) {
1050 writel((readl(card->membase + CFG) | NS_CFG_EFBIE),
1051 card->membase + CFG);
1058 static irqreturn_t ns_irq_handler(int irq, void *dev_id)
1062 struct atm_dev *dev;
1063 unsigned long flags;
1065 card = (ns_dev *) dev_id;
1069 PRINTK("nicstar%d: NICStAR generated an interrupt\n", card->index);
1071 spin_lock_irqsave(&card->int_lock, flags);
1073 stat_r = readl(card->membase + STAT);
1075 /* Transmit Status Indicator has been written to T. S. Queue */
1076 if (stat_r & NS_STAT_TSIF) {
1077 TXPRINTK("nicstar%d: TSI interrupt\n", card->index);
1079 writel(NS_STAT_TSIF, card->membase + STAT);
1082 /* Incomplete CS-PDU has been transmitted */
1083 if (stat_r & NS_STAT_TXICP) {
1084 writel(NS_STAT_TXICP, card->membase + STAT);
1085 TXPRINTK("nicstar%d: Incomplete CS-PDU transmitted.\n",
1089 /* Transmit Status Queue 7/8 full */
1090 if (stat_r & NS_STAT_TSQF) {
1091 writel(NS_STAT_TSQF, card->membase + STAT);
1092 PRINTK("nicstar%d: TSQ full.\n", card->index);
1096 /* Timer overflow */
1097 if (stat_r & NS_STAT_TMROF) {
1098 writel(NS_STAT_TMROF, card->membase + STAT);
1099 PRINTK("nicstar%d: Timer overflow.\n", card->index);
1102 /* PHY device interrupt signal active */
1103 if (stat_r & NS_STAT_PHYI) {
1104 writel(NS_STAT_PHYI, card->membase + STAT);
1105 PRINTK("nicstar%d: PHY interrupt.\n", card->index);
1106 if (dev->phy && dev->phy->interrupt) {
1107 dev->phy->interrupt(dev);
1111 /* Small Buffer Queue is full */
1112 if (stat_r & NS_STAT_SFBQF) {
1113 writel(NS_STAT_SFBQF, card->membase + STAT);
1114 printk("nicstar%d: Small free buffer queue is full.\n",
1118 /* Large Buffer Queue is full */
1119 if (stat_r & NS_STAT_LFBQF) {
1120 writel(NS_STAT_LFBQF, card->membase + STAT);
1121 printk("nicstar%d: Large free buffer queue is full.\n",
1125 /* Receive Status Queue is full */
1126 if (stat_r & NS_STAT_RSQF) {
1127 writel(NS_STAT_RSQF, card->membase + STAT);
1128 printk("nicstar%d: RSQ full.\n", card->index);
1132 /* Complete CS-PDU received */
1133 if (stat_r & NS_STAT_EOPDU) {
1134 RXPRINTK("nicstar%d: End of CS-PDU received.\n", card->index);
1136 writel(NS_STAT_EOPDU, card->membase + STAT);
1139 /* Raw cell received */
1140 if (stat_r & NS_STAT_RAWCF) {
1141 writel(NS_STAT_RAWCF, card->membase + STAT);
1143 printk("nicstar%d: Raw cell received and no support yet...\n",
1145 #endif /* RCQ_SUPPORT */
1146 /* NOTE: the following procedure may keep a raw cell pending until the
1147 next interrupt. As this preliminary support is only meant to
1148 avoid buffer leakage, this is not an issue. */
1149 while (readl(card->membase + RAWCT) != card->rawch) {
1151 if (ns_rcqe_islast(card->rawcell)) {
1152 struct sk_buff *oldbuf;
1154 oldbuf = card->rcbuf;
1155 card->rcbuf = idr_find(&card->idr,
1156 ns_rcqe_nextbufhandle(card->rawcell));
1157 card->rawch = NS_PRV_DMA(card->rcbuf);
1158 card->rawcell = (struct ns_rcqe *)
1160 recycle_rx_buf(card, oldbuf);
1162 card->rawch += NS_RCQE_SIZE;
1168 /* Small buffer queue is empty */
1169 if (stat_r & NS_STAT_SFBQE) {
1173 writel(NS_STAT_SFBQE, card->membase + STAT);
1174 printk("nicstar%d: Small free buffer queue empty.\n",
1176 for (i = 0; i < card->sbnr.min; i++) {
1177 sb = dev_alloc_skb(NS_SMSKBSIZE);
1179 writel(readl(card->membase + CFG) &
1180 ~NS_CFG_EFBIE, card->membase + CFG);
1184 NS_PRV_BUFTYPE(sb) = BUF_SM;
1185 skb_queue_tail(&card->sbpool.queue, sb);
1186 skb_reserve(sb, NS_AAL0_HEADER);
1187 push_rxbufs(card, sb);
1193 /* Large buffer queue empty */
1194 if (stat_r & NS_STAT_LFBQE) {
1198 writel(NS_STAT_LFBQE, card->membase + STAT);
1199 printk("nicstar%d: Large free buffer queue empty.\n",
1201 for (i = 0; i < card->lbnr.min; i++) {
1202 lb = dev_alloc_skb(NS_LGSKBSIZE);
1204 writel(readl(card->membase + CFG) &
1205 ~NS_CFG_EFBIE, card->membase + CFG);
1209 NS_PRV_BUFTYPE(lb) = BUF_LG;
1210 skb_queue_tail(&card->lbpool.queue, lb);
1211 skb_reserve(lb, NS_SMBUFSIZE);
1212 push_rxbufs(card, lb);
1218 /* Receive Status Queue is 7/8 full */
1219 if (stat_r & NS_STAT_RSQAF) {
1220 writel(NS_STAT_RSQAF, card->membase + STAT);
1221 RXPRINTK("nicstar%d: RSQ almost full.\n", card->index);
1225 spin_unlock_irqrestore(&card->int_lock, flags);
1226 PRINTK("nicstar%d: end of interrupt service\n", card->index);
1230 static int ns_open(struct atm_vcc *vcc)
1234 unsigned long tmpl, modl;
1235 int tcr, tcra; /* target cell rate, and absolute value */
1236 int n = 0; /* Number of entries in the TST. Initialized to remove
1237 the compiler warning. */
1239 int frscdi = 0; /* Index of the SCD. Initialized to remove the compiler
1240 warning. How I wish compilers were clever enough to
1241 tell which variables can truly be used
1243 int inuse; /* tx or rx vc already in use by another vcc */
1244 short vpi = vcc->vpi;
1247 card = (ns_dev *) vcc->dev->dev_data;
1248 PRINTK("nicstar%d: opening vpi.vci %d.%d \n", card->index, (int)vpi,
1250 if (vcc->qos.aal != ATM_AAL5 && vcc->qos.aal != ATM_AAL0) {
1251 PRINTK("nicstar%d: unsupported AAL.\n", card->index);
1255 vc = &(card->vcmap[vpi << card->vcibits | vci]);
1259 if (vcc->qos.txtp.traffic_class != ATM_NONE && vc->tx)
1261 if (vcc->qos.rxtp.traffic_class != ATM_NONE && vc->rx)
1264 printk("nicstar%d: %s vci already in use.\n", card->index,
1265 inuse == 1 ? "tx" : inuse == 2 ? "rx" : "tx and rx");
1269 set_bit(ATM_VF_ADDR, &vcc->flags);
1271 /* NOTE: You are not allowed to modify an open connection's QOS. To change
1272 that, remove the ATM_VF_PARTIAL flag checking. There may be other changes
1273 needed to do that. */
1274 if (!test_bit(ATM_VF_PARTIAL, &vcc->flags)) {
1277 set_bit(ATM_VF_PARTIAL, &vcc->flags);
1278 if (vcc->qos.txtp.traffic_class == ATM_CBR) {
1279 /* Check requested cell rate and availability of SCD */
1280 if (vcc->qos.txtp.max_pcr == 0 && vcc->qos.txtp.pcr == 0
1281 && vcc->qos.txtp.min_pcr == 0) {
1283 ("nicstar%d: trying to open a CBR vc with cell rate = 0 \n",
1285 clear_bit(ATM_VF_PARTIAL, &vcc->flags);
1286 clear_bit(ATM_VF_ADDR, &vcc->flags);
1290 tcr = atm_pcr_goal(&(vcc->qos.txtp));
1291 tcra = tcr >= 0 ? tcr : -tcr;
1293 PRINTK("nicstar%d: target cell rate = %d.\n",
1294 card->index, vcc->qos.txtp.max_pcr);
1297 (unsigned long)tcra *(unsigned long)
1299 modl = tmpl % card->max_pcr;
1301 n = (int)(tmpl / card->max_pcr);
1305 } else if (tcr == 0) {
1307 (card->tst_free_entries -
1308 NS_TST_RESERVED)) <= 0) {
1310 ("nicstar%d: no CBR bandwidth free.\n",
1312 clear_bit(ATM_VF_PARTIAL, &vcc->flags);
1313 clear_bit(ATM_VF_ADDR, &vcc->flags);
1320 ("nicstar%d: selected bandwidth < granularity.\n",
1322 clear_bit(ATM_VF_PARTIAL, &vcc->flags);
1323 clear_bit(ATM_VF_ADDR, &vcc->flags);
1327 if (n > (card->tst_free_entries - NS_TST_RESERVED)) {
1329 ("nicstar%d: not enough free CBR bandwidth.\n",
1331 clear_bit(ATM_VF_PARTIAL, &vcc->flags);
1332 clear_bit(ATM_VF_ADDR, &vcc->flags);
1335 card->tst_free_entries -= n;
1337 XPRINTK("nicstar%d: writing %d tst entries.\n",
1339 for (frscdi = 0; frscdi < NS_FRSCD_NUM; frscdi++) {
1340 if (card->scd2vc[frscdi] == NULL) {
1341 card->scd2vc[frscdi] = vc;
1345 if (frscdi == NS_FRSCD_NUM) {
1347 ("nicstar%d: no SCD available for CBR channel.\n",
1349 card->tst_free_entries += n;
1350 clear_bit(ATM_VF_PARTIAL, &vcc->flags);
1351 clear_bit(ATM_VF_ADDR, &vcc->flags);
1355 vc->cbr_scd = NS_FRSCD + frscdi * NS_FRSCD_SIZE;
1357 scq = get_scq(card, CBR_SCQSIZE, vc->cbr_scd);
1359 PRINTK("nicstar%d: can't get fixed rate SCQ.\n",
1361 card->scd2vc[frscdi] = NULL;
1362 card->tst_free_entries += n;
1363 clear_bit(ATM_VF_PARTIAL, &vcc->flags);
1364 clear_bit(ATM_VF_ADDR, &vcc->flags);
1368 u32d[0] = scq_virt_to_bus(scq, scq->base);
1369 u32d[1] = (u32) 0x00000000;
1370 u32d[2] = (u32) 0xffffffff;
1371 u32d[3] = (u32) 0x00000000;
1372 ns_write_sram(card, vc->cbr_scd, u32d, 4);
1374 fill_tst(card, n, vc);
1375 } else if (vcc->qos.txtp.traffic_class == ATM_UBR) {
1376 vc->cbr_scd = 0x00000000;
1377 vc->scq = card->scq0;
1380 if (vcc->qos.txtp.traffic_class != ATM_NONE) {
1385 if (vcc->qos.rxtp.traffic_class != ATM_NONE) {
1392 /* Open the connection in hardware */
1393 if (vcc->qos.aal == ATM_AAL5)
1394 status = NS_RCTE_AAL5 | NS_RCTE_CONNECTOPEN;
1395 else /* vcc->qos.aal == ATM_AAL0 */
1396 status = NS_RCTE_AAL0 | NS_RCTE_CONNECTOPEN;
1398 status |= NS_RCTE_RAWCELLINTEN;
1399 #endif /* RCQ_SUPPORT */
1402 (vpi << card->vcibits | vci) *
1403 NS_RCT_ENTRY_SIZE, &status, 1);
1408 set_bit(ATM_VF_READY, &vcc->flags);
1412 static void ns_close(struct atm_vcc *vcc)
1420 card = vcc->dev->dev_data;
1421 PRINTK("nicstar%d: closing vpi.vci %d.%d \n", card->index,
1422 (int)vcc->vpi, vcc->vci);
1424 clear_bit(ATM_VF_READY, &vcc->flags);
1426 if (vcc->qos.rxtp.traffic_class != ATM_NONE) {
1428 unsigned long flags;
1432 (vcc->vpi << card->vcibits | vcc->vci) * NS_RCT_ENTRY_SIZE;
1433 spin_lock_irqsave(&card->res_lock, flags);
1434 while (CMD_BUSY(card)) ;
1435 writel(NS_CMD_CLOSE_CONNECTION | addr << 2,
1436 card->membase + CMD);
1437 spin_unlock_irqrestore(&card->res_lock, flags);
1440 if (vc->rx_iov != NULL) {
1441 struct sk_buff *iovb;
1444 stat = readl(card->membase + STAT);
1445 card->sbfqc = ns_stat_sfbqc_get(stat);
1446 card->lbfqc = ns_stat_lfbqc_get(stat);
1449 ("nicstar%d: closing a VC with pending rx buffers.\n",
1452 recycle_iovec_rx_bufs(card, (struct iovec *)iovb->data,
1453 NS_PRV_IOVCNT(iovb));
1454 NS_PRV_IOVCNT(iovb) = 0;
1455 spin_lock_irqsave(&card->int_lock, flags);
1456 recycle_iov_buf(card, iovb);
1457 spin_unlock_irqrestore(&card->int_lock, flags);
1462 if (vcc->qos.txtp.traffic_class != ATM_NONE) {
1466 if (vcc->qos.txtp.traffic_class == ATM_CBR) {
1467 unsigned long flags;
1474 spin_lock_irqsave(&scq->lock, flags);
1476 if (scqep == scq->base)
1480 if (scqep == scq->tail) {
1481 spin_unlock_irqrestore(&scq->lock, flags);
1484 /* If the last entry is not a TSR, place one in the SCQ in order to
1485 be able to completely drain it and then close. */
1486 if (!ns_scqe_is_tsr(scqep) && scq->tail != scq->next) {
1492 tsr.word_1 = ns_tsr_mkword_1(NS_TSR_INTENABLE);
1493 scdi = (vc->cbr_scd - NS_FRSCD) / NS_FRSCD_SIZE;
1494 scqi = scq->next - scq->base;
1495 tsr.word_2 = ns_tsr_mkword_2(scdi, scqi);
1496 tsr.word_3 = 0x00000000;
1497 tsr.word_4 = 0x00000000;
1500 scq->skb[index] = NULL;
1501 if (scq->next == scq->last)
1502 scq->next = scq->base;
1505 data = scq_virt_to_bus(scq, scq->next);
1506 ns_write_sram(card, scq->scd, &data, 1);
1508 spin_unlock_irqrestore(&scq->lock, flags);
1512 /* Free all TST entries */
1513 data = NS_TST_OPCODE_VARIABLE;
1514 for (i = 0; i < NS_TST_NUM_ENTRIES; i++) {
1515 if (card->tste2vc[i] == vc) {
1516 ns_write_sram(card, card->tst_addr + i, &data,
1518 card->tste2vc[i] = NULL;
1519 card->tst_free_entries++;
1523 card->scd2vc[(vc->cbr_scd - NS_FRSCD) / NS_FRSCD_SIZE] = NULL;
1524 free_scq(card, vc->scq, vcc);
1527 /* remove all references to vcc before deleting it */
1528 if (vcc->qos.txtp.traffic_class != ATM_NONE) {
1529 unsigned long flags;
1530 scq_info *scq = card->scq0;
1532 spin_lock_irqsave(&scq->lock, flags);
1534 for (i = 0; i < scq->num_entries; i++) {
1535 if (scq->skb[i] && ATM_SKB(scq->skb[i])->vcc == vcc) {
1536 ATM_SKB(scq->skb[i])->vcc = NULL;
1537 atm_return(vcc, scq->skb[i]->truesize);
1539 ("nicstar: deleted pending vcc mapping\n");
1543 spin_unlock_irqrestore(&scq->lock, flags);
1546 vcc->dev_data = NULL;
1547 clear_bit(ATM_VF_PARTIAL, &vcc->flags);
1548 clear_bit(ATM_VF_ADDR, &vcc->flags);
1553 stat = readl(card->membase + STAT);
1554 cfg = readl(card->membase + CFG);
1555 printk("STAT = 0x%08X CFG = 0x%08X \n", stat, cfg);
1557 ("TSQ: base = 0x%p next = 0x%p last = 0x%p TSQT = 0x%08X \n",
1558 card->tsq.base, card->tsq.next,
1559 card->tsq.last, readl(card->membase + TSQT));
1561 ("RSQ: base = 0x%p next = 0x%p last = 0x%p RSQT = 0x%08X \n",
1562 card->rsq.base, card->rsq.next,
1563 card->rsq.last, readl(card->membase + RSQT));
1564 printk("Empty free buffer queue interrupt %s \n",
1565 card->efbie ? "enabled" : "disabled");
1566 printk("SBCNT = %d count = %d LBCNT = %d count = %d \n",
1567 ns_stat_sfbqc_get(stat), card->sbpool.count,
1568 ns_stat_lfbqc_get(stat), card->lbpool.count);
1569 printk("hbpool.count = %d iovpool.count = %d \n",
1570 card->hbpool.count, card->iovpool.count);
1572 #endif /* RX_DEBUG */
1575 static void fill_tst(ns_dev * card, int n, vc_map * vc)
1582 /* It would be very complicated to keep the two TSTs synchronized while
1583 assuring that writes are only made to the inactive TST. So, for now I
1584 will use only one TST. If problems occur, I will change this again */
1586 new_tst = card->tst_addr;
1588 /* Fill procedure */
1590 for (e = 0; e < NS_TST_NUM_ENTRIES; e++) {
1591 if (card->tste2vc[e] == NULL)
1594 if (e == NS_TST_NUM_ENTRIES) {
1595 printk("nicstar%d: No free TST entries found. \n", card->index);
1600 cl = NS_TST_NUM_ENTRIES;
1601 data = ns_tste_make(NS_TST_OPCODE_FIXED, vc->cbr_scd);
1604 if (cl >= NS_TST_NUM_ENTRIES && card->tste2vc[e] == NULL) {
1605 card->tste2vc[e] = vc;
1606 ns_write_sram(card, new_tst + e, &data, 1);
1607 cl -= NS_TST_NUM_ENTRIES;
1611 if (++e == NS_TST_NUM_ENTRIES) {
1617 /* End of fill procedure */
1619 data = ns_tste_make(NS_TST_OPCODE_END, new_tst);
1620 ns_write_sram(card, new_tst + NS_TST_NUM_ENTRIES, &data, 1);
1621 ns_write_sram(card, card->tst_addr + NS_TST_NUM_ENTRIES, &data, 1);
1622 card->tst_addr = new_tst;
1625 static int _ns_send(struct atm_vcc *vcc, struct sk_buff *skb, bool may_sleep)
1630 unsigned long buflen;
1632 u32 flags; /* TBD flags, not CPU flags */
1634 card = vcc->dev->dev_data;
1635 TXPRINTK("nicstar%d: ns_send() called.\n", card->index);
1636 if ((vc = (vc_map *) vcc->dev_data) == NULL) {
1637 printk("nicstar%d: vcc->dev_data == NULL on ns_send().\n",
1639 atomic_inc(&vcc->stats->tx_err);
1640 dev_kfree_skb_any(skb);
1645 printk("nicstar%d: Trying to transmit on a non-tx VC.\n",
1647 atomic_inc(&vcc->stats->tx_err);
1648 dev_kfree_skb_any(skb);
1652 if (vcc->qos.aal != ATM_AAL5 && vcc->qos.aal != ATM_AAL0) {
1653 printk("nicstar%d: Only AAL0 and AAL5 are supported.\n",
1655 atomic_inc(&vcc->stats->tx_err);
1656 dev_kfree_skb_any(skb);
1660 if (skb_shinfo(skb)->nr_frags != 0) {
1661 printk("nicstar%d: No scatter-gather yet.\n", card->index);
1662 atomic_inc(&vcc->stats->tx_err);
1663 dev_kfree_skb_any(skb);
1667 ATM_SKB(skb)->vcc = vcc;
1669 NS_PRV_DMA(skb) = dma_map_single(&card->pcidev->dev, skb->data,
1670 skb->len, DMA_TO_DEVICE);
1672 if (vcc->qos.aal == ATM_AAL5) {
1673 buflen = (skb->len + 47 + 8) / 48 * 48; /* Multiple of 48 */
1674 flags = NS_TBD_AAL5;
1675 scqe.word_2 = cpu_to_le32(NS_PRV_DMA(skb));
1676 scqe.word_3 = cpu_to_le32(skb->len);
1678 ns_tbd_mkword_4(0, (u32) vcc->vpi, (u32) vcc->vci, 0,
1680 atm_options & ATM_ATMOPT_CLP ? 1 : 0);
1681 flags |= NS_TBD_EOPDU;
1682 } else { /* (vcc->qos.aal == ATM_AAL0) */
1684 buflen = ATM_CELL_PAYLOAD; /* i.e., 48 bytes */
1685 flags = NS_TBD_AAL0;
1686 scqe.word_2 = cpu_to_le32(NS_PRV_DMA(skb) + NS_AAL0_HEADER);
1687 scqe.word_3 = cpu_to_le32(0x00000000);
1688 if (*skb->data & 0x02) /* Payload type 1 - end of pdu */
1689 flags |= NS_TBD_EOPDU;
1691 cpu_to_le32(*((u32 *) skb->data) & ~NS_TBD_VC_MASK);
1692 /* Force the VPI/VCI to be the same as in VCC struct */
1694 cpu_to_le32((((u32) vcc->
1695 vpi) << NS_TBD_VPI_SHIFT | ((u32) vcc->
1697 NS_TBD_VCI_SHIFT) & NS_TBD_VC_MASK);
1700 if (vcc->qos.txtp.traffic_class == ATM_CBR) {
1701 scqe.word_1 = ns_tbd_mkword_1_novbr(flags, (u32) buflen);
1702 scq = ((vc_map *) vcc->dev_data)->scq;
1705 ns_tbd_mkword_1(flags, (u32) 1, (u32) 1, (u32) buflen);
1709 if (push_scqe(card, vc, scq, &scqe, skb, may_sleep) != 0) {
1710 atomic_inc(&vcc->stats->tx_err);
1711 dma_unmap_single(&card->pcidev->dev, NS_PRV_DMA(skb), skb->len,
1713 dev_kfree_skb_any(skb);
1716 atomic_inc(&vcc->stats->tx);
1721 static int ns_send(struct atm_vcc *vcc, struct sk_buff *skb)
1723 return _ns_send(vcc, skb, true);
1726 static int ns_send_bh(struct atm_vcc *vcc, struct sk_buff *skb)
1728 return _ns_send(vcc, skb, false);
1731 static int push_scqe(ns_dev * card, vc_map * vc, scq_info * scq, ns_scqe * tbd,
1732 struct sk_buff *skb, bool may_sleep)
1734 unsigned long flags;
1741 spin_lock_irqsave(&scq->lock, flags);
1742 while (scq->tail == scq->next) {
1744 spin_unlock_irqrestore(&scq->lock, flags);
1745 printk("nicstar%d: Error pushing TBD.\n", card->index);
1750 wait_event_interruptible_lock_irq_timeout(scq->scqfull_waitq,
1751 scq->tail != scq->next,
1756 spin_unlock_irqrestore(&scq->lock, flags);
1757 printk("nicstar%d: Timeout pushing TBD.\n",
1763 index = (int)(scq->next - scq->base);
1764 scq->skb[index] = skb;
1765 XPRINTK("nicstar%d: sending skb at 0x%p (pos %d).\n",
1766 card->index, skb, index);
1767 XPRINTK("nicstar%d: TBD written:\n0x%x\n0x%x\n0x%x\n0x%x\n at 0x%p.\n",
1768 card->index, le32_to_cpu(tbd->word_1), le32_to_cpu(tbd->word_2),
1769 le32_to_cpu(tbd->word_3), le32_to_cpu(tbd->word_4),
1771 if (scq->next == scq->last)
1772 scq->next = scq->base;
1777 if (scq->num_entries == VBR_SCQ_NUM_ENTRIES) {
1783 if (vc->tbd_count >= MAX_TBD_PER_VC
1784 || scq->tbd_count >= MAX_TBD_PER_SCQ) {
1787 while (scq->tail == scq->next) {
1789 data = scq_virt_to_bus(scq, scq->next);
1790 ns_write_sram(card, scq->scd, &data, 1);
1791 spin_unlock_irqrestore(&scq->lock, flags);
1792 printk("nicstar%d: Error pushing TSR.\n",
1800 wait_event_interruptible_lock_irq_timeout(scq->scqfull_waitq,
1801 scq->tail != scq->next,
1807 tsr.word_1 = ns_tsr_mkword_1(NS_TSR_INTENABLE);
1809 scdi = NS_TSR_SCDISVBR;
1811 scdi = (vc->cbr_scd - NS_FRSCD) / NS_FRSCD_SIZE;
1812 scqi = scq->next - scq->base;
1813 tsr.word_2 = ns_tsr_mkword_2(scdi, scqi);
1814 tsr.word_3 = 0x00000000;
1815 tsr.word_4 = 0x00000000;
1819 scq->skb[index] = NULL;
1821 ("nicstar%d: TSR written:\n0x%x\n0x%x\n0x%x\n0x%x\n at 0x%p.\n",
1822 card->index, le32_to_cpu(tsr.word_1),
1823 le32_to_cpu(tsr.word_2), le32_to_cpu(tsr.word_3),
1824 le32_to_cpu(tsr.word_4), scq->next);
1825 if (scq->next == scq->last)
1826 scq->next = scq->base;
1832 PRINTK("nicstar%d: Timeout pushing TSR.\n",
1835 data = scq_virt_to_bus(scq, scq->next);
1836 ns_write_sram(card, scq->scd, &data, 1);
1838 spin_unlock_irqrestore(&scq->lock, flags);
1843 static void process_tsq(ns_dev * card)
1847 ns_tsi *previous = NULL, *one_ahead, *two_ahead;
1848 int serviced_entries; /* flag indicating at least on entry was serviced */
1850 serviced_entries = 0;
1852 if (card->tsq.next == card->tsq.last)
1853 one_ahead = card->tsq.base;
1855 one_ahead = card->tsq.next + 1;
1857 if (one_ahead == card->tsq.last)
1858 two_ahead = card->tsq.base;
1860 two_ahead = one_ahead + 1;
1862 while (!ns_tsi_isempty(card->tsq.next) || !ns_tsi_isempty(one_ahead) ||
1863 !ns_tsi_isempty(two_ahead))
1864 /* At most two empty, as stated in the 77201 errata */
1866 serviced_entries = 1;
1868 /* Skip the one or two possible empty entries */
1869 while (ns_tsi_isempty(card->tsq.next)) {
1870 if (card->tsq.next == card->tsq.last)
1871 card->tsq.next = card->tsq.base;
1876 if (!ns_tsi_tmrof(card->tsq.next)) {
1877 scdi = ns_tsi_getscdindex(card->tsq.next);
1878 if (scdi == NS_TSI_SCDISVBR)
1881 if (card->scd2vc[scdi] == NULL) {
1883 ("nicstar%d: could not find VC from SCD index.\n",
1885 ns_tsi_init(card->tsq.next);
1888 scq = card->scd2vc[scdi]->scq;
1890 drain_scq(card, scq, ns_tsi_getscqpos(card->tsq.next));
1892 wake_up_interruptible(&(scq->scqfull_waitq));
1895 ns_tsi_init(card->tsq.next);
1896 previous = card->tsq.next;
1897 if (card->tsq.next == card->tsq.last)
1898 card->tsq.next = card->tsq.base;
1902 if (card->tsq.next == card->tsq.last)
1903 one_ahead = card->tsq.base;
1905 one_ahead = card->tsq.next + 1;
1907 if (one_ahead == card->tsq.last)
1908 two_ahead = card->tsq.base;
1910 two_ahead = one_ahead + 1;
1913 if (serviced_entries)
1914 writel(PTR_DIFF(previous, card->tsq.base),
1915 card->membase + TSQH);
1918 static void drain_scq(ns_dev * card, scq_info * scq, int pos)
1920 struct atm_vcc *vcc;
1921 struct sk_buff *skb;
1923 unsigned long flags;
1925 XPRINTK("nicstar%d: drain_scq() called, scq at 0x%p, pos %d.\n",
1926 card->index, scq, pos);
1927 if (pos >= scq->num_entries) {
1928 printk("nicstar%d: Bad index on drain_scq().\n", card->index);
1932 spin_lock_irqsave(&scq->lock, flags);
1933 i = (int)(scq->tail - scq->base);
1934 if (++i == scq->num_entries)
1938 XPRINTK("nicstar%d: freeing skb at 0x%p (index %d).\n",
1939 card->index, skb, i);
1941 dma_unmap_single(&card->pcidev->dev,
1945 vcc = ATM_SKB(skb)->vcc;
1946 if (vcc && vcc->pop != NULL) {
1949 dev_kfree_skb_irq(skb);
1953 if (++i == scq->num_entries)
1956 scq->tail = scq->base + pos;
1957 spin_unlock_irqrestore(&scq->lock, flags);
1960 static void process_rsq(ns_dev * card)
1964 if (!ns_rsqe_valid(card->rsq.next))
1967 dequeue_rx(card, card->rsq.next);
1968 ns_rsqe_init(card->rsq.next);
1969 previous = card->rsq.next;
1970 if (card->rsq.next == card->rsq.last)
1971 card->rsq.next = card->rsq.base;
1974 } while (ns_rsqe_valid(card->rsq.next));
1975 writel(PTR_DIFF(previous, card->rsq.base), card->membase + RSQH);
1978 static void dequeue_rx(ns_dev * card, ns_rsqe * rsqe)
1982 struct sk_buff *iovb;
1984 struct atm_vcc *vcc;
1985 struct sk_buff *skb;
1986 unsigned short aal5_len;
1991 stat = readl(card->membase + STAT);
1992 card->sbfqc = ns_stat_sfbqc_get(stat);
1993 card->lbfqc = ns_stat_lfbqc_get(stat);
1995 id = le32_to_cpu(rsqe->buffer_handle);
1996 skb = idr_remove(&card->idr, id);
1999 "nicstar%d: skb not found!\n", card->index);
2002 dma_sync_single_for_cpu(&card->pcidev->dev,
2004 (NS_PRV_BUFTYPE(skb) == BUF_SM
2005 ? NS_SMSKBSIZE : NS_LGSKBSIZE),
2007 dma_unmap_single(&card->pcidev->dev,
2009 (NS_PRV_BUFTYPE(skb) == BUF_SM
2010 ? NS_SMSKBSIZE : NS_LGSKBSIZE),
2012 vpi = ns_rsqe_vpi(rsqe);
2013 vci = ns_rsqe_vci(rsqe);
2014 if (vpi >= 1UL << card->vpibits || vci >= 1UL << card->vcibits) {
2015 printk("nicstar%d: SDU received for out-of-range vc %d.%d.\n",
2016 card->index, vpi, vci);
2017 recycle_rx_buf(card, skb);
2021 vc = &(card->vcmap[vpi << card->vcibits | vci]);
2023 RXPRINTK("nicstar%d: SDU received on non-rx vc %d.%d.\n",
2024 card->index, vpi, vci);
2025 recycle_rx_buf(card, skb);
2031 if (vcc->qos.aal == ATM_AAL0) {
2033 unsigned char *cell;
2037 for (i = ns_rsqe_cellcount(rsqe); i; i--) {
2038 sb = dev_alloc_skb(NS_SMSKBSIZE);
2041 ("nicstar%d: Can't allocate buffers for aal0.\n",
2043 atomic_add(i, &vcc->stats->rx_drop);
2046 if (!atm_charge(vcc, sb->truesize)) {
2048 ("nicstar%d: atm_charge() dropped aal0 packets.\n",
2050 atomic_add(i - 1, &vcc->stats->rx_drop); /* already increased by 1 */
2051 dev_kfree_skb_any(sb);
2054 /* Rebuild the header */
2055 *((u32 *) sb->data) = le32_to_cpu(rsqe->word_1) << 4 |
2056 (ns_rsqe_clp(rsqe) ? 0x00000001 : 0x00000000);
2057 if (i == 1 && ns_rsqe_eopdu(rsqe))
2058 *((u32 *) sb->data) |= 0x00000002;
2059 skb_put(sb, NS_AAL0_HEADER);
2060 memcpy(skb_tail_pointer(sb), cell, ATM_CELL_PAYLOAD);
2061 skb_put(sb, ATM_CELL_PAYLOAD);
2062 ATM_SKB(sb)->vcc = vcc;
2063 __net_timestamp(sb);
2065 atomic_inc(&vcc->stats->rx);
2066 cell += ATM_CELL_PAYLOAD;
2069 recycle_rx_buf(card, skb);
2073 /* To reach this point, the AAL layer can only be AAL5 */
2075 if ((iovb = vc->rx_iov) == NULL) {
2076 iovb = skb_dequeue(&(card->iovpool.queue));
2077 if (iovb == NULL) { /* No buffers in the queue */
2078 iovb = alloc_skb(NS_IOVBUFSIZE, GFP_ATOMIC);
2080 printk("nicstar%d: Out of iovec buffers.\n",
2082 atomic_inc(&vcc->stats->rx_drop);
2083 recycle_rx_buf(card, skb);
2086 NS_PRV_BUFTYPE(iovb) = BUF_NONE;
2087 } else if (--card->iovpool.count < card->iovnr.min) {
2088 struct sk_buff *new_iovb;
2090 alloc_skb(NS_IOVBUFSIZE, GFP_ATOMIC)) != NULL) {
2091 NS_PRV_BUFTYPE(iovb) = BUF_NONE;
2092 skb_queue_tail(&card->iovpool.queue, new_iovb);
2093 card->iovpool.count++;
2097 NS_PRV_IOVCNT(iovb) = 0;
2099 iovb->data = iovb->head;
2100 skb_reset_tail_pointer(iovb);
2101 /* IMPORTANT: a pointer to the sk_buff containing the small or large
2102 buffer is stored as iovec base, NOT a pointer to the
2103 small or large buffer itself. */
2104 } else if (NS_PRV_IOVCNT(iovb) >= NS_MAX_IOVECS) {
2105 printk("nicstar%d: received too big AAL5 SDU.\n", card->index);
2106 atomic_inc(&vcc->stats->rx_err);
2107 recycle_iovec_rx_bufs(card, (struct iovec *)iovb->data,
2109 NS_PRV_IOVCNT(iovb) = 0;
2111 iovb->data = iovb->head;
2112 skb_reset_tail_pointer(iovb);
2114 iov = &((struct iovec *)iovb->data)[NS_PRV_IOVCNT(iovb)++];
2115 iov->iov_base = (void *)skb;
2116 iov->iov_len = ns_rsqe_cellcount(rsqe) * 48;
2117 iovb->len += iov->iov_len;
2120 if (NS_PRV_IOVCNT(iovb) == 1) {
2121 if (NS_PRV_BUFTYPE(skb) != BUF_SM) {
2123 ("nicstar%d: Expected a small buffer, and this is not one.\n",
2125 which_list(card, skb);
2126 atomic_inc(&vcc->stats->rx_err);
2127 recycle_rx_buf(card, skb);
2129 recycle_iov_buf(card, iovb);
2132 } else { /* NS_PRV_IOVCNT(iovb) >= 2 */
2134 if (NS_PRV_BUFTYPE(skb) != BUF_LG) {
2136 ("nicstar%d: Expected a large buffer, and this is not one.\n",
2138 which_list(card, skb);
2139 atomic_inc(&vcc->stats->rx_err);
2140 recycle_iovec_rx_bufs(card, (struct iovec *)iovb->data,
2141 NS_PRV_IOVCNT(iovb));
2143 recycle_iov_buf(card, iovb);
2147 #endif /* EXTRA_DEBUG */
2149 if (ns_rsqe_eopdu(rsqe)) {
2150 /* This works correctly regardless of the endianness of the host */
2151 unsigned char *L1L2 = (unsigned char *)
2152 (skb->data + iov->iov_len - 6);
2153 aal5_len = L1L2[0] << 8 | L1L2[1];
2154 len = (aal5_len == 0x0000) ? 0x10000 : aal5_len;
2155 if (ns_rsqe_crcerr(rsqe) ||
2156 len + 8 > iovb->len || len + (47 + 8) < iovb->len) {
2157 printk("nicstar%d: AAL5 CRC error", card->index);
2158 if (len + 8 > iovb->len || len + (47 + 8) < iovb->len)
2159 printk(" - PDU size mismatch.\n");
2162 atomic_inc(&vcc->stats->rx_err);
2163 recycle_iovec_rx_bufs(card, (struct iovec *)iovb->data,
2164 NS_PRV_IOVCNT(iovb));
2166 recycle_iov_buf(card, iovb);
2170 /* By this point we (hopefully) have a complete SDU without errors. */
2172 if (NS_PRV_IOVCNT(iovb) == 1) { /* Just a small buffer */
2173 /* skb points to a small buffer */
2174 if (!atm_charge(vcc, skb->truesize)) {
2175 push_rxbufs(card, skb);
2176 atomic_inc(&vcc->stats->rx_drop);
2179 dequeue_sm_buf(card, skb);
2180 ATM_SKB(skb)->vcc = vcc;
2181 __net_timestamp(skb);
2182 vcc->push(vcc, skb);
2183 atomic_inc(&vcc->stats->rx);
2185 } else if (NS_PRV_IOVCNT(iovb) == 2) { /* One small plus one large buffer */
2188 sb = (struct sk_buff *)(iov - 1)->iov_base;
2189 /* skb points to a large buffer */
2191 if (len <= NS_SMBUFSIZE) {
2192 if (!atm_charge(vcc, sb->truesize)) {
2193 push_rxbufs(card, sb);
2194 atomic_inc(&vcc->stats->rx_drop);
2197 dequeue_sm_buf(card, sb);
2198 ATM_SKB(sb)->vcc = vcc;
2199 __net_timestamp(sb);
2201 atomic_inc(&vcc->stats->rx);
2204 push_rxbufs(card, skb);
2206 } else { /* len > NS_SMBUFSIZE, the usual case */
2208 if (!atm_charge(vcc, skb->truesize)) {
2209 push_rxbufs(card, skb);
2210 atomic_inc(&vcc->stats->rx_drop);
2212 dequeue_lg_buf(card, skb);
2213 skb_push(skb, NS_SMBUFSIZE);
2214 skb_copy_from_linear_data(sb, skb->data,
2216 skb_put(skb, len - NS_SMBUFSIZE);
2217 ATM_SKB(skb)->vcc = vcc;
2218 __net_timestamp(skb);
2219 vcc->push(vcc, skb);
2220 atomic_inc(&vcc->stats->rx);
2223 push_rxbufs(card, sb);
2227 } else { /* Must push a huge buffer */
2229 struct sk_buff *hb, *sb, *lb;
2230 int remaining, tocopy;
2233 hb = skb_dequeue(&(card->hbpool.queue));
2234 if (hb == NULL) { /* No buffers in the queue */
2236 hb = dev_alloc_skb(NS_HBUFSIZE);
2239 ("nicstar%d: Out of huge buffers.\n",
2241 atomic_inc(&vcc->stats->rx_drop);
2242 recycle_iovec_rx_bufs(card,
2245 NS_PRV_IOVCNT(iovb));
2247 recycle_iov_buf(card, iovb);
2249 } else if (card->hbpool.count < card->hbnr.min) {
2250 struct sk_buff *new_hb;
2252 dev_alloc_skb(NS_HBUFSIZE)) !=
2254 skb_queue_tail(&card->hbpool.
2256 card->hbpool.count++;
2259 NS_PRV_BUFTYPE(hb) = BUF_NONE;
2260 } else if (--card->hbpool.count < card->hbnr.min) {
2261 struct sk_buff *new_hb;
2263 dev_alloc_skb(NS_HBUFSIZE)) != NULL) {
2264 NS_PRV_BUFTYPE(new_hb) = BUF_NONE;
2265 skb_queue_tail(&card->hbpool.queue,
2267 card->hbpool.count++;
2269 if (card->hbpool.count < card->hbnr.min) {
2271 dev_alloc_skb(NS_HBUFSIZE)) !=
2273 NS_PRV_BUFTYPE(new_hb) =
2275 skb_queue_tail(&card->hbpool.
2277 card->hbpool.count++;
2282 iov = (struct iovec *)iovb->data;
2284 if (!atm_charge(vcc, hb->truesize)) {
2285 recycle_iovec_rx_bufs(card, iov,
2286 NS_PRV_IOVCNT(iovb));
2287 if (card->hbpool.count < card->hbnr.max) {
2288 skb_queue_tail(&card->hbpool.queue, hb);
2289 card->hbpool.count++;
2291 dev_kfree_skb_any(hb);
2292 atomic_inc(&vcc->stats->rx_drop);
2294 /* Copy the small buffer to the huge buffer */
2295 sb = (struct sk_buff *)iov->iov_base;
2296 skb_copy_from_linear_data(sb, hb->data,
2298 skb_put(hb, iov->iov_len);
2299 remaining = len - iov->iov_len;
2301 /* Free the small buffer */
2302 push_rxbufs(card, sb);
2304 /* Copy all large buffers to the huge buffer and free them */
2305 for (j = 1; j < NS_PRV_IOVCNT(iovb); j++) {
2306 lb = (struct sk_buff *)iov->iov_base;
2308 min_t(int, remaining, iov->iov_len);
2309 skb_copy_from_linear_data(lb,
2312 skb_put(hb, tocopy);
2314 remaining -= tocopy;
2315 push_rxbufs(card, lb);
2318 if (remaining != 0 || hb->len != len)
2320 ("nicstar%d: Huge buffer len mismatch.\n",
2322 #endif /* EXTRA_DEBUG */
2323 ATM_SKB(hb)->vcc = vcc;
2324 __net_timestamp(hb);
2326 atomic_inc(&vcc->stats->rx);
2331 recycle_iov_buf(card, iovb);
2336 static void recycle_rx_buf(ns_dev * card, struct sk_buff *skb)
2338 if (unlikely(NS_PRV_BUFTYPE(skb) == BUF_NONE)) {
2339 printk("nicstar%d: What kind of rx buffer is this?\n",
2341 dev_kfree_skb_any(skb);
2343 push_rxbufs(card, skb);
2346 static void recycle_iovec_rx_bufs(ns_dev * card, struct iovec *iov, int count)
2349 recycle_rx_buf(card, (struct sk_buff *)(iov++)->iov_base);
2352 static void recycle_iov_buf(ns_dev * card, struct sk_buff *iovb)
2354 if (card->iovpool.count < card->iovnr.max) {
2355 skb_queue_tail(&card->iovpool.queue, iovb);
2356 card->iovpool.count++;
2358 dev_kfree_skb_any(iovb);
2361 static void dequeue_sm_buf(ns_dev * card, struct sk_buff *sb)
2363 skb_unlink(sb, &card->sbpool.queue);
2364 if (card->sbfqc < card->sbnr.init) {
2365 struct sk_buff *new_sb;
2366 if ((new_sb = dev_alloc_skb(NS_SMSKBSIZE)) != NULL) {
2367 NS_PRV_BUFTYPE(new_sb) = BUF_SM;
2368 skb_queue_tail(&card->sbpool.queue, new_sb);
2369 skb_reserve(new_sb, NS_AAL0_HEADER);
2370 push_rxbufs(card, new_sb);
2373 if (card->sbfqc < card->sbnr.init)
2375 struct sk_buff *new_sb;
2376 if ((new_sb = dev_alloc_skb(NS_SMSKBSIZE)) != NULL) {
2377 NS_PRV_BUFTYPE(new_sb) = BUF_SM;
2378 skb_queue_tail(&card->sbpool.queue, new_sb);
2379 skb_reserve(new_sb, NS_AAL0_HEADER);
2380 push_rxbufs(card, new_sb);
2385 static void dequeue_lg_buf(ns_dev * card, struct sk_buff *lb)
2387 skb_unlink(lb, &card->lbpool.queue);
2388 if (card->lbfqc < card->lbnr.init) {
2389 struct sk_buff *new_lb;
2390 if ((new_lb = dev_alloc_skb(NS_LGSKBSIZE)) != NULL) {
2391 NS_PRV_BUFTYPE(new_lb) = BUF_LG;
2392 skb_queue_tail(&card->lbpool.queue, new_lb);
2393 skb_reserve(new_lb, NS_SMBUFSIZE);
2394 push_rxbufs(card, new_lb);
2397 if (card->lbfqc < card->lbnr.init)
2399 struct sk_buff *new_lb;
2400 if ((new_lb = dev_alloc_skb(NS_LGSKBSIZE)) != NULL) {
2401 NS_PRV_BUFTYPE(new_lb) = BUF_LG;
2402 skb_queue_tail(&card->lbpool.queue, new_lb);
2403 skb_reserve(new_lb, NS_SMBUFSIZE);
2404 push_rxbufs(card, new_lb);
2409 static int ns_proc_read(struct atm_dev *dev, loff_t * pos, char *page)
2416 card = (ns_dev *) dev->dev_data;
2417 stat = readl(card->membase + STAT);
2419 return sprintf(page, "Pool count min init max \n");
2421 return sprintf(page, "Small %5d %5d %5d %5d \n",
2422 ns_stat_sfbqc_get(stat), card->sbnr.min,
2423 card->sbnr.init, card->sbnr.max);
2425 return sprintf(page, "Large %5d %5d %5d %5d \n",
2426 ns_stat_lfbqc_get(stat), card->lbnr.min,
2427 card->lbnr.init, card->lbnr.max);
2429 return sprintf(page, "Huge %5d %5d %5d %5d \n",
2430 card->hbpool.count, card->hbnr.min,
2431 card->hbnr.init, card->hbnr.max);
2433 return sprintf(page, "Iovec %5d %5d %5d %5d \n",
2434 card->iovpool.count, card->iovnr.min,
2435 card->iovnr.init, card->iovnr.max);
2439 sprintf(page, "Interrupt counter: %u \n", card->intcnt);
2444 /* Dump 25.6 Mbps PHY registers */
2445 /* Now there's a 25.6 Mbps PHY driver this code isn't needed. I left it
2446 here just in case it's needed for debugging. */
2447 if (card->max_pcr == ATM_25_PCR && !left--) {
2451 for (i = 0; i < 4; i++) {
2452 while (CMD_BUSY(card)) ;
2453 writel(NS_CMD_READ_UTILITY | 0x00000200 | i,
2454 card->membase + CMD);
2455 while (CMD_BUSY(card)) ;
2456 phy_regs[i] = readl(card->membase + DR0) & 0x000000FF;
2459 return sprintf(page, "PHY regs: 0x%02X 0x%02X 0x%02X 0x%02X \n",
2460 phy_regs[0], phy_regs[1], phy_regs[2],
2463 #endif /* 0 - Dump 25.6 Mbps PHY registers */
2466 if (left-- < NS_TST_NUM_ENTRIES) {
2467 if (card->tste2vc[left + 1] == NULL)
2468 return sprintf(page, "%5d - VBR/UBR \n", left + 1);
2470 return sprintf(page, "%5d - %d %d \n", left + 1,
2471 card->tste2vc[left + 1]->tx_vcc->vpi,
2472 card->tste2vc[left + 1]->tx_vcc->vci);
2478 static int ns_ioctl(struct atm_dev *dev, unsigned int cmd, void __user * arg)
2483 unsigned long flags;
2485 card = dev->dev_data;
2489 (pl.buftype, &((pool_levels __user *) arg)->buftype))
2491 switch (pl.buftype) {
2492 case NS_BUFTYPE_SMALL:
2494 ns_stat_sfbqc_get(readl(card->membase + STAT));
2495 pl.level.min = card->sbnr.min;
2496 pl.level.init = card->sbnr.init;
2497 pl.level.max = card->sbnr.max;
2500 case NS_BUFTYPE_LARGE:
2502 ns_stat_lfbqc_get(readl(card->membase + STAT));
2503 pl.level.min = card->lbnr.min;
2504 pl.level.init = card->lbnr.init;
2505 pl.level.max = card->lbnr.max;
2508 case NS_BUFTYPE_HUGE:
2509 pl.count = card->hbpool.count;
2510 pl.level.min = card->hbnr.min;
2511 pl.level.init = card->hbnr.init;
2512 pl.level.max = card->hbnr.max;
2515 case NS_BUFTYPE_IOVEC:
2516 pl.count = card->iovpool.count;
2517 pl.level.min = card->iovnr.min;
2518 pl.level.init = card->iovnr.init;
2519 pl.level.max = card->iovnr.max;
2523 return -ENOIOCTLCMD;
2526 if (!copy_to_user((pool_levels __user *) arg, &pl, sizeof(pl)))
2527 return (sizeof(pl));
2532 if (!capable(CAP_NET_ADMIN))
2534 if (copy_from_user(&pl, (pool_levels __user *) arg, sizeof(pl)))
2536 if (pl.level.min >= pl.level.init
2537 || pl.level.init >= pl.level.max)
2539 if (pl.level.min == 0)
2541 switch (pl.buftype) {
2542 case NS_BUFTYPE_SMALL:
2543 if (pl.level.max > TOP_SB)
2545 card->sbnr.min = pl.level.min;
2546 card->sbnr.init = pl.level.init;
2547 card->sbnr.max = pl.level.max;
2550 case NS_BUFTYPE_LARGE:
2551 if (pl.level.max > TOP_LB)
2553 card->lbnr.min = pl.level.min;
2554 card->lbnr.init = pl.level.init;
2555 card->lbnr.max = pl.level.max;
2558 case NS_BUFTYPE_HUGE:
2559 if (pl.level.max > TOP_HB)
2561 card->hbnr.min = pl.level.min;
2562 card->hbnr.init = pl.level.init;
2563 card->hbnr.max = pl.level.max;
2566 case NS_BUFTYPE_IOVEC:
2567 if (pl.level.max > TOP_IOVB)
2569 card->iovnr.min = pl.level.min;
2570 card->iovnr.init = pl.level.init;
2571 card->iovnr.max = pl.level.max;
2581 if (!capable(CAP_NET_ADMIN))
2583 btype = (long)arg; /* a long is the same size as a pointer or bigger */
2585 case NS_BUFTYPE_SMALL:
2586 while (card->sbfqc < card->sbnr.init) {
2589 sb = __dev_alloc_skb(NS_SMSKBSIZE, GFP_KERNEL);
2592 NS_PRV_BUFTYPE(sb) = BUF_SM;
2593 skb_queue_tail(&card->sbpool.queue, sb);
2594 skb_reserve(sb, NS_AAL0_HEADER);
2595 push_rxbufs(card, sb);
2599 case NS_BUFTYPE_LARGE:
2600 while (card->lbfqc < card->lbnr.init) {
2603 lb = __dev_alloc_skb(NS_LGSKBSIZE, GFP_KERNEL);
2606 NS_PRV_BUFTYPE(lb) = BUF_LG;
2607 skb_queue_tail(&card->lbpool.queue, lb);
2608 skb_reserve(lb, NS_SMBUFSIZE);
2609 push_rxbufs(card, lb);
2613 case NS_BUFTYPE_HUGE:
2614 while (card->hbpool.count > card->hbnr.init) {
2617 spin_lock_irqsave(&card->int_lock, flags);
2618 hb = skb_dequeue(&card->hbpool.queue);
2619 card->hbpool.count--;
2620 spin_unlock_irqrestore(&card->int_lock, flags);
2623 ("nicstar%d: huge buffer count inconsistent.\n",
2626 dev_kfree_skb_any(hb);
2629 while (card->hbpool.count < card->hbnr.init) {
2632 hb = __dev_alloc_skb(NS_HBUFSIZE, GFP_KERNEL);
2635 NS_PRV_BUFTYPE(hb) = BUF_NONE;
2636 spin_lock_irqsave(&card->int_lock, flags);
2637 skb_queue_tail(&card->hbpool.queue, hb);
2638 card->hbpool.count++;
2639 spin_unlock_irqrestore(&card->int_lock, flags);
2643 case NS_BUFTYPE_IOVEC:
2644 while (card->iovpool.count > card->iovnr.init) {
2645 struct sk_buff *iovb;
2647 spin_lock_irqsave(&card->int_lock, flags);
2648 iovb = skb_dequeue(&card->iovpool.queue);
2649 card->iovpool.count--;
2650 spin_unlock_irqrestore(&card->int_lock, flags);
2653 ("nicstar%d: iovec buffer count inconsistent.\n",
2656 dev_kfree_skb_any(iovb);
2659 while (card->iovpool.count < card->iovnr.init) {
2660 struct sk_buff *iovb;
2662 iovb = alloc_skb(NS_IOVBUFSIZE, GFP_KERNEL);
2665 NS_PRV_BUFTYPE(iovb) = BUF_NONE;
2666 spin_lock_irqsave(&card->int_lock, flags);
2667 skb_queue_tail(&card->iovpool.queue, iovb);
2668 card->iovpool.count++;
2669 spin_unlock_irqrestore(&card->int_lock, flags);
2680 if (dev->phy && dev->phy->ioctl) {
2681 return dev->phy->ioctl(dev, cmd, arg);
2683 printk("nicstar%d: %s == NULL \n", card->index,
2684 dev->phy ? "dev->phy->ioctl" : "dev->phy");
2685 return -ENOIOCTLCMD;
2691 static void which_list(ns_dev * card, struct sk_buff *skb)
2693 printk("skb buf_type: 0x%08x\n", NS_PRV_BUFTYPE(skb));
2695 #endif /* EXTRA_DEBUG */
2697 static void ns_poll(struct timer_list *unused)
2701 unsigned long flags;
2704 PRINTK("nicstar: Entering ns_poll().\n");
2705 for (i = 0; i < num_cards; i++) {
2707 if (!spin_trylock_irqsave(&card->int_lock, flags)) {
2708 /* Probably it isn't worth spinning */
2713 stat_r = readl(card->membase + STAT);
2714 if (stat_r & NS_STAT_TSIF)
2715 stat_w |= NS_STAT_TSIF;
2716 if (stat_r & NS_STAT_EOPDU)
2717 stat_w |= NS_STAT_EOPDU;
2722 writel(stat_w, card->membase + STAT);
2723 spin_unlock_irqrestore(&card->int_lock, flags);
2725 mod_timer(&ns_timer, jiffies + NS_POLL_PERIOD);
2726 PRINTK("nicstar: Leaving ns_poll().\n");
2729 static void ns_phy_put(struct atm_dev *dev, unsigned char value,
2733 unsigned long flags;
2735 card = dev->dev_data;
2736 spin_lock_irqsave(&card->res_lock, flags);
2737 while (CMD_BUSY(card)) ;
2738 writel((u32) value, card->membase + DR0);
2739 writel(NS_CMD_WRITE_UTILITY | 0x00000200 | (addr & 0x000000FF),
2740 card->membase + CMD);
2741 spin_unlock_irqrestore(&card->res_lock, flags);
2744 static unsigned char ns_phy_get(struct atm_dev *dev, unsigned long addr)
2747 unsigned long flags;
2750 card = dev->dev_data;
2751 spin_lock_irqsave(&card->res_lock, flags);
2752 while (CMD_BUSY(card)) ;
2753 writel(NS_CMD_READ_UTILITY | 0x00000200 | (addr & 0x000000FF),
2754 card->membase + CMD);
2755 while (CMD_BUSY(card)) ;
2756 data = readl(card->membase + DR0) & 0x000000FF;
2757 spin_unlock_irqrestore(&card->res_lock, flags);
2758 return (unsigned char)data;
2761 module_init(nicstar_init);
2762 module_exit(nicstar_cleanup);