drivers/scsi/ips.c

   1 /*****************************************************************************/
   2 /* ips.c -- driver for the Adaptec / IBM ServeRAID controller                */
   3 /*                                                                           */
   4 /* Written By: Keith Mitchell, IBM Corporation                               */
   5 /*             Jack Hammer, Adaptec, Inc.                                    */
   6 /*             David Jeffery, Adaptec, Inc.                                  */
   7 /*                                                                           */
   8 /* Copyright (C) 2000 IBM Corporation                                        */
   9 /* Copyright (C) 2002,2003 Adaptec, Inc.                                     */
  10 /*                                                                           */
  11 /* This program is free software; you can redistribute it and/or modify      */
  12 /* it under the terms of the GNU General Public License as published by      */
  13 /* the Free Software Foundation; either version 2 of the License, or         */
  14 /* (at your option) any later version.                                       */
  15 /*                                                                           */
  16 /* This program is distributed in the hope that it will be useful,           */
  17 /* but WITHOUT ANY WARRANTY; without even the implied warranty of            */
  18 /* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the             */
  19 /* GNU General Public License for more details.                              */
  20 /*                                                                           */
  21 /* NO WARRANTY                                                               */
  22 /* THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR        */
  23 /* CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT      */
  24 /* LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,      */
  25 /* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is    */
  26 /* solely responsible for determining the appropriateness of using and       */
  27 /* distributing the Program and assumes all risks associated with its        */
  28 /* exercise of rights under this Agreement, including but not limited to     */
  29 /* the risks and costs of program errors, damage to or loss of data,         */
  30 /* programs or equipment, and unavailability or interruption of operations.  */
  31 /*                                                                           */
  32 /* DISCLAIMER OF LIABILITY                                                   */
  33 /* NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY   */
  34 /* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL        */
  35 /* DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND   */
  36 /* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR     */
  37 /* TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE    */
  38 /* USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED  */
  39 /* HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES             */
  40 /*                                                                           */
  41 /* You should have received a copy of the GNU General Public License         */
  42 /* along with this program; if not, write to the Free Software               */
  43 /* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA */
  44 /*                                                                           */
  45 /* Bugs/Comments/Suggestions about this driver should be mailed to:          */
  46 /*      [email protected]                                                 */
  47 /*                                                                           */
  48 /* For system support issues, contact your local IBM Customer support.       */
  49 /* Directions to find IBM Customer Support for each country can be found at: */
  50 /*      http://www.ibm.com/planetwide/                                       */
  51 /*                                                                           */
  52 /*****************************************************************************/
  53
  54 /*****************************************************************************/
  55 /* Change Log                                                                */
  56 /*                                                                           */
  57 /* 0.99.02  - Breakup commands that are bigger than 8 * the stripe size      */
  58 /* 0.99.03  - Make interrupt routine handle all completed request on the     */
  59 /*            adapter not just the first one                                 */
  60 /*          - Make sure passthru commands get woken up if we run out of      */
  61 /*            SCBs                                                           */
  62 /*          - Send all of the commands on the queue at once rather than      */
  63 /*            one at a time since the card will support it.                  */
  64 /* 0.99.04  - Fix race condition in the passthru mechanism -- this required  */
  65 /*            the interface to the utilities to change                       */
  66 /*          - Fix error recovery code                                        */
  67 /* 0.99.05  - Fix an oops when we get certain passthru commands              */
  68 /* 1.00.00  - Initial Public Release                                         */
  69 /*            Functionally equivalent to 0.99.05                             */
  70 /* 3.60.00  - Bump max commands to 128 for use with firmware 3.60            */
  71 /*          - Change version to 3.60 to coincide with release numbering.     */
  72 /* 3.60.01  - Remove bogus error check in passthru routine                   */
  73 /* 3.60.02  - Make DCDB direction based on lookup table                      */
  74 /*          - Only allow one DCDB command to a SCSI ID at a time             */
  75 /* 4.00.00  - Add support for ServeRAID 4                                    */
  76 /* 4.00.01  - Add support for First Failure Data Capture                     */
  77 /* 4.00.02  - Fix problem with PT DCDB with no buffer                        */
  78 /* 4.00.03  - Add alternative passthru interface                             */
  79 /*          - Add ability to flash BIOS                                      */
  80 /* 4.00.04  - Rename structures/constants to be prefixed with IPS_           */
  81 /* 4.00.05  - Remove wish_block from init routine                            */
  82 /*          - Use linux/spinlock.h instead of asm/spinlock.h for kernels     */
  83 /*            2.3.18 and later                                               */
  84 /*          - Sync with other changes from the 2.3 kernels                   */
  85 /* 4.00.06  - Fix timeout with initial FFDC command                          */
  86 /* 4.00.06a - Port to 2.4 (trivial) -- Christoph Hellwig <[email protected]> */
  87 /* 4.10.00  - Add support for ServeRAID 4M/4L                                */
  88 /* 4.10.13  - Fix for dynamic unload and proc file system                    */
  89 /* 4.20.03  - Rename version to coincide with new release schedules          */
  90 /*            Performance fixes                                              */
  91 /*            Fix truncation of /proc files with cat                         */
  92 /*            Merge in changes through kernel 2.4.0test1ac21                 */
  93 /* 4.20.13  - Fix some failure cases / reset code                            */
  94 /*          - Hook into the reboot_notifier to flush the controller cache    */
  95 /* 4.50.01  - Fix problem when there is a hole in logical drive numbering    */
  96 /* 4.70.09  - Use a Common ( Large Buffer ) for Flashing from the JCRM CD    */
  97 /*          - Add IPSSEND Flash Support                                      */
  98 /*          - Set Sense Data for Unknown SCSI Command                        */
  99 /*          - Use Slot Number from NVRAM Page 5                              */
 100 /*          - Restore caller's DCDB Structure                                */
 101 /* 4.70.12  - Corrective actions for bad controller ( during initialization )*/
 102 /* 4.70.13  - Don't Send CDB's if we already know the device is not present  */
 103 /*          - Don't release HA Lock in ips_next() until SC taken off queue   */
 104 /*          - Unregister SCSI device in ips_release()                        */
 105 /* 4.70.15  - Fix Breakup for very large ( non-SG ) requests in ips_done()   */
 106 /* 4.71.00  - Change all memory allocations to not use GFP_DMA flag          */
 107 /*            Code Clean-Up for 2.4.x kernel                                 */
 108 /* 4.72.00  - Allow for a Scatter-Gather Element to exceed MAX_XFER Size     */
 109 /* 4.72.01  - I/O Mapped Memory release ( so "insmod ips" does not Fail )    */
 110 /*          - Don't Issue Internal FFDC Command if there are Active Commands */
 111 /*          - Close Window for getting too many IOCTL's active               */
 112 /* 4.80.00  - Make ia64 Safe                                                 */
 113 /* 4.80.04  - Eliminate calls to strtok() if 2.4.x or greater                */
 114 /*          - Adjustments to Device Queue Depth                              */
 115 /* 4.80.14  - Take all semaphores off stack                                  */
 116 /*          - Clean Up New_IOCTL path                                        */
 117 /* 4.80.20  - Set max_sectors in Scsi_Host structure ( if >= 2.4.7 kernel )  */
 118 /*          - 5 second delay needed after resetting an i960 adapter          */
 119 /* 4.80.26  - Clean up potential code problems ( Arjan's recommendations )   */
 120 /* 4.90.01  - Version Matching for FirmWare, BIOS, and Driver                */
 121 /* 4.90.05  - Use New PCI Architecture to facilitate Hot Plug Development    */
 122 /* 4.90.08  - Increase Delays in Flashing ( Trombone Only - 4H )             */
 123 /* 4.90.08  - Data Corruption if First Scatter Gather Element is > 64K       */
 124 /* 4.90.11  - Don't actually RESET unless it's physically required           */
 125 /*          - Remove unused compile options                                  */
 126 /* 5.00.01  - Sarasota ( 5i ) adapters must always be scanned first          */
 127 /*          - Get rid on IOCTL_NEW_COMMAND code                              */
 128 /*          - Add Extended DCDB Commands for Tape Support in 5I              */
 129 /* 5.10.12  - use pci_dma interfaces, update for 2.5 kernel changes          */
 130 /* 5.10.15  - remove unused code (sem, macros, etc.)                         */
 131 /* 5.30.00  - use __devexit_p()                                              */
 132 /* 6.00.00  - Add 6x Adapters and Battery Flash                              */
 133 /* 6.10.00  - Remove 1G Addressing Limitations                               */
 134 /* 6.11.xx  - Get VersionInfo buffer off the stack !              DDTS 60401 */
 135 /* 6.11.xx  - Make Logical Drive Info structure safe for DMA      DDTS 60639 */
 136 /* 7.10.18  - Add highmem_io flag in SCSI Templete for 2.4 kernels           */
 137 /*          - Fix path/name for scsi_hosts.h include for 2.6 kernels         */
 138 /*          - Fix sort order of 7k                                           */
 139 /*          - Remove 3 unused "inline" functions                             */
 140 /* 7.12.xx  - Use STATIC functions wherever possible                        */
 141 /*          - Clean up deprecated MODULE_PARM calls                          */
 142 /* 7.12.05  - Remove Version Matching per IBM request                        */
 143 /*****************************************************************************/
 144
 145 /*
 146  * Conditional Compilation directives for this driver:
 147  *
 148  * IPS_DEBUG            - Turn on debugging info
 149  *
 150  * Parameters:
 151  *
 152  * debug:<number>       - Set debug level to <number>
 153  *                        NOTE: only works when IPS_DEBUG compile directive is used.
 154  *       1              - Normal debug messages
 155  *       2              - Verbose debug messages
 156  *       11             - Method trace (non interrupt)
 157  *       12             - Method trace (includes interrupt)
 158  *
 159  * noi2o                - Don't use I2O Queues (ServeRAID 4 only)
 160  * nommap               - Don't use memory mapped I/O
 161  * ioctlsize            - Initial size of the IOCTL buffer
 162  */
 163
 164 #include <asm/io.h>
 165 #include <asm/byteorder.h>
 166 #include <asm/page.h>
 167 #include <linux/stddef.h>
 168 #include <linux/string.h>
 169 #include <linux/errno.h>
 170 #include <linux/kernel.h>
 171 #include <linux/ioport.h>
 172 #include <linux/slab.h>
 173 #include <linux/delay.h>
 174 #include <linux/pci.h>
 175 #include <linux/proc_fs.h>
 176 #include <linux/reboot.h>
 177 #include <linux/interrupt.h>
 178
 179 #include <linux/blkdev.h>
 180 #include <linux/types.h>
 181 #include <linux/dma-mapping.h>
 182
 183 #include <scsi/sg.h>
 184 #include "scsi.h"
 185 #include <scsi/scsi_host.h>
 186
 187 #include "ips.h"
 188
 189 #include <linux/module.h>
 190
 191 #include <linux/stat.h>
 192
 193 #include <linux/spinlock.h>
 194 #include <linux/init.h>
 195
 196 #include <linux/smp.h>
 197
 198 #ifdef MODULE
 199 static char *ips = NULL;
 200 module_param(ips, charp, 0);
 201 #endif
 202
 203 /*
 204  * DRIVER_VER
 205  */
 206 #define IPS_VERSION_HIGH        IPS_VER_MAJOR_STRING "." IPS_VER_MINOR_STRING
 207 #define IPS_VERSION_LOW         "." IPS_VER_BUILD_STRING " "
 208
 209 #if !defined(__i386__) && !defined(__ia64__) && !defined(__x86_64__)
 210 #warning "This driver has only been tested on the x86/ia64/x86_64 platforms"
 211 #endif
 212
 213 #define IPS_DMA_DIR(scb) ((!scb->scsi_cmd || ips_is_passthru(scb->scsi_cmd) || \
 214                          DMA_NONE == scb->scsi_cmd->sc_data_direction) ? \
 215                          PCI_DMA_BIDIRECTIONAL : \
 216                          scb->scsi_cmd->sc_data_direction)
 217
 218 #ifdef IPS_DEBUG
 219 #define METHOD_TRACE(s, i)    if (ips_debug >= (i+10)) printk(KERN_NOTICE s "\n");
 220 #define DEBUG(i, s)           if (ips_debug >= i) printk(KERN_NOTICE s "\n");
 221 #define DEBUG_VAR(i, s, v...) if (ips_debug >= i) printk(KERN_NOTICE s "\n", v);
 222 #else
 223 #define METHOD_TRACE(s, i)
 224 #define DEBUG(i, s)
 225 #define DEBUG_VAR(i, s, v...)
 226 #endif
 227
 228 /*
 229  * Function prototypes
 230  */
 231 static int ips_detect(struct scsi_host_template *);
 232 static int ips_release(struct Scsi_Host *);
 233 static int ips_eh_abort(struct scsi_cmnd *);
 234 static int ips_eh_reset(struct scsi_cmnd *);
 235 static int ips_queue(struct Scsi_Host *, struct scsi_cmnd *);
 236 static const char *ips_info(struct Scsi_Host *);
 237 static irqreturn_t do_ipsintr(int, void *);
 238 static int ips_hainit(ips_ha_t *);
 239 static int ips_map_status(ips_ha_t *, ips_scb_t *, ips_stat_t *);
 240 static int ips_send_wait(ips_ha_t *, ips_scb_t *, int, int);
 241 static int ips_send_cmd(ips_ha_t *, ips_scb_t *);
 242 static int ips_online(ips_ha_t *, ips_scb_t *);
 243 static int ips_inquiry(ips_ha_t *, ips_scb_t *);
 244 static int ips_rdcap(ips_ha_t *, ips_scb_t *);
 245 static int ips_msense(ips_ha_t *, ips_scb_t *);
 246 static int ips_reqsen(ips_ha_t *, ips_scb_t *);
 247 static int ips_deallocatescbs(ips_ha_t *, int);
 248 static int ips_allocatescbs(ips_ha_t *);
 249 static int ips_reset_copperhead(ips_ha_t *);
 250 static int ips_reset_copperhead_memio(ips_ha_t *);
 251 static int ips_reset_morpheus(ips_ha_t *);
 252 static int ips_issue_copperhead(ips_ha_t *, ips_scb_t *);
 253 static int ips_issue_copperhead_memio(ips_ha_t *, ips_scb_t *);
 254 static int ips_issue_i2o(ips_ha_t *, ips_scb_t *);
 255 static int ips_issue_i2o_memio(ips_ha_t *, ips_scb_t *);
 256 static int ips_isintr_copperhead(ips_ha_t *);
 257 static int ips_isintr_copperhead_memio(ips_ha_t *);
 258 static int ips_isintr_morpheus(ips_ha_t *);
 259 static int ips_wait(ips_ha_t *, int, int);
 260 static int ips_write_driver_status(ips_ha_t *, int);
 261 static int ips_read_adapter_status(ips_ha_t *, int);
 262 static int ips_read_subsystem_parameters(ips_ha_t *, int);
 263 static int ips_read_config(ips_ha_t *, int);
 264 static int ips_clear_adapter(ips_ha_t *, int);
 265 static int ips_readwrite_page5(ips_ha_t *, int, int);
 266 static int ips_init_copperhead(ips_ha_t *);
 267 static int ips_init_copperhead_memio(ips_ha_t *);
 268 static int ips_init_morpheus(ips_ha_t *);
 269 static int ips_isinit_copperhead(ips_ha_t *);
 270 static int ips_isinit_copperhead_memio(ips_ha_t *);
 271 static int ips_isinit_morpheus(ips_ha_t *);
 272 static int ips_erase_bios(ips_ha_t *);
 273 static int ips_program_bios(ips_ha_t *, char *, uint32_t, uint32_t);
 274 static int ips_verify_bios(ips_ha_t *, char *, uint32_t, uint32_t);
 275 static int ips_erase_bios_memio(ips_ha_t *);
 276 static int ips_program_bios_memio(ips_ha_t *, char *, uint32_t, uint32_t);
 277 static int ips_verify_bios_memio(ips_ha_t *, char *, uint32_t, uint32_t);
 278 static int ips_flash_copperhead(ips_ha_t *, ips_passthru_t *, ips_scb_t *);
 279 static int ips_flash_bios(ips_ha_t *, ips_passthru_t *, ips_scb_t *);
 280 static int ips_flash_firmware(ips_ha_t *, ips_passthru_t *, ips_scb_t *);
 281 static void ips_free_flash_copperhead(ips_ha_t * ha);
 282 static void ips_get_bios_version(ips_ha_t *, int);
 283 static void ips_identify_controller(ips_ha_t *);
 284 static void ips_chkstatus(ips_ha_t *, IPS_STATUS *);
 285 static void ips_enable_int_copperhead(ips_ha_t *);
 286 static void ips_enable_int_copperhead_memio(ips_ha_t *);
 287 static void ips_enable_int_morpheus(ips_ha_t *);
 288 static int ips_intr_copperhead(ips_ha_t *);
 289 static int ips_intr_morpheus(ips_ha_t *);
 290 static void ips_next(ips_ha_t *, int);
 291 static void ipsintr_blocking(ips_ha_t *, struct ips_scb *);
 292 static void ipsintr_done(ips_ha_t *, struct ips_scb *);
 293 static void ips_done(ips_ha_t *, ips_scb_t *);
 294 static void ips_free(ips_ha_t *);
 295 static void ips_init_scb(ips_ha_t *, ips_scb_t *);
 296 static void ips_freescb(ips_ha_t *, ips_scb_t *);
 297 static void ips_setup_funclist(ips_ha_t *);
 298 static void ips_statinit(ips_ha_t *);
 299 static void ips_statinit_memio(ips_ha_t *);
 300 static void ips_fix_ffdc_time(ips_ha_t *, ips_scb_t *, time_t);
 301 static void ips_ffdc_reset(ips_ha_t *, int);
 302 static void ips_ffdc_time(ips_ha_t *);
 303 static uint32_t ips_statupd_copperhead(ips_ha_t *);
 304 static uint32_t ips_statupd_copperhead_memio(ips_ha_t *);
 305 static uint32_t ips_statupd_morpheus(ips_ha_t *);
 306 static ips_scb_t *ips_getscb(ips_ha_t *);
 307 static void ips_putq_scb_head(ips_scb_queue_t *, ips_scb_t *);
 308 static void ips_putq_wait_tail(ips_wait_queue_t *, struct scsi_cmnd *);
 309 static void ips_putq_copp_tail(ips_copp_queue_t *,
 310                                       ips_copp_wait_item_t *);
 311 static ips_scb_t *ips_removeq_scb_head(ips_scb_queue_t *);
 312 static ips_scb_t *ips_removeq_scb(ips_scb_queue_t *, ips_scb_t *);
 313 static struct scsi_cmnd *ips_removeq_wait_head(ips_wait_queue_t *);
 314 static struct scsi_cmnd *ips_removeq_wait(ips_wait_queue_t *,
 315                                           struct scsi_cmnd *);
 316 static ips_copp_wait_item_t *ips_removeq_copp(ips_copp_queue_t *,
 317                                                      ips_copp_wait_item_t *);
 318 static ips_copp_wait_item_t *ips_removeq_copp_head(ips_copp_queue_t *);
 319
 320 static int ips_is_passthru(struct scsi_cmnd *);
 321 static int ips_make_passthru(ips_ha_t *, struct scsi_cmnd *, ips_scb_t *, int);
 322 static int ips_usrcmd(ips_ha_t *, ips_passthru_t *, ips_scb_t *);
 323 static void ips_cleanup_passthru(ips_ha_t *, ips_scb_t *);
 324 static void ips_scmd_buf_write(struct scsi_cmnd * scmd, void *data,
 325                                unsigned int count);
 326 static void ips_scmd_buf_read(struct scsi_cmnd * scmd, void *data,
 327                               unsigned int count);
 328
 329 static int ips_write_info(struct Scsi_Host *, char *, int);
 330 static int ips_show_info(struct seq_file *, struct Scsi_Host *);
 331 static int ips_host_info(ips_ha_t *, struct seq_file *);
 332 static int ips_abort_init(ips_ha_t * ha, int index);
 333 static int ips_init_phase2(int index);
 334
 335 static int ips_init_phase1(struct pci_dev *pci_dev, int *indexPtr);
 336 static int ips_register_scsi(int index);
 337
 338 static int  ips_poll_for_flush_complete(ips_ha_t * ha);
 339 static void ips_flush_and_reset(ips_ha_t *ha);
 340
 341 /*
 342  * global variables
 343  */
 344 static const char ips_name[] = "ips";
 345 static struct Scsi_Host *ips_sh[IPS_MAX_ADAPTERS];      /* Array of host controller structures */
 346 static ips_ha_t *ips_ha[IPS_MAX_ADAPTERS];      /* Array of HA structures */
 347 static unsigned int ips_next_controller;
 348 static unsigned int ips_num_controllers;
 349 static unsigned int ips_released_controllers;
 350 static int ips_hotplug;
 351 static int ips_cmd_timeout = 60;
 352 static int ips_reset_timeout = 60 * 5;
 353 static int ips_force_memio = 1;         /* Always use Memory Mapped I/O    */
 354 static int ips_force_i2o = 1;   /* Always use I2O command delivery */
 355 static int ips_ioctlsize = IPS_IOCTL_SIZE;      /* Size of the ioctl buffer        */
 356 static int ips_cd_boot;                 /* Booting from Manager CD         */
 357 static char *ips_FlashData = NULL;      /* CD Boot - Flash Data Buffer      */
 358 static dma_addr_t ips_flashbusaddr;
 359 static long ips_FlashDataInUse;         /* CD Boot - Flash Data In Use Flag */
 360 static uint32_t MaxLiteCmds = 32;       /* Max Active Cmds for a Lite Adapter */
 361 static struct scsi_host_template ips_driver_template = {
 362         .detect                 = ips_detect,
 363         .release                = ips_release,
 364         .info                   = ips_info,
 365         .queuecommand           = ips_queue,
 366         .eh_abort_handler       = ips_eh_abort,
 367         .eh_host_reset_handler  = ips_eh_reset,
 368         .proc_name              = "ips",
 369         .show_info              = ips_show_info,
 370         .write_info             = ips_write_info,
 371         .slave_configure        = ips_slave_configure,
 372         .bios_param             = ips_biosparam,
 373         .this_id                = -1,
 374         .sg_tablesize           = IPS_MAX_SG,
 375         .cmd_per_lun            = 3,
 376         .use_clustering         = ENABLE_CLUSTERING,
 377         .no_write_same          = 1,
 378 };
 379
 380
 381 /* This table describes all ServeRAID Adapters */
 382 static struct  pci_device_id  ips_pci_table[] = {
 383         { 0x1014, 0x002E, PCI_ANY_ID, PCI_ANY_ID, 0, 0 },
 384         { 0x1014, 0x01BD, PCI_ANY_ID, PCI_ANY_ID, 0, 0 },
 385         { 0x9005, 0x0250, PCI_ANY_ID, PCI_ANY_ID, 0, 0 },
 386         { 0, }
 387 };
 388
 389 MODULE_DEVICE_TABLE( pci, ips_pci_table );
 390
 391 static char ips_hot_plug_name[] = "ips";
 392
 393 static int  ips_insert_device(struct pci_dev *pci_dev, const struct pci_device_id *ent);
 394 static void ips_remove_device(struct pci_dev *pci_dev);
 395
 396 static struct pci_driver ips_pci_driver = {
 397         .name           = ips_hot_plug_name,
 398         .id_table       = ips_pci_table,
 399         .probe          = ips_insert_device,
 400         .remove         = ips_remove_device,
 401 };
 402
 403
 404 /*
 405  * Necessary forward function protoypes
 406  */
 407 static int ips_halt(struct notifier_block *nb, ulong event, void *buf);
 408
 409 #define MAX_ADAPTER_NAME 15
 410
 411 static char ips_adapter_name[][30] = {
 412         "ServeRAID",
 413         "ServeRAID II",
 414         "ServeRAID on motherboard",
 415         "ServeRAID on motherboard",
 416         "ServeRAID 3H",
 417         "ServeRAID 3L",
 418         "ServeRAID 4H",
 419         "ServeRAID 4M",
 420         "ServeRAID 4L",
 421         "ServeRAID 4Mx",
 422         "ServeRAID 4Lx",
 423         "ServeRAID 5i",
 424         "ServeRAID 5i",
 425         "ServeRAID 6M",
 426         "ServeRAID 6i",
 427         "ServeRAID 7t",
 428         "ServeRAID 7k",
 429         "ServeRAID 7M"
 430 };
 431
 432 static struct notifier_block ips_notifier = {
 433         ips_halt, NULL, 0
 434 };
 435
 436 /*
 437  * Direction table
 438  */
 439 static char ips_command_direction[] = {
 440         IPS_DATA_NONE, IPS_DATA_NONE, IPS_DATA_IN, IPS_DATA_IN, IPS_DATA_OUT,
 441         IPS_DATA_IN, IPS_DATA_IN, IPS_DATA_OUT, IPS_DATA_IN, IPS_DATA_UNK,
 442         IPS_DATA_OUT, IPS_DATA_OUT, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 443         IPS_DATA_IN, IPS_DATA_NONE, IPS_DATA_NONE, IPS_DATA_IN, IPS_DATA_OUT,
 444         IPS_DATA_IN, IPS_DATA_OUT, IPS_DATA_NONE, IPS_DATA_NONE, IPS_DATA_OUT,
 445         IPS_DATA_NONE, IPS_DATA_IN, IPS_DATA_NONE, IPS_DATA_IN, IPS_DATA_OUT,
 446         IPS_DATA_NONE, IPS_DATA_UNK, IPS_DATA_IN, IPS_DATA_UNK, IPS_DATA_IN,
 447         IPS_DATA_UNK, IPS_DATA_OUT, IPS_DATA_IN, IPS_DATA_UNK, IPS_DATA_UNK,
 448         IPS_DATA_IN, IPS_DATA_IN, IPS_DATA_OUT, IPS_DATA_NONE, IPS_DATA_UNK,
 449         IPS_DATA_IN, IPS_DATA_OUT, IPS_DATA_OUT, IPS_DATA_OUT, IPS_DATA_OUT,
 450         IPS_DATA_OUT, IPS_DATA_NONE, IPS_DATA_IN, IPS_DATA_NONE, IPS_DATA_NONE,
 451         IPS_DATA_IN, IPS_DATA_OUT, IPS_DATA_OUT, IPS_DATA_OUT, IPS_DATA_OUT,
 452         IPS_DATA_IN, IPS_DATA_OUT, IPS_DATA_IN, IPS_DATA_OUT, IPS_DATA_OUT,
 453         IPS_DATA_OUT, IPS_DATA_IN, IPS_DATA_IN, IPS_DATA_IN, IPS_DATA_NONE,
 454         IPS_DATA_UNK, IPS_DATA_NONE, IPS_DATA_NONE, IPS_DATA_NONE, IPS_DATA_UNK,
 455         IPS_DATA_NONE, IPS_DATA_OUT, IPS_DATA_IN, IPS_DATA_UNK, IPS_DATA_UNK,
 456         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 457         IPS_DATA_OUT, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 458         IPS_DATA_IN, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 459         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 460         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 461         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 462         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 463         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 464         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 465         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 466         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 467         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 468         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 469         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 470         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 471         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 472         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 473         IPS_DATA_NONE, IPS_DATA_NONE, IPS_DATA_UNK, IPS_DATA_IN, IPS_DATA_NONE,
 474         IPS_DATA_OUT, IPS_DATA_UNK, IPS_DATA_NONE, IPS_DATA_UNK, IPS_DATA_OUT,
 475         IPS_DATA_OUT, IPS_DATA_OUT, IPS_DATA_OUT, IPS_DATA_OUT, IPS_DATA_NONE,
 476         IPS_DATA_UNK, IPS_DATA_IN, IPS_DATA_OUT, IPS_DATA_IN, IPS_DATA_IN,
 477         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 478         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 479         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 480         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 481         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 482         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 483         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 484         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 485         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 486         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_OUT,
 487         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 488         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 489         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK,
 490         IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK, IPS_DATA_UNK
 491 };
 492
 493
 494 /****************************************************************************/
 495 /*                                                                          */
 496 /* Routine Name: ips_setup                                                  */
 497 /*                                                                          */
 498 /* Routine Description:                                                     */
 499 /*                                                                          */
 500 /*   setup parameters to the driver                                         */
 501 /*                                                                          */
 502 /****************************************************************************/
 503 static int
 504 ips_setup(char *ips_str)
 505 {
 506
 507         int i;
 508         char *key;
 509         char *value;
 510         IPS_OPTION options[] = {
 511                 {"noi2o", &ips_force_i2o, 0},
 512                 {"nommap", &ips_force_memio, 0},
 513                 {"ioctlsize", &ips_ioctlsize, IPS_IOCTL_SIZE},
 514                 {"cdboot", &ips_cd_boot, 0},
 515                 {"maxcmds", &MaxLiteCmds, 32},
 516         };
 517
 518         /* Don't use strtok() anymore ( if 2.4 Kernel or beyond ) */
 519         /* Search for value */
 520         while ((key = strsep(&ips_str, ",."))) {
 521                 if (!*key)
 522                         continue;
 523                 value = strchr(key, ':');
 524                 if (value)
 525                         *value++ = '\0';
 526                 /*
 527                  * We now have key/value pairs.
 528                  * Update the variables
 529                  */
 530                 for (i = 0; i < ARRAY_SIZE(options); i++) {
 531                         if (strnicmp
 532                             (key, options[i].option_name,
 533                              strlen(options[i].option_name)) == 0) {
 534                                 if (value)
 535                                         *options[i].option_flag =
 536                                             simple_strtoul(value, NULL, 0);
 537                                 else
 538                                         *options[i].option_flag =
 539                                             options[i].option_value;
 540                                 break;
 541                         }
 542                 }
 543         }
 544
 545         return (1);
 546 }
 547
 548 __setup("ips=", ips_setup);
 549
 550 /****************************************************************************/
 551 /*                                                                          */
 552 /* Routine Name: ips_detect                                                 */
 553 /*                                                                          */
 554 /* Routine Description:                                                     */
 555 /*                                                                          */
 556 /*   Detect and initialize the driver                                       */
 557 /*                                                                          */
 558 /* NOTE: this routine is called under the io_request_lock spinlock          */
 559 /*                                                                          */
 560 /****************************************************************************/
 561 static int
 562 ips_detect(struct scsi_host_template * SHT)
 563 {
 564         int i;
 565
 566         METHOD_TRACE("ips_detect", 1);
 567
 568 #ifdef MODULE
 569         if (ips)
 570                 ips_setup(ips);
 571 #endif
 572
 573         for (i = 0; i < ips_num_controllers; i++) {
 574                 if (ips_register_scsi(i))
 575                         ips_free(ips_ha[i]);
 576                 ips_released_controllers++;
 577         }
 578         ips_hotplug = 1;
 579         return (ips_num_controllers);
 580 }
 581
 582 /****************************************************************************/
 583 /*   configure the function pointers to use the functions that will work    */
 584 /*   with the found version of the adapter                                  */
 585 /****************************************************************************/
 586 static void
 587 ips_setup_funclist(ips_ha_t * ha)
 588 {
 589
 590         /*
 591          * Setup Functions
 592          */
 593         if (IPS_IS_MORPHEUS(ha) || IPS_IS_MARCO(ha)) {
 594                 /* morpheus / marco / sebring */
 595                 ha->func.isintr = ips_isintr_morpheus;
 596                 ha->func.isinit = ips_isinit_morpheus;
 597                 ha->func.issue = ips_issue_i2o_memio;
 598                 ha->func.init = ips_init_morpheus;
 599                 ha->func.statupd = ips_statupd_morpheus;
 600                 ha->func.reset = ips_reset_morpheus;
 601                 ha->func.intr = ips_intr_morpheus;
 602                 ha->func.enableint = ips_enable_int_morpheus;
 603         } else if (IPS_USE_MEMIO(ha)) {
 604                 /* copperhead w/MEMIO */
 605                 ha->func.isintr = ips_isintr_copperhead_memio;
 606                 ha->func.isinit = ips_isinit_copperhead_memio;
 607                 ha->func.init = ips_init_copperhead_memio;
 608                 ha->func.statupd = ips_statupd_copperhead_memio;
 609                 ha->func.statinit = ips_statinit_memio;
 610                 ha->func.reset = ips_reset_copperhead_memio;
 611                 ha->func.intr = ips_intr_copperhead;
 612                 ha->func.erasebios = ips_erase_bios_memio;
 613                 ha->func.programbios = ips_program_bios_memio;
 614                 ha->func.verifybios = ips_verify_bios_memio;
 615                 ha->func.enableint = ips_enable_int_copperhead_memio;
 616                 if (IPS_USE_I2O_DELIVER(ha))
 617                         ha->func.issue = ips_issue_i2o_memio;
 618                 else
 619                         ha->func.issue = ips_issue_copperhead_memio;
 620         } else {
 621                 /* copperhead */
 622                 ha->func.isintr = ips_isintr_copperhead;
 623                 ha->func.isinit = ips_isinit_copperhead;
 624                 ha->func.init = ips_init_copperhead;
 625                 ha->func.statupd = ips_statupd_copperhead;
 626                 ha->func.statinit = ips_statinit;
 627                 ha->func.reset = ips_reset_copperhead;
 628                 ha->func.intr = ips_intr_copperhead;
 629                 ha->func.erasebios = ips_erase_bios;
 630                 ha->func.programbios = ips_program_bios;
 631                 ha->func.verifybios = ips_verify_bios;
 632                 ha->func.enableint = ips_enable_int_copperhead;
 633
 634                 if (IPS_USE_I2O_DELIVER(ha))
 635                         ha->func.issue = ips_issue_i2o;
 636                 else
 637                         ha->func.issue = ips_issue_copperhead;
 638         }
 639 }
 640
 641 /****************************************************************************/
 642 /*                                                                          */
 643 /* Routine Name: ips_release                                                */
 644 /*                                                                          */
 645 /* Routine Description:                                                     */
 646 /*                                                                          */
 647 /*   Remove a driver                                                        */
 648 /*                                                                          */
 649 /****************************************************************************/
 650 static int
 651 ips_release(struct Scsi_Host *sh)
 652 {
 653         ips_scb_t *scb;
 654         ips_ha_t *ha;
 655         int i;
 656
 657         METHOD_TRACE("ips_release", 1);
 658
 659         scsi_remove_host(sh);
 660
 661         for (i = 0; i < IPS_MAX_ADAPTERS && ips_sh[i] != sh; i++) ;
 662
 663         if (i == IPS_MAX_ADAPTERS) {
 664                 printk(KERN_WARNING
 665                        "(%s) release, invalid Scsi_Host pointer.\n", ips_name);
 666                 BUG();
 667                 return (FALSE);
 668         }
 669
 670         ha = IPS_HA(sh);
 671
 672         if (!ha)
 673                 return (FALSE);
 674
 675         /* flush the cache on the controller */
 676         scb = &ha->scbs[ha->max_cmds - 1];
 677
 678         ips_init_scb(ha, scb);
 679
 680         scb->timeout = ips_cmd_timeout;
 681         scb->cdb[0] = IPS_CMD_FLUSH;
 682
 683         scb->cmd.flush_cache.op_code = IPS_CMD_FLUSH;
 684         scb->cmd.flush_cache.command_id = IPS_COMMAND_ID(ha, scb);
 685         scb->cmd.flush_cache.state = IPS_NORM_STATE;
 686         scb->cmd.flush_cache.reserved = 0;
 687         scb->cmd.flush_cache.reserved2 = 0;
 688         scb->cmd.flush_cache.reserved3 = 0;
 689         scb->cmd.flush_cache.reserved4 = 0;
 690
 691         IPS_PRINTK(KERN_WARNING, ha->pcidev, "Flushing Cache.\n");
 692
 693         /* send command */
 694         if (ips_send_wait(ha, scb, ips_cmd_timeout, IPS_INTR_ON) == IPS_FAILURE)
 695                 IPS_PRINTK(KERN_WARNING, ha->pcidev, "Incomplete Flush.\n");
 696
 697         IPS_PRINTK(KERN_WARNING, ha->pcidev, "Flushing Complete.\n");
 698
 699         ips_sh[i] = NULL;
 700         ips_ha[i] = NULL;
 701
 702         /* free extra memory */
 703         ips_free(ha);
 704
 705         /* free IRQ */
 706         free_irq(ha->pcidev->irq, ha);
 707
 708         scsi_host_put(sh);
 709
 710         ips_released_controllers++;
 711
 712         return (FALSE);
 713 }
 714
 715 /****************************************************************************/
 716 /*                                                                          */
 717 /* Routine Name: ips_halt                                                   */
 718 /*                                                                          */
 719 /* Routine Description:                                                     */
 720 /*                                                                          */
 721 /*   Perform cleanup when the system reboots                                */
 722 /*                                                                          */
 723 /****************************************************************************/
 724 static int
 725 ips_halt(struct notifier_block *nb, ulong event, void *buf)
 726 {
 727         ips_scb_t *scb;
 728         ips_ha_t *ha;
 729         int i;
 730
 731         if ((event != SYS_RESTART) && (event != SYS_HALT) &&
 732             (event != SYS_POWER_OFF))
 733                 return (NOTIFY_DONE);
 734
 735         for (i = 0; i < ips_next_controller; i++) {
 736                 ha = (ips_ha_t *) ips_ha[i];
 737
 738                 if (!ha)
 739                         continue;
 740
 741                 if (!ha->active)
 742                         continue;
 743
 744                 /* flush the cache on the controller */
 745                 scb = &ha->scbs[ha->max_cmds - 1];
 746
 747                 ips_init_scb(ha, scb);
 748
 749                 scb->timeout = ips_cmd_timeout;
 750                 scb->cdb[0] = IPS_CMD_FLUSH;
 751
 752                 scb->cmd.flush_cache.op_code = IPS_CMD_FLUSH;
 753                 scb->cmd.flush_cache.command_id = IPS_COMMAND_ID(ha, scb);
 754                 scb->cmd.flush_cache.state = IPS_NORM_STATE;
 755                 scb->cmd.flush_cache.reserved = 0;
 756                 scb->cmd.flush_cache.reserved2 = 0;
 757                 scb->cmd.flush_cache.reserved3 = 0;
 758                 scb->cmd.flush_cache.reserved4 = 0;
 759
 760                 IPS_PRINTK(KERN_WARNING, ha->pcidev, "Flushing Cache.\n");
 761
 762                 /* send command */
 763                 if (ips_send_wait(ha, scb, ips_cmd_timeout, IPS_INTR_ON) ==
 764                     IPS_FAILURE)
 765                         IPS_PRINTK(KERN_WARNING, ha->pcidev,
 766                                    "Incomplete Flush.\n");
 767                 else
 768                         IPS_PRINTK(KERN_WARNING, ha->pcidev,
 769                                    "Flushing Complete.\n");
 770         }
 771
 772         return (NOTIFY_OK);
 773 }
 774
 775 /****************************************************************************/
 776 /*                                                                          */
 777 /* Routine Name: ips_eh_abort                                               */
 778 /*                                                                          */
 779 /* Routine Description:                                                     */
 780 /*                                                                          */
 781 /*   Abort a command (using the new error code stuff)                       */
 782 /* Note: this routine is called under the io_request_lock                   */
 783 /****************************************************************************/
 784 int ips_eh_abort(struct scsi_cmnd *SC)
 785 {
 786         ips_ha_t *ha;
 787         ips_copp_wait_item_t *item;
 788         int ret;
 789         struct Scsi_Host *host;
 790
 791         METHOD_TRACE("ips_eh_abort", 1);
 792
 793         if (!SC)
 794                 return (FAILED);
 795
 796         host = SC->device->host;
 797         ha = (ips_ha_t *) SC->device->host->hostdata;
 798
 799         if (!ha)
 800                 return (FAILED);
 801
 802         if (!ha->active)
 803                 return (FAILED);
 804
 805         spin_lock(host->host_lock);
 806
 807         /* See if the command is on the copp queue */
 808         item = ha->copp_waitlist.head;
 809         while ((item) && (item->scsi_cmd != SC))
 810                 item = item->next;
 811
 812         if (item) {
 813                 /* Found it */
 814                 ips_removeq_copp(&ha->copp_waitlist, item);
 815                 ret = (SUCCESS);
 816
 817                 /* See if the command is on the wait queue */
 818         } else if (ips_removeq_wait(&ha->scb_waitlist, SC)) {
 819                 /* command not sent yet */
 820                 ret = (SUCCESS);
 821         } else {
 822                 /* command must have already been sent */
 823                 ret = (FAILED);
 824         }
 825
 826         spin_unlock(host->host_lock);
 827         return ret;
 828 }
 829
 830 /****************************************************************************/
 831 /*                                                                          */
 832 /* Routine Name: ips_eh_reset                                               */
 833 /*                                                                          */
 834 /* Routine Description:                                                     */
 835 /*                                                                          */
 836 /*   Reset the controller (with new eh error code)                          */
 837 /*                                                                          */
 838 /* NOTE: this routine is called under the io_request_lock spinlock          */
 839 /*                                                                          */
 840 /****************************************************************************/
 841 static int __ips_eh_reset(struct scsi_cmnd *SC)
 842 {
 843         int ret;
 844         int i;
 845         ips_ha_t *ha;
 846         ips_scb_t *scb;
 847         ips_copp_wait_item_t *item;
 848
 849         METHOD_TRACE("ips_eh_reset", 1);
 850
 851 #ifdef NO_IPS_RESET
 852         return (FAILED);
 853 #else
 854
 855         if (!SC) {
 856                 DEBUG(1, "Reset called with NULL scsi command");
 857
 858                 return (FAILED);
 859         }
 860
 861         ha = (ips_ha_t *) SC->device->host->hostdata;
 862
 863         if (!ha) {
 864                 DEBUG(1, "Reset called with NULL ha struct");
 865
 866                 return (FAILED);
 867         }
 868
 869         if (!ha->active)
 870                 return (FAILED);
 871
 872         /* See if the command is on the copp queue */
 873         item = ha->copp_waitlist.head;
 874         while ((item) && (item->scsi_cmd != SC))
 875                 item = item->next;
 876
 877         if (item) {
 878                 /* Found it */
 879                 ips_removeq_copp(&ha->copp_waitlist, item);
 880                 return (SUCCESS);
 881         }
 882
 883         /* See if the command is on the wait queue */
 884         if (ips_removeq_wait(&ha->scb_waitlist, SC)) {
 885                 /* command not sent yet */
 886                 return (SUCCESS);
 887         }
 888
 889         /* An explanation for the casual observer:                              */
 890         /* Part of the function of a RAID controller is automatic error         */
 891         /* detection and recovery.  As such, the only problem that physically   */
 892         /* resetting an adapter will ever fix is when, for some reason,         */
 893         /* the driver is not successfully communicating with the adapter.       */
 894         /* Therefore, we will attempt to flush this adapter.  If that succeeds, */
 895         /* then there's no real purpose in a physical reset. This will complete */
 896         /* much faster and avoids any problems that might be caused by a        */
 897         /* physical reset ( such as having to fail all the outstanding I/O's ). */
 898
 899         if (ha->ioctl_reset == 0) {     /* IF Not an IOCTL Requested Reset */
 900                 scb = &ha->scbs[ha->max_cmds - 1];
 901
 902                 ips_init_scb(ha, scb);
 903
 904                 scb->timeout = ips_cmd_timeout;
 905                 scb->cdb[0] = IPS_CMD_FLUSH;
 906
 907                 scb->cmd.flush_cache.op_code = IPS_CMD_FLUSH;
 908                 scb->cmd.flush_cache.command_id = IPS_COMMAND_ID(ha, scb);
 909                 scb->cmd.flush_cache.state = IPS_NORM_STATE;
 910                 scb->cmd.flush_cache.reserved = 0;
 911                 scb->cmd.flush_cache.reserved2 = 0;
 912                 scb->cmd.flush_cache.reserved3 = 0;
 913                 scb->cmd.flush_cache.reserved4 = 0;
 914
 915                 /* Attempt the flush command */
 916                 ret = ips_send_wait(ha, scb, ips_cmd_timeout, IPS_INTR_IORL);
 917                 if (ret == IPS_SUCCESS) {
 918                         IPS_PRINTK(KERN_NOTICE, ha->pcidev,
 919                                    "Reset Request - Flushed Cache\n");
 920                         return (SUCCESS);
 921                 }
 922         }
 923
 924         /* Either we can't communicate with the adapter or it's an IOCTL request */
 925         /* from a utility.  A physical reset is needed at this point.            */
 926
 927         ha->ioctl_reset = 0;    /* Reset the IOCTL Requested Reset Flag */
 928
 929         /*
 930          * command must have already been sent
 931          * reset the controller
 932          */
 933         IPS_PRINTK(KERN_NOTICE, ha->pcidev, "Resetting controller.\n");
 934         ret = (*ha->func.reset) (ha);
 935
 936         if (!ret) {
 937                 struct scsi_cmnd *scsi_cmd;
 938
 939                 IPS_PRINTK(KERN_NOTICE, ha->pcidev,
 940                            "Controller reset failed - controller now offline.\n");
 941
 942                 /* Now fail all of the active commands */
 943                 DEBUG_VAR(1, "(%s%d) Failing active commands",
 944                           ips_name, ha->host_num);
 945
 946                 while ((scb = ips_removeq_scb_head(&ha->scb_activelist))) {
 947                         scb->scsi_cmd->result = DID_ERROR << 16;
 948                         scb->scsi_cmd->scsi_done(scb->scsi_cmd);
 949                         ips_freescb(ha, scb);
 950                 }
 951
 952                 /* Now fail all of the pending commands */
 953                 DEBUG_VAR(1, "(%s%d) Failing pending commands",
 954                           ips_name, ha->host_num);
 955
 956                 while ((scsi_cmd = ips_removeq_wait_head(&ha->scb_waitlist))) {
 957                         scsi_cmd->result = DID_ERROR;
 958                         scsi_cmd->scsi_done(scsi_cmd);
 959                 }
 960
 961                 ha->active = FALSE;
 962                 return (FAILED);
 963         }
 964
 965         if (!ips_clear_adapter(ha, IPS_INTR_IORL)) {
 966                 struct scsi_cmnd *scsi_cmd;
 967
 968                 IPS_PRINTK(KERN_NOTICE, ha->pcidev,
 969                            "Controller reset failed - controller now offline.\n");
 970
 971                 /* Now fail all of the active commands */
 972                 DEBUG_VAR(1, "(%s%d) Failing active commands",
 973                           ips_name, ha->host_num);
 974
 975                 while ((scb = ips_removeq_scb_head(&ha->scb_activelist))) {
 976                         scb->scsi_cmd->result = DID_ERROR << 16;
 977                         scb->scsi_cmd->scsi_done(scb->scsi_cmd);
 978                         ips_freescb(ha, scb);
 979                 }
 980
 981                 /* Now fail all of the pending commands */
 982                 DEBUG_VAR(1, "(%s%d) Failing pending commands",
 983                           ips_name, ha->host_num);
 984
 985                 while ((scsi_cmd = ips_removeq_wait_head(&ha->scb_waitlist))) {
 986                         scsi_cmd->result = DID_ERROR << 16;
 987                         scsi_cmd->scsi_done(scsi_cmd);
 988                 }
 989
 990                 ha->active = FALSE;
 991                 return (FAILED);
 992         }
 993
 994         /* FFDC */
 995         if (le32_to_cpu(ha->subsys->param[3]) & 0x300000) {
 996                 struct timeval tv;
 997
 998                 do_gettimeofday(&tv);
 999                 ha->last_ffdc = tv.tv_sec;
1000                 ha->reset_count++;
1001                 ips_ffdc_reset(ha, IPS_INTR_IORL);
1002         }
1003
1004         /* Now fail all of the active commands */
1005         DEBUG_VAR(1, "(%s%d) Failing active commands", ips_name, ha->host_num);
1006
1007         while ((scb = ips_removeq_scb_head(&ha->scb_activelist))) {
1008                 scb->scsi_cmd->result = DID_RESET << 16;
1009                 scb->scsi_cmd->scsi_done(scb->scsi_cmd);
1010                 ips_freescb(ha, scb);
1011         }
1012
1013         /* Reset DCDB active command bits */
1014         for (i = 1; i < ha->nbus; i++)
1015                 ha->dcdb_active[i - 1] = 0;
1016
1017         /* Reset the number of active IOCTLs */
1018         ha->num_ioctl = 0;
1019
1020         ips_next(ha, IPS_INTR_IORL);
1021
1022         return (SUCCESS);
1023 #endif                          /* NO_IPS_RESET */
1024
1025 }
1026
1027 static int ips_eh_reset(struct scsi_cmnd *SC)
1028 {
1029         int rc;
1030
1031         spin_lock_irq(SC->device->host->host_lock);
1032         rc = __ips_eh_reset(SC);
1033         spin_unlock_irq(SC->device->host->host_lock);
1034
1035         return rc;
1036 }
1037
1038 /****************************************************************************/
1039 /*                                                                          */
1040 /* Routine Name: ips_queue                                                  */
1041 /*                                                                          */
1042 /* Routine Description:                                                     */
1043 /*                                                                          */
1044 /*   Send a command to the controller                                       */
1045 /*                                                                          */
1046 /* NOTE:                                                                    */
1047 /*    Linux obtains io_request_lock before calling this function            */
1048 /*                                                                          */
1049 /****************************************************************************/
1050 static int ips_queue_lck(struct scsi_cmnd *SC, void (*done) (struct scsi_cmnd *))
1051 {
1052         ips_ha_t *ha;
1053         ips_passthru_t *pt;
1054
1055         METHOD_TRACE("ips_queue", 1);
1056
1057         ha = (ips_ha_t *) SC->device->host->hostdata;
1058
1059         if (!ha)
1060                 return (1);
1061
1062         if (!ha->active)
1063                 return (DID_ERROR);
1064
1065         if (ips_is_passthru(SC)) {
1066                 if (ha->copp_waitlist.count == IPS_MAX_IOCTL_QUEUE) {
1067                         SC->result = DID_BUS_BUSY << 16;
1068                         done(SC);
1069
1070                         return (0);
1071                 }
1072         } else if (ha->scb_waitlist.count == IPS_MAX_QUEUE) {
1073                 SC->result = DID_BUS_BUSY << 16;
1074                 done(SC);
1075
1076                 return (0);
1077         }
1078
1079         SC->scsi_done = done;
1080
1081         DEBUG_VAR(2, "(%s%d): ips_queue: cmd 0x%X (%d %d %d)",
1082                   ips_name,
1083                   ha->host_num,
1084                   SC->cmnd[0],
1085                   SC->device->channel, SC->device->id, SC->device->lun);
1086
1087         /* Check for command to initiator IDs */
1088         if ((scmd_channel(SC) > 0)
1089             && (scmd_id(SC) == ha->ha_id[scmd_channel(SC)])) {
1090                 SC->result = DID_NO_CONNECT << 16;
1091                 done(SC);
1092
1093                 return (0);
1094         }
1095
1096         if (ips_is_passthru(SC)) {
1097
1098                 ips_copp_wait_item_t *scratch;
1099
1100                 /* A Reset IOCTL is only sent by the boot CD in extreme cases.           */
1101                 /* There can never be any system activity ( network or disk ), but check */
1102                 /* anyway just as a good practice.                                       */
1103                 pt = (ips_passthru_t *) scsi_sglist(SC);
1104                 if ((pt->CoppCP.cmd.reset.op_code == IPS_CMD_RESET_CHANNEL) &&
1105                     (pt->CoppCP.cmd.reset.adapter_flag == 1)) {
1106                         if (ha->scb_activelist.count != 0) {
1107                                 SC->result = DID_BUS_BUSY << 16;
1108                                 done(SC);
1109                                 return (0);
1110                         }
1111                         ha->ioctl_reset = 1;    /* This reset request is from an IOCTL */
1112                         __ips_eh_reset(SC);
1113                         SC->result = DID_OK << 16;
1114                         SC->scsi_done(SC);
1115                         return (0);
1116                 }
1117
1118                 /* allocate space for the scribble */
1119                 scratch = kmalloc(sizeof (ips_copp_wait_item_t), GFP_ATOMIC);
1120
1121                 if (!scratch) {
1122                         SC->result = DID_ERROR << 16;
1123                         done(SC);
1124
1125                         return (0);
1126                 }
1127
1128                 scratch->scsi_cmd = SC;
1129                 scratch->next = NULL;
1130
1131                 ips_putq_copp_tail(&ha->copp_waitlist, scratch);
1132         } else {
1133                 ips_putq_wait_tail(&ha->scb_waitlist, SC);
1134         }
1135
1136         ips_next(ha, IPS_INTR_IORL);
1137
1138         return (0);
1139 }
1140
1141 static DEF_SCSI_QCMD(ips_queue)
1142
1143 /****************************************************************************/
1144 /*                                                                          */
1145 /* Routine Name: ips_biosparam                                              */
1146 /*                                                                          */
1147 /* Routine Description:                                                     */
1148 /*                                                                          */
1149 /*   Set bios geometry for the controller                                   */
1150 /*                                                                          */
1151 /****************************************************************************/
1152 static int ips_biosparam(struct scsi_device *sdev, struct block_device *bdev,
1153                          sector_t capacity, int geom[])
1154 {
1155         ips_ha_t *ha = (ips_ha_t *) sdev->host->hostdata;
1156         int heads;
1157         int sectors;
1158         int cylinders;
1159
1160         METHOD_TRACE("ips_biosparam", 1);
1161
1162         if (!ha)
1163                 /* ?!?! host adater info invalid */
1164                 return (0);
1165
1166         if (!ha->active)
1167                 return (0);
1168
1169         if (!ips_read_adapter_status(ha, IPS_INTR_ON))
1170                 /* ?!?! Enquiry command failed */
1171                 return (0);
1172
1173         if ((capacity > 0x400000) && ((ha->enq->ucMiscFlag & 0x8) == 0)) {
1174                 heads = IPS_NORM_HEADS;
1175                 sectors = IPS_NORM_SECTORS;
1176         } else {
1177                 heads = IPS_COMP_HEADS;
1178                 sectors = IPS_COMP_SECTORS;
1179         }
1180
1181         cylinders = (unsigned long) capacity / (heads * sectors);
1182
1183         DEBUG_VAR(2, "Geometry: heads: %d, sectors: %d, cylinders: %d",
1184                   heads, sectors, cylinders);
1185
1186         geom[0] = heads;
1187         geom[1] = sectors;
1188         geom[2] = cylinders;
1189
1190         return (0);
1191 }
1192
1193 /****************************************************************************/
1194 /*                                                                          */
1195 /* Routine Name: ips_slave_configure                                        */
1196 /*                                                                          */
1197 /* Routine Description:                                                     */
1198 /*                                                                          */
1199 /*   Set queue depths on devices once scan is complete                      */
1200 /*                                                                          */
1201 /****************************************************************************/
1202 static int
1203 ips_slave_configure(struct scsi_device * SDptr)
1204 {
1205         ips_ha_t *ha;
1206         int min;
1207
1208         ha = IPS_HA(SDptr->host);
1209         if (SDptr->tagged_supported && SDptr->type == TYPE_DISK) {
1210                 min = ha->max_cmds / 2;
1211                 if (ha->enq->ucLogDriveCount <= 2)
1212                         min = ha->max_cmds - 1;
1213                 scsi_adjust_queue_depth(SDptr, MSG_ORDERED_TAG, min);
1214         }
1215
1216         SDptr->skip_ms_page_8 = 1;
1217         SDptr->skip_ms_page_3f = 1;
1218         return 0;
1219 }
1220
1221 /****************************************************************************/
1222 /*                                                                          */
1223 /* Routine Name: do_ipsintr                                                 */
1224 /*                                                                          */
1225 /* Routine Description:                                                     */
1226 /*                                                                          */
1227 /*   Wrapper for the interrupt handler                                      */
1228 /*                                                                          */
1229 /****************************************************************************/
1230 static irqreturn_t
1231 do_ipsintr(int irq, void *dev_id)
1232 {
1233         ips_ha_t *ha;
1234         struct Scsi_Host *host;
1235         int irqstatus;
1236
1237         METHOD_TRACE("do_ipsintr", 2);
1238
1239         ha = (ips_ha_t *) dev_id;
1240         if (!ha)
1241                 return IRQ_NONE;
1242         host = ips_sh[ha->host_num];
1243         /* interrupt during initialization */
1244         if (!host) {
1245                 (*ha->func.intr) (ha);
1246                 return IRQ_HANDLED;
1247         }
1248
1249         spin_lock(host->host_lock);
1250
1251         if (!ha->active) {
1252                 spin_unlock(host->host_lock);
1253                 return IRQ_HANDLED;
1254         }
1255
1256         irqstatus = (*ha->func.intr) (ha);
1257
1258         spin_unlock(host->host_lock);
1259
1260         /* start the next command */
1261         ips_next(ha, IPS_INTR_ON);
1262         return IRQ_RETVAL(irqstatus);
1263 }
1264
1265 /****************************************************************************/
1266 /*                                                                          */
1267 /* Routine Name: ips_intr_copperhead                                        */
1268 /*                                                                          */
1269 /* Routine Description:                                                     */
1270 /*                                                                          */
1271 /*   Polling interrupt handler                                              */
1272 /*                                                                          */
1273 /*   ASSUMES interrupts are disabled                                        */
1274 /*                                                                          */
1275 /****************************************************************************/
1276 int
1277 ips_intr_copperhead(ips_ha_t * ha)
1278 {
1279         ips_stat_t *sp;
1280         ips_scb_t *scb;
1281         IPS_STATUS cstatus;
1282         int intrstatus;
1283
1284         METHOD_TRACE("ips_intr", 2);
1285
1286         if (!ha)
1287                 return 0;
1288
1289         if (!ha->active)
1290                 return 0;
1291
1292         intrstatus = (*ha->func.isintr) (ha);
1293
1294         if (!intrstatus) {
1295                 /*
1296                  * Unexpected/Shared interrupt
1297                  */
1298
1299                 return 0;
1300         }
1301
1302         while (TRUE) {
1303                 sp = &ha->sp;
1304
1305                 intrstatus = (*ha->func.isintr) (ha);
1306
1307                 if (!intrstatus)
1308                         break;
1309                 else
1310                         cstatus.value = (*ha->func.statupd) (ha);
1311
1312                 if (cstatus.fields.command_id > (IPS_MAX_CMDS - 1)) {
1313                         /* Spurious Interrupt ? */
1314                         continue;
1315                 }
1316
1317                 ips_chkstatus(ha, &cstatus);
1318                 scb = (ips_scb_t *) sp->scb_addr;
1319
1320                 /*
1321                  * use the callback function to finish things up
1322                  * NOTE: interrupts are OFF for this
1323                  */
1324                 (*scb->callback) (ha, scb);
1325         }                       /* end while */
1326         return 1;
1327 }
1328
1329 /****************************************************************************/
1330 /*                                                                          */
1331 /* Routine Name: ips_intr_morpheus                                          */
1332 /*                                                                          */
1333 /* Routine Description:                                                     */
1334 /*                                                                          */
1335 /*   Polling interrupt handler                                              */
1336 /*                                                                          */
1337 /*   ASSUMES interrupts are disabled                                        */
1338 /*                                                                          */
1339 /****************************************************************************/
1340 int
1341 ips_intr_morpheus(ips_ha_t * ha)
1342 {
1343         ips_stat_t *sp;
1344         ips_scb_t *scb;
1345         IPS_STATUS cstatus;
1346         int intrstatus;
1347
1348         METHOD_TRACE("ips_intr_morpheus", 2);
1349
1350         if (!ha)
1351                 return 0;
1352
1353         if (!ha->active)
1354                 return 0;
1355
1356         intrstatus = (*ha->func.isintr) (ha);
1357
1358         if (!intrstatus) {
1359                 /*
1360                  * Unexpected/Shared interrupt
1361                  */
1362
1363                 return 0;
1364         }
1365
1366         while (TRUE) {
1367                 sp = &ha->sp;
1368
1369                 intrstatus = (*ha->func.isintr) (ha);
1370
1371                 if (!intrstatus)
1372                         break;
1373                 else
1374                         cstatus.value = (*ha->func.statupd) (ha);
1375
1376                 if (cstatus.value == 0xffffffff)
1377                         /* No more to process */
1378                         break;
1379
1380                 if (cstatus.fields.command_id > (IPS_MAX_CMDS - 1)) {
1381                         IPS_PRINTK(KERN_WARNING, ha->pcidev,
1382                                    "Spurious interrupt; no ccb.\n");
1383
1384                         continue;
1385                 }
1386
1387                 ips_chkstatus(ha, &cstatus);
1388                 scb = (ips_scb_t *) sp->scb_addr;
1389
1390                 /*
1391                  * use the callback function to finish things up
1392                  * NOTE: interrupts are OFF for this
1393                  */
1394                 (*scb->callback) (ha, scb);
1395         }                       /* end while */
1396         return 1;
1397 }
1398
1399 /****************************************************************************/
1400 /*                                                                          */
1401 /* Routine Name: ips_info                                                   */
1402 /*                                                                          */
1403 /* Routine Description:                                                     */
1404 /*                                                                          */
1405 /*   Return info about the driver                                           */
1406 /*                                                                          */
1407 /****************************************************************************/
1408 static const char *
1409 ips_info(struct Scsi_Host *SH)
1410 {
1411         static char buffer[256];
1412         char *bp;
1413         ips_ha_t *ha;
1414
1415         METHOD_TRACE("ips_info", 1);
1416
1417         ha = IPS_HA(SH);
1418
1419         if (!ha)
1420                 return (NULL);
1421
1422         bp = &buffer[0];
1423         memset(bp, 0, sizeof (buffer));
1424
1425         sprintf(bp, "%s%s%s Build %d", "IBM PCI ServeRAID ",
1426                 IPS_VERSION_HIGH, IPS_VERSION_LOW, IPS_BUILD_IDENT);
1427
1428         if (ha->ad_type > 0 && ha->ad_type <= MAX_ADAPTER_NAME) {
1429                 strcat(bp, " <");
1430                 strcat(bp, ips_adapter_name[ha->ad_type - 1]);
1431                 strcat(bp, ">");
1432         }
1433
1434         return (bp);
1435 }
1436
1437 static int
1438 ips_write_info(struct Scsi_Host *host, char *buffer, int length)
1439 {
1440         int i;
1441         ips_ha_t *ha = NULL;
1442
1443         /* Find our host structure */
1444         for (i = 0; i < ips_next_controller; i++) {
1445                 if (ips_sh[i]) {
1446                         if (ips_sh[i] == host) {
1447                                 ha = (ips_ha_t *) ips_sh[i]->hostdata;
1448                                 break;
1449                         }
1450                 }
1451         }
1452
1453         if (!ha)
1454                 return (-EINVAL);
1455
1456         return 0;
1457 }
1458
1459 static int
1460 ips_show_info(struct seq_file *m, struct Scsi_Host *host)
1461 {
1462         int i;
1463         ips_ha_t *ha = NULL;
1464
1465         /* Find our host structure */
1466         for (i = 0; i < ips_next_controller; i++) {
1467                 if (ips_sh[i]) {
1468                         if (ips_sh[i] == host) {
1469                                 ha = (ips_ha_t *) ips_sh[i]->hostdata;
1470                                 break;
1471                         }
1472                 }
1473         }
1474
1475         if (!ha)
1476                 return (-EINVAL);
1477
1478         return ips_host_info(ha, m);
1479 }
1480
1481 /*--------------------------------------------------------------------------*/
1482 /* Helper Functions                                                         */
1483 /*--------------------------------------------------------------------------*/
1484
1485 /****************************************************************************/
1486 /*                                                                          */
1487 /* Routine Name: ips_is_passthru                                            */
1488 /*                                                                          */
1489 /* Routine Description:                                                     */
1490 /*                                                                          */
1491 /*   Determine if the specified SCSI command is really a passthru command   */
1492 /*                                                                          */
1493 /****************************************************************************/
1494 static int ips_is_passthru(struct scsi_cmnd *SC)
1495 {
1496         unsigned long flags;
1497
1498         METHOD_TRACE("ips_is_passthru", 1);
1499
1500         if (!SC)
1501                 return (0);
1502
1503         if ((SC->cmnd[0] == IPS_IOCTL_COMMAND) &&
1504             (SC->device->channel == 0) &&
1505             (SC->device->id == IPS_ADAPTER_ID) &&
1506             (SC->device->lun == 0) && scsi_sglist(SC)) {
1507                 struct scatterlist *sg = scsi_sglist(SC);
1508                 char  *buffer;
1509
1510                 /* kmap_atomic() ensures addressability of the user buffer.*/
1511                 /* local_irq_save() protects the KM_IRQ0 address slot.     */
1512                 local_irq_save(flags);
1513                 buffer = kmap_atomic(sg_page(sg)) + sg->offset;
1514                 if (buffer && buffer[0] == 'C' && buffer[1] == 'O' &&
1515                     buffer[2] == 'P' && buffer[3] == 'P') {
1516                         kunmap_atomic(buffer - sg->offset);
1517                         local_irq_restore(flags);
1518                         return 1;
1519                 }
1520                 kunmap_atomic(buffer - sg->offset);
1521                 local_irq_restore(flags);
1522         }
1523         return 0;
1524 }
1525
1526 /****************************************************************************/
1527 /*                                                                          */
1528 /* Routine Name: ips_alloc_passthru_buffer                                  */
1529 /*                                                                          */
1530 /* Routine Description:                                                     */
1531 /*   allocate a buffer large enough for the ioctl data if the ioctl buffer  */
1532 /*   is too small or doesn't exist                                          */
1533 /****************************************************************************/
1534 static int
1535 ips_alloc_passthru_buffer(ips_ha_t * ha, int length)
1536 {
1537         void *bigger_buf;
1538         dma_addr_t dma_busaddr;
1539
1540         if (ha->ioctl_data && length <= ha->ioctl_len)
1541                 return 0;
1542         /* there is no buffer or it's not big enough, allocate a new one */
1543         bigger_buf = pci_alloc_consistent(ha->pcidev, length, &dma_busaddr);
1544         if (bigger_buf) {
1545                 /* free the old memory */
1546                 pci_free_consistent(ha->pcidev, ha->ioctl_len, ha->ioctl_data,
1547                                     ha->ioctl_busaddr);
1548                 /* use the new memory */
1549                 ha->ioctl_data = (char *) bigger_buf;
1550                 ha->ioctl_len = length;
1551                 ha->ioctl_busaddr = dma_busaddr;
1552         } else {
1553                 return -1;
1554         }
1555         return 0;
1556 }
1557
1558 /****************************************************************************/
1559 /*                                                                          */
1560 /* Routine Name: ips_make_passthru                                          */
1561 /*                                                                          */
1562 /* Routine Description:                                                     */
1563 /*                                                                          */
1564 /*   Make a passthru command out of the info in the Scsi block              */
1565 /*                                                                          */
1566 /****************************************************************************/
1567 static int
1568 ips_make_passthru(ips_ha_t *ha, struct scsi_cmnd *SC, ips_scb_t *scb, int intr)
1569 {
1570         ips_passthru_t *pt;
1571         int length = 0;
1572         int i, ret;
1573         struct scatterlist *sg = scsi_sglist(SC);
1574
1575         METHOD_TRACE("ips_make_passthru", 1);
1576
1577         scsi_for_each_sg(SC, sg, scsi_sg_count(SC), i)
1578                 length += sg->length;
1579
1580         if (length < sizeof (ips_passthru_t)) {
1581                 /* wrong size */
1582                 DEBUG_VAR(1, "(%s%d) Passthru structure wrong size",
1583                           ips_name, ha->host_num);
1584                 return (IPS_FAILURE);
1585         }
1586         if (ips_alloc_passthru_buffer(ha, length)) {
1587                 /* allocation failure!  If ha->ioctl_data exists, use it to return
1588                    some error codes.  Return a failed command to the scsi layer. */
1589                 if (ha->ioctl_data) {
1590                         pt = (ips_passthru_t *) ha->ioctl_data;
1591                         ips_scmd_buf_read(SC, pt, sizeof (ips_passthru_t));
1592                         pt->BasicStatus = 0x0B;
1593                         pt->ExtendedStatus = 0x00;
1594                         ips_scmd_buf_write(SC, pt, sizeof (ips_passthru_t));
1595                 }
1596                 return IPS_FAILURE;
1597         }
1598         ha->ioctl_datasize = length;
1599
1600         ips_scmd_buf_read(SC, ha->ioctl_data, ha->ioctl_datasize);
1601         pt = (ips_passthru_t *) ha->ioctl_data;
1602
1603         /*
1604          * Some notes about the passthru interface used
1605          *
1606          * IF the scsi op_code == 0x0d then we assume
1607          * that the data came along with/goes with the
1608          * packet we received from the sg driver. In this
1609          * case the CmdBSize field of the pt structure is
1610          * used for the size of the buffer.
1611          */
1612
1613         switch (pt->CoppCmd) {
1614         case IPS_NUMCTRLS:
1615                 memcpy(ha->ioctl_data + sizeof (ips_passthru_t),
1616                        &ips_num_controllers, sizeof (int));
1617                 ips_scmd_buf_write(SC, ha->ioctl_data,
1618                                    sizeof (ips_passthru_t) + sizeof (int));
1619                 SC->result = DID_OK << 16;
1620
1621                 return (IPS_SUCCESS_IMM);
1622
1623         case IPS_COPPUSRCMD:
1624         case IPS_COPPIOCCMD:
1625                 if (SC->cmnd[0] == IPS_IOCTL_COMMAND) {
1626                         if (length < (sizeof (ips_passthru_t) + pt->CmdBSize)) {
1627                                 /* wrong size */
1628                                 DEBUG_VAR(1,
1629                                           "(%s%d) Passthru structure wrong size",
1630                                           ips_name, ha->host_num);
1631
1632                                 return (IPS_FAILURE);
1633                         }
1634
1635                         if (ha->pcidev->device == IPS_DEVICEID_COPPERHEAD &&
1636                             pt->CoppCP.cmd.flashfw.op_code ==
1637                             IPS_CMD_RW_BIOSFW) {
1638                                 ret = ips_flash_copperhead(ha, pt, scb);
1639                                 ips_scmd_buf_write(SC, ha->ioctl_data,
1640                                                    sizeof (ips_passthru_t));
1641                                 return ret;
1642                         }
1643                         if (ips_usrcmd(ha, pt, scb))
1644                                 return (IPS_SUCCESS);
1645                         else
1646                                 return (IPS_FAILURE);
1647                 }
1648
1649                 break;
1650
1651         }                       /* end switch */
1652
1653         return (IPS_FAILURE);
1654 }
1655
1656 /****************************************************************************/
1657 /* Routine Name: ips_flash_copperhead                                       */
1658 /* Routine Description:                                                     */
1659 /*   Flash the BIOS/FW on a Copperhead style controller                     */
1660 /****************************************************************************/
1661 static int
1662 ips_flash_copperhead(ips_ha_t * ha, ips_passthru_t * pt, ips_scb_t * scb)
1663 {
1664         int datasize;
1665
1666         /* Trombone is the only copperhead that can do packet flash, but only
1667          * for firmware. No one said it had to make sense. */
1668         if (IPS_IS_TROMBONE(ha) && pt->CoppCP.cmd.flashfw.type == IPS_FW_IMAGE) {
1669                 if (ips_usrcmd(ha, pt, scb))
1670                         return IPS_SUCCESS;
1671                 else
1672                         return IPS_FAILURE;
1673         }
1674         pt->BasicStatus = 0x0B;
1675         pt->ExtendedStatus = 0;
1676         scb->scsi_cmd->result = DID_OK << 16;
1677         /* IF it's OK to Use the "CD BOOT" Flash Buffer, then you can     */
1678         /* avoid allocating a huge buffer per adapter ( which can fail ). */
1679         if (pt->CoppCP.cmd.flashfw.type == IPS_BIOS_IMAGE &&
1680             pt->CoppCP.cmd.flashfw.direction == IPS_ERASE_BIOS) {
1681                 pt->BasicStatus = 0;
1682                 return ips_flash_bios(ha, pt, scb);
1683         } else if (pt->CoppCP.cmd.flashfw.packet_num == 0) {
1684                 if (ips_FlashData && !test_and_set_bit(0, &ips_FlashDataInUse)){
1685                         ha->flash_data = ips_FlashData;
1686                         ha->flash_busaddr = ips_flashbusaddr;
1687                         ha->flash_len = PAGE_SIZE << 7;
1688                         ha->flash_datasize = 0;
1689                 } else if (!ha->flash_data) {
1690                         datasize = pt->CoppCP.cmd.flashfw.total_packets *
1691                             pt->CoppCP.cmd.flashfw.count;
1692                         ha->flash_data = pci_alloc_consistent(ha->pcidev,
1693                                                               datasize,
1694                                                               &ha->flash_busaddr);
1695                         if (!ha->flash_data){
1696                                 printk(KERN_WARNING "Unable to allocate a flash buffer\n");
1697                                 return IPS_FAILURE;
1698                         }
1699                         ha->flash_datasize = 0;
1700                         ha->flash_len = datasize;
1701                 } else
1702                         return IPS_FAILURE;
1703         } else {
1704                 if (pt->CoppCP.cmd.flashfw.count + ha->flash_datasize >
1705                     ha->flash_len) {
1706                         ips_free_flash_copperhead(ha);
1707                         IPS_PRINTK(KERN_WARNING, ha->pcidev,
1708                                    "failed size sanity check\n");
1709                         return IPS_FAILURE;
1710                 }
1711         }
1712         if (!ha->flash_data)
1713                 return IPS_FAILURE;
1714         pt->BasicStatus = 0;
1715         memcpy(&ha->flash_data[ha->flash_datasize], pt + 1,
1716                pt->CoppCP.cmd.flashfw.count);
1717         ha->flash_datasize += pt->CoppCP.cmd.flashfw.count;
1718         if (pt->CoppCP.cmd.flashfw.packet_num ==
1719             pt->CoppCP.cmd.flashfw.total_packets - 1) {
1720                 if (pt->CoppCP.cmd.flashfw.type == IPS_BIOS_IMAGE)
1721                         return ips_flash_bios(ha, pt, scb);
1722                 else if (pt->CoppCP.cmd.flashfw.type == IPS_FW_IMAGE)
1723                         return ips_flash_firmware(ha, pt, scb);
1724         }
1725         return IPS_SUCCESS_IMM;
1726 }
1727
1728 /****************************************************************************/
1729 /* Routine Name: ips_flash_bios                                             */
1730 /* Routine Description:                                                     */
1731 /*   flashes the bios of a copperhead adapter                               */
1732 /****************************************************************************/
1733 static int
1734 ips_flash_bios(ips_ha_t * ha, ips_passthru_t * pt, ips_scb_t * scb)
1735 {
1736
1737         if (pt->CoppCP.cmd.flashfw.type == IPS_BIOS_IMAGE &&
1738             pt->CoppCP.cmd.flashfw.direction == IPS_WRITE_BIOS) {
1739                 if ((!ha->func.programbios) || (!ha->func.erasebios) ||
1740                     (!ha->func.verifybios))
1741                         goto error;
1742                 if ((*ha->func.erasebios) (ha)) {
1743                         DEBUG_VAR(1,
1744                                   "(%s%d) flash bios failed - unable to erase flash",
1745                                   ips_name, ha->host_num);
1746                         goto error;
1747                 } else
1748                     if ((*ha->func.programbios) (ha,
1749                                                  ha->flash_data +
1750                                                  IPS_BIOS_HEADER,
1751                                                  ha->flash_datasize -
1752                                                  IPS_BIOS_HEADER, 0)) {
1753                         DEBUG_VAR(1,
1754                                   "(%s%d) flash bios failed - unable to flash",
1755                                   ips_name, ha->host_num);
1756                         goto error;
1757                 } else
1758                     if ((*ha->func.verifybios) (ha,
1759                                                 ha->flash_data +
1760                                                 IPS_BIOS_HEADER,
1761                                                 ha->flash_datasize -
1762                                                 IPS_BIOS_HEADER, 0)) {
1763                         DEBUG_VAR(1,
1764                                   "(%s%d) flash bios failed - unable to verify flash",
1765                                   ips_name, ha->host_num);
1766                         goto error;
1767                 }
1768                 ips_free_flash_copperhead(ha);
1769                 return IPS_SUCCESS_IMM;
1770         } else if (pt->CoppCP.cmd.flashfw.type == IPS_BIOS_IMAGE &&
1771                    pt->CoppCP.cmd.flashfw.direction == IPS_ERASE_BIOS) {
1772                 if (!ha->func.erasebios)
1773                         goto error;
1774                 if ((*ha->func.erasebios) (ha)) {
1775                         DEBUG_VAR(1,
1776                                   "(%s%d) flash bios failed - unable to erase flash",
1777                                   ips_name, ha->host_num);
1778                         goto error;
1779                 }
1780                 return IPS_SUCCESS_IMM;
1781         }
1782       error:
1783         pt->BasicStatus = 0x0B;
1784         pt->ExtendedStatus = 0x00;
1785         ips_free_flash_copperhead(ha);
1786         return IPS_FAILURE;
1787 }
1788
1789 /****************************************************************************/
1790 /*                                                                          */
1791 /* Routine Name: ips_fill_scb_sg_single                                     */
1792 /*                                                                          */
1793 /* Routine Description:                                                     */
1794 /*   Fill in a single scb sg_list element from an address                   */
1795 /*   return a -1 if a breakup occurred                                      */
1796 /****************************************************************************/
1797 static int
1798 ips_fill_scb_sg_single(ips_ha_t * ha, dma_addr_t busaddr,
1799                        ips_scb_t * scb, int indx, unsigned int e_len)
1800 {
1801
1802         int ret_val = 0;
1803
1804         if ((scb->data_len + e_len) > ha->max_xfer) {
1805                 e_len = ha->max_xfer - scb->data_len;
1806                 scb->breakup = indx;
1807                 ++scb->sg_break;
1808                 ret_val = -1;
1809         } else {
1810                 scb->breakup = 0;
1811                 scb->sg_break = 0;
1812         }
1813         if (IPS_USE_ENH_SGLIST(ha)) {
1814                 scb->sg_list.enh_list[indx].address_lo =
1815                     cpu_to_le32(pci_dma_lo32(busaddr));
1816                 scb->sg_list.enh_list[indx].address_hi =
1817                     cpu_to_le32(pci_dma_hi32(busaddr));
1818                 scb->sg_list.enh_list[indx].length = cpu_to_le32(e_len);
1819         } else {
1820                 scb->sg_list.std_list[indx].address =
1821                     cpu_to_le32(pci_dma_lo32(busaddr));
1822                 scb->sg_list.std_list[indx].length = cpu_to_le32(e_len);
1823         }
1824
1825         ++scb->sg_len;
1826         scb->data_len += e_len;
1827         return ret_val;
1828 }
1829
1830 /****************************************************************************/
1831 /* Routine Name: ips_flash_firmware                                         */
1832 /* Routine Description:                                                     */
1833 /*   flashes the firmware of a copperhead adapter                           */
1834 /****************************************************************************/
1835 static int
1836 ips_flash_firmware(ips_ha_t * ha, ips_passthru_t * pt, ips_scb_t * scb)
1837 {
1838         IPS_SG_LIST sg_list;
1839         uint32_t cmd_busaddr;
1840
1841         if (pt->CoppCP.cmd.flashfw.type == IPS_FW_IMAGE &&
1842             pt->CoppCP.cmd.flashfw.direction == IPS_WRITE_FW) {
1843                 memset(&pt->CoppCP.cmd, 0, sizeof (IPS_HOST_COMMAND));
1844                 pt->CoppCP.cmd.flashfw.op_code = IPS_CMD_DOWNLOAD;
1845                 pt->CoppCP.cmd.flashfw.count = cpu_to_le32(ha->flash_datasize);
1846         } else {
1847                 pt->BasicStatus = 0x0B;
1848                 pt->ExtendedStatus = 0x00;
1849                 ips_free_flash_copperhead(ha);
1850                 return IPS_FAILURE;
1851         }
1852         /* Save the S/G list pointer so it doesn't get clobbered */
1853         sg_list.list = scb->sg_list.list;
1854         cmd_busaddr = scb->scb_busaddr;
1855         /* copy in the CP */
1856         memcpy(&scb->cmd, &pt->CoppCP.cmd, sizeof (IPS_IOCTL_CMD));
1857         /* FIX stuff that might be wrong */
1858         scb->sg_list.list = sg_list.list;
1859         scb->scb_busaddr = cmd_busaddr;
1860         scb->bus = scb->scsi_cmd->device->channel;
1861         scb->target_id = scb->scsi_cmd->device->id;
1862         scb->lun = scb->scsi_cmd->device->lun;
1863         scb->sg_len = 0;
1864         scb->data_len = 0;
1865         scb->flags = 0;
1866         scb->op_code = 0;
1867         scb->callback = ipsintr_done;
1868         scb->timeout = ips_cmd_timeout;
1869
1870         scb->data_len = ha->flash_datasize;
1871         scb->data_busaddr =
1872             pci_map_single(ha->pcidev, ha->flash_data, scb->data_len,
1873                            IPS_DMA_DIR(scb));
1874         scb->flags |= IPS_SCB_MAP_SINGLE;
1875         scb->cmd.flashfw.command_id = IPS_COMMAND_ID(ha, scb);
1876         scb->cmd.flashfw.buffer_addr = cpu_to_le32(scb->data_busaddr);
1877         if (pt->TimeOut)
1878                 scb->timeout = pt->TimeOut;
1879         scb->scsi_cmd->result = DID_OK << 16;
1880         return IPS_SUCCESS;
1881 }
1882
1883 /****************************************************************************/
1884 /* Routine Name: ips_free_flash_copperhead                                  */
1885 /* Routine Description:                                                     */
1886 /*   release the memory resources used to hold the flash image              */
1887 /****************************************************************************/
1888 static void
1889 ips_free_flash_copperhead(ips_ha_t * ha)
1890 {
1891         if (ha->flash_data == ips_FlashData)
1892                 test_and_clear_bit(0, &ips_FlashDataInUse);
1893         else if (ha->flash_data)
1894                 pci_free_consistent(ha->pcidev, ha->flash_len, ha->flash_data,
1895                                     ha->flash_busaddr);
1896         ha->flash_data = NULL;
1897 }
1898
1899 /****************************************************************************/
1900 /*                                                                          */
1901 /* Routine Name: ips_usrcmd                                                 */
1902 /*                                                                          */
1903 /* Routine Description:                                                     */
1904 /*                                                                          */
1905 /*   Process a user command and make it ready to send                       */
1906 /*                                                                          */
1907 /****************************************************************************/
1908 static int
1909 ips_usrcmd(ips_ha_t * ha, ips_passthru_t * pt, ips_scb_t * scb)
1910 {
1911         IPS_SG_LIST sg_list;
1912         uint32_t cmd_busaddr;
1913
1914         METHOD_TRACE("ips_usrcmd", 1);
1915
1916         if ((!scb) || (!pt) || (!ha))
1917                 return (0);
1918
1919         /* Save the S/G list pointer so it doesn't get clobbered */
1920         sg_list.list = scb->sg_list.list;
1921         cmd_busaddr = scb->scb_busaddr;
1922         /* copy in the CP */
1923         memcpy(&scb->cmd, &pt->CoppCP.cmd, sizeof (IPS_IOCTL_CMD));
1924         memcpy(&scb->dcdb, &pt->CoppCP.dcdb, sizeof (IPS_DCDB_TABLE));
1925
1926         /* FIX stuff that might be wrong */
1927         scb->sg_list.list = sg_list.list;
1928         scb->scb_busaddr = cmd_busaddr;
1929         scb->bus = scb->scsi_cmd->device->channel;
1930         scb->target_id = scb->scsi_cmd->device->id;
1931         scb->lun = scb->scsi_cmd->device->lun;
1932         scb->sg_len = 0;
1933         scb->data_len = 0;
1934         scb->flags = 0;
1935         scb->op_code = 0;
1936         scb->callback = ipsintr_done;
1937         scb->timeout = ips_cmd_timeout;
1938         scb->cmd.basic_io.command_id = IPS_COMMAND_ID(ha, scb);
1939
1940         /* we don't support DCDB/READ/WRITE Scatter Gather */
1941         if ((scb->cmd.basic_io.op_code == IPS_CMD_READ_SG) ||
1942             (scb->cmd.basic_io.op_code == IPS_CMD_WRITE_SG) ||
1943             (scb->cmd.basic_io.op_code == IPS_CMD_DCDB_SG))
1944                 return (0);
1945
1946         if (pt->CmdBSize) {
1947                 scb->data_len = pt->CmdBSize;
1948                 scb->data_busaddr = ha->ioctl_busaddr + sizeof (ips_passthru_t);
1949         } else {
1950                 scb->data_busaddr = 0L;
1951         }
1952
1953         if (scb->cmd.dcdb.op_code == IPS_CMD_DCDB)
1954                 scb->cmd.dcdb.dcdb_address = cpu_to_le32(scb->scb_busaddr +
1955                                                          (unsigned long) &scb->
1956                                                          dcdb -
1957                                                          (unsigned long) scb);
1958
1959         if (pt->CmdBSize) {
1960                 if (scb->cmd.dcdb.op_code == IPS_CMD_DCDB)
1961                         scb->dcdb.buffer_pointer =
1962                             cpu_to_le32(scb->data_busaddr);
1963                 else
1964                         scb->cmd.basic_io.sg_addr =
1965                             cpu_to_le32(scb->data_busaddr);
1966         }
1967
1968         /* set timeouts */
1969         if (pt->TimeOut) {
1970                 scb->timeout = pt->TimeOut;
1971
1972                 if (pt->TimeOut <= 10)
1973                         scb->dcdb.cmd_attribute |= IPS_TIMEOUT10;
1974                 else if (pt->TimeOut <= 60)
1975                         scb->dcdb.cmd_attribute |= IPS_TIMEOUT60;
1976                 else
1977                         scb->dcdb.cmd_attribute |= IPS_TIMEOUT20M;
1978         }
1979
1980         /* assume success */
1981         scb->scsi_cmd->result = DID_OK << 16;
1982
1983         /* success */
1984         return (1);
1985 }
1986
1987 /****************************************************************************/
1988 /*                                                                          */
1989 /* Routine Name: ips_cleanup_passthru                                       */
1990 /*                                                                          */
1991 /* Routine Description:                                                     */
1992 /*                                                                          */
1993 /*   Cleanup after a passthru command                                       */
1994 /*                                                                          */
1995 /****************************************************************************/
1996 static void
1997 ips_cleanup_passthru(ips_ha_t * ha, ips_scb_t * scb)
1998 {
1999         ips_passthru_t *pt;
2000
2001         METHOD_TRACE("ips_cleanup_passthru", 1);
2002
2003         if ((!scb) || (!scb->scsi_cmd) || (!scsi_sglist(scb->scsi_cmd))) {
2004                 DEBUG_VAR(1, "(%s%d) couldn't cleanup after passthru",
2005                           ips_name, ha->host_num);
2006
2007                 return;
2008         }
2009         pt = (ips_passthru_t *) ha->ioctl_data;
2010
2011         /* Copy data back to the user */
2012         if (scb->cmd.dcdb.op_code == IPS_CMD_DCDB)      /* Copy DCDB Back to Caller's Area */
2013                 memcpy(&pt->CoppCP.dcdb, &scb->dcdb, sizeof (IPS_DCDB_TABLE));
2014
2015         pt->BasicStatus = scb->basic_status;
2016         pt->ExtendedStatus = scb->extended_status;
2017         pt->AdapterType = ha->ad_type;
2018
2019         if (ha->pcidev->device == IPS_DEVICEID_COPPERHEAD &&
2020             (scb->cmd.flashfw.op_code == IPS_CMD_DOWNLOAD ||
2021              scb->cmd.flashfw.op_code == IPS_CMD_RW_BIOSFW))
2022                 ips_free_flash_copperhead(ha);
2023
2024         ips_scmd_buf_write(scb->scsi_cmd, ha->ioctl_data, ha->ioctl_datasize);
2025 }
2026
2027 /****************************************************************************/
2028 /*                                                                          */
2029 /* Routine Name: ips_host_info                                              */
2030 /*                                                                          */
2031 /* Routine Description:                                                     */
2032 /*                                                                          */
2033 /*   The passthru interface for the driver                                  */
2034 /*                                                                          */
2035 /****************************************************************************/
2036 static int
2037 ips_host_info(ips_ha_t *ha, struct seq_file *m)
2038 {
2039         METHOD_TRACE("ips_host_info", 1);
2040
2041         seq_printf(m, "\nIBM ServeRAID General Information:\n\n");
2042
2043         if ((le32_to_cpu(ha->nvram->signature) == IPS_NVRAM_P5_SIG) &&
2044             (le16_to_cpu(ha->nvram->adapter_type) != 0))
2045                 seq_printf(m, "\tController Type                   : %s\n",
2046                           ips_adapter_name[ha->ad_type - 1]);
2047         else
2048                 seq_printf(m,
2049                           "\tController Type                   : Unknown\n");
2050
2051         if (ha->io_addr)
2052                 seq_printf(m,
2053                           "\tIO region                         : 0x%x (%d bytes)\n",
2054                           ha->io_addr, ha->io_len);
2055
2056         if (ha->mem_addr) {
2057                 seq_printf(m,
2058                           "\tMemory region                     : 0x%x (%d bytes)\n",
2059                           ha->mem_addr, ha->mem_len);
2060                 seq_printf(m,
2061                           "\tShared memory address             : 0x%lx\n",
2062                           (unsigned long)ha->mem_ptr);
2063         }
2064
2065         seq_printf(m, "\tIRQ number                        : %d\n", ha->pcidev->irq);
2066
2067     /* For the Next 3 lines Check for Binary 0 at the end and don't include it if it's there. */
2068     /* That keeps everything happy for "text" operations on the proc file.                    */
2069
2070         if (le32_to_cpu(ha->nvram->signature) == IPS_NVRAM_P5_SIG) {
2071         if (ha->nvram->bios_low[3] == 0) {
2072                 seq_printf(m,
2073                           "\tBIOS Version                      : %c%c%c%c%c%c%c\n",
2074                           ha->nvram->bios_high[0], ha->nvram->bios_high[1],
2075                           ha->nvram->bios_high[2], ha->nvram->bios_high[3],
2076                           ha->nvram->bios_low[0], ha->nvram->bios_low[1],
2077                           ha->nvram->bios_low[2]);
2078
2079         } else {
2080                 seq_printf(m,
2081                           "\tBIOS Version                      : %c%c%c%c%c%c%c%c\n",
2082                           ha->nvram->bios_high[0], ha->nvram->bios_high[1],
2083                           ha->nvram->bios_high[2], ha->nvram->bios_high[3],
2084                           ha->nvram->bios_low[0], ha->nvram->bios_low[1],
2085                           ha->nvram->bios_low[2], ha->nvram->bios_low[3]);
2086         }
2087
2088     }
2089
2090     if (ha->enq->CodeBlkVersion[7] == 0) {
2091         seq_printf(m,
2092                   "\tFirmware Version                  : %c%c%c%c%c%c%c\n",
2093                   ha->enq->CodeBlkVersion[0], ha->enq->CodeBlkVersion[1],
2094                   ha->enq->CodeBlkVersion[2], ha->enq->CodeBlkVersion[3],
2095                   ha->enq->CodeBlkVersion[4], ha->enq->CodeBlkVersion[5],
2096                   ha->enq->CodeBlkVersion[6]);
2097     } else {
2098         seq_printf(m,
2099                   "\tFirmware Version                  : %c%c%c%c%c%c%c%c\n",
2100                   ha->enq->CodeBlkVersion[0], ha->enq->CodeBlkVersion[1],
2101                   ha->enq->CodeBlkVersion[2], ha->enq->CodeBlkVersion[3],
2102                   ha->enq->CodeBlkVersion[4], ha->enq->CodeBlkVersion[5],
2103                   ha->enq->CodeBlkVersion[6], ha->enq->CodeBlkVersion[7]);
2104     }
2105
2106     if (ha->enq->BootBlkVersion[7] == 0) {
2107         seq_printf(m,
2108                   "\tBoot Block Version                : %c%c%c%c%c%c%c\n",
2109                   ha->enq->BootBlkVersion[0], ha->enq->BootBlkVersion[1],
2110                   ha->enq->BootBlkVersion[2], ha->enq->BootBlkVersion[3],
2111                   ha->enq->BootBlkVersion[4], ha->enq->BootBlkVersion[5],
2112                   ha->enq->BootBlkVersion[6]);
2113     } else {
2114         seq_printf(m,
2115                   "\tBoot Block Version                : %c%c%c%c%c%c%c%c\n",
2116                   ha->enq->BootBlkVersion[0], ha->enq->BootBlkVersion[1],
2117                   ha->enq->BootBlkVersion[2], ha->enq->BootBlkVersion[3],
2118                   ha->enq->BootBlkVersion[4], ha->enq->BootBlkVersion[5],
2119                   ha->enq->BootBlkVersion[6], ha->enq->BootBlkVersion[7]);
2120     }
2121
2122         seq_printf(m, "\tDriver Version                    : %s%s\n",
2123                   IPS_VERSION_HIGH, IPS_VERSION_LOW);
2124
2125         seq_printf(m, "\tDriver Build                      : %d\n",
2126                   IPS_BUILD_IDENT);
2127
2128         seq_printf(m, "\tMax Physical Devices              : %d\n",
2129                   ha->enq->ucMaxPhysicalDevices);
2130         seq_printf(m, "\tMax Active Commands               : %d\n",
2131                   ha->max_cmds);
2132         seq_printf(m, "\tCurrent Queued Commands           : %d\n",
2133                   ha->scb_waitlist.count);
2134         seq_printf(m, "\tCurrent Active Commands           : %d\n",
2135                   ha->scb_activelist.count - ha->num_ioctl);
2136         seq_printf(m, "\tCurrent Queued PT Commands        : %d\n",
2137                   ha->copp_waitlist.count);
2138         seq_printf(m, "\tCurrent Active PT Commands        : %d\n",
2139                   ha->num_ioctl);
2140
2141         seq_printf(m, "\n");
2142
2143         return 0;
2144 }
2145
2146 /****************************************************************************/
2147 /*                                                                          */
2148 /* Routine Name: ips_identify_controller                                    */
2149 /*                                                                          */
2150 /* Routine Description:                                                     */
2151 /*                                                                          */
2152 /*   Identify this controller                                               */
2153 /*                                                                          */
2154 /****************************************************************************/
2155 static void
2156 ips_identify_controller(ips_ha_t * ha)
2157 {
2158         METHOD_TRACE("ips_identify_controller", 1);
2159
2160         switch (ha->pcidev->device) {
2161         case IPS_DEVICEID_COPPERHEAD:
2162                 if (ha->pcidev->revision <= IPS_REVID_SERVERAID) {
2163                         ha->ad_type = IPS_ADTYPE_SERVERAID;
2164                 } else if (ha->pcidev->revision == IPS_REVID_SERVERAID2) {
2165                         ha->ad_type = IPS_ADTYPE_SERVERAID2;
2166                 } else if (ha->pcidev->revision == IPS_REVID_NAVAJO) {
2167                         ha->ad_type = IPS_ADTYPE_NAVAJO;
2168                 } else if ((ha->pcidev->revision == IPS_REVID_SERVERAID2)
2169                            && (ha->slot_num == 0)) {
2170                         ha->ad_type = IPS_ADTYPE_KIOWA;
2171                 } else if ((ha->pcidev->revision >= IPS_REVID_CLARINETP1) &&
2172                            (ha->pcidev->revision <= IPS_REVID_CLARINETP3)) {
2173                         if (ha->enq->ucMaxPhysicalDevices == 15)
2174                                 ha->ad_type = IPS_ADTYPE_SERVERAID3L;
2175                         else
2176                                 ha->ad_type = IPS_ADTYPE_SERVERAID3;
2177                 } else if ((ha->pcidev->revision >= IPS_REVID_TROMBONE32) &&
2178                            (ha->pcidev->revision <= IPS_REVID_TROMBONE64)) {
2179                         ha->ad_type = IPS_ADTYPE_SERVERAID4H;
2180                 }
2181                 break;
2182
2183         case IPS_DEVICEID_MORPHEUS:
2184                 switch (ha->pcidev->subsystem_device) {
2185                 case IPS_SUBDEVICEID_4L:
2186                         ha->ad_type = IPS_ADTYPE_SERVERAID4L;
2187                         break;
2188
2189                 case IPS_SUBDEVICEID_4M:
2190                         ha->ad_type = IPS_ADTYPE_SERVERAID4M;
2191                         break;
2192
2193                 case IPS_SUBDEVICEID_4MX:
2194                         ha->ad_type = IPS_ADTYPE_SERVERAID4MX;
2195                         break;
2196
2197                 case IPS_SUBDEVICEID_4LX:
2198                         ha->ad_type = IPS_ADTYPE_SERVERAID4LX;
2199                         break;
2200
2201                 case IPS_SUBDEVICEID_5I2:
2202                         ha->ad_type = IPS_ADTYPE_SERVERAID5I2;
2203                         break;
2204
2205                 case IPS_SUBDEVICEID_5I1:
2206                         ha->ad_type = IPS_ADTYPE_SERVERAID5I1;
2207                         break;
2208                 }
2209
2210                 break;
2211
2212         case IPS_DEVICEID_MARCO:
2213                 switch (ha->pcidev->subsystem_device) {
2214                 case IPS_SUBDEVICEID_6M:
2215                         ha->ad_type = IPS_ADTYPE_SERVERAID6M;
2216                         break;
2217                 case IPS_SUBDEVICEID_6I:
2218                         ha->ad_type = IPS_ADTYPE_SERVERAID6I;
2219                         break;
2220                 case IPS_SUBDEVICEID_7k:
2221                         ha->ad_type = IPS_ADTYPE_SERVERAID7k;
2222                         break;
2223                 case IPS_SUBDEVICEID_7M:
2224                         ha->ad_type = IPS_ADTYPE_SERVERAID7M;
2225                         break;
2226                 }
2227                 break;
2228         }
2229 }
2230
2231 /****************************************************************************/
2232 /*                                                                          */
2233 /* Routine Name: ips_get_bios_version                                       */
2234 /*                                                                          */
2235 /* Routine Description:                                                     */
2236 /*                                                                          */
2237 /*   Get the BIOS revision number                                           */
2238 /*                                                                          */
2239 /****************************************************************************/
2240 static void
2241 ips_get_bios_version(ips_ha_t * ha, int intr)
2242 {
2243         ips_scb_t *scb;
2244         int ret;
2245         uint8_t major;
2246         uint8_t minor;
2247         uint8_t subminor;
2248         uint8_t *buffer;
2249         char hexDigits[] =
2250             { '0', '1', '2', '3', '4', '5', '6', '7', '8', '9', 'A', 'B', 'C',
2251      'D', 'E', 'F' };
2252
2253         METHOD_TRACE("ips_get_bios_version", 1);
2254
2255         major = 0;
2256         minor = 0;
2257
2258         strncpy(ha->bios_version, "       ?", 8);
2259
2260         if (ha->pcidev->device == IPS_DEVICEID_COPPERHEAD) {
2261                 if (IPS_USE_MEMIO(ha)) {
2262                         /* Memory Mapped I/O */
2263
2264                         /* test 1st byte */
2265                         writel(0, ha->mem_ptr + IPS_REG_FLAP);
2266                         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
2267                                 udelay(25);     /* 25 us */
2268
2269                         if (readb(ha->mem_ptr + IPS_REG_FLDP) != 0x55)
2270                                 return;
2271
2272                         writel(1, ha->mem_ptr + IPS_REG_FLAP);
2273                         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
2274                                 udelay(25);     /* 25 us */
2275
2276                         if (readb(ha->mem_ptr + IPS_REG_FLDP) != 0xAA)
2277                                 return;
2278
2279                         /* Get Major version */
2280                         writel(0x1FF, ha->mem_ptr + IPS_REG_FLAP);
2281                         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
2282                                 udelay(25);     /* 25 us */
2283
2284                         major = readb(ha->mem_ptr + IPS_REG_FLDP);
2285
2286                         /* Get Minor version */
2287                         writel(0x1FE, ha->mem_ptr + IPS_REG_FLAP);
2288                         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
2289                                 udelay(25);     /* 25 us */
2290                         minor = readb(ha->mem_ptr + IPS_REG_FLDP);
2291
2292                         /* Get SubMinor version */
2293                         writel(0x1FD, ha->mem_ptr + IPS_REG_FLAP);
2294                         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
2295                                 udelay(25);     /* 25 us */
2296                         subminor = readb(ha->mem_ptr + IPS_REG_FLDP);
2297
2298                 } else {
2299                         /* Programmed I/O */
2300
2301                         /* test 1st byte */
2302                         outl(0, ha->io_addr + IPS_REG_FLAP);
2303                         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
2304                                 udelay(25);     /* 25 us */
2305
2306                         if (inb(ha->io_addr + IPS_REG_FLDP) != 0x55)
2307                                 return;
2308
2309                         outl(1, ha->io_addr + IPS_REG_FLAP);
2310                         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
2311                                 udelay(25);     /* 25 us */
2312
2313                         if (inb(ha->io_addr + IPS_REG_FLDP) != 0xAA)
2314                                 return;
2315
2316                         /* Get Major version */
2317                         outl(0x1FF, ha->io_addr + IPS_REG_FLAP);
2318                         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
2319                                 udelay(25);     /* 25 us */
2320
2321                         major = inb(ha->io_addr + IPS_REG_FLDP);
2322
2323                         /* Get Minor version */
2324                         outl(0x1FE, ha->io_addr + IPS_REG_FLAP);
2325                         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
2326                                 udelay(25);     /* 25 us */
2327
2328                         minor = inb(ha->io_addr + IPS_REG_FLDP);
2329
2330                         /* Get SubMinor version */
2331                         outl(0x1FD, ha->io_addr + IPS_REG_FLAP);
2332                         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
2333                                 udelay(25);     /* 25 us */
2334
2335                         subminor = inb(ha->io_addr + IPS_REG_FLDP);
2336
2337                 }
2338         } else {
2339                 /* Morpheus Family - Send Command to the card */
2340
2341                 buffer = ha->ioctl_data;
2342
2343                 memset(buffer, 0, 0x1000);
2344
2345                 scb = &ha->scbs[ha->max_cmds - 1];
2346
2347                 ips_init_scb(ha, scb);
2348
2349                 scb->timeout = ips_cmd_timeout;
2350                 scb->cdb[0] = IPS_CMD_RW_BIOSFW;
2351
2352                 scb->cmd.flashfw.op_code = IPS_CMD_RW_BIOSFW;
2353                 scb->cmd.flashfw.command_id = IPS_COMMAND_ID(ha, scb);
2354                 scb->cmd.flashfw.type = 1;
2355                 scb->cmd.flashfw.direction = 0;
2356                 scb->cmd.flashfw.count = cpu_to_le32(0x800);
2357                 scb->cmd.flashfw.total_packets = 1;
2358                 scb->cmd.flashfw.packet_num = 0;
2359                 scb->data_len = 0x1000;
2360                 scb->cmd.flashfw.buffer_addr = ha->ioctl_busaddr;
2361
2362                 /* issue the command */
2363                 if (((ret =
2364                       ips_send_wait(ha, scb, ips_cmd_timeout,
2365                                     intr)) == IPS_FAILURE)
2366                     || (ret == IPS_SUCCESS_IMM)
2367                     || ((scb->basic_status & IPS_GSC_STATUS_MASK) > 1)) {
2368                         /* Error occurred */
2369
2370                         return;
2371                 }
2372
2373                 if ((buffer[0xC0] == 0x55) && (buffer[0xC1] == 0xAA)) {
2374                         major = buffer[0x1ff + 0xC0];   /* Offset 0x1ff after the header (0xc0) */
2375                         minor = buffer[0x1fe + 0xC0];   /* Offset 0x1fe after the header (0xc0) */
2376                         subminor = buffer[0x1fd + 0xC0];        /* Offset 0x1fd after the header (0xc0) */
2377                 } else {
2378                         return;
2379                 }
2380         }
2381
2382         ha->bios_version[0] = hexDigits[(major & 0xF0) >> 4];
2383         ha->bios_version[1] = '.';
2384         ha->bios_version[2] = hexDigits[major & 0x0F];
2385         ha->bios_version[3] = hexDigits[subminor];
2386         ha->bios_version[4] = '.';
2387         ha->bios_version[5] = hexDigits[(minor & 0xF0) >> 4];
2388         ha->bios_version[6] = hexDigits[minor & 0x0F];
2389         ha->bios_version[7] = 0;
2390 }
2391
2392 /****************************************************************************/
2393 /*                                                                          */
2394 /* Routine Name: ips_hainit                                                 */
2395 /*                                                                          */
2396 /* Routine Description:                                                     */
2397 /*                                                                          */
2398 /*   Initialize the controller                                              */
2399 /*                                                                          */
2400 /* NOTE: Assumes to be called from with a lock                              */
2401 /*                                                                          */
2402 /****************************************************************************/
2403 static int
2404 ips_hainit(ips_ha_t * ha)
2405 {
2406         int i;
2407         struct timeval tv;
2408
2409         METHOD_TRACE("ips_hainit", 1);
2410
2411         if (!ha)
2412                 return (0);
2413
2414         if (ha->func.statinit)
2415                 (*ha->func.statinit) (ha);
2416
2417         if (ha->func.enableint)
2418                 (*ha->func.enableint) (ha);
2419
2420         /* Send FFDC */
2421         ha->reset_count = 1;
2422         do_gettimeofday(&tv);
2423         ha->last_ffdc = tv.tv_sec;
2424         ips_ffdc_reset(ha, IPS_INTR_IORL);
2425
2426         if (!ips_read_config(ha, IPS_INTR_IORL)) {
2427                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
2428                            "unable to read config from controller.\n");
2429
2430                 return (0);
2431         }
2432         /* end if */
2433         if (!ips_read_adapter_status(ha, IPS_INTR_IORL)) {
2434                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
2435                            "unable to read controller status.\n");
2436
2437                 return (0);
2438         }
2439
2440         /* Identify this controller */
2441         ips_identify_controller(ha);
2442
2443         if (!ips_read_subsystem_parameters(ha, IPS_INTR_IORL)) {
2444                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
2445                            "unable to read subsystem parameters.\n");
2446
2447                 return (0);
2448         }
2449
2450         /* write nvram user page 5 */
2451         if (!ips_write_driver_status(ha, IPS_INTR_IORL)) {
2452                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
2453                            "unable to write driver info to controller.\n");
2454
2455                 return (0);
2456         }
2457
2458         /* If there are Logical Drives and a Reset Occurred, then an EraseStripeLock is Needed */
2459         if ((ha->conf->ucLogDriveCount > 0) && (ha->requires_esl == 1))
2460                 ips_clear_adapter(ha, IPS_INTR_IORL);
2461
2462         /* set limits on SID, LUN, BUS */
2463         ha->ntargets = IPS_MAX_TARGETS + 1;
2464         ha->nlun = 1;
2465         ha->nbus = (ha->enq->ucMaxPhysicalDevices / IPS_MAX_TARGETS) + 1;
2466
2467         switch (ha->conf->logical_drive[0].ucStripeSize) {
2468         case 4:
2469                 ha->max_xfer = 0x10000;
2470                 break;
2471
2472         case 5:
2473                 ha->max_xfer = 0x20000;
2474                 break;
2475
2476         case 6:
2477                 ha->max_xfer = 0x40000;
2478                 break;
2479
2480         case 7:
2481         default:
2482                 ha->max_xfer = 0x80000;
2483                 break;
2484         }
2485
2486         /* setup max concurrent commands */
2487         if (le32_to_cpu(ha->subsys->param[4]) & 0x1) {
2488                 /* Use the new method */
2489                 ha->max_cmds = ha->enq->ucConcurrentCmdCount;
2490         } else {
2491                 /* use the old method */
2492                 switch (ha->conf->logical_drive[0].ucStripeSize) {
2493                 case 4:
2494                         ha->max_cmds = 32;
2495                         break;
2496
2497                 case 5:
2498                         ha->max_cmds = 16;
2499                         break;
2500
2501                 case 6:
2502                         ha->max_cmds = 8;
2503                         break;
2504
2505                 case 7:
2506                 default:
2507                         ha->max_cmds = 4;
2508                         break;
2509                 }
2510         }
2511
2512         /* Limit the Active Commands on a Lite Adapter */
2513         if ((ha->ad_type == IPS_ADTYPE_SERVERAID3L) ||
2514             (ha->ad_type == IPS_ADTYPE_SERVERAID4L) ||
2515             (ha->ad_type == IPS_ADTYPE_SERVERAID4LX)) {
2516                 if ((ha->max_cmds > MaxLiteCmds) && (MaxLiteCmds))
2517                         ha->max_cmds = MaxLiteCmds;
2518         }
2519
2520         /* set controller IDs */
2521         ha->ha_id[0] = IPS_ADAPTER_ID;
2522         for (i = 1; i < ha->nbus; i++) {
2523                 ha->ha_id[i] = ha->conf->init_id[i - 1] & 0x1f;
2524                 ha->dcdb_active[i - 1] = 0;
2525         }
2526
2527         return (1);
2528 }
2529
2530 /****************************************************************************/
2531 /*                                                                          */
2532 /* Routine Name: ips_next                                                   */
2533 /*                                                                          */
2534 /* Routine Description:                                                     */
2535 /*                                                                          */
2536 /*   Take the next command off the queue and send it to the controller      */
2537 /*                                                                          */
2538 /****************************************************************************/
2539 static void
2540 ips_next(ips_ha_t * ha, int intr)
2541 {
2542         ips_scb_t *scb;
2543         struct scsi_cmnd *SC;
2544         struct scsi_cmnd *p;
2545         struct scsi_cmnd *q;
2546         ips_copp_wait_item_t *item;
2547         int ret;
2548         struct Scsi_Host *host;
2549         METHOD_TRACE("ips_next", 1);
2550
2551         if (!ha)
2552                 return;
2553         host = ips_sh[ha->host_num];
2554         /*
2555          * Block access to the queue function so
2556          * this command won't time out
2557          */
2558         if (intr == IPS_INTR_ON)
2559                 spin_lock(host->host_lock);
2560
2561         if ((ha->subsys->param[3] & 0x300000)
2562             && (ha->scb_activelist.count == 0)) {
2563                 struct timeval tv;
2564
2565                 do_gettimeofday(&tv);
2566
2567                 if (tv.tv_sec - ha->last_ffdc > IPS_SECS_8HOURS) {
2568                         ha->last_ffdc = tv.tv_sec;
2569                         ips_ffdc_time(ha);
2570                 }
2571         }
2572
2573         /*
2574          * Send passthru commands
2575          * These have priority over normal I/O
2576          * but shouldn't affect performance too much
2577          * since we limit the number that can be active
2578          * on the card at any one time
2579          */
2580         while ((ha->num_ioctl < IPS_MAX_IOCTL) &&
2581                (ha->copp_waitlist.head) && (scb = ips_getscb(ha))) {
2582
2583                 item = ips_removeq_copp_head(&ha->copp_waitlist);
2584                 ha->num_ioctl++;
2585                 if (intr == IPS_INTR_ON)
2586                         spin_unlock(host->host_lock);
2587                 scb->scsi_cmd = item->scsi_cmd;
2588                 kfree(item);
2589
2590                 ret = ips_make_passthru(ha, scb->scsi_cmd, scb, intr);
2591
2592                 if (intr == IPS_INTR_ON)
2593                         spin_lock(host->host_lock);
2594                 switch (ret) {
2595                 case IPS_FAILURE:
2596                         if (scb->scsi_cmd) {
2597                                 scb->scsi_cmd->result = DID_ERROR << 16;
2598                                 scb->scsi_cmd->scsi_done(scb->scsi_cmd);
2599                         }
2600
2601                         ips_freescb(ha, scb);
2602                         break;
2603                 case IPS_SUCCESS_IMM:
2604                         if (scb->scsi_cmd) {
2605                                 scb->scsi_cmd->result = DID_OK << 16;
2606                                 scb->scsi_cmd->scsi_done(scb->scsi_cmd);
2607                         }
2608
2609                         ips_freescb(ha, scb);
2610                         break;
2611                 default:
2612                         break;
2613                 }               /* end case */
2614
2615                 if (ret != IPS_SUCCESS) {
2616                         ha->num_ioctl--;
2617                         continue;
2618                 }
2619
2620                 ret = ips_send_cmd(ha, scb);
2621
2622                 if (ret == IPS_SUCCESS)
2623                         ips_putq_scb_head(&ha->scb_activelist, scb);
2624                 else
2625                         ha->num_ioctl--;
2626
2627                 switch (ret) {
2628                 case IPS_FAILURE:
2629                         if (scb->scsi_cmd) {
2630                                 scb->scsi_cmd->result = DID_ERROR << 16;
2631                         }
2632
2633                         ips_freescb(ha, scb);
2634                         break;
2635                 case IPS_SUCCESS_IMM:
2636                         ips_freescb(ha, scb);
2637                         break;
2638                 default:
2639                         break;
2640                 }               /* end case */
2641
2642         }
2643
2644         /*
2645          * Send "Normal" I/O commands
2646          */
2647
2648         p = ha->scb_waitlist.head;
2649         while ((p) && (scb = ips_getscb(ha))) {
2650                 if ((scmd_channel(p) > 0)
2651                     && (ha->
2652                         dcdb_active[scmd_channel(p) -
2653                                     1] & (1 << scmd_id(p)))) {
2654                         ips_freescb(ha, scb);
2655                         p = (struct scsi_cmnd *) p->host_scribble;
2656                         continue;
2657                 }
2658
2659                 q = p;
2660                 SC = ips_removeq_wait(&ha->scb_waitlist, q);
2661
2662                 if (intr == IPS_INTR_ON)
2663                         spin_unlock(host->host_lock);   /* Unlock HA after command is taken off queue */
2664
2665                 SC->result = DID_OK;
2666                 SC->host_scribble = NULL;
2667
2668                 scb->target_id = SC->device->id;
2669                 scb->lun = SC->device->lun;
2670                 scb->bus = SC->device->channel;
2671                 scb->scsi_cmd = SC;
2672                 scb->breakup = 0;
2673                 scb->data_len = 0;
2674                 scb->callback = ipsintr_done;
2675                 scb->timeout = ips_cmd_timeout;
2676                 memset(&scb->cmd, 0, 16);
2677
2678                 /* copy in the CDB */
2679                 memcpy(scb->cdb, SC->cmnd, SC->cmd_len);
2680
2681                 scb->sg_count = scsi_dma_map(SC);
2682                 BUG_ON(scb->sg_count < 0);
2683                 if (scb->sg_count) {
2684                         struct scatterlist *sg;
2685                         int i;
2686
2687                         scb->flags |= IPS_SCB_MAP_SG;
2688
2689                         scsi_for_each_sg(SC, sg, scb->sg_count, i) {
2690                                 if (ips_fill_scb_sg_single
2691                                     (ha, sg_dma_address(sg), scb, i,
2692                                      sg_dma_len(sg)) < 0)
2693                                         break;
2694                         }
2695                         scb->dcdb.transfer_length = scb->data_len;
2696                 } else {
2697                         scb->data_busaddr = 0L;
2698                         scb->sg_len = 0;
2699                         scb->data_len = 0;
2700                         scb->dcdb.transfer_length = 0;
2701                 }
2702
2703                 scb->dcdb.cmd_attribute =
2704                     ips_command_direction[scb->scsi_cmd->cmnd[0]];
2705
2706                 /* Allow a WRITE BUFFER Command to Have no Data */
2707                 /* This is Used by Tape Flash Utilites          */
2708                 if ((scb->scsi_cmd->cmnd[0] == WRITE_BUFFER) &&
2709                                 (scb->data_len == 0))
2710                         scb->dcdb.cmd_attribute = 0;
2711
2712                 if (!(scb->dcdb.cmd_attribute & 0x3))
2713                         scb->dcdb.transfer_length = 0;
2714
2715                 if (scb->data_len >= IPS_MAX_XFER) {
2716                         scb->dcdb.cmd_attribute |= IPS_TRANSFER64K;
2717                         scb->dcdb.transfer_length = 0;
2718                 }
2719                 if (intr == IPS_INTR_ON)
2720                         spin_lock(host->host_lock);
2721
2722                 ret = ips_send_cmd(ha, scb);
2723
2724                 switch (ret) {
2725                 case IPS_SUCCESS:
2726                         ips_putq_scb_head(&ha->scb_activelist, scb);
2727                         break;
2728                 case IPS_FAILURE:
2729                         if (scb->scsi_cmd) {
2730                                 scb->scsi_cmd->result = DID_ERROR << 16;
2731                                 scb->scsi_cmd->scsi_done(scb->scsi_cmd);
2732                         }
2733
2734                         if (scb->bus)
2735                                 ha->dcdb_active[scb->bus - 1] &=
2736                                     ~(1 << scb->target_id);
2737
2738                         ips_freescb(ha, scb);
2739                         break;
2740                 case IPS_SUCCESS_IMM:
2741                         if (scb->scsi_cmd)
2742                                 scb->scsi_cmd->scsi_done(scb->scsi_cmd);
2743
2744                         if (scb->bus)
2745                                 ha->dcdb_active[scb->bus - 1] &=
2746                                     ~(1 << scb->target_id);
2747
2748                         ips_freescb(ha, scb);
2749                         break;
2750                 default:
2751                         break;
2752                 }               /* end case */
2753
2754                 p = (struct scsi_cmnd *) p->host_scribble;
2755
2756         }                       /* end while */
2757
2758         if (intr == IPS_INTR_ON)
2759                 spin_unlock(host->host_lock);
2760 }
2761
2762 /****************************************************************************/
2763 /*                                                                          */
2764 /* Routine Name: ips_putq_scb_head                                          */
2765 /*                                                                          */
2766 /* Routine Description:                                                     */
2767 /*                                                                          */
2768 /*   Add an item to the head of the queue                                   */
2769 /*                                                                          */
2770 /* ASSUMED to be called from within the HA lock                             */
2771 /*                                                                          */
2772 /****************************************************************************/
2773 static void
2774 ips_putq_scb_head(ips_scb_queue_t * queue, ips_scb_t * item)
2775 {
2776         METHOD_TRACE("ips_putq_scb_head", 1);
2777
2778         if (!item)
2779                 return;
2780
2781         item->q_next = queue->head;
2782         queue->head = item;
2783
2784         if (!queue->tail)
2785                 queue->tail = item;
2786
2787         queue->count++;
2788 }
2789
2790 /****************************************************************************/
2791 /*                                                                          */
2792 /* Routine Name: ips_removeq_scb_head                                       */
2793 /*                                                                          */
2794 /* Routine Description:                                                     */
2795 /*                                                                          */
2796 /*   Remove the head of the queue                                           */
2797 /*                                                                          */
2798 /* ASSUMED to be called from within the HA lock                             */
2799 /*                                                                          */
2800 /****************************************************************************/
2801 static ips_scb_t *
2802 ips_removeq_scb_head(ips_scb_queue_t * queue)
2803 {
2804         ips_scb_t *item;
2805
2806         METHOD_TRACE("ips_removeq_scb_head", 1);
2807
2808         item = queue->head;
2809
2810         if (!item) {
2811                 return (NULL);
2812         }
2813
2814         queue->head = item->q_next;
2815         item->q_next = NULL;
2816
2817         if (queue->tail == item)
2818                 queue->tail = NULL;
2819
2820         queue->count--;
2821
2822         return (item);
2823 }
2824
2825 /****************************************************************************/
2826 /*                                                                          */
2827 /* Routine Name: ips_removeq_scb                                            */
2828 /*                                                                          */
2829 /* Routine Description:                                                     */
2830 /*                                                                          */
2831 /*   Remove an item from a queue                                            */
2832 /*                                                                          */
2833 /* ASSUMED to be called from within the HA lock                             */
2834 /*                                                                          */
2835 /****************************************************************************/
2836 static ips_scb_t *
2837 ips_removeq_scb(ips_scb_queue_t * queue, ips_scb_t * item)
2838 {
2839         ips_scb_t *p;
2840
2841         METHOD_TRACE("ips_removeq_scb", 1);
2842
2843         if (!item)
2844                 return (NULL);
2845
2846         if (item == queue->head) {
2847                 return (ips_removeq_scb_head(queue));
2848         }
2849
2850         p = queue->head;
2851
2852         while ((p) && (item != p->q_next))
2853                 p = p->q_next;
2854
2855         if (p) {
2856                 /* found a match */
2857                 p->q_next = item->q_next;
2858
2859                 if (!item->q_next)
2860                         queue->tail = p;
2861
2862                 item->q_next = NULL;
2863                 queue->count--;
2864
2865                 return (item);
2866         }
2867
2868         return (NULL);
2869 }
2870
2871 /****************************************************************************/
2872 /*                                                                          */
2873 /* Routine Name: ips_putq_wait_tail                                         */
2874 /*                                                                          */
2875 /* Routine Description:                                                     */
2876 /*                                                                          */
2877 /*   Add an item to the tail of the queue                                   */
2878 /*                                                                          */
2879 /* ASSUMED to be called from within the HA lock                             */
2880 /*                                                                          */
2881 /****************************************************************************/
2882 static void ips_putq_wait_tail(ips_wait_queue_t *queue, struct scsi_cmnd *item)
2883 {
2884         METHOD_TRACE("ips_putq_wait_tail", 1);
2885
2886         if (!item)
2887                 return;
2888
2889         item->host_scribble = NULL;
2890
2891         if (queue->tail)
2892                 queue->tail->host_scribble = (char *) item;
2893
2894         queue->tail = item;
2895
2896         if (!queue->head)
2897                 queue->head = item;
2898
2899         queue->count++;
2900 }
2901
2902 /****************************************************************************/
2903 /*                                                                          */
2904 /* Routine Name: ips_removeq_wait_head                                      */
2905 /*                                                                          */
2906 /* Routine Description:                                                     */
2907 /*                                                                          */
2908 /*   Remove the head of the queue                                           */
2909 /*                                                                          */
2910 /* ASSUMED to be called from within the HA lock                             */
2911 /*                                                                          */
2912 /****************************************************************************/
2913 static struct scsi_cmnd *ips_removeq_wait_head(ips_wait_queue_t *queue)
2914 {
2915         struct scsi_cmnd *item;
2916
2917         METHOD_TRACE("ips_removeq_wait_head", 1);
2918
2919         item = queue->head;
2920
2921         if (!item) {
2922                 return (NULL);
2923         }
2924
2925         queue->head = (struct scsi_cmnd *) item->host_scribble;
2926         item->host_scribble = NULL;
2927
2928         if (queue->tail == item)
2929                 queue->tail = NULL;
2930
2931         queue->count--;
2932
2933         return (item);
2934 }
2935
2936 /****************************************************************************/
2937 /*                                                                          */
2938 /* Routine Name: ips_removeq_wait                                           */
2939 /*                                                                          */
2940 /* Routine Description:                                                     */
2941 /*                                                                          */
2942 /*   Remove an item from a queue                                            */
2943 /*                                                                          */
2944 /* ASSUMED to be called from within the HA lock                             */
2945 /*                                                                          */
2946 /****************************************************************************/
2947 static struct scsi_cmnd *ips_removeq_wait(ips_wait_queue_t *queue,
2948                                           struct scsi_cmnd *item)
2949 {
2950         struct scsi_cmnd *p;
2951
2952         METHOD_TRACE("ips_removeq_wait", 1);
2953
2954         if (!item)
2955                 return (NULL);
2956
2957         if (item == queue->head) {
2958                 return (ips_removeq_wait_head(queue));
2959         }
2960
2961         p = queue->head;
2962
2963         while ((p) && (item != (struct scsi_cmnd *) p->host_scribble))
2964                 p = (struct scsi_cmnd *) p->host_scribble;
2965
2966         if (p) {
2967                 /* found a match */
2968                 p->host_scribble = item->host_scribble;
2969
2970                 if (!item->host_scribble)
2971                         queue->tail = p;
2972
2973                 item->host_scribble = NULL;
2974                 queue->count--;
2975
2976                 return (item);
2977         }
2978
2979         return (NULL);
2980 }
2981
2982 /****************************************************************************/
2983 /*                                                                          */
2984 /* Routine Name: ips_putq_copp_tail                                         */
2985 /*                                                                          */
2986 /* Routine Description:                                                     */
2987 /*                                                                          */
2988 /*   Add an item to the tail of the queue                                   */
2989 /*                                                                          */
2990 /* ASSUMED to be called from within the HA lock                             */
2991 /*                                                                          */
2992 /****************************************************************************/
2993 static void
2994 ips_putq_copp_tail(ips_copp_queue_t * queue, ips_copp_wait_item_t * item)
2995 {
2996         METHOD_TRACE("ips_putq_copp_tail", 1);
2997
2998         if (!item)
2999                 return;
3000
3001         item->next = NULL;
3002
3003         if (queue->tail)
3004                 queue->tail->next = item;
3005
3006         queue->tail = item;
3007
3008         if (!queue->head)
3009                 queue->head = item;
3010
3011         queue->count++;
3012 }
3013
3014 /****************************************************************************/
3015 /*                                                                          */
3016 /* Routine Name: ips_removeq_copp_head                                      */
3017 /*                                                                          */
3018 /* Routine Description:                                                     */
3019 /*                                                                          */
3020 /*   Remove the head of the queue                                           */
3021 /*                                                                          */
3022 /* ASSUMED to be called from within the HA lock                             */
3023 /*                                                                          */
3024 /****************************************************************************/
3025 static ips_copp_wait_item_t *
3026 ips_removeq_copp_head(ips_copp_queue_t * queue)
3027 {
3028         ips_copp_wait_item_t *item;
3029
3030         METHOD_TRACE("ips_removeq_copp_head", 1);
3031
3032         item = queue->head;
3033
3034         if (!item) {
3035                 return (NULL);
3036         }
3037
3038         queue->head = item->next;
3039         item->next = NULL;
3040
3041         if (queue->tail == item)
3042                 queue->tail = NULL;
3043
3044         queue->count--;
3045
3046         return (item);
3047 }
3048
3049 /****************************************************************************/
3050 /*                                                                          */
3051 /* Routine Name: ips_removeq_copp                                           */
3052 /*                                                                          */
3053 /* Routine Description:                                                     */
3054 /*                                                                          */
3055 /*   Remove an item from a queue                                            */
3056 /*                                                                          */
3057 /* ASSUMED to be called from within the HA lock                             */
3058 /*                                                                          */
3059 /****************************************************************************/
3060 static ips_copp_wait_item_t *
3061 ips_removeq_copp(ips_copp_queue_t * queue, ips_copp_wait_item_t * item)
3062 {
3063         ips_copp_wait_item_t *p;
3064
3065         METHOD_TRACE("ips_removeq_copp", 1);
3066
3067         if (!item)
3068                 return (NULL);
3069
3070         if (item == queue->head) {
3071                 return (ips_removeq_copp_head(queue));
3072         }
3073
3074         p = queue->head;
3075
3076         while ((p) && (item != p->next))
3077                 p = p->next;
3078
3079         if (p) {
3080                 /* found a match */
3081                 p->next = item->next;
3082
3083                 if (!item->next)
3084                         queue->tail = p;
3085
3086                 item->next = NULL;
3087                 queue->count--;
3088
3089                 return (item);
3090         }
3091
3092         return (NULL);
3093 }
3094
3095 /****************************************************************************/
3096 /*                                                                          */
3097 /* Routine Name: ipsintr_blocking                                           */
3098 /*                                                                          */
3099 /* Routine Description:                                                     */
3100 /*                                                                          */
3101 /*   Finalize an interrupt for internal commands                            */
3102 /*                                                                          */
3103 /****************************************************************************/
3104 static void
3105 ipsintr_blocking(ips_ha_t * ha, ips_scb_t * scb)
3106 {
3107         METHOD_TRACE("ipsintr_blocking", 2);
3108
3109         ips_freescb(ha, scb);
3110         if ((ha->waitflag == TRUE) && (ha->cmd_in_progress == scb->cdb[0])) {
3111                 ha->waitflag = FALSE;
3112
3113                 return;
3114         }
3115 }
3116
3117 /****************************************************************************/
3118 /*                                                                          */
3119 /* Routine Name: ipsintr_done                                               */
3120 /*                                                                          */
3121 /* Routine Description:                                                     */
3122 /*                                                                          */
3123 /*   Finalize an interrupt for non-internal commands                        */
3124 /*                                                                          */
3125 /****************************************************************************/
3126 static void
3127 ipsintr_done(ips_ha_t * ha, ips_scb_t * scb)
3128 {
3129         METHOD_TRACE("ipsintr_done", 2);
3130
3131         if (!scb) {
3132                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
3133                            "Spurious interrupt; scb NULL.\n");
3134
3135                 return;
3136         }
3137
3138         if (scb->scsi_cmd == NULL) {
3139                 /* unexpected interrupt */
3140                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
3141                            "Spurious interrupt; scsi_cmd not set.\n");
3142
3143                 return;
3144         }
3145
3146         ips_done(ha, scb);
3147 }
3148
3149 /****************************************************************************/
3150 /*                                                                          */
3151 /* Routine Name: ips_done                                                   */
3152 /*                                                                          */
3153 /* Routine Description:                                                     */
3154 /*                                                                          */
3155 /*   Do housekeeping on completed commands                                  */
3156 /*  ASSUMED to be called form within the request lock                       */
3157 /****************************************************************************/
3158 static void
3159 ips_done(ips_ha_t * ha, ips_scb_t * scb)
3160 {
3161         int ret;
3162
3163         METHOD_TRACE("ips_done", 1);
3164
3165         if (!scb)
3166                 return;
3167
3168         if ((scb->scsi_cmd) && (ips_is_passthru(scb->scsi_cmd))) {
3169                 ips_cleanup_passthru(ha, scb);
3170                 ha->num_ioctl--;
3171         } else {
3172                 /*
3173                  * Check to see if this command had too much
3174                  * data and had to be broke up.  If so, queue
3175                  * the rest of the data and continue.
3176                  */
3177                 if ((scb->breakup) || (scb->sg_break)) {
3178                         struct scatterlist *sg;
3179                         int i, sg_dma_index, ips_sg_index = 0;
3180
3181                         /* we had a data breakup */
3182                         scb->data_len = 0;
3183
3184                         sg = scsi_sglist(scb->scsi_cmd);
3185
3186                         /* Spin forward to last dma chunk */
3187                         sg_dma_index = scb->breakup;
3188                         for (i = 0; i < scb->breakup; i++)
3189                                 sg = sg_next(sg);
3190
3191                         /* Take care of possible partial on last chunk */
3192                         ips_fill_scb_sg_single(ha,
3193                                                sg_dma_address(sg),
3194                                                scb, ips_sg_index++,
3195                                                sg_dma_len(sg));
3196
3197                         for (; sg_dma_index < scsi_sg_count(scb->scsi_cmd);
3198                              sg_dma_index++, sg = sg_next(sg)) {
3199                                 if (ips_fill_scb_sg_single
3200                                     (ha,
3201                                      sg_dma_address(sg),
3202                                      scb, ips_sg_index++,
3203                                      sg_dma_len(sg)) < 0)
3204                                         break;
3205                         }
3206
3207                         scb->dcdb.transfer_length = scb->data_len;
3208                         scb->dcdb.cmd_attribute |=
3209                             ips_command_direction[scb->scsi_cmd->cmnd[0]];
3210
3211                         if (!(scb->dcdb.cmd_attribute & 0x3))
3212                                 scb->dcdb.transfer_length = 0;
3213
3214                         if (scb->data_len >= IPS_MAX_XFER) {
3215                                 scb->dcdb.cmd_attribute |= IPS_TRANSFER64K;
3216                                 scb->dcdb.transfer_length = 0;
3217                         }
3218
3219                         ret = ips_send_cmd(ha, scb);
3220
3221                         switch (ret) {
3222                         case IPS_FAILURE:
3223                                 if (scb->scsi_cmd) {
3224                                         scb->scsi_cmd->result = DID_ERROR << 16;
3225                                         scb->scsi_cmd->scsi_done(scb->scsi_cmd);
3226                                 }
3227
3228                                 ips_freescb(ha, scb);
3229                                 break;
3230                         case IPS_SUCCESS_IMM:
3231                                 if (scb->scsi_cmd) {
3232                                         scb->scsi_cmd->result = DID_ERROR << 16;
3233                                         scb->scsi_cmd->scsi_done(scb->scsi_cmd);
3234                                 }
3235
3236                                 ips_freescb(ha, scb);
3237                                 break;
3238                         default:
3239                                 break;
3240                         }       /* end case */
3241
3242                         return;
3243                 }
3244         }                       /* end if passthru */
3245
3246         if (scb->bus) {
3247                 ha->dcdb_active[scb->bus - 1] &= ~(1 << scb->target_id);
3248         }
3249
3250         scb->scsi_cmd->scsi_done(scb->scsi_cmd);
3251
3252         ips_freescb(ha, scb);
3253 }
3254
3255 /****************************************************************************/
3256 /*                                                                          */
3257 /* Routine Name: ips_map_status                                             */
3258 /*                                                                          */
3259 /* Routine Description:                                                     */
3260 /*                                                                          */
3261 /*   Map Controller Error codes to Linux Error Codes                        */
3262 /*                                                                          */
3263 /****************************************************************************/
3264 static int
3265 ips_map_status(ips_ha_t * ha, ips_scb_t * scb, ips_stat_t * sp)
3266 {
3267         int errcode;
3268         int device_error;
3269         uint32_t transfer_len;
3270         IPS_DCDB_TABLE_TAPE *tapeDCDB;
3271         IPS_SCSI_INQ_DATA inquiryData;
3272
3273         METHOD_TRACE("ips_map_status", 1);
3274
3275         if (scb->bus) {
3276                 DEBUG_VAR(2,
3277                           "(%s%d) Physical device error (%d %d %d): %x %x, Sense Key: %x, ASC: %x, ASCQ: %x",
3278                           ips_name, ha->host_num,
3279                           scb->scsi_cmd->device->channel,
3280                           scb->scsi_cmd->device->id, scb->scsi_cmd->device->lun,
3281                           scb->basic_status, scb->extended_status,
3282                           scb->extended_status ==
3283                           IPS_ERR_CKCOND ? scb->dcdb.sense_info[2] & 0xf : 0,
3284                           scb->extended_status ==
3285                           IPS_ERR_CKCOND ? scb->dcdb.sense_info[12] : 0,
3286                           scb->extended_status ==
3287                           IPS_ERR_CKCOND ? scb->dcdb.sense_info[13] : 0);
3288         }
3289
3290         /* default driver error */
3291         errcode = DID_ERROR;
3292         device_error = 0;
3293
3294         switch (scb->basic_status & IPS_GSC_STATUS_MASK) {
3295         case IPS_CMD_TIMEOUT:
3296                 errcode = DID_TIME_OUT;
3297                 break;
3298
3299         case IPS_INVAL_OPCO:
3300         case IPS_INVAL_CMD_BLK:
3301         case IPS_INVAL_PARM_BLK:
3302         case IPS_LD_ERROR:
3303         case IPS_CMD_CMPLT_WERROR:
3304                 break;
3305
3306         case IPS_PHYS_DRV_ERROR:
3307                 switch (scb->extended_status) {
3308                 case IPS_ERR_SEL_TO:
3309                         if (scb->bus)
3310                                 errcode = DID_NO_CONNECT;
3311
3312                         break;
3313
3314                 case IPS_ERR_OU_RUN:
3315                         if ((scb->cmd.dcdb.op_code == IPS_CMD_EXTENDED_DCDB) ||
3316                             (scb->cmd.dcdb.op_code ==
3317                              IPS_CMD_EXTENDED_DCDB_SG)) {
3318                                 tapeDCDB = (IPS_DCDB_TABLE_TAPE *) & scb->dcdb;
3319                                 transfer_len = tapeDCDB->transfer_length;
3320                         } else {
3321                                 transfer_len =
3322                                     (uint32_t) scb->dcdb.transfer_length;
3323                         }
3324
3325                         if ((scb->bus) && (transfer_len < scb->data_len)) {
3326                                 /* Underrun - set default to no error */
3327                                 errcode = DID_OK;
3328
3329                                 /* Restrict access to physical DASD */
3330                                 if (scb->scsi_cmd->cmnd[0] == INQUIRY) {
3331                                     ips_scmd_buf_read(scb->scsi_cmd,
3332                                       &inquiryData, sizeof (inquiryData));
3333                                     if ((inquiryData.DeviceType & 0x1f) == TYPE_DISK) {
3334                                         errcode = DID_TIME_OUT;
3335                                         break;
3336                                     }
3337                                 }
3338                         } else
3339                                 errcode = DID_ERROR;
3340
3341                         break;
3342
3343                 case IPS_ERR_RECOVERY:
3344                         /* don't fail recovered errors */
3345                         if (scb->bus)
3346                                 errcode = DID_OK;
3347
3348                         break;
3349
3350                 case IPS_ERR_HOST_RESET:
3351                 case IPS_ERR_DEV_RESET:
3352                         errcode = DID_RESET;
3353                         break;
3354
3355                 case IPS_ERR_CKCOND:
3356                         if (scb->bus) {
3357                                 if ((scb->cmd.dcdb.op_code ==
3358                                      IPS_CMD_EXTENDED_DCDB)
3359                                     || (scb->cmd.dcdb.op_code ==
3360                                         IPS_CMD_EXTENDED_DCDB_SG)) {
3361                                         tapeDCDB =
3362                                             (IPS_DCDB_TABLE_TAPE *) & scb->dcdb;
3363                                         memcpy(scb->scsi_cmd->sense_buffer,
3364                                                tapeDCDB->sense_info,
3365                                                SCSI_SENSE_BUFFERSIZE);
3366                                 } else {
3367                                         memcpy(scb->scsi_cmd->sense_buffer,
3368                                                scb->dcdb.sense_info,
3369                                                SCSI_SENSE_BUFFERSIZE);
3370                                 }
3371                                 device_error = 2;       /* check condition */
3372                         }
3373
3374                         errcode = DID_OK;
3375
3376                         break;
3377
3378                 default:
3379                         errcode = DID_ERROR;
3380                         break;
3381
3382                 }               /* end switch */
3383         }                       /* end switch */
3384
3385         scb->scsi_cmd->result = device_error | (errcode << 16);
3386
3387         return (1);
3388 }
3389
3390 /****************************************************************************/
3391 /*                                                                          */
3392 /* Routine Name: ips_send_wait                                              */
3393 /*                                                                          */
3394 /* Routine Description:                                                     */
3395 /*                                                                          */
3396 /*   Send a command to the controller and wait for it to return             */
3397 /*                                                                          */
3398 /*   The FFDC Time Stamp use this function for the callback, but doesn't    */
3399 /*   actually need to wait.                                                 */
3400 /****************************************************************************/
3401 static int
3402 ips_send_wait(ips_ha_t * ha, ips_scb_t * scb, int timeout, int intr)
3403 {
3404         int ret;
3405
3406         METHOD_TRACE("ips_send_wait", 1);
3407
3408         if (intr != IPS_FFDC) { /* Won't be Waiting if this is a Time Stamp */
3409                 ha->waitflag = TRUE;
3410                 ha->cmd_in_progress = scb->cdb[0];
3411         }
3412         scb->callback = ipsintr_blocking;
3413         ret = ips_send_cmd(ha, scb);
3414
3415         if ((ret == IPS_FAILURE) || (ret == IPS_SUCCESS_IMM))
3416                 return (ret);
3417
3418         if (intr != IPS_FFDC)   /* Don't Wait around if this is a Time Stamp */
3419                 ret = ips_wait(ha, timeout, intr);
3420
3421         return (ret);
3422 }
3423
3424 /****************************************************************************/
3425 /*                                                                          */
3426 /* Routine Name: ips_scmd_buf_write                                         */
3427 /*                                                                          */
3428 /* Routine Description:                                                     */
3429 /*  Write data to struct scsi_cmnd request_buffer at proper offsets         */
3430 /****************************************************************************/
3431 static void
3432 ips_scmd_buf_write(struct scsi_cmnd *scmd, void *data, unsigned int count)
3433 {
3434         unsigned long flags;
3435
3436         local_irq_save(flags);
3437         scsi_sg_copy_from_buffer(scmd, data, count);
3438         local_irq_restore(flags);
3439 }
3440
3441 /****************************************************************************/
3442 /*                                                                          */
3443 /* Routine Name: ips_scmd_buf_read                                          */
3444 /*                                                                          */
3445 /* Routine Description:                                                     */
3446 /*  Copy data from a struct scsi_cmnd to a new, linear buffer               */
3447 /****************************************************************************/
3448 static void
3449 ips_scmd_buf_read(struct scsi_cmnd *scmd, void *data, unsigned int count)
3450 {
3451         unsigned long flags;
3452
3453         local_irq_save(flags);
3454         scsi_sg_copy_to_buffer(scmd, data, count);
3455         local_irq_restore(flags);
3456 }
3457
3458 /****************************************************************************/
3459 /*                                                                          */
3460 /* Routine Name: ips_send_cmd                                               */
3461 /*                                                                          */
3462 /* Routine Description:                                                     */
3463 /*                                                                          */
3464 /*   Map SCSI commands to ServeRAID commands for logical drives             */
3465 /*                                                                          */
3466 /****************************************************************************/
3467 static int
3468 ips_send_cmd(ips_ha_t * ha, ips_scb_t * scb)
3469 {
3470         int ret;
3471         char *sp;
3472         int device_error;
3473         IPS_DCDB_TABLE_TAPE *tapeDCDB;
3474         int TimeOut;
3475
3476         METHOD_TRACE("ips_send_cmd", 1);
3477
3478         ret = IPS_SUCCESS;
3479
3480         if (!scb->scsi_cmd) {
3481                 /* internal command */
3482
3483                 if (scb->bus > 0) {
3484                         /* Controller commands can't be issued */
3485                         /* to real devices -- fail them        */
3486                         if ((ha->waitflag == TRUE) &&
3487                             (ha->cmd_in_progress == scb->cdb[0])) {
3488                                 ha->waitflag = FALSE;
3489                         }
3490
3491                         return (1);
3492                 }
3493         } else if ((scb->bus == 0) && (!ips_is_passthru(scb->scsi_cmd))) {
3494                 /* command to logical bus -- interpret */
3495                 ret = IPS_SUCCESS_IMM;
3496
3497                 switch (scb->scsi_cmd->cmnd[0]) {
3498                 case ALLOW_MEDIUM_REMOVAL:
3499                 case REZERO_UNIT:
3500                 case ERASE:
3501                 case WRITE_FILEMARKS:
3502                 case SPACE:
3503                         scb->scsi_cmd->result = DID_ERROR << 16;
3504                         break;
3505
3506                 case START_STOP:
3507                         scb->scsi_cmd->result = DID_OK << 16;
3508
3509                 case TEST_UNIT_READY:
3510                 case INQUIRY:
3511                         if (scb->target_id == IPS_ADAPTER_ID) {
3512                                 /*
3513                                  * Either we have a TUR
3514                                  * or we have a SCSI inquiry
3515                                  */
3516                                 if (scb->scsi_cmd->cmnd[0] == TEST_UNIT_READY)
3517                                         scb->scsi_cmd->result = DID_OK << 16;
3518
3519                                 if (scb->scsi_cmd->cmnd[0] == INQUIRY) {
3520                                         IPS_SCSI_INQ_DATA inquiry;
3521
3522                                         memset(&inquiry, 0,
3523                                                sizeof (IPS_SCSI_INQ_DATA));
3524
3525                                         inquiry.DeviceType =
3526                                             IPS_SCSI_INQ_TYPE_PROCESSOR;
3527                                         inquiry.DeviceTypeQualifier =
3528                                             IPS_SCSI_INQ_LU_CONNECTED;
3529                                         inquiry.Version = IPS_SCSI_INQ_REV2;
3530                                         inquiry.ResponseDataFormat =
3531                                             IPS_SCSI_INQ_RD_REV2;
3532                                         inquiry.AdditionalLength = 31;
3533                                         inquiry.Flags[0] =
3534                                             IPS_SCSI_INQ_Address16;
3535                                         inquiry.Flags[1] =
3536                                             IPS_SCSI_INQ_WBus16 |
3537                                             IPS_SCSI_INQ_Sync;
3538                                         strncpy(inquiry.VendorId, "IBM     ",
3539                                                 8);
3540                                         strncpy(inquiry.ProductId,
3541                                                 "SERVERAID       ", 16);
3542                                         strncpy(inquiry.ProductRevisionLevel,
3543                                                 "1.00", 4);
3544
3545                                         ips_scmd_buf_write(scb->scsi_cmd,
3546                                                            &inquiry,
3547                                                            sizeof (inquiry));
3548
3549                                         scb->scsi_cmd->result = DID_OK << 16;
3550                                 }
3551                         } else {
3552                                 scb->cmd.logical_info.op_code = IPS_CMD_GET_LD_INFO;
3553                                 scb->cmd.logical_info.command_id = IPS_COMMAND_ID(ha, scb);
3554                                 scb->cmd.logical_info.reserved = 0;
3555                                 scb->cmd.logical_info.reserved2 = 0;
3556                                 scb->data_len = sizeof (IPS_LD_INFO);
3557                                 scb->data_busaddr = ha->logical_drive_info_dma_addr;
3558                                 scb->flags = 0;
3559                                 scb->cmd.logical_info.buffer_addr = scb->data_busaddr;
3560                                 ret = IPS_SUCCESS;
3561                         }
3562
3563                         break;
3564
3565                 case REQUEST_SENSE:
3566                         ips_reqsen(ha, scb);
3567                         scb->scsi_cmd->result = DID_OK << 16;
3568                         break;
3569
3570                 case READ_6:
3571                 case WRITE_6:
3572                         if (!scb->sg_len) {
3573                                 scb->cmd.basic_io.op_code =
3574                                     (scb->scsi_cmd->cmnd[0] ==
3575                                      READ_6) ? IPS_CMD_READ : IPS_CMD_WRITE;
3576                                 scb->cmd.basic_io.enhanced_sg = 0;
3577                                 scb->cmd.basic_io.sg_addr =
3578                                     cpu_to_le32(scb->data_busaddr);
3579                         } else {
3580                                 scb->cmd.basic_io.op_code =
3581                                     (scb->scsi_cmd->cmnd[0] ==
3582                                      READ_6) ? IPS_CMD_READ_SG :
3583                                     IPS_CMD_WRITE_SG;
3584                                 scb->cmd.basic_io.enhanced_sg =
3585                                     IPS_USE_ENH_SGLIST(ha) ? 0xFF : 0;
3586                                 scb->cmd.basic_io.sg_addr =
3587                                     cpu_to_le32(scb->sg_busaddr);
3588                         }
3589
3590                         scb->cmd.basic_io.segment_4G = 0;
3591                         scb->cmd.basic_io.command_id = IPS_COMMAND_ID(ha, scb);
3592                         scb->cmd.basic_io.log_drv = scb->target_id;
3593                         scb->cmd.basic_io.sg_count = scb->sg_len;
3594
3595                         if (scb->cmd.basic_io.lba)
3596                                 le32_add_cpu(&scb->cmd.basic_io.lba,
3597                                                 le16_to_cpu(scb->cmd.basic_io.
3598                                                             sector_count));
3599                         else
3600                                 scb->cmd.basic_io.lba =
3601                                     (((scb->scsi_cmd->
3602                                        cmnd[1] & 0x1f) << 16) | (scb->scsi_cmd->
3603                                                                  cmnd[2] << 8) |
3604                                      (scb->scsi_cmd->cmnd[3]));
3605
3606                         scb->cmd.basic_io.sector_count =
3607                             cpu_to_le16(scb->data_len / IPS_BLKSIZE);
3608
3609                         if (le16_to_cpu(scb->cmd.basic_io.sector_count) == 0)
3610                                 scb->cmd.basic_io.sector_count =
3611                                     cpu_to_le16(256);
3612
3613                         ret = IPS_SUCCESS;
3614                         break;
3615
3616                 case READ_10:
3617                 case WRITE_10:
3618                         if (!scb->sg_len) {
3619                                 scb->cmd.basic_io.op_code =
3620                                     (scb->scsi_cmd->cmnd[0] ==
3621                                      READ_10) ? IPS_CMD_READ : IPS_CMD_WRITE;
3622                                 scb->cmd.basic_io.enhanced_sg = 0;
3623                                 scb->cmd.basic_io.sg_addr =
3624                                     cpu_to_le32(scb->data_busaddr);
3625                         } else {
3626                                 scb->cmd.basic_io.op_code =
3627                                     (scb->scsi_cmd->cmnd[0] ==
3628                                      READ_10) ? IPS_CMD_READ_SG :
3629                                     IPS_CMD_WRITE_SG;
3630                                 scb->cmd.basic_io.enhanced_sg =
3631                                     IPS_USE_ENH_SGLIST(ha) ? 0xFF : 0;
3632                                 scb->cmd.basic_io.sg_addr =
3633                                     cpu_to_le32(scb->sg_busaddr);
3634                         }
3635
3636                         scb->cmd.basic_io.segment_4G = 0;
3637                         scb->cmd.basic_io.command_id = IPS_COMMAND_ID(ha, scb);
3638                         scb->cmd.basic_io.log_drv = scb->target_id;
3639                         scb->cmd.basic_io.sg_count = scb->sg_len;
3640
3641                         if (scb->cmd.basic_io.lba)
3642                                 le32_add_cpu(&scb->cmd.basic_io.lba,
3643                                                 le16_to_cpu(scb->cmd.basic_io.
3644                                                             sector_count));
3645                         else
3646                                 scb->cmd.basic_io.lba =
3647                                     ((scb->scsi_cmd->cmnd[2] << 24) | (scb->
3648                                                                        scsi_cmd->
3649                                                                        cmnd[3]
3650                                                                        << 16) |
3651                                      (scb->scsi_cmd->cmnd[4] << 8) | scb->
3652                                      scsi_cmd->cmnd[5]);
3653
3654                         scb->cmd.basic_io.sector_count =
3655                             cpu_to_le16(scb->data_len / IPS_BLKSIZE);
3656
3657                         if (cpu_to_le16(scb->cmd.basic_io.sector_count) == 0) {
3658                                 /*
3659                                  * This is a null condition
3660                                  * we don't have to do anything
3661                                  * so just return
3662                                  */
3663                                 scb->scsi_cmd->result = DID_OK << 16;
3664                         } else
3665                                 ret = IPS_SUCCESS;
3666
3667                         break;
3668
3669                 case RESERVE:
3670                 case RELEASE:
3671                         scb->scsi_cmd->result = DID_OK << 16;
3672                         break;
3673
3674                 case MODE_SENSE:
3675                         scb->cmd.basic_io.op_code = IPS_CMD_ENQUIRY;
3676                         scb->cmd.basic_io.command_id = IPS_COMMAND_ID(ha, scb);
3677                         scb->cmd.basic_io.segment_4G = 0;
3678                         scb->cmd.basic_io.enhanced_sg = 0;
3679                         scb->data_len = sizeof (*ha->enq);
3680                         scb->cmd.basic_io.sg_addr = ha->enq_busaddr;
3681                         ret = IPS_SUCCESS;
3682                         break;
3683
3684                 case READ_CAPACITY:
3685                         scb->cmd.logical_info.op_code = IPS_CMD_GET_LD_INFO;
3686                         scb->cmd.logical_info.command_id = IPS_COMMAND_ID(ha, scb);
3687                         scb->cmd.logical_info.reserved = 0;
3688                         scb->cmd.logical_info.reserved2 = 0;
3689                         scb->cmd.logical_info.reserved3 = 0;
3690                         scb->data_len = sizeof (IPS_LD_INFO);
3691                         scb->data_busaddr = ha->logical_drive_info_dma_addr;
3692                         scb->flags = 0;
3693                         scb->cmd.logical_info.buffer_addr = scb->data_busaddr;
3694                         ret = IPS_SUCCESS;
3695                         break;
3696
3697                 case SEND_DIAGNOSTIC:
3698                 case REASSIGN_BLOCKS:
3699                 case FORMAT_UNIT:
3700                 case SEEK_10:
3701                 case VERIFY:
3702                 case READ_DEFECT_DATA:
3703                 case READ_BUFFER:
3704                 case WRITE_BUFFER:
3705                         scb->scsi_cmd->result = DID_OK << 16;
3706                         break;
3707
3708                 default:
3709                         /* Set the Return Info to appear like the Command was */
3710                         /* attempted, a Check Condition occurred, and Sense   */
3711                         /* Data indicating an Invalid CDB OpCode is returned. */
3712                         sp = (char *) scb->scsi_cmd->sense_buffer;
3713
3714                         sp[0] = 0x70;   /* Error Code               */
3715                         sp[2] = ILLEGAL_REQUEST;        /* Sense Key 5 Illegal Req. */
3716                         sp[7] = 0x0A;   /* Additional Sense Length  */
3717                         sp[12] = 0x20;  /* ASC = Invalid OpCode     */
3718                         sp[13] = 0x00;  /* ASCQ                     */
3719
3720                         device_error = 2;       /* Indicate Check Condition */
3721                         scb->scsi_cmd->result = device_error | (DID_OK << 16);
3722                         break;
3723                 }               /* end switch */
3724         }
3725         /* end if */
3726         if (ret == IPS_SUCCESS_IMM)
3727                 return (ret);
3728
3729         /* setup DCDB */
3730         if (scb->bus > 0) {
3731
3732                 /* If we already know the Device is Not there, no need to attempt a Command   */
3733                 /* This also protects an NT FailOver Controller from getting CDB's sent to it */
3734                 if (ha->conf->dev[scb->bus - 1][scb->target_id].ucState == 0) {
3735                         scb->scsi_cmd->result = DID_NO_CONNECT << 16;
3736                         return (IPS_SUCCESS_IMM);
3737                 }
3738
3739                 ha->dcdb_active[scb->bus - 1] |= (1 << scb->target_id);
3740                 scb->cmd.dcdb.command_id = IPS_COMMAND_ID(ha, scb);
3741                 scb->cmd.dcdb.dcdb_address = cpu_to_le32(scb->scb_busaddr +
3742                                                          (unsigned long) &scb->
3743                                                          dcdb -
3744                                                          (unsigned long) scb);
3745                 scb->cmd.dcdb.reserved = 0;
3746                 scb->cmd.dcdb.reserved2 = 0;
3747                 scb->cmd.dcdb.reserved3 = 0;
3748                 scb->cmd.dcdb.segment_4G = 0;
3749                 scb->cmd.dcdb.enhanced_sg = 0;
3750
3751                 TimeOut = scb->scsi_cmd->request->timeout;
3752
3753                 if (ha->subsys->param[4] & 0x00100000) {        /* If NEW Tape DCDB is Supported */
3754                         if (!scb->sg_len) {
3755                                 scb->cmd.dcdb.op_code = IPS_CMD_EXTENDED_DCDB;
3756                         } else {
3757                                 scb->cmd.dcdb.op_code =
3758                                     IPS_CMD_EXTENDED_DCDB_SG;
3759                                 scb->cmd.dcdb.enhanced_sg =
3760                                     IPS_USE_ENH_SGLIST(ha) ? 0xFF : 0;
3761                         }
3762
3763                         tapeDCDB = (IPS_DCDB_TABLE_TAPE *) & scb->dcdb; /* Use Same Data Area as Old DCDB Struct */
3764                         tapeDCDB->device_address =
3765                             ((scb->bus - 1) << 4) | scb->target_id;
3766                         tapeDCDB->cmd_attribute |= IPS_DISCONNECT_ALLOWED;
3767                         tapeDCDB->cmd_attribute &= ~IPS_TRANSFER64K;    /* Always Turn OFF 64K Size Flag */
3768
3769                         if (TimeOut) {
3770                                 if (TimeOut < (10 * HZ))
3771                                         tapeDCDB->cmd_attribute |= IPS_TIMEOUT10;       /* TimeOut is 10 Seconds */
3772                                 else if (TimeOut < (60 * HZ))
3773                                         tapeDCDB->cmd_attribute |= IPS_TIMEOUT60;       /* TimeOut is 60 Seconds */
3774                                 else if (TimeOut < (1200 * HZ))
3775                                         tapeDCDB->cmd_attribute |= IPS_TIMEOUT20M;      /* TimeOut is 20 Minutes */
3776                         }
3777
3778                         tapeDCDB->cdb_length = scb->scsi_cmd->cmd_len;
3779                         tapeDCDB->reserved_for_LUN = 0;
3780                         tapeDCDB->transfer_length = scb->data_len;
3781                         if (scb->cmd.dcdb.op_code == IPS_CMD_EXTENDED_DCDB_SG)
3782                                 tapeDCDB->buffer_pointer =
3783                                     cpu_to_le32(scb->sg_busaddr);
3784                         else
3785                                 tapeDCDB->buffer_pointer =
3786                                     cpu_to_le32(scb->data_busaddr);
3787                         tapeDCDB->sg_count = scb->sg_len;
3788                         tapeDCDB->sense_length = sizeof (tapeDCDB->sense_info);
3789                         tapeDCDB->scsi_status = 0;
3790                         tapeDCDB->reserved = 0;
3791                         memcpy(tapeDCDB->scsi_cdb, scb->scsi_cmd->cmnd,
3792                                scb->scsi_cmd->cmd_len);
3793                 } else {
3794                         if (!scb->sg_len) {
3795                                 scb->cmd.dcdb.op_code = IPS_CMD_DCDB;
3796                         } else {
3797                                 scb->cmd.dcdb.op_code = IPS_CMD_DCDB_SG;
3798                                 scb->cmd.dcdb.enhanced_sg =
3799                                     IPS_USE_ENH_SGLIST(ha) ? 0xFF : 0;
3800                         }
3801
3802                         scb->dcdb.device_address =
3803                             ((scb->bus - 1) << 4) | scb->target_id;
3804                         scb->dcdb.cmd_attribute |= IPS_DISCONNECT_ALLOWED;
3805
3806                         if (TimeOut) {
3807                                 if (TimeOut < (10 * HZ))
3808                                         scb->dcdb.cmd_attribute |= IPS_TIMEOUT10;       /* TimeOut is 10 Seconds */
3809                                 else if (TimeOut < (60 * HZ))
3810                                         scb->dcdb.cmd_attribute |= IPS_TIMEOUT60;       /* TimeOut is 60 Seconds */
3811                                 else if (TimeOut < (1200 * HZ))
3812                                         scb->dcdb.cmd_attribute |= IPS_TIMEOUT20M;      /* TimeOut is 20 Minutes */
3813                         }
3814
3815                         scb->dcdb.transfer_length = scb->data_len;
3816                         if (scb->dcdb.cmd_attribute & IPS_TRANSFER64K)
3817                                 scb->dcdb.transfer_length = 0;
3818                         if (scb->cmd.dcdb.op_code == IPS_CMD_DCDB_SG)
3819                                 scb->dcdb.buffer_pointer =
3820                                     cpu_to_le32(scb->sg_busaddr);
3821                         else
3822                                 scb->dcdb.buffer_pointer =
3823                                     cpu_to_le32(scb->data_busaddr);
3824                         scb->dcdb.cdb_length = scb->scsi_cmd->cmd_len;
3825                         scb->dcdb.sense_length = sizeof (scb->dcdb.sense_info);
3826                         scb->dcdb.sg_count = scb->sg_len;
3827                         scb->dcdb.reserved = 0;
3828                         memcpy(scb->dcdb.scsi_cdb, scb->scsi_cmd->cmnd,
3829                                scb->scsi_cmd->cmd_len);
3830                         scb->dcdb.scsi_status = 0;
3831                         scb->dcdb.reserved2[0] = 0;
3832                         scb->dcdb.reserved2[1] = 0;
3833                         scb->dcdb.reserved2[2] = 0;
3834                 }
3835         }
3836
3837         return ((*ha->func.issue) (ha, scb));
3838 }
3839
3840 /****************************************************************************/
3841 /*                                                                          */
3842 /* Routine Name: ips_chk_status                                             */
3843 /*                                                                          */
3844 /* Routine Description:                                                     */
3845 /*                                                                          */
3846 /*   Check the status of commands to logical drives                         */
3847 /*   Assumed to be called with the HA lock                                  */
3848 /****************************************************************************/
3849 static void
3850 ips_chkstatus(ips_ha_t * ha, IPS_STATUS * pstatus)
3851 {
3852         ips_scb_t *scb;
3853         ips_stat_t *sp;
3854         uint8_t basic_status;
3855         uint8_t ext_status;
3856         int errcode;
3857         IPS_SCSI_INQ_DATA inquiryData;
3858
3859         METHOD_TRACE("ips_chkstatus", 1);
3860
3861         scb = &ha->scbs[pstatus->fields.command_id];
3862         scb->basic_status = basic_status =
3863             pstatus->fields.basic_status & IPS_BASIC_STATUS_MASK;
3864         scb->extended_status = ext_status = pstatus->fields.extended_status;
3865
3866         sp = &ha->sp;
3867         sp->residue_len = 0;
3868         sp->scb_addr = (void *) scb;
3869
3870         /* Remove the item from the active queue */
3871         ips_removeq_scb(&ha->scb_activelist, scb);
3872
3873         if (!scb->scsi_cmd)
3874                 /* internal commands are handled in do_ipsintr */
3875                 return;
3876
3877         DEBUG_VAR(2, "(%s%d) ips_chkstatus: cmd 0x%X id %d (%d %d %d)",
3878                   ips_name,
3879                   ha->host_num,
3880                   scb->cdb[0],
3881                   scb->cmd.basic_io.command_id,
3882                   scb->bus, scb->target_id, scb->lun);
3883
3884         if ((scb->scsi_cmd) && (ips_is_passthru(scb->scsi_cmd)))
3885                 /* passthru - just returns the raw result */
3886                 return;
3887
3888         errcode = DID_OK;
3889
3890         if (((basic_status & IPS_GSC_STATUS_MASK) == IPS_CMD_SUCCESS) ||
3891             ((basic_status & IPS_GSC_STATUS_MASK) == IPS_CMD_RECOVERED_ERROR)) {
3892
3893                 if (scb->bus == 0) {
3894                         if ((basic_status & IPS_GSC_STATUS_MASK) ==
3895                             IPS_CMD_RECOVERED_ERROR) {
3896                                 DEBUG_VAR(1,
3897                                           "(%s%d) Recovered Logical Drive Error OpCode: %x, BSB: %x, ESB: %x",
3898                                           ips_name, ha->host_num,
3899                                           scb->cmd.basic_io.op_code,
3900                                           basic_status, ext_status);
3901                         }
3902
3903                         switch (scb->scsi_cmd->cmnd[0]) {
3904                         case ALLOW_MEDIUM_REMOVAL:
3905                         case REZERO_UNIT:
3906                         case ERASE:
3907                         case WRITE_FILEMARKS:
3908                         case SPACE:
3909                                 errcode = DID_ERROR;
3910                                 break;
3911
3912                         case START_STOP:
3913                                 break;
3914
3915                         case TEST_UNIT_READY:
3916                                 if (!ips_online(ha, scb)) {
3917                                         errcode = DID_TIME_OUT;
3918                                 }
3919                                 break;
3920
3921                         case INQUIRY:
3922                                 if (ips_online(ha, scb)) {
3923                                         ips_inquiry(ha, scb);
3924                                 } else {
3925                                         errcode = DID_TIME_OUT;
3926                                 }
3927                                 break;
3928
3929                         case REQUEST_SENSE:
3930                                 ips_reqsen(ha, scb);
3931                                 break;
3932
3933                         case READ_6:
3934                         case WRITE_6:
3935                         case READ_10:
3936                         case WRITE_10:
3937                         case RESERVE:
3938                         case RELEASE:
3939                                 break;
3940
3941                         case MODE_SENSE:
3942                                 if (!ips_online(ha, scb)
3943                                     || !ips_msense(ha, scb)) {
3944                                         errcode = DID_ERROR;
3945                                 }
3946                                 break;
3947
3948                         case READ_CAPACITY:
3949                                 if (ips_online(ha, scb))
3950                                         ips_rdcap(ha, scb);
3951                                 else {
3952                                         errcode = DID_TIME_OUT;
3953                                 }
3954                                 break;
3955
3956                         case SEND_DIAGNOSTIC:
3957                         case REASSIGN_BLOCKS:
3958                                 break;
3959
3960                         case FORMAT_UNIT:
3961                                 errcode = DID_ERROR;
3962                                 break;
3963
3964                         case SEEK_10:
3965                         case VERIFY:
3966                         case READ_DEFECT_DATA:
3967                         case READ_BUFFER:
3968                         case WRITE_BUFFER:
3969                                 break;
3970
3971                         default:
3972                                 errcode = DID_ERROR;
3973                         }       /* end switch */
3974
3975                         scb->scsi_cmd->result = errcode << 16;
3976                 } else {        /* bus == 0 */
3977                         /* restrict access to physical drives */
3978                         if (scb->scsi_cmd->cmnd[0] == INQUIRY) {
3979                             ips_scmd_buf_read(scb->scsi_cmd,
3980                                   &inquiryData, sizeof (inquiryData));
3981                             if ((inquiryData.DeviceType & 0x1f) == TYPE_DISK)
3982                                 scb->scsi_cmd->result = DID_TIME_OUT << 16;
3983                         }
3984                 }               /* else */
3985         } else {                /* recovered error / success */
3986                 if (scb->bus == 0) {
3987                         DEBUG_VAR(1,
3988                                   "(%s%d) Unrecovered Logical Drive Error OpCode: %x, BSB: %x, ESB: %x",
3989                                   ips_name, ha->host_num,
3990                                   scb->cmd.basic_io.op_code, basic_status,
3991                                   ext_status);
3992                 }
3993
3994                 ips_map_status(ha, scb, sp);
3995         }                       /* else */
3996 }
3997
3998 /****************************************************************************/
3999 /*                                                                          */
4000 /* Routine Name: ips_online                                                 */
4001 /*                                                                          */
4002 /* Routine Description:                                                     */
4003 /*                                                                          */
4004 /*   Determine if a logical drive is online                                 */
4005 /*                                                                          */
4006 /****************************************************************************/
4007 static int
4008 ips_online(ips_ha_t * ha, ips_scb_t * scb)
4009 {
4010         METHOD_TRACE("ips_online", 1);
4011
4012         if (scb->target_id >= IPS_MAX_LD)
4013                 return (0);
4014
4015         if ((scb->basic_status & IPS_GSC_STATUS_MASK) > 1) {
4016                 memset(ha->logical_drive_info, 0, sizeof (IPS_LD_INFO));
4017                 return (0);
4018         }
4019
4020         if (ha->logical_drive_info->drive_info[scb->target_id].state !=
4021             IPS_LD_OFFLINE
4022             && ha->logical_drive_info->drive_info[scb->target_id].state !=
4023             IPS_LD_FREE
4024             && ha->logical_drive_info->drive_info[scb->target_id].state !=
4025             IPS_LD_CRS
4026             && ha->logical_drive_info->drive_info[scb->target_id].state !=
4027             IPS_LD_SYS)
4028                 return (1);
4029         else
4030                 return (0);
4031 }
4032
4033 /****************************************************************************/
4034 /*                                                                          */
4035 /* Routine Name: ips_inquiry                                                */
4036 /*                                                                          */
4037 /* Routine Description:                                                     */
4038 /*                                                                          */
4039 /*   Simulate an inquiry command to a logical drive                         */
4040 /*                                                                          */
4041 /****************************************************************************/
4042 static int
4043 ips_inquiry(ips_ha_t * ha, ips_scb_t * scb)
4044 {
4045         IPS_SCSI_INQ_DATA inquiry;
4046
4047         METHOD_TRACE("ips_inquiry", 1);
4048
4049         memset(&inquiry, 0, sizeof (IPS_SCSI_INQ_DATA));
4050
4051         inquiry.DeviceType = IPS_SCSI_INQ_TYPE_DASD;
4052         inquiry.DeviceTypeQualifier = IPS_SCSI_INQ_LU_CONNECTED;
4053         inquiry.Version = IPS_SCSI_INQ_REV2;
4054         inquiry.ResponseDataFormat = IPS_SCSI_INQ_RD_REV2;
4055         inquiry.AdditionalLength = 31;
4056         inquiry.Flags[0] = IPS_SCSI_INQ_Address16;
4057         inquiry.Flags[1] =
4058             IPS_SCSI_INQ_WBus16 | IPS_SCSI_INQ_Sync | IPS_SCSI_INQ_CmdQue;
4059         strncpy(inquiry.VendorId, "IBM     ", 8);
4060         strncpy(inquiry.ProductId, "SERVERAID       ", 16);
4061         strncpy(inquiry.ProductRevisionLevel, "1.00", 4);
4062
4063         ips_scmd_buf_write(scb->scsi_cmd, &inquiry, sizeof (inquiry));
4064
4065         return (1);
4066 }
4067
4068 /****************************************************************************/
4069 /*                                                                          */
4070 /* Routine Name: ips_rdcap                                                  */
4071 /*                                                                          */
4072 /* Routine Description:                                                     */
4073 /*                                                                          */
4074 /*   Simulate a read capacity command to a logical drive                    */
4075 /*                                                                          */
4076 /****************************************************************************/
4077 static int
4078 ips_rdcap(ips_ha_t * ha, ips_scb_t * scb)
4079 {
4080         IPS_SCSI_CAPACITY cap;
4081
4082         METHOD_TRACE("ips_rdcap", 1);
4083
4084         if (scsi_bufflen(scb->scsi_cmd) < 8)
4085                 return (0);
4086
4087         cap.lba =
4088             cpu_to_be32(le32_to_cpu
4089                         (ha->logical_drive_info->
4090                          drive_info[scb->target_id].sector_count) - 1);
4091         cap.len = cpu_to_be32((uint32_t) IPS_BLKSIZE);
4092
4093         ips_scmd_buf_write(scb->scsi_cmd, &cap, sizeof (cap));
4094
4095         return (1);
4096 }
4097
4098 /****************************************************************************/
4099 /*                                                                          */
4100 /* Routine Name: ips_msense                                                 */
4101 /*                                                                          */
4102 /* Routine Description:                                                     */
4103 /*                                                                          */
4104 /*   Simulate a mode sense command to a logical drive                       */
4105 /*                                                                          */
4106 /****************************************************************************/
4107 static int
4108 ips_msense(ips_ha_t * ha, ips_scb_t * scb)
4109 {
4110         uint16_t heads;
4111         uint16_t sectors;
4112         uint32_t cylinders;
4113         IPS_SCSI_MODE_PAGE_DATA mdata;
4114
4115         METHOD_TRACE("ips_msense", 1);
4116
4117         if (le32_to_cpu(ha->enq->ulDriveSize[scb->target_id]) > 0x400000 &&
4118             (ha->enq->ucMiscFlag & 0x8) == 0) {
4119                 heads = IPS_NORM_HEADS;
4120                 sectors = IPS_NORM_SECTORS;
4121         } else {
4122                 heads = IPS_COMP_HEADS;
4123                 sectors = IPS_COMP_SECTORS;
4124         }
4125
4126         cylinders =
4127             (le32_to_cpu(ha->enq->ulDriveSize[scb->target_id]) -
4128              1) / (heads * sectors);
4129
4130         memset(&mdata, 0, sizeof (IPS_SCSI_MODE_PAGE_DATA));
4131
4132         mdata.hdr.BlockDescLength = 8;
4133
4134         switch (scb->scsi_cmd->cmnd[2] & 0x3f) {
4135         case 0x03:              /* page 3 */
4136                 mdata.pdata.pg3.PageCode = 3;
4137                 mdata.pdata.pg3.PageLength = sizeof (IPS_SCSI_MODE_PAGE3);
4138                 mdata.hdr.DataLength =
4139                     3 + mdata.hdr.BlockDescLength + mdata.pdata.pg3.PageLength;
4140                 mdata.pdata.pg3.TracksPerZone = 0;
4141                 mdata.pdata.pg3.AltSectorsPerZone = 0;
4142                 mdata.pdata.pg3.AltTracksPerZone = 0;
4143                 mdata.pdata.pg3.AltTracksPerVolume = 0;
4144                 mdata.pdata.pg3.SectorsPerTrack = cpu_to_be16(sectors);
4145                 mdata.pdata.pg3.BytesPerSector = cpu_to_be16(IPS_BLKSIZE);
4146                 mdata.pdata.pg3.Interleave = cpu_to_be16(1);
4147                 mdata.pdata.pg3.TrackSkew = 0;
4148                 mdata.pdata.pg3.CylinderSkew = 0;
4149                 mdata.pdata.pg3.flags = IPS_SCSI_MP3_SoftSector;
4150                 break;
4151
4152         case 0x4:
4153                 mdata.pdata.pg4.PageCode = 4;
4154                 mdata.pdata.pg4.PageLength = sizeof (IPS_SCSI_MODE_PAGE4);
4155                 mdata.hdr.DataLength =
4156                     3 + mdata.hdr.BlockDescLength + mdata.pdata.pg4.PageLength;
4157                 mdata.pdata.pg4.CylindersHigh =
4158                     cpu_to_be16((cylinders >> 8) & 0xFFFF);
4159                 mdata.pdata.pg4.CylindersLow = (cylinders & 0xFF);
4160                 mdata.pdata.pg4.Heads = heads;
4161                 mdata.pdata.pg4.WritePrecompHigh = 0;
4162                 mdata.pdata.pg4.WritePrecompLow = 0;
4163                 mdata.pdata.pg4.ReducedWriteCurrentHigh = 0;
4164                 mdata.pdata.pg4.ReducedWriteCurrentLow = 0;
4165                 mdata.pdata.pg4.StepRate = cpu_to_be16(1);
4166                 mdata.pdata.pg4.LandingZoneHigh = 0;
4167                 mdata.pdata.pg4.LandingZoneLow = 0;
4168                 mdata.pdata.pg4.flags = 0;
4169                 mdata.pdata.pg4.RotationalOffset = 0;
4170                 mdata.pdata.pg4.MediumRotationRate = 0;
4171                 break;
4172         case 0x8:
4173                 mdata.pdata.pg8.PageCode = 8;
4174                 mdata.pdata.pg8.PageLength = sizeof (IPS_SCSI_MODE_PAGE8);
4175                 mdata.hdr.DataLength =
4176                     3 + mdata.hdr.BlockDescLength + mdata.pdata.pg8.PageLength;
4177                 /* everything else is left set to 0 */
4178                 break;
4179
4180         default:
4181                 return (0);
4182         }                       /* end switch */
4183
4184         ips_scmd_buf_write(scb->scsi_cmd, &mdata, sizeof (mdata));
4185
4186         return (1);
4187 }
4188
4189 /****************************************************************************/
4190 /*                                                                          */
4191 /* Routine Name: ips_reqsen                                                 */
4192 /*                                                                          */
4193 /* Routine Description:                                                     */
4194 /*                                                                          */
4195 /*   Simulate a request sense command to a logical drive                    */
4196 /*                                                                          */
4197 /****************************************************************************/
4198 static int
4199 ips_reqsen(ips_ha_t * ha, ips_scb_t * scb)
4200 {
4201         IPS_SCSI_REQSEN reqsen;
4202
4203         METHOD_TRACE("ips_reqsen", 1);
4204
4205         memset(&reqsen, 0, sizeof (IPS_SCSI_REQSEN));
4206
4207         reqsen.ResponseCode =
4208             IPS_SCSI_REQSEN_VALID | IPS_SCSI_REQSEN_CURRENT_ERR;
4209         reqsen.AdditionalLength = 10;
4210         reqsen.AdditionalSenseCode = IPS_SCSI_REQSEN_NO_SENSE;
4211         reqsen.AdditionalSenseCodeQual = IPS_SCSI_REQSEN_NO_SENSE;
4212
4213         ips_scmd_buf_write(scb->scsi_cmd, &reqsen, sizeof (reqsen));
4214
4215         return (1);
4216 }
4217
4218 /****************************************************************************/
4219 /*                                                                          */
4220 /* Routine Name: ips_free                                                   */
4221 /*                                                                          */
4222 /* Routine Description:                                                     */
4223 /*                                                                          */
4224 /*   Free any allocated space for this controller                           */
4225 /*                                                                          */
4226 /****************************************************************************/
4227 static void
4228 ips_free(ips_ha_t * ha)
4229 {
4230
4231         METHOD_TRACE("ips_free", 1);
4232
4233         if (ha) {
4234                 if (ha->enq) {
4235                         pci_free_consistent(ha->pcidev, sizeof(IPS_ENQ),
4236                                             ha->enq, ha->enq_busaddr);
4237                         ha->enq = NULL;
4238                 }
4239
4240                 kfree(ha->conf);
4241                 ha->conf = NULL;
4242
4243                 if (ha->adapt) {
4244                         pci_free_consistent(ha->pcidev,
4245                                             sizeof (IPS_ADAPTER) +
4246                                             sizeof (IPS_IO_CMD), ha->adapt,
4247                                             ha->adapt->hw_status_start);
4248                         ha->adapt = NULL;
4249                 }
4250
4251                 if (ha->logical_drive_info) {
4252                         pci_free_consistent(ha->pcidev,
4253                                             sizeof (IPS_LD_INFO),
4254                                             ha->logical_drive_info,
4255                                             ha->logical_drive_info_dma_addr);
4256                         ha->logical_drive_info = NULL;
4257                 }
4258
4259                 kfree(ha->nvram);
4260                 ha->nvram = NULL;
4261
4262                 kfree(ha->subsys);
4263                 ha->subsys = NULL;
4264
4265                 if (ha->ioctl_data) {
4266                         pci_free_consistent(ha->pcidev, ha->ioctl_len,
4267                                             ha->ioctl_data, ha->ioctl_busaddr);
4268                         ha->ioctl_data = NULL;
4269                         ha->ioctl_datasize = 0;
4270                         ha->ioctl_len = 0;
4271                 }
4272                 ips_deallocatescbs(ha, ha->max_cmds);
4273
4274                 /* free memory mapped (if applicable) */
4275                 if (ha->mem_ptr) {
4276                         iounmap(ha->ioremap_ptr);
4277                         ha->ioremap_ptr = NULL;
4278                         ha->mem_ptr = NULL;
4279                 }
4280
4281                 ha->mem_addr = 0;
4282
4283         }
4284 }
4285
4286 /****************************************************************************/
4287 /*                                                                          */
4288 /* Routine Name: ips_deallocatescbs                                         */
4289 /*                                                                          */
4290 /* Routine Description:                                                     */
4291 /*                                                                          */
4292 /*   Free the command blocks                                                */
4293 /*                                                                          */
4294 /****************************************************************************/
4295 static int
4296 ips_deallocatescbs(ips_ha_t * ha, int cmds)
4297 {
4298         if (ha->scbs) {
4299                 pci_free_consistent(ha->pcidev,
4300                                     IPS_SGLIST_SIZE(ha) * IPS_MAX_SG * cmds,
4301                                     ha->scbs->sg_list.list,
4302                                     ha->scbs->sg_busaddr);
4303                 pci_free_consistent(ha->pcidev, sizeof (ips_scb_t) * cmds,
4304                                     ha->scbs, ha->scbs->scb_busaddr);
4305                 ha->scbs = NULL;
4306         }                       /* end if */
4307         return 1;
4308 }
4309
4310 /****************************************************************************/
4311 /*                                                                          */
4312 /* Routine Name: ips_allocatescbs                                           */
4313 /*                                                                          */
4314 /* Routine Description:                                                     */
4315 /*                                                                          */
4316 /*   Allocate the command blocks                                            */
4317 /*                                                                          */
4318 /****************************************************************************/
4319 static int
4320 ips_allocatescbs(ips_ha_t * ha)
4321 {
4322         ips_scb_t *scb_p;
4323         IPS_SG_LIST ips_sg;
4324         int i;
4325         dma_addr_t command_dma, sg_dma;
4326
4327         METHOD_TRACE("ips_allocatescbs", 1);
4328
4329         /* Allocate memory for the SCBs */
4330         ha->scbs =
4331             pci_alloc_consistent(ha->pcidev, ha->max_cmds * sizeof (ips_scb_t),
4332                                  &command_dma);
4333         if (ha->scbs == NULL)
4334                 return 0;
4335         ips_sg.list =
4336             pci_alloc_consistent(ha->pcidev,
4337                                  IPS_SGLIST_SIZE(ha) * IPS_MAX_SG *
4338                                  ha->max_cmds, &sg_dma);
4339         if (ips_sg.list == NULL) {
4340                 pci_free_consistent(ha->pcidev,
4341                                     ha->max_cmds * sizeof (ips_scb_t), ha->scbs,
4342                                     command_dma);
4343                 return 0;
4344         }
4345
4346         memset(ha->scbs, 0, ha->max_cmds * sizeof (ips_scb_t));
4347
4348         for (i = 0; i < ha->max_cmds; i++) {
4349                 scb_p = &ha->scbs[i];
4350                 scb_p->scb_busaddr = command_dma + sizeof (ips_scb_t) * i;
4351                 /* set up S/G list */
4352                 if (IPS_USE_ENH_SGLIST(ha)) {
4353                         scb_p->sg_list.enh_list =
4354                             ips_sg.enh_list + i * IPS_MAX_SG;
4355                         scb_p->sg_busaddr =
4356                             sg_dma + IPS_SGLIST_SIZE(ha) * IPS_MAX_SG * i;
4357                 } else {
4358                         scb_p->sg_list.std_list =
4359                             ips_sg.std_list + i * IPS_MAX_SG;
4360                         scb_p->sg_busaddr =
4361                             sg_dma + IPS_SGLIST_SIZE(ha) * IPS_MAX_SG * i;
4362                 }
4363
4364                 /* add to the free list */
4365                 if (i < ha->max_cmds - 1) {
4366                         scb_p->q_next = ha->scb_freelist;
4367                         ha->scb_freelist = scb_p;
4368                 }
4369         }
4370
4371         /* success */
4372         return (1);
4373 }
4374
4375 /****************************************************************************/
4376 /*                                                                          */
4377 /* Routine Name: ips_init_scb                                               */
4378 /*                                                                          */
4379 /* Routine Description:                                                     */
4380 /*                                                                          */
4381 /*   Initialize a CCB to default values                                     */
4382 /*                                                                          */
4383 /****************************************************************************/
4384 static void
4385 ips_init_scb(ips_ha_t * ha, ips_scb_t * scb)
4386 {
4387         IPS_SG_LIST sg_list;
4388         uint32_t cmd_busaddr, sg_busaddr;
4389         METHOD_TRACE("ips_init_scb", 1);
4390
4391         if (scb == NULL)
4392                 return;
4393
4394         sg_list.list = scb->sg_list.list;
4395         cmd_busaddr = scb->scb_busaddr;
4396         sg_busaddr = scb->sg_busaddr;
4397         /* zero fill */
4398         memset(scb, 0, sizeof (ips_scb_t));
4399         memset(ha->dummy, 0, sizeof (IPS_IO_CMD));
4400
4401         /* Initialize dummy command bucket */
4402         ha->dummy->op_code = 0xFF;
4403         ha->dummy->ccsar = cpu_to_le32(ha->adapt->hw_status_start
4404                                        + sizeof (IPS_ADAPTER));
4405         ha->dummy->command_id = IPS_MAX_CMDS;
4406
4407         /* set bus address of scb */
4408         scb->scb_busaddr = cmd_busaddr;
4409         scb->sg_busaddr = sg_busaddr;
4410         scb->sg_list.list = sg_list.list;
4411
4412         /* Neptune Fix */
4413         scb->cmd.basic_io.cccr = cpu_to_le32((uint32_t) IPS_BIT_ILE);
4414         scb->cmd.basic_io.ccsar = cpu_to_le32(ha->adapt->hw_status_start
4415                                               + sizeof (IPS_ADAPTER));
4416 }
4417
4418 /****************************************************************************/
4419 /*                                                                          */
4420 /* Routine Name: ips_get_scb                                                */
4421 /*                                                                          */
4422 /* Routine Description:                                                     */
4423 /*                                                                          */
4424 /*   Initialize a CCB to default values                                     */
4425 /*                                                                          */
4426 /* ASSUMED to be called from within a lock                                 */
4427 /*                                                                          */
4428 /****************************************************************************/
4429 static ips_scb_t *
4430 ips_getscb(ips_ha_t * ha)
4431 {
4432         ips_scb_t *scb;
4433
4434         METHOD_TRACE("ips_getscb", 1);
4435
4436         if ((scb = ha->scb_freelist) == NULL) {
4437
4438                 return (NULL);
4439         }
4440
4441         ha->scb_freelist = scb->q_next;
4442         scb->flags = 0;
4443         scb->q_next = NULL;
4444
4445         ips_init_scb(ha, scb);
4446
4447         return (scb);
4448 }
4449
4450 /****************************************************************************/
4451 /*                                                                          */
4452 /* Routine Name: ips_free_scb                                               */
4453 /*                                                                          */
4454 /* Routine Description:                                                     */
4455 /*                                                                          */
4456 /*   Return an unused CCB back to the free list                             */
4457 /*                                                                          */
4458 /* ASSUMED to be called from within a lock                                  */
4459 /*                                                                          */
4460 /****************************************************************************/
4461 static void
4462 ips_freescb(ips_ha_t * ha, ips_scb_t * scb)
4463 {
4464
4465         METHOD_TRACE("ips_freescb", 1);
4466         if (scb->flags & IPS_SCB_MAP_SG)
4467                 scsi_dma_unmap(scb->scsi_cmd);
4468         else if (scb->flags & IPS_SCB_MAP_SINGLE)
4469                 pci_unmap_single(ha->pcidev, scb->data_busaddr, scb->data_len,
4470                                  IPS_DMA_DIR(scb));
4471
4472         /* check to make sure this is not our "special" scb */
4473         if (IPS_COMMAND_ID(ha, scb) < (ha->max_cmds - 1)) {
4474                 scb->q_next = ha->scb_freelist;
4475                 ha->scb_freelist = scb;
4476         }
4477 }
4478
4479 /****************************************************************************/
4480 /*                                                                          */
4481 /* Routine Name: ips_isinit_copperhead                                      */
4482 /*                                                                          */
4483 /* Routine Description:                                                     */
4484 /*                                                                          */
4485 /*   Is controller initialized ?                                            */
4486 /*                                                                          */
4487 /****************************************************************************/
4488 static int
4489 ips_isinit_copperhead(ips_ha_t * ha)
4490 {
4491         uint8_t scpr;
4492         uint8_t isr;
4493
4494         METHOD_TRACE("ips_isinit_copperhead", 1);
4495
4496         isr = inb(ha->io_addr + IPS_REG_HISR);
4497         scpr = inb(ha->io_addr + IPS_REG_SCPR);
4498
4499         if (((isr & IPS_BIT_EI) == 0) && ((scpr & IPS_BIT_EBM) == 0))
4500                 return (0);
4501         else
4502                 return (1);
4503 }
4504
4505 /****************************************************************************/
4506 /*                                                                          */
4507 /* Routine Name: ips_isinit_copperhead_memio                                */
4508 /*                                                                          */
4509 /* Routine Description:                                                     */
4510 /*                                                                          */
4511 /*   Is controller initialized ?                                            */
4512 /*                                                                          */
4513 /****************************************************************************/
4514 static int
4515 ips_isinit_copperhead_memio(ips_ha_t * ha)
4516 {
4517         uint8_t isr = 0;
4518         uint8_t scpr;
4519
4520         METHOD_TRACE("ips_is_init_copperhead_memio", 1);
4521
4522         isr = readb(ha->mem_ptr + IPS_REG_HISR);
4523         scpr = readb(ha->mem_ptr + IPS_REG_SCPR);
4524
4525         if (((isr & IPS_BIT_EI) == 0) && ((scpr & IPS_BIT_EBM) == 0))
4526                 return (0);
4527         else
4528                 return (1);
4529 }
4530
4531 /****************************************************************************/
4532 /*                                                                          */
4533 /* Routine Name: ips_isinit_morpheus                                        */
4534 /*                                                                          */
4535 /* Routine Description:                                                     */
4536 /*                                                                          */
4537 /*   Is controller initialized ?                                            */
4538 /*                                                                          */
4539 /****************************************************************************/
4540 static int
4541 ips_isinit_morpheus(ips_ha_t * ha)
4542 {
4543         uint32_t post;
4544         uint32_t bits;
4545
4546         METHOD_TRACE("ips_is_init_morpheus", 1);
4547
4548         if (ips_isintr_morpheus(ha))
4549             ips_flush_and_reset(ha);
4550
4551         post = readl(ha->mem_ptr + IPS_REG_I960_MSG0);
4552         bits = readl(ha->mem_ptr + IPS_REG_I2O_HIR);
4553
4554         if (post == 0)
4555                 return (0);
4556         else if (bits & 0x3)
4557                 return (0);
4558         else
4559                 return (1);
4560 }
4561
4562 /****************************************************************************/
4563 /*                                                                          */
4564 /* Routine Name: ips_flush_and_reset                                        */
4565 /*                                                                          */
4566 /* Routine Description:                                                     */
4567 /*                                                                          */
4568 /*   Perform cleanup ( FLUSH and RESET ) when the adapter is in an unknown  */
4569 /*   state ( was trying to INIT and an interrupt was already pending ) ...  */
4570 /*                                                                          */
4571 /****************************************************************************/
4572 static void
4573 ips_flush_and_reset(ips_ha_t *ha)
4574 {
4575         ips_scb_t *scb;
4576         int  ret;
4577         int  time;
4578         int  done;
4579         dma_addr_t command_dma;
4580
4581         /* Create a usuable SCB */
4582         scb = pci_alloc_consistent(ha->pcidev, sizeof(ips_scb_t), &command_dma);
4583         if (scb) {
4584             memset(scb, 0, sizeof(ips_scb_t));
4585             ips_init_scb(ha, scb);
4586             scb->scb_busaddr = command_dma;
4587
4588             scb->timeout = ips_cmd_timeout;
4589             scb->cdb[0] = IPS_CMD_FLUSH;
4590
4591             scb->cmd.flush_cache.op_code = IPS_CMD_FLUSH;
4592             scb->cmd.flush_cache.command_id = IPS_MAX_CMDS;   /* Use an ID that would otherwise not exist */
4593             scb->cmd.flush_cache.state = IPS_NORM_STATE;
4594             scb->cmd.flush_cache.reserved = 0;
4595             scb->cmd.flush_cache.reserved2 = 0;
4596             scb->cmd.flush_cache.reserved3 = 0;
4597             scb->cmd.flush_cache.reserved4 = 0;
4598
4599             ret = ips_send_cmd(ha, scb);                      /* Send the Flush Command */
4600
4601             if (ret == IPS_SUCCESS) {
4602                 time = 60 * IPS_ONE_SEC;                      /* Max Wait time is 60 seconds */
4603                 done = 0;
4604
4605                 while ((time > 0) && (!done)) {
4606                    done = ips_poll_for_flush_complete(ha);
4607                    /* This may look evil, but it's only done during extremely rare start-up conditions ! */
4608                    udelay(1000);
4609                    time--;
4610                 }
4611         }
4612         }
4613
4614         /* Now RESET and INIT the adapter */
4615         (*ha->func.reset) (ha);
4616
4617         pci_free_consistent(ha->pcidev, sizeof(ips_scb_t), scb, command_dma);
4618         return;
4619 }
4620
4621 /****************************************************************************/
4622 /*                                                                          */
4623 /* Routine Name: ips_poll_for_flush_complete                                */
4624 /*                                                                          */
4625 /* Routine Description:                                                     */
4626 /*                                                                          */
4627 /*   Poll for the Flush Command issued by ips_flush_and_reset() to complete */
4628 /*   All other responses are just taken off the queue and ignored           */
4629 /*                                                                          */
4630 /****************************************************************************/
4631 static int
4632 ips_poll_for_flush_complete(ips_ha_t * ha)
4633 {
4634         IPS_STATUS cstatus;
4635
4636         while (TRUE) {
4637             cstatus.value = (*ha->func.statupd) (ha);
4638
4639             if (cstatus.value == 0xffffffff)      /* If No Interrupt to process */
4640                         break;
4641
4642             /* Success is when we see the Flush Command ID */
4643             if (cstatus.fields.command_id == IPS_MAX_CMDS)
4644                 return 1;
4645          }
4646
4647         return 0;
4648 }
4649
4650 /****************************************************************************/
4651 /*                                                                          */
4652 /* Routine Name: ips_enable_int_copperhead                                  */
4653 /*                                                                          */
4654 /* Routine Description:                                                     */
4655 /*   Turn on interrupts                                                     */
4656 /*                                                                          */
4657 /****************************************************************************/
4658 static void
4659 ips_enable_int_copperhead(ips_ha_t * ha)
4660 {
4661         METHOD_TRACE("ips_enable_int_copperhead", 1);
4662
4663         outb(ha->io_addr + IPS_REG_HISR, IPS_BIT_EI);
4664         inb(ha->io_addr + IPS_REG_HISR);        /*Ensure PCI Posting Completes*/
4665 }
4666
4667 /****************************************************************************/
4668 /*                                                                          */
4669 /* Routine Name: ips_enable_int_copperhead_memio                            */
4670 /*                                                                          */
4671 /* Routine Description:                                                     */
4672 /*   Turn on interrupts                                                     */
4673 /*                                                                          */
4674 /****************************************************************************/
4675 static void
4676 ips_enable_int_copperhead_memio(ips_ha_t * ha)
4677 {
4678         METHOD_TRACE("ips_enable_int_copperhead_memio", 1);
4679
4680         writeb(IPS_BIT_EI, ha->mem_ptr + IPS_REG_HISR);
4681         readb(ha->mem_ptr + IPS_REG_HISR);      /*Ensure PCI Posting Completes*/
4682 }
4683
4684 /****************************************************************************/
4685 /*                                                                          */
4686 /* Routine Name: ips_enable_int_morpheus                                    */
4687 /*                                                                          */
4688 /* Routine Description:                                                     */
4689 /*   Turn on interrupts                                                     */
4690 /*                                                                          */
4691 /****************************************************************************/
4692 static void
4693 ips_enable_int_morpheus(ips_ha_t * ha)
4694 {
4695         uint32_t Oimr;
4696
4697         METHOD_TRACE("ips_enable_int_morpheus", 1);
4698
4699         Oimr = readl(ha->mem_ptr + IPS_REG_I960_OIMR);
4700         Oimr &= ~0x08;
4701         writel(Oimr, ha->mem_ptr + IPS_REG_I960_OIMR);
4702         readl(ha->mem_ptr + IPS_REG_I960_OIMR); /*Ensure PCI Posting Completes*/
4703 }
4704
4705 /****************************************************************************/
4706 /*                                                                          */
4707 /* Routine Name: ips_init_copperhead                                        */
4708 /*                                                                          */
4709 /* Routine Description:                                                     */
4710 /*                                                                          */
4711 /*   Initialize a copperhead controller                                     */
4712 /*                                                                          */
4713 /****************************************************************************/
4714 static int
4715 ips_init_copperhead(ips_ha_t * ha)
4716 {
4717         uint8_t Isr;
4718         uint8_t Cbsp;
4719         uint8_t PostByte[IPS_MAX_POST_BYTES];
4720         uint8_t ConfigByte[IPS_MAX_CONFIG_BYTES];
4721         int i, j;
4722
4723         METHOD_TRACE("ips_init_copperhead", 1);
4724
4725         for (i = 0; i < IPS_MAX_POST_BYTES; i++) {
4726                 for (j = 0; j < 45; j++) {
4727                         Isr = inb(ha->io_addr + IPS_REG_HISR);
4728                         if (Isr & IPS_BIT_GHI)
4729                                 break;
4730
4731                         /* Delay for 1 Second */
4732                         MDELAY(IPS_ONE_SEC);
4733                 }
4734
4735                 if (j >= 45)
4736                         /* error occurred */
4737                         return (0);
4738
4739                 PostByte[i] = inb(ha->io_addr + IPS_REG_ISPR);
4740                 outb(Isr, ha->io_addr + IPS_REG_HISR);
4741         }
4742
4743         if (PostByte[0] < IPS_GOOD_POST_STATUS) {
4744                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
4745                            "reset controller fails (post status %x %x).\n",
4746                            PostByte[0], PostByte[1]);
4747
4748                 return (0);
4749         }
4750
4751         for (i = 0; i < IPS_MAX_CONFIG_BYTES; i++) {
4752                 for (j = 0; j < 240; j++) {
4753                         Isr = inb(ha->io_addr + IPS_REG_HISR);
4754                         if (Isr & IPS_BIT_GHI)
4755                                 break;
4756
4757                         /* Delay for 1 Second */
4758                         MDELAY(IPS_ONE_SEC);
4759                 }
4760
4761                 if (j >= 240)
4762                         /* error occurred */
4763                         return (0);
4764
4765                 ConfigByte[i] = inb(ha->io_addr + IPS_REG_ISPR);
4766                 outb(Isr, ha->io_addr + IPS_REG_HISR);
4767         }
4768
4769         for (i = 0; i < 240; i++) {
4770                 Cbsp = inb(ha->io_addr + IPS_REG_CBSP);
4771
4772                 if ((Cbsp & IPS_BIT_OP) == 0)
4773                         break;
4774
4775                 /* Delay for 1 Second */
4776                 MDELAY(IPS_ONE_SEC);
4777         }
4778
4779         if (i >= 240)
4780                 /* reset failed */
4781                 return (0);
4782
4783         /* setup CCCR */
4784         outl(0x1010, ha->io_addr + IPS_REG_CCCR);
4785
4786         /* Enable busmastering */
4787         outb(IPS_BIT_EBM, ha->io_addr + IPS_REG_SCPR);
4788
4789         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
4790                 /* fix for anaconda64 */
4791                 outl(0, ha->io_addr + IPS_REG_NDAE);
4792
4793         /* Enable interrupts */
4794         outb(IPS_BIT_EI, ha->io_addr + IPS_REG_HISR);
4795
4796         return (1);
4797 }
4798
4799 /****************************************************************************/
4800 /*                                                                          */
4801 /* Routine Name: ips_init_copperhead_memio                                  */
4802 /*                                                                          */
4803 /* Routine Description:                                                     */
4804 /*                                                                          */
4805 /*   Initialize a copperhead controller with memory mapped I/O              */
4806 /*                                                                          */
4807 /****************************************************************************/
4808 static int
4809 ips_init_copperhead_memio(ips_ha_t * ha)
4810 {
4811         uint8_t Isr = 0;
4812         uint8_t Cbsp;
4813         uint8_t PostByte[IPS_MAX_POST_BYTES];
4814         uint8_t ConfigByte[IPS_MAX_CONFIG_BYTES];
4815         int i, j;
4816
4817         METHOD_TRACE("ips_init_copperhead_memio", 1);
4818
4819         for (i = 0; i < IPS_MAX_POST_BYTES; i++) {
4820                 for (j = 0; j < 45; j++) {
4821                         Isr = readb(ha->mem_ptr + IPS_REG_HISR);
4822                         if (Isr & IPS_BIT_GHI)
4823                                 break;
4824
4825                         /* Delay for 1 Second */
4826                         MDELAY(IPS_ONE_SEC);
4827                 }
4828
4829                 if (j >= 45)
4830                         /* error occurred */
4831                         return (0);
4832
4833                 PostByte[i] = readb(ha->mem_ptr + IPS_REG_ISPR);
4834                 writeb(Isr, ha->mem_ptr + IPS_REG_HISR);
4835         }
4836
4837         if (PostByte[0] < IPS_GOOD_POST_STATUS) {
4838                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
4839                            "reset controller fails (post status %x %x).\n",
4840                            PostByte[0], PostByte[1]);
4841
4842                 return (0);
4843         }
4844
4845         for (i = 0; i < IPS_MAX_CONFIG_BYTES; i++) {
4846                 for (j = 0; j < 240; j++) {
4847                         Isr = readb(ha->mem_ptr + IPS_REG_HISR);
4848                         if (Isr & IPS_BIT_GHI)
4849                                 break;
4850
4851                         /* Delay for 1 Second */
4852                         MDELAY(IPS_ONE_SEC);
4853                 }
4854
4855                 if (j >= 240)
4856                         /* error occurred */
4857                         return (0);
4858
4859                 ConfigByte[i] = readb(ha->mem_ptr + IPS_REG_ISPR);
4860                 writeb(Isr, ha->mem_ptr + IPS_REG_HISR);
4861         }
4862
4863         for (i = 0; i < 240; i++) {
4864                 Cbsp = readb(ha->mem_ptr + IPS_REG_CBSP);
4865
4866                 if ((Cbsp & IPS_BIT_OP) == 0)
4867                         break;
4868
4869                 /* Delay for 1 Second */
4870                 MDELAY(IPS_ONE_SEC);
4871         }
4872
4873         if (i >= 240)
4874                 /* error occurred */
4875                 return (0);
4876
4877         /* setup CCCR */
4878         writel(0x1010, ha->mem_ptr + IPS_REG_CCCR);
4879
4880         /* Enable busmastering */
4881         writeb(IPS_BIT_EBM, ha->mem_ptr + IPS_REG_SCPR);
4882
4883         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
4884                 /* fix for anaconda64 */
4885                 writel(0, ha->mem_ptr + IPS_REG_NDAE);
4886
4887         /* Enable interrupts */
4888         writeb(IPS_BIT_EI, ha->mem_ptr + IPS_REG_HISR);
4889
4890         /* if we get here then everything went OK */
4891         return (1);
4892 }
4893
4894 /****************************************************************************/
4895 /*                                                                          */
4896 /* Routine Name: ips_init_morpheus                                          */
4897 /*                                                                          */
4898 /* Routine Description:                                                     */
4899 /*                                                                          */
4900 /*   Initialize a morpheus controller                                       */
4901 /*                                                                          */
4902 /****************************************************************************/
4903 static int
4904 ips_init_morpheus(ips_ha_t * ha)
4905 {
4906         uint32_t Post;
4907         uint32_t Config;
4908         uint32_t Isr;
4909         uint32_t Oimr;
4910         int i;
4911
4912         METHOD_TRACE("ips_init_morpheus", 1);
4913
4914         /* Wait up to 45 secs for Post */
4915         for (i = 0; i < 45; i++) {
4916                 Isr = readl(ha->mem_ptr + IPS_REG_I2O_HIR);
4917
4918                 if (Isr & IPS_BIT_I960_MSG0I)
4919                         break;
4920
4921                 /* Delay for 1 Second */
4922                 MDELAY(IPS_ONE_SEC);
4923         }
4924
4925         if (i >= 45) {
4926                 /* error occurred */
4927                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
4928                            "timeout waiting for post.\n");
4929
4930                 return (0);
4931         }
4932
4933         Post = readl(ha->mem_ptr + IPS_REG_I960_MSG0);
4934
4935         if (Post == 0x4F00) {   /* If Flashing the Battery PIC         */
4936                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
4937                            "Flashing Battery PIC, Please wait ...\n");
4938
4939                 /* Clear the interrupt bit */
4940                 Isr = (uint32_t) IPS_BIT_I960_MSG0I;
4941                 writel(Isr, ha->mem_ptr + IPS_REG_I2O_HIR);
4942
4943                 for (i = 0; i < 120; i++) {     /*    Wait Up to 2 Min. for Completion */
4944                         Post = readl(ha->mem_ptr + IPS_REG_I960_MSG0);
4945                         if (Post != 0x4F00)
4946                                 break;
4947                         /* Delay for 1 Second */
4948                         MDELAY(IPS_ONE_SEC);
4949                 }
4950
4951                 if (i >= 120) {
4952                         IPS_PRINTK(KERN_WARNING, ha->pcidev,
4953                                    "timeout waiting for Battery PIC Flash\n");
4954                         return (0);
4955                 }
4956
4957         }
4958
4959         /* Clear the interrupt bit */
4960         Isr = (uint32_t) IPS_BIT_I960_MSG0I;
4961         writel(Isr, ha->mem_ptr + IPS_REG_I2O_HIR);
4962
4963         if (Post < (IPS_GOOD_POST_STATUS << 8)) {
4964                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
4965                            "reset controller fails (post status %x).\n", Post);
4966
4967                 return (0);
4968         }
4969
4970         /* Wait up to 240 secs for config bytes */
4971         for (i = 0; i < 240; i++) {
4972                 Isr = readl(ha->mem_ptr + IPS_REG_I2O_HIR);
4973
4974                 if (Isr & IPS_BIT_I960_MSG1I)
4975                         break;
4976
4977                 /* Delay for 1 Second */
4978                 MDELAY(IPS_ONE_SEC);
4979         }
4980
4981         if (i >= 240) {
4982                 /* error occurred */
4983                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
4984                            "timeout waiting for config.\n");
4985
4986                 return (0);
4987         }
4988
4989         Config = readl(ha->mem_ptr + IPS_REG_I960_MSG1);
4990
4991         /* Clear interrupt bit */
4992         Isr = (uint32_t) IPS_BIT_I960_MSG1I;
4993         writel(Isr, ha->mem_ptr + IPS_REG_I2O_HIR);
4994
4995         /* Turn on the interrupts */
4996         Oimr = readl(ha->mem_ptr + IPS_REG_I960_OIMR);
4997         Oimr &= ~0x8;
4998         writel(Oimr, ha->mem_ptr + IPS_REG_I960_OIMR);
4999
5000         /* if we get here then everything went OK */
5001
5002         /* Since we did a RESET, an EraseStripeLock may be needed */
5003         if (Post == 0xEF10) {
5004                 if ((Config == 0x000F) || (Config == 0x0009))
5005                         ha->requires_esl = 1;
5006         }
5007
5008         return (1);
5009 }
5010
5011 /****************************************************************************/
5012 /*                                                                          */
5013 /* Routine Name: ips_reset_copperhead                                       */
5014 /*                                                                          */
5015 /* Routine Description:                                                     */
5016 /*                                                                          */
5017 /*   Reset the controller                                                   */
5018 /*                                                                          */
5019 /****************************************************************************/
5020 static int
5021 ips_reset_copperhead(ips_ha_t * ha)
5022 {
5023         int reset_counter;
5024
5025         METHOD_TRACE("ips_reset_copperhead", 1);
5026
5027         DEBUG_VAR(1, "(%s%d) ips_reset_copperhead: io addr: %x, irq: %d",
5028                   ips_name, ha->host_num, ha->io_addr, ha->pcidev->irq);
5029
5030         reset_counter = 0;
5031
5032         while (reset_counter < 2) {
5033                 reset_counter++;
5034
5035                 outb(IPS_BIT_RST, ha->io_addr + IPS_REG_SCPR);
5036
5037                 /* Delay for 1 Second */
5038                 MDELAY(IPS_ONE_SEC);
5039
5040                 outb(0, ha->io_addr + IPS_REG_SCPR);
5041
5042                 /* Delay for 1 Second */
5043                 MDELAY(IPS_ONE_SEC);
5044
5045                 if ((*ha->func.init) (ha))
5046                         break;
5047                 else if (reset_counter >= 2) {
5048
5049                         return (0);
5050                 }
5051         }
5052
5053         return (1);
5054 }
5055
5056 /****************************************************************************/
5057 /*                                                                          */
5058 /* Routine Name: ips_reset_copperhead_memio                                 */
5059 /*                                                                          */
5060 /* Routine Description:                                                     */
5061 /*                                                                          */
5062 /*   Reset the controller                                                   */
5063 /*                                                                          */
5064 /****************************************************************************/
5065 static int
5066 ips_reset_copperhead_memio(ips_ha_t * ha)
5067 {
5068         int reset_counter;
5069
5070         METHOD_TRACE("ips_reset_copperhead_memio", 1);
5071
5072         DEBUG_VAR(1, "(%s%d) ips_reset_copperhead_memio: mem addr: %x, irq: %d",
5073                   ips_name, ha->host_num, ha->mem_addr, ha->pcidev->irq);
5074
5075         reset_counter = 0;
5076
5077         while (reset_counter < 2) {
5078                 reset_counter++;
5079
5080                 writeb(IPS_BIT_RST, ha->mem_ptr + IPS_REG_SCPR);
5081
5082                 /* Delay for 1 Second */
5083                 MDELAY(IPS_ONE_SEC);
5084
5085                 writeb(0, ha->mem_ptr + IPS_REG_SCPR);
5086
5087                 /* Delay for 1 Second */
5088                 MDELAY(IPS_ONE_SEC);
5089
5090                 if ((*ha->func.init) (ha))
5091                         break;
5092                 else if (reset_counter >= 2) {
5093
5094                         return (0);
5095                 }
5096         }
5097
5098         return (1);
5099 }
5100
5101 /****************************************************************************/
5102 /*                                                                          */
5103 /* Routine Name: ips_reset_morpheus                                         */
5104 /*                                                                          */
5105 /* Routine Description:                                                     */
5106 /*                                                                          */
5107 /*   Reset the controller                                                   */
5108 /*                                                                          */
5109 /****************************************************************************/
5110 static int
5111 ips_reset_morpheus(ips_ha_t * ha)
5112 {
5113         int reset_counter;
5114         uint8_t junk;
5115
5116         METHOD_TRACE("ips_reset_morpheus", 1);
5117
5118         DEBUG_VAR(1, "(%s%d) ips_reset_morpheus: mem addr: %x, irq: %d",
5119                   ips_name, ha->host_num, ha->mem_addr, ha->pcidev->irq);
5120
5121         reset_counter = 0;
5122
5123         while (reset_counter < 2) {
5124                 reset_counter++;
5125
5126                 writel(0x80000000, ha->mem_ptr + IPS_REG_I960_IDR);
5127
5128                 /* Delay for 5 Seconds */
5129                 MDELAY(5 * IPS_ONE_SEC);
5130
5131                 /* Do a PCI config read to wait for adapter */
5132                 pci_read_config_byte(ha->pcidev, 4, &junk);
5133
5134                 if ((*ha->func.init) (ha))
5135                         break;
5136                 else if (reset_counter >= 2) {
5137
5138                         return (0);
5139                 }
5140         }
5141
5142         return (1);
5143 }
5144
5145 /****************************************************************************/
5146 /*                                                                          */
5147 /* Routine Name: ips_statinit                                               */
5148 /*                                                                          */
5149 /* Routine Description:                                                     */
5150 /*                                                                          */
5151 /*   Initialize the status queues on the controller                         */
5152 /*                                                                          */
5153 /****************************************************************************/
5154 static void
5155 ips_statinit(ips_ha_t * ha)
5156 {
5157         uint32_t phys_status_start;
5158
5159         METHOD_TRACE("ips_statinit", 1);
5160
5161         ha->adapt->p_status_start = ha->adapt->status;
5162         ha->adapt->p_status_end = ha->adapt->status + IPS_MAX_CMDS;
5163         ha->adapt->p_status_tail = ha->adapt->status;
5164
5165         phys_status_start = ha->adapt->hw_status_start;
5166         outl(phys_status_start, ha->io_addr + IPS_REG_SQSR);
5167         outl(phys_status_start + IPS_STATUS_Q_SIZE,
5168              ha->io_addr + IPS_REG_SQER);
5169         outl(phys_status_start + IPS_STATUS_SIZE,
5170              ha->io_addr + IPS_REG_SQHR);
5171         outl(phys_status_start, ha->io_addr + IPS_REG_SQTR);
5172
5173         ha->adapt->hw_status_tail = phys_status_start;
5174 }
5175
5176 /****************************************************************************/
5177 /*                                                                          */
5178 /* Routine Name: ips_statinit_memio                                         */
5179 /*                                                                          */
5180 /* Routine Description:                                                     */
5181 /*                                                                          */
5182 /*   Initialize the status queues on the controller                         */
5183 /*                                                                          */
5184 /****************************************************************************/
5185 static void
5186 ips_statinit_memio(ips_ha_t * ha)
5187 {
5188         uint32_t phys_status_start;
5189
5190         METHOD_TRACE("ips_statinit_memio", 1);
5191
5192         ha->adapt->p_status_start = ha->adapt->status;
5193         ha->adapt->p_status_end = ha->adapt->status + IPS_MAX_CMDS;
5194         ha->adapt->p_status_tail = ha->adapt->status;
5195
5196         phys_status_start = ha->adapt->hw_status_start;
5197         writel(phys_status_start, ha->mem_ptr + IPS_REG_SQSR);
5198         writel(phys_status_start + IPS_STATUS_Q_SIZE,
5199                ha->mem_ptr + IPS_REG_SQER);
5200         writel(phys_status_start + IPS_STATUS_SIZE, ha->mem_ptr + IPS_REG_SQHR);
5201         writel(phys_status_start, ha->mem_ptr + IPS_REG_SQTR);
5202
5203         ha->adapt->hw_status_tail = phys_status_start;
5204 }
5205
5206 /****************************************************************************/
5207 /*                                                                          */
5208 /* Routine Name: ips_statupd_copperhead                                     */
5209 /*                                                                          */
5210 /* Routine Description:                                                     */
5211 /*                                                                          */
5212 /*   Remove an element from the status queue                                */
5213 /*                                                                          */
5214 /****************************************************************************/
5215 static uint32_t
5216 ips_statupd_copperhead(ips_ha_t * ha)
5217 {
5218         METHOD_TRACE("ips_statupd_copperhead", 1);
5219
5220         if (ha->adapt->p_status_tail != ha->adapt->p_status_end) {
5221                 ha->adapt->p_status_tail++;
5222                 ha->adapt->hw_status_tail += sizeof (IPS_STATUS);
5223         } else {
5224                 ha->adapt->p_status_tail = ha->adapt->p_status_start;
5225                 ha->adapt->hw_status_tail = ha->adapt->hw_status_start;
5226         }
5227
5228         outl(ha->adapt->hw_status_tail,
5229              ha->io_addr + IPS_REG_SQTR);
5230
5231         return (ha->adapt->p_status_tail->value);
5232 }
5233
5234 /****************************************************************************/
5235 /*                                                                          */
5236 /* Routine Name: ips_statupd_copperhead_memio                               */
5237 /*                                                                          */
5238 /* Routine Description:                                                     */
5239 /*                                                                          */
5240 /*   Remove an element from the status queue                                */
5241 /*                                                                          */
5242 /****************************************************************************/
5243 static uint32_t
5244 ips_statupd_copperhead_memio(ips_ha_t * ha)
5245 {
5246         METHOD_TRACE("ips_statupd_copperhead_memio", 1);
5247
5248         if (ha->adapt->p_status_tail != ha->adapt->p_status_end) {
5249                 ha->adapt->p_status_tail++;
5250                 ha->adapt->hw_status_tail += sizeof (IPS_STATUS);
5251         } else {
5252                 ha->adapt->p_status_tail = ha->adapt->p_status_start;
5253                 ha->adapt->hw_status_tail = ha->adapt->hw_status_start;
5254         }
5255
5256         writel(ha->adapt->hw_status_tail, ha->mem_ptr + IPS_REG_SQTR);
5257
5258         return (ha->adapt->p_status_tail->value);
5259 }
5260
5261 /****************************************************************************/
5262 /*                                                                          */
5263 /* Routine Name: ips_statupd_morpheus                                       */
5264 /*                                                                          */
5265 /* Routine Description:                                                     */
5266 /*                                                                          */
5267 /*   Remove an element from the status queue                                */
5268 /*                                                                          */
5269 /****************************************************************************/
5270 static uint32_t
5271 ips_statupd_morpheus(ips_ha_t * ha)
5272 {
5273         uint32_t val;
5274
5275         METHOD_TRACE("ips_statupd_morpheus", 1);
5276
5277         val = readl(ha->mem_ptr + IPS_REG_I2O_OUTMSGQ);
5278
5279         return (val);
5280 }
5281
5282 /****************************************************************************/
5283 /*                                                                          */
5284 /* Routine Name: ips_issue_copperhead                                       */
5285 /*                                                                          */
5286 /* Routine Description:                                                     */
5287 /*                                                                          */
5288 /*   Send a command down to the controller                                  */
5289 /*                                                                          */
5290 /****************************************************************************/
5291 static int
5292 ips_issue_copperhead(ips_ha_t * ha, ips_scb_t * scb)
5293 {
5294         uint32_t TimeOut;
5295         uint32_t val;
5296
5297         METHOD_TRACE("ips_issue_copperhead", 1);
5298
5299         if (scb->scsi_cmd) {
5300                 DEBUG_VAR(2, "(%s%d) ips_issue: cmd 0x%X id %d (%d %d %d)",
5301                           ips_name,
5302                           ha->host_num,
5303                           scb->cdb[0],
5304                           scb->cmd.basic_io.command_id,
5305                           scb->bus, scb->target_id, scb->lun);
5306         } else {
5307                 DEBUG_VAR(2, KERN_NOTICE "(%s%d) ips_issue: logical cmd id %d",
5308                           ips_name, ha->host_num, scb->cmd.basic_io.command_id);
5309         }
5310
5311         TimeOut = 0;
5312
5313         while ((val =
5314                 le32_to_cpu(inl(ha->io_addr + IPS_REG_CCCR))) & IPS_BIT_SEM) {
5315                 udelay(1000);
5316
5317                 if (++TimeOut >= IPS_SEM_TIMEOUT) {
5318                         if (!(val & IPS_BIT_START_STOP))
5319                                 break;
5320
5321                         IPS_PRINTK(KERN_WARNING, ha->pcidev,
5322                                    "ips_issue val [0x%x].\n", val);
5323                         IPS_PRINTK(KERN_WARNING, ha->pcidev,
5324                                    "ips_issue semaphore chk timeout.\n");
5325
5326                         return (IPS_FAILURE);
5327                 }               /* end if */
5328         }                       /* end while */
5329
5330         outl(scb->scb_busaddr, ha->io_addr + IPS_REG_CCSAR);
5331         outw(IPS_BIT_START_CMD, ha->io_addr + IPS_REG_CCCR);
5332
5333         return (IPS_SUCCESS);
5334 }
5335
5336 /****************************************************************************/
5337 /*                                                                          */
5338 /* Routine Name: ips_issue_copperhead_memio                                 */
5339 /*                                                                          */
5340 /* Routine Description:                                                     */
5341 /*                                                                          */
5342 /*   Send a command down to the controller                                  */
5343 /*                                                                          */
5344 /****************************************************************************/
5345 static int
5346 ips_issue_copperhead_memio(ips_ha_t * ha, ips_scb_t * scb)
5347 {
5348         uint32_t TimeOut;
5349         uint32_t val;
5350
5351         METHOD_TRACE("ips_issue_copperhead_memio", 1);
5352
5353         if (scb->scsi_cmd) {
5354                 DEBUG_VAR(2, "(%s%d) ips_issue: cmd 0x%X id %d (%d %d %d)",
5355                           ips_name,
5356                           ha->host_num,
5357                           scb->cdb[0],
5358                           scb->cmd.basic_io.command_id,
5359                           scb->bus, scb->target_id, scb->lun);
5360         } else {
5361                 DEBUG_VAR(2, "(%s%d) ips_issue: logical cmd id %d",
5362                           ips_name, ha->host_num, scb->cmd.basic_io.command_id);
5363         }
5364
5365         TimeOut = 0;
5366
5367         while ((val = readl(ha->mem_ptr + IPS_REG_CCCR)) & IPS_BIT_SEM) {
5368                 udelay(1000);
5369
5370                 if (++TimeOut >= IPS_SEM_TIMEOUT) {
5371                         if (!(val & IPS_BIT_START_STOP))
5372                                 break;
5373
5374                         IPS_PRINTK(KERN_WARNING, ha->pcidev,
5375                                    "ips_issue val [0x%x].\n", val);
5376                         IPS_PRINTK(KERN_WARNING, ha->pcidev,
5377                                    "ips_issue semaphore chk timeout.\n");
5378
5379                         return (IPS_FAILURE);
5380                 }               /* end if */
5381         }                       /* end while */
5382
5383         writel(scb->scb_busaddr, ha->mem_ptr + IPS_REG_CCSAR);
5384         writel(IPS_BIT_START_CMD, ha->mem_ptr + IPS_REG_CCCR);
5385
5386         return (IPS_SUCCESS);
5387 }
5388
5389 /****************************************************************************/
5390 /*                                                                          */
5391 /* Routine Name: ips_issue_i2o                                              */
5392 /*                                                                          */
5393 /* Routine Description:                                                     */
5394 /*                                                                          */
5395 /*   Send a command down to the controller                                  */
5396 /*                                                                          */
5397 /****************************************************************************/
5398 static int
5399 ips_issue_i2o(ips_ha_t * ha, ips_scb_t * scb)
5400 {
5401
5402         METHOD_TRACE("ips_issue_i2o", 1);
5403
5404         if (scb->scsi_cmd) {
5405                 DEBUG_VAR(2, "(%s%d) ips_issue: cmd 0x%X id %d (%d %d %d)",
5406                           ips_name,
5407                           ha->host_num,
5408                           scb->cdb[0],
5409                           scb->cmd.basic_io.command_id,
5410                           scb->bus, scb->target_id, scb->lun);
5411         } else {
5412                 DEBUG_VAR(2, "(%s%d) ips_issue: logical cmd id %d",
5413                           ips_name, ha->host_num, scb->cmd.basic_io.command_id);
5414         }
5415
5416         outl(scb->scb_busaddr, ha->io_addr + IPS_REG_I2O_INMSGQ);
5417
5418         return (IPS_SUCCESS);
5419 }
5420
5421 /****************************************************************************/
5422 /*                                                                          */
5423 /* Routine Name: ips_issue_i2o_memio                                        */
5424 /*                                                                          */
5425 /* Routine Description:                                                     */
5426 /*                                                                          */
5427 /*   Send a command down to the controller                                  */
5428 /*                                                                          */
5429 /****************************************************************************/
5430 static int
5431 ips_issue_i2o_memio(ips_ha_t * ha, ips_scb_t * scb)
5432 {
5433
5434         METHOD_TRACE("ips_issue_i2o_memio", 1);
5435
5436         if (scb->scsi_cmd) {
5437                 DEBUG_VAR(2, "(%s%d) ips_issue: cmd 0x%X id %d (%d %d %d)",
5438                           ips_name,
5439                           ha->host_num,
5440                           scb->cdb[0],
5441                           scb->cmd.basic_io.command_id,
5442                           scb->bus, scb->target_id, scb->lun);
5443         } else {
5444                 DEBUG_VAR(2, "(%s%d) ips_issue: logical cmd id %d",
5445                           ips_name, ha->host_num, scb->cmd.basic_io.command_id);
5446         }
5447
5448         writel(scb->scb_busaddr, ha->mem_ptr + IPS_REG_I2O_INMSGQ);
5449
5450         return (IPS_SUCCESS);
5451 }
5452
5453 /****************************************************************************/
5454 /*                                                                          */
5455 /* Routine Name: ips_isintr_copperhead                                      */
5456 /*                                                                          */
5457 /* Routine Description:                                                     */
5458 /*                                                                          */
5459 /*   Test to see if an interrupt is for us                                  */
5460 /*                                                                          */
5461 /****************************************************************************/
5462 static int
5463 ips_isintr_copperhead(ips_ha_t * ha)
5464 {
5465         uint8_t Isr;
5466
5467         METHOD_TRACE("ips_isintr_copperhead", 2);
5468
5469         Isr = inb(ha->io_addr + IPS_REG_HISR);
5470
5471         if (Isr == 0xFF)
5472                 /* ?!?! Nothing really there */
5473                 return (0);
5474
5475         if (Isr & IPS_BIT_SCE)
5476                 return (1);
5477         else if (Isr & (IPS_BIT_SQO | IPS_BIT_GHI)) {
5478                 /* status queue overflow or GHI */
5479                 /* just clear the interrupt */
5480                 outb(Isr, ha->io_addr + IPS_REG_HISR);
5481         }
5482
5483         return (0);
5484 }
5485
5486 /****************************************************************************/
5487 /*                                                                          */
5488 /* Routine Name: ips_isintr_copperhead_memio                                */
5489 /*                                                                          */
5490 /* Routine Description:                                                     */
5491 /*                                                                          */
5492 /*   Test to see if an interrupt is for us                                  */
5493 /*                                                                          */
5494 /****************************************************************************/
5495 static int
5496 ips_isintr_copperhead_memio(ips_ha_t * ha)
5497 {
5498         uint8_t Isr;
5499
5500         METHOD_TRACE("ips_isintr_memio", 2);
5501
5502         Isr = readb(ha->mem_ptr + IPS_REG_HISR);
5503
5504         if (Isr == 0xFF)
5505                 /* ?!?! Nothing really there */
5506                 return (0);
5507
5508         if (Isr & IPS_BIT_SCE)
5509                 return (1);
5510         else if (Isr & (IPS_BIT_SQO | IPS_BIT_GHI)) {
5511                 /* status queue overflow or GHI */
5512                 /* just clear the interrupt */
5513                 writeb(Isr, ha->mem_ptr + IPS_REG_HISR);
5514         }
5515
5516         return (0);
5517 }
5518
5519 /****************************************************************************/
5520 /*                                                                          */
5521 /* Routine Name: ips_isintr_morpheus                                        */
5522 /*                                                                          */
5523 /* Routine Description:                                                     */
5524 /*                                                                          */
5525 /*   Test to see if an interrupt is for us                                  */
5526 /*                                                                          */
5527 /****************************************************************************/
5528 static int
5529 ips_isintr_morpheus(ips_ha_t * ha)
5530 {
5531         uint32_t Isr;
5532
5533         METHOD_TRACE("ips_isintr_morpheus", 2);
5534
5535         Isr = readl(ha->mem_ptr + IPS_REG_I2O_HIR);
5536
5537         if (Isr & IPS_BIT_I2O_OPQI)
5538                 return (1);
5539         else
5540                 return (0);
5541 }
5542
5543 /****************************************************************************/
5544 /*                                                                          */
5545 /* Routine Name: ips_wait                                                   */
5546 /*                                                                          */
5547 /* Routine Description:                                                     */
5548 /*                                                                          */
5549 /*   Wait for a command to complete                                         */
5550 /*                                                                          */
5551 /****************************************************************************/
5552 static int
5553 ips_wait(ips_ha_t * ha, int time, int intr)
5554 {
5555         int ret;
5556         int done;
5557
5558         METHOD_TRACE("ips_wait", 1);
5559
5560         ret = IPS_FAILURE;
5561         done = FALSE;
5562
5563         time *= IPS_ONE_SEC;    /* convert seconds */
5564
5565         while ((time > 0) && (!done)) {
5566                 if (intr == IPS_INTR_ON) {
5567                         if (ha->waitflag == FALSE) {
5568                                 ret = IPS_SUCCESS;
5569                                 done = TRUE;
5570                                 break;
5571                         }
5572                 } else if (intr == IPS_INTR_IORL) {
5573                         if (ha->waitflag == FALSE) {
5574                                 /*
5575                                  * controller generated an interrupt to
5576                                  * acknowledge completion of the command
5577                                  * and ips_intr() has serviced the interrupt.
5578                                  */
5579                                 ret = IPS_SUCCESS;
5580                                 done = TRUE;
5581                                 break;
5582                         }
5583
5584                         /*
5585                          * NOTE: we already have the io_request_lock so
5586                          * even if we get an interrupt it won't get serviced
5587                          * until after we finish.
5588                          */
5589
5590                         (*ha->func.intr) (ha);
5591                 }
5592
5593                 /* This looks like a very evil loop, but it only does this during start-up */
5594                 udelay(1000);
5595                 time--;
5596         }
5597
5598         return (ret);
5599 }
5600
5601 /****************************************************************************/
5602 /*                                                                          */
5603 /* Routine Name: ips_write_driver_status                                    */
5604 /*                                                                          */
5605 /* Routine Description:                                                     */
5606 /*                                                                          */
5607 /*   Write OS/Driver version to Page 5 of the nvram on the controller       */
5608 /*                                                                          */
5609 /****************************************************************************/
5610 static int
5611 ips_write_driver_status(ips_ha_t * ha, int intr)
5612 {
5613         METHOD_TRACE("ips_write_driver_status", 1);
5614
5615         if (!ips_readwrite_page5(ha, FALSE, intr)) {
5616                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
5617                            "unable to read NVRAM page 5.\n");
5618
5619                 return (0);
5620         }
5621
5622         /* check to make sure the page has a valid */
5623         /* signature */
5624         if (le32_to_cpu(ha->nvram->signature) != IPS_NVRAM_P5_SIG) {
5625                 DEBUG_VAR(1,
5626                           "(%s%d) NVRAM page 5 has an invalid signature: %X.",
5627                           ips_name, ha->host_num, ha->nvram->signature);
5628                 ha->nvram->signature = IPS_NVRAM_P5_SIG;
5629         }
5630
5631         DEBUG_VAR(2,
5632                   "(%s%d) Ad Type: %d, Ad Slot: %d, BIOS: %c%c%c%c %c%c%c%c.",
5633                   ips_name, ha->host_num, le16_to_cpu(ha->nvram->adapter_type),
5634                   ha->nvram->adapter_slot, ha->nvram->bios_high[0],
5635                   ha->nvram->bios_high[1], ha->nvram->bios_high[2],
5636                   ha->nvram->bios_high[3], ha->nvram->bios_low[0],
5637                   ha->nvram->bios_low[1], ha->nvram->bios_low[2],
5638                   ha->nvram->bios_low[3]);
5639
5640         ips_get_bios_version(ha, intr);
5641
5642         /* change values (as needed) */
5643         ha->nvram->operating_system = IPS_OS_LINUX;
5644         ha->nvram->adapter_type = ha->ad_type;
5645         strncpy((char *) ha->nvram->driver_high, IPS_VERSION_HIGH, 4);
5646         strncpy((char *) ha->nvram->driver_low, IPS_VERSION_LOW, 4);
5647         strncpy((char *) ha->nvram->bios_high, ha->bios_version, 4);
5648         strncpy((char *) ha->nvram->bios_low, ha->bios_version + 4, 4);
5649
5650         ha->nvram->versioning = 0;      /* Indicate the Driver Does Not Support Versioning */
5651
5652         /* now update the page */
5653         if (!ips_readwrite_page5(ha, TRUE, intr)) {
5654                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
5655                            "unable to write NVRAM page 5.\n");
5656
5657                 return (0);
5658         }
5659
5660         /* IF NVRAM Page 5 is OK, Use it for Slot Number Info Because Linux Doesn't Do Slots */
5661         ha->slot_num = ha->nvram->adapter_slot;
5662
5663         return (1);
5664 }
5665
5666 /****************************************************************************/
5667 /*                                                                          */
5668 /* Routine Name: ips_read_adapter_status                                    */
5669 /*                                                                          */
5670 /* Routine Description:                                                     */
5671 /*                                                                          */
5672 /*   Do an Inquiry command to the adapter                                   */
5673 /*                                                                          */
5674 /****************************************************************************/
5675 static int
5676 ips_read_adapter_status(ips_ha_t * ha, int intr)
5677 {
5678         ips_scb_t *scb;
5679         int ret;
5680
5681         METHOD_TRACE("ips_read_adapter_status", 1);
5682
5683         scb = &ha->scbs[ha->max_cmds - 1];
5684
5685         ips_init_scb(ha, scb);
5686
5687         scb->timeout = ips_cmd_timeout;
5688         scb->cdb[0] = IPS_CMD_ENQUIRY;
5689
5690         scb->cmd.basic_io.op_code = IPS_CMD_ENQUIRY;
5691         scb->cmd.basic_io.command_id = IPS_COMMAND_ID(ha, scb);
5692         scb->cmd.basic_io.sg_count = 0;
5693         scb->cmd.basic_io.lba = 0;
5694         scb->cmd.basic_io.sector_count = 0;
5695         scb->cmd.basic_io.log_drv = 0;
5696         scb->data_len = sizeof (*ha->enq);
5697         scb->cmd.basic_io.sg_addr = ha->enq_busaddr;
5698
5699         /* send command */
5700         if (((ret =
5701               ips_send_wait(ha, scb, ips_cmd_timeout, intr)) == IPS_FAILURE)
5702             || (ret == IPS_SUCCESS_IMM)
5703             || ((scb->basic_status & IPS_GSC_STATUS_MASK) > 1))
5704                 return (0);
5705
5706         return (1);
5707 }
5708
5709 /****************************************************************************/
5710 /*                                                                          */
5711 /* Routine Name: ips_read_subsystem_parameters                              */
5712 /*                                                                          */
5713 /* Routine Description:                                                     */
5714 /*                                                                          */
5715 /*   Read subsystem parameters from the adapter                             */
5716 /*                                                                          */
5717 /****************************************************************************/
5718 static int
5719 ips_read_subsystem_parameters(ips_ha_t * ha, int intr)
5720 {
5721         ips_scb_t *scb;
5722         int ret;
5723
5724         METHOD_TRACE("ips_read_subsystem_parameters", 1);
5725
5726         scb = &ha->scbs[ha->max_cmds - 1];
5727
5728         ips_init_scb(ha, scb);
5729
5730         scb->timeout = ips_cmd_timeout;
5731         scb->cdb[0] = IPS_CMD_GET_SUBSYS;
5732
5733         scb->cmd.basic_io.op_code = IPS_CMD_GET_SUBSYS;
5734         scb->cmd.basic_io.command_id = IPS_COMMAND_ID(ha, scb);
5735         scb->cmd.basic_io.sg_count = 0;
5736         scb->cmd.basic_io.lba = 0;
5737         scb->cmd.basic_io.sector_count = 0;
5738         scb->cmd.basic_io.log_drv = 0;
5739         scb->data_len = sizeof (*ha->subsys);
5740         scb->cmd.basic_io.sg_addr = ha->ioctl_busaddr;
5741
5742         /* send command */
5743         if (((ret =
5744               ips_send_wait(ha, scb, ips_cmd_timeout, intr)) == IPS_FAILURE)
5745             || (ret == IPS_SUCCESS_IMM)
5746             || ((scb->basic_status & IPS_GSC_STATUS_MASK) > 1))
5747                 return (0);
5748
5749         memcpy(ha->subsys, ha->ioctl_data, sizeof(*ha->subsys));
5750         return (1);
5751 }
5752
5753 /****************************************************************************/
5754 /*                                                                          */
5755 /* Routine Name: ips_read_config                                            */
5756 /*                                                                          */
5757 /* Routine Description:                                                     */
5758 /*                                                                          */
5759 /*   Read the configuration on the adapter                                  */
5760 /*                                                                          */
5761 /****************************************************************************/
5762 static int
5763 ips_read_config(ips_ha_t * ha, int intr)
5764 {
5765         ips_scb_t *scb;
5766         int i;
5767         int ret;
5768
5769         METHOD_TRACE("ips_read_config", 1);
5770
5771         /* set defaults for initiator IDs */
5772         for (i = 0; i < 4; i++)
5773                 ha->conf->init_id[i] = 7;
5774
5775         scb = &ha->scbs[ha->max_cmds - 1];
5776
5777         ips_init_scb(ha, scb);
5778
5779         scb->timeout = ips_cmd_timeout;
5780         scb->cdb[0] = IPS_CMD_READ_CONF;
5781
5782         scb->cmd.basic_io.op_code = IPS_CMD_READ_CONF;
5783         scb->cmd.basic_io.command_id = IPS_COMMAND_ID(ha, scb);
5784         scb->data_len = sizeof (*ha->conf);
5785         scb->cmd.basic_io.sg_addr = ha->ioctl_busaddr;
5786
5787         /* send command */
5788         if (((ret =
5789               ips_send_wait(ha, scb, ips_cmd_timeout, intr)) == IPS_FAILURE)
5790             || (ret == IPS_SUCCESS_IMM)
5791             || ((scb->basic_status & IPS_GSC_STATUS_MASK) > 1)) {
5792
5793                 memset(ha->conf, 0, sizeof (IPS_CONF));
5794
5795                 /* reset initiator IDs */
5796                 for (i = 0; i < 4; i++)
5797                         ha->conf->init_id[i] = 7;
5798
5799                 /* Allow Completed with Errors, so JCRM can access the Adapter to fix the problems */
5800                 if ((scb->basic_status & IPS_GSC_STATUS_MASK) ==
5801                     IPS_CMD_CMPLT_WERROR)
5802                         return (1);
5803
5804                 return (0);
5805         }
5806
5807         memcpy(ha->conf, ha->ioctl_data, sizeof(*ha->conf));
5808         return (1);
5809 }
5810
5811 /****************************************************************************/
5812 /*                                                                          */
5813 /* Routine Name: ips_readwrite_page5                                        */
5814 /*                                                                          */
5815 /* Routine Description:                                                     */
5816 /*                                                                          */
5817 /*   Read nvram page 5 from the adapter                                     */
5818 /*                                                                          */
5819 /****************************************************************************/
5820 static int
5821 ips_readwrite_page5(ips_ha_t * ha, int write, int intr)
5822 {
5823         ips_scb_t *scb;
5824         int ret;
5825
5826         METHOD_TRACE("ips_readwrite_page5", 1);
5827
5828         scb = &ha->scbs[ha->max_cmds - 1];
5829
5830         ips_init_scb(ha, scb);
5831
5832         scb->timeout = ips_cmd_timeout;
5833         scb->cdb[0] = IPS_CMD_RW_NVRAM_PAGE;
5834
5835         scb->cmd.nvram.op_code = IPS_CMD_RW_NVRAM_PAGE;
5836         scb->cmd.nvram.command_id = IPS_COMMAND_ID(ha, scb);
5837         scb->cmd.nvram.page = 5;
5838         scb->cmd.nvram.write = write;
5839         scb->cmd.nvram.reserved = 0;
5840         scb->cmd.nvram.reserved2 = 0;
5841         scb->data_len = sizeof (*ha->nvram);
5842         scb->cmd.nvram.buffer_addr = ha->ioctl_busaddr;
5843         if (write)
5844                 memcpy(ha->ioctl_data, ha->nvram, sizeof(*ha->nvram));
5845
5846         /* issue the command */
5847         if (((ret =
5848               ips_send_wait(ha, scb, ips_cmd_timeout, intr)) == IPS_FAILURE)
5849             || (ret == IPS_SUCCESS_IMM)
5850             || ((scb->basic_status & IPS_GSC_STATUS_MASK) > 1)) {
5851
5852                 memset(ha->nvram, 0, sizeof (IPS_NVRAM_P5));
5853
5854                 return (0);
5855         }
5856         if (!write)
5857                 memcpy(ha->nvram, ha->ioctl_data, sizeof(*ha->nvram));
5858         return (1);
5859 }
5860
5861 /****************************************************************************/
5862 /*                                                                          */
5863 /* Routine Name: ips_clear_adapter                                          */
5864 /*                                                                          */
5865 /* Routine Description:                                                     */
5866 /*                                                                          */
5867 /*   Clear the stripe lock tables                                           */
5868 /*                                                                          */
5869 /****************************************************************************/
5870 static int
5871 ips_clear_adapter(ips_ha_t * ha, int intr)
5872 {
5873         ips_scb_t *scb;
5874         int ret;
5875
5876         METHOD_TRACE("ips_clear_adapter", 1);
5877
5878         scb = &ha->scbs[ha->max_cmds - 1];
5879
5880         ips_init_scb(ha, scb);
5881
5882         scb->timeout = ips_reset_timeout;
5883         scb->cdb[0] = IPS_CMD_CONFIG_SYNC;
5884
5885         scb->cmd.config_sync.op_code = IPS_CMD_CONFIG_SYNC;
5886         scb->cmd.config_sync.command_id = IPS_COMMAND_ID(ha, scb);
5887         scb->cmd.config_sync.channel = 0;
5888         scb->cmd.config_sync.source_target = IPS_POCL;
5889         scb->cmd.config_sync.reserved = 0;
5890         scb->cmd.config_sync.reserved2 = 0;
5891         scb->cmd.config_sync.reserved3 = 0;
5892
5893         /* issue command */
5894         if (((ret =
5895               ips_send_wait(ha, scb, ips_reset_timeout, intr)) == IPS_FAILURE)
5896             || (ret == IPS_SUCCESS_IMM)
5897             || ((scb->basic_status & IPS_GSC_STATUS_MASK) > 1))
5898                 return (0);
5899
5900         /* send unlock stripe command */
5901         ips_init_scb(ha, scb);
5902
5903         scb->cdb[0] = IPS_CMD_ERROR_TABLE;
5904         scb->timeout = ips_reset_timeout;
5905
5906         scb->cmd.unlock_stripe.op_code = IPS_CMD_ERROR_TABLE;
5907         scb->cmd.unlock_stripe.command_id = IPS_COMMAND_ID(ha, scb);
5908         scb->cmd.unlock_stripe.log_drv = 0;
5909         scb->cmd.unlock_stripe.control = IPS_CSL;
5910         scb->cmd.unlock_stripe.reserved = 0;
5911         scb->cmd.unlock_stripe.reserved2 = 0;
5912         scb->cmd.unlock_stripe.reserved3 = 0;
5913
5914         /* issue command */
5915         if (((ret =
5916               ips_send_wait(ha, scb, ips_cmd_timeout, intr)) == IPS_FAILURE)
5917             || (ret == IPS_SUCCESS_IMM)
5918             || ((scb->basic_status & IPS_GSC_STATUS_MASK) > 1))
5919                 return (0);
5920
5921         return (1);
5922 }
5923
5924 /****************************************************************************/
5925 /*                                                                          */
5926 /* Routine Name: ips_ffdc_reset                                             */
5927 /*                                                                          */
5928 /* Routine Description:                                                     */
5929 /*                                                                          */
5930 /*   FFDC: write reset info                                                 */
5931 /*                                                                          */
5932 /****************************************************************************/
5933 static void
5934 ips_ffdc_reset(ips_ha_t * ha, int intr)
5935 {
5936         ips_scb_t *scb;
5937
5938         METHOD_TRACE("ips_ffdc_reset", 1);
5939
5940         scb = &ha->scbs[ha->max_cmds - 1];
5941
5942         ips_init_scb(ha, scb);
5943
5944         scb->timeout = ips_cmd_timeout;
5945         scb->cdb[0] = IPS_CMD_FFDC;
5946         scb->cmd.ffdc.op_code = IPS_CMD_FFDC;
5947         scb->cmd.ffdc.command_id = IPS_COMMAND_ID(ha, scb);
5948         scb->cmd.ffdc.reset_count = ha->reset_count;
5949         scb->cmd.ffdc.reset_type = 0x80;
5950
5951         /* convert time to what the card wants */
5952         ips_fix_ffdc_time(ha, scb, ha->last_ffdc);
5953
5954         /* issue command */
5955         ips_send_wait(ha, scb, ips_cmd_timeout, intr);
5956 }
5957
5958 /****************************************************************************/
5959 /*                                                                          */
5960 /* Routine Name: ips_ffdc_time                                              */
5961 /*                                                                          */
5962 /* Routine Description:                                                     */
5963 /*                                                                          */
5964 /*   FFDC: write time info                                                  */
5965 /*                                                                          */
5966 /****************************************************************************/
5967 static void
5968 ips_ffdc_time(ips_ha_t * ha)
5969 {
5970         ips_scb_t *scb;
5971
5972         METHOD_TRACE("ips_ffdc_time", 1);
5973
5974         DEBUG_VAR(1, "(%s%d) Sending time update.", ips_name, ha->host_num);
5975
5976         scb = &ha->scbs[ha->max_cmds - 1];
5977
5978         ips_init_scb(ha, scb);
5979
5980         scb->timeout = ips_cmd_timeout;
5981         scb->cdb[0] = IPS_CMD_FFDC;
5982         scb->cmd.ffdc.op_code = IPS_CMD_FFDC;
5983         scb->cmd.ffdc.command_id = IPS_COMMAND_ID(ha, scb);
5984         scb->cmd.ffdc.reset_count = 0;
5985         scb->cmd.ffdc.reset_type = 0;
5986
5987         /* convert time to what the card wants */
5988         ips_fix_ffdc_time(ha, scb, ha->last_ffdc);
5989
5990         /* issue command */
5991         ips_send_wait(ha, scb, ips_cmd_timeout, IPS_FFDC);
5992 }
5993
5994 /****************************************************************************/
5995 /*                                                                          */
5996 /* Routine Name: ips_fix_ffdc_time                                          */
5997 /*                                                                          */
5998 /* Routine Description:                                                     */
5999 /*   Adjust time_t to what the card wants                                   */
6000 /*                                                                          */
6001 /****************************************************************************/
6002 static void
6003 ips_fix_ffdc_time(ips_ha_t * ha, ips_scb_t * scb, time_t current_time)
6004 {
6005         long days;
6006         long rem;
6007         int i;
6008         int year;
6009         int yleap;
6010         int year_lengths[2] = { IPS_DAYS_NORMAL_YEAR, IPS_DAYS_LEAP_YEAR };
6011         int month_lengths[12][2] = { {31, 31},
6012         {28, 29},
6013         {31, 31},
6014         {30, 30},
6015         {31, 31},
6016         {30, 30},
6017         {31, 31},
6018         {31, 31},
6019         {30, 30},
6020         {31, 31},
6021         {30, 30},
6022         {31, 31}
6023         };
6024
6025         METHOD_TRACE("ips_fix_ffdc_time", 1);
6026
6027         days = current_time / IPS_SECS_DAY;
6028         rem = current_time % IPS_SECS_DAY;
6029
6030         scb->cmd.ffdc.hour = (rem / IPS_SECS_HOUR);
6031         rem = rem % IPS_SECS_HOUR;
6032         scb->cmd.ffdc.minute = (rem / IPS_SECS_MIN);
6033         scb->cmd.ffdc.second = (rem % IPS_SECS_MIN);
6034
6035         year = IPS_EPOCH_YEAR;
6036         while (days < 0 || days >= year_lengths[yleap = IPS_IS_LEAP_YEAR(year)]) {
6037                 int newy;
6038
6039                 newy = year + (days / IPS_DAYS_NORMAL_YEAR);
6040                 if (days < 0)
6041                         --newy;
6042                 days -= (newy - year) * IPS_DAYS_NORMAL_YEAR +
6043                     IPS_NUM_LEAP_YEARS_THROUGH(newy - 1) -
6044                     IPS_NUM_LEAP_YEARS_THROUGH(year - 1);
6045                 year = newy;
6046         }
6047
6048         scb->cmd.ffdc.yearH = year / 100;
6049         scb->cmd.ffdc.yearL = year % 100;
6050
6051         for (i = 0; days >= month_lengths[i][yleap]; ++i)
6052                 days -= month_lengths[i][yleap];
6053
6054         scb->cmd.ffdc.month = i + 1;
6055         scb->cmd.ffdc.day = days + 1;
6056 }
6057
6058 /****************************************************************************
6059  * BIOS Flash Routines                                                      *
6060  ****************************************************************************/
6061
6062 /****************************************************************************/
6063 /*                                                                          */
6064 /* Routine Name: ips_erase_bios                                             */
6065 /*                                                                          */
6066 /* Routine Description:                                                     */
6067 /*   Erase the BIOS on the adapter                                          */
6068 /*                                                                          */
6069 /****************************************************************************/
6070 static int
6071 ips_erase_bios(ips_ha_t * ha)
6072 {
6073         int timeout;
6074         uint8_t status = 0;
6075
6076         METHOD_TRACE("ips_erase_bios", 1);
6077
6078         status = 0;
6079
6080         /* Clear the status register */
6081         outl(0, ha->io_addr + IPS_REG_FLAP);
6082         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6083                 udelay(25);     /* 25 us */
6084
6085         outb(0x50, ha->io_addr + IPS_REG_FLDP);
6086         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6087                 udelay(25);     /* 25 us */
6088
6089         /* Erase Setup */
6090         outb(0x20, ha->io_addr + IPS_REG_FLDP);
6091         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6092                 udelay(25);     /* 25 us */
6093
6094         /* Erase Confirm */
6095         outb(0xD0, ha->io_addr + IPS_REG_FLDP);
6096         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6097                 udelay(25);     /* 25 us */
6098
6099         /* Erase Status */
6100         outb(0x70, ha->io_addr + IPS_REG_FLDP);
6101         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6102                 udelay(25);     /* 25 us */
6103
6104         timeout = 80000;        /* 80 seconds */
6105
6106         while (timeout > 0) {
6107                 if (ha->pcidev->revision == IPS_REVID_TROMBONE64) {
6108                         outl(0, ha->io_addr + IPS_REG_FLAP);
6109                         udelay(25);     /* 25 us */
6110                 }
6111
6112                 status = inb(ha->io_addr + IPS_REG_FLDP);
6113
6114                 if (status & 0x80)
6115                         break;
6116
6117                 MDELAY(1);
6118                 timeout--;
6119         }
6120
6121         /* check for timeout */
6122         if (timeout <= 0) {
6123                 /* timeout */
6124
6125                 /* try to suspend the erase */
6126                 outb(0xB0, ha->io_addr + IPS_REG_FLDP);
6127                 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6128                         udelay(25);     /* 25 us */
6129
6130                 /* wait for 10 seconds */
6131                 timeout = 10000;
6132                 while (timeout > 0) {
6133                         if (ha->pcidev->revision == IPS_REVID_TROMBONE64) {
6134                                 outl(0, ha->io_addr + IPS_REG_FLAP);
6135                                 udelay(25);     /* 25 us */
6136                         }
6137
6138                         status = inb(ha->io_addr + IPS_REG_FLDP);
6139
6140                         if (status & 0xC0)
6141                                 break;
6142
6143                         MDELAY(1);
6144                         timeout--;
6145                 }
6146
6147                 return (1);
6148         }
6149
6150         /* check for valid VPP */
6151         if (status & 0x08)
6152                 /* VPP failure */
6153                 return (1);
6154
6155         /* check for successful flash */
6156         if (status & 0x30)
6157                 /* sequence error */
6158                 return (1);
6159
6160         /* Otherwise, we were successful */
6161         /* clear status */
6162         outb(0x50, ha->io_addr + IPS_REG_FLDP);
6163         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6164                 udelay(25);     /* 25 us */
6165
6166         /* enable reads */
6167         outb(0xFF, ha->io_addr + IPS_REG_FLDP);
6168         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6169                 udelay(25);     /* 25 us */
6170
6171         return (0);
6172 }
6173
6174 /****************************************************************************/
6175 /*                                                                          */
6176 /* Routine Name: ips_erase_bios_memio                                       */
6177 /*                                                                          */
6178 /* Routine Description:                                                     */
6179 /*   Erase the BIOS on the adapter                                          */
6180 /*                                                                          */
6181 /****************************************************************************/
6182 static int
6183 ips_erase_bios_memio(ips_ha_t * ha)
6184 {
6185         int timeout;
6186         uint8_t status;
6187
6188         METHOD_TRACE("ips_erase_bios_memio", 1);
6189
6190         status = 0;
6191
6192         /* Clear the status register */
6193         writel(0, ha->mem_ptr + IPS_REG_FLAP);
6194         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6195                 udelay(25);     /* 25 us */
6196
6197         writeb(0x50, ha->mem_ptr + IPS_REG_FLDP);
6198         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6199                 udelay(25);     /* 25 us */
6200
6201         /* Erase Setup */
6202         writeb(0x20, ha->mem_ptr + IPS_REG_FLDP);
6203         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6204                 udelay(25);     /* 25 us */
6205
6206         /* Erase Confirm */
6207         writeb(0xD0, ha->mem_ptr + IPS_REG_FLDP);
6208         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6209                 udelay(25);     /* 25 us */
6210
6211         /* Erase Status */
6212         writeb(0x70, ha->mem_ptr + IPS_REG_FLDP);
6213         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6214                 udelay(25);     /* 25 us */
6215
6216         timeout = 80000;        /* 80 seconds */
6217
6218         while (timeout > 0) {
6219                 if (ha->pcidev->revision == IPS_REVID_TROMBONE64) {
6220                         writel(0, ha->mem_ptr + IPS_REG_FLAP);
6221                         udelay(25);     /* 25 us */
6222                 }
6223
6224                 status = readb(ha->mem_ptr + IPS_REG_FLDP);
6225
6226                 if (status & 0x80)
6227                         break;
6228
6229                 MDELAY(1);
6230                 timeout--;
6231         }
6232
6233         /* check for timeout */
6234         if (timeout <= 0) {
6235                 /* timeout */
6236
6237                 /* try to suspend the erase */
6238                 writeb(0xB0, ha->mem_ptr + IPS_REG_FLDP);
6239                 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6240                         udelay(25);     /* 25 us */
6241
6242                 /* wait for 10 seconds */
6243                 timeout = 10000;
6244                 while (timeout > 0) {
6245                         if (ha->pcidev->revision == IPS_REVID_TROMBONE64) {
6246                                 writel(0, ha->mem_ptr + IPS_REG_FLAP);
6247                                 udelay(25);     /* 25 us */
6248                         }
6249
6250                         status = readb(ha->mem_ptr + IPS_REG_FLDP);
6251
6252                         if (status & 0xC0)
6253                                 break;
6254
6255                         MDELAY(1);
6256                         timeout--;
6257                 }
6258
6259                 return (1);
6260         }
6261
6262         /* check for valid VPP */
6263         if (status & 0x08)
6264                 /* VPP failure */
6265                 return (1);
6266
6267         /* check for successful flash */
6268         if (status & 0x30)
6269                 /* sequence error */
6270                 return (1);
6271
6272         /* Otherwise, we were successful */
6273         /* clear status */
6274         writeb(0x50, ha->mem_ptr + IPS_REG_FLDP);
6275         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6276                 udelay(25);     /* 25 us */
6277
6278         /* enable reads */
6279         writeb(0xFF, ha->mem_ptr + IPS_REG_FLDP);
6280         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6281                 udelay(25);     /* 25 us */
6282
6283         return (0);
6284 }
6285
6286 /****************************************************************************/
6287 /*                                                                          */
6288 /* Routine Name: ips_program_bios                                           */
6289 /*                                                                          */
6290 /* Routine Description:                                                     */
6291 /*   Program the BIOS on the adapter                                        */
6292 /*                                                                          */
6293 /****************************************************************************/
6294 static int
6295 ips_program_bios(ips_ha_t * ha, char *buffer, uint32_t buffersize,
6296                  uint32_t offset)
6297 {
6298         int i;
6299         int timeout;
6300         uint8_t status = 0;
6301
6302         METHOD_TRACE("ips_program_bios", 1);
6303
6304         status = 0;
6305
6306         for (i = 0; i < buffersize; i++) {
6307                 /* write a byte */
6308                 outl(i + offset, ha->io_addr + IPS_REG_FLAP);
6309                 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6310                         udelay(25);     /* 25 us */
6311
6312                 outb(0x40, ha->io_addr + IPS_REG_FLDP);
6313                 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6314                         udelay(25);     /* 25 us */
6315
6316                 outb(buffer[i], ha->io_addr + IPS_REG_FLDP);
6317                 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6318                         udelay(25);     /* 25 us */
6319
6320                 /* wait up to one second */
6321                 timeout = 1000;
6322                 while (timeout > 0) {
6323                         if (ha->pcidev->revision == IPS_REVID_TROMBONE64) {
6324                                 outl(0, ha->io_addr + IPS_REG_FLAP);
6325                                 udelay(25);     /* 25 us */
6326                         }
6327
6328                         status = inb(ha->io_addr + IPS_REG_FLDP);
6329
6330                         if (status & 0x80)
6331                                 break;
6332
6333                         MDELAY(1);
6334                         timeout--;
6335                 }
6336
6337                 if (timeout == 0) {
6338                         /* timeout error */
6339                         outl(0, ha->io_addr + IPS_REG_FLAP);
6340                         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6341                                 udelay(25);     /* 25 us */
6342
6343                         outb(0xFF, ha->io_addr + IPS_REG_FLDP);
6344                         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6345                                 udelay(25);     /* 25 us */
6346
6347                         return (1);
6348                 }
6349
6350                 /* check the status */
6351                 if (status & 0x18) {
6352                         /* programming error */
6353                         outl(0, ha->io_addr + IPS_REG_FLAP);
6354                         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6355                                 udelay(25);     /* 25 us */
6356
6357                         outb(0xFF, ha->io_addr + IPS_REG_FLDP);
6358                         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6359                                 udelay(25);     /* 25 us */
6360
6361                         return (1);
6362                 }
6363         }                       /* end for */
6364
6365         /* Enable reading */
6366         outl(0, ha->io_addr + IPS_REG_FLAP);
6367         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6368                 udelay(25);     /* 25 us */
6369
6370         outb(0xFF, ha->io_addr + IPS_REG_FLDP);
6371         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6372                 udelay(25);     /* 25 us */
6373
6374         return (0);
6375 }
6376
6377 /****************************************************************************/
6378 /*                                                                          */
6379 /* Routine Name: ips_program_bios_memio                                     */
6380 /*                                                                          */
6381 /* Routine Description:                                                     */
6382 /*   Program the BIOS on the adapter                                        */
6383 /*                                                                          */
6384 /****************************************************************************/
6385 static int
6386 ips_program_bios_memio(ips_ha_t * ha, char *buffer, uint32_t buffersize,
6387                        uint32_t offset)
6388 {
6389         int i;
6390         int timeout;
6391         uint8_t status = 0;
6392
6393         METHOD_TRACE("ips_program_bios_memio", 1);
6394
6395         status = 0;
6396
6397         for (i = 0; i < buffersize; i++) {
6398                 /* write a byte */
6399                 writel(i + offset, ha->mem_ptr + IPS_REG_FLAP);
6400                 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6401                         udelay(25);     /* 25 us */
6402
6403                 writeb(0x40, ha->mem_ptr + IPS_REG_FLDP);
6404                 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6405                         udelay(25);     /* 25 us */
6406
6407                 writeb(buffer[i], ha->mem_ptr + IPS_REG_FLDP);
6408                 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6409                         udelay(25);     /* 25 us */
6410
6411                 /* wait up to one second */
6412                 timeout = 1000;
6413                 while (timeout > 0) {
6414                         if (ha->pcidev->revision == IPS_REVID_TROMBONE64) {
6415                                 writel(0, ha->mem_ptr + IPS_REG_FLAP);
6416                                 udelay(25);     /* 25 us */
6417                         }
6418
6419                         status = readb(ha->mem_ptr + IPS_REG_FLDP);
6420
6421                         if (status & 0x80)
6422                                 break;
6423
6424                         MDELAY(1);
6425                         timeout--;
6426                 }
6427
6428                 if (timeout == 0) {
6429                         /* timeout error */
6430                         writel(0, ha->mem_ptr + IPS_REG_FLAP);
6431                         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6432                                 udelay(25);     /* 25 us */
6433
6434                         writeb(0xFF, ha->mem_ptr + IPS_REG_FLDP);
6435                         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6436                                 udelay(25);     /* 25 us */
6437
6438                         return (1);
6439                 }
6440
6441                 /* check the status */
6442                 if (status & 0x18) {
6443                         /* programming error */
6444                         writel(0, ha->mem_ptr + IPS_REG_FLAP);
6445                         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6446                                 udelay(25);     /* 25 us */
6447
6448                         writeb(0xFF, ha->mem_ptr + IPS_REG_FLDP);
6449                         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6450                                 udelay(25);     /* 25 us */
6451
6452                         return (1);
6453                 }
6454         }                       /* end for */
6455
6456         /* Enable reading */
6457         writel(0, ha->mem_ptr + IPS_REG_FLAP);
6458         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6459                 udelay(25);     /* 25 us */
6460
6461         writeb(0xFF, ha->mem_ptr + IPS_REG_FLDP);
6462         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6463                 udelay(25);     /* 25 us */
6464
6465         return (0);
6466 }
6467
6468 /****************************************************************************/
6469 /*                                                                          */
6470 /* Routine Name: ips_verify_bios                                            */
6471 /*                                                                          */
6472 /* Routine Description:                                                     */
6473 /*   Verify the BIOS on the adapter                                         */
6474 /*                                                                          */
6475 /****************************************************************************/
6476 static int
6477 ips_verify_bios(ips_ha_t * ha, char *buffer, uint32_t buffersize,
6478                 uint32_t offset)
6479 {
6480         uint8_t checksum;
6481         int i;
6482
6483         METHOD_TRACE("ips_verify_bios", 1);
6484
6485         /* test 1st byte */
6486         outl(0, ha->io_addr + IPS_REG_FLAP);
6487         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6488                 udelay(25);     /* 25 us */
6489
6490         if (inb(ha->io_addr + IPS_REG_FLDP) != 0x55)
6491                 return (1);
6492
6493         outl(1, ha->io_addr + IPS_REG_FLAP);
6494         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6495                 udelay(25);     /* 25 us */
6496         if (inb(ha->io_addr + IPS_REG_FLDP) != 0xAA)
6497                 return (1);
6498
6499         checksum = 0xff;
6500         for (i = 2; i < buffersize; i++) {
6501
6502                 outl(i + offset, ha->io_addr + IPS_REG_FLAP);
6503                 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6504                         udelay(25);     /* 25 us */
6505
6506                 checksum = (uint8_t) checksum + inb(ha->io_addr + IPS_REG_FLDP);
6507         }
6508
6509         if (checksum != 0)
6510                 /* failure */
6511                 return (1);
6512         else
6513                 /* success */
6514                 return (0);
6515 }
6516
6517 /****************************************************************************/
6518 /*                                                                          */
6519 /* Routine Name: ips_verify_bios_memio                                      */
6520 /*                                                                          */
6521 /* Routine Description:                                                     */
6522 /*   Verify the BIOS on the adapter                                         */
6523 /*                                                                          */
6524 /****************************************************************************/
6525 static int
6526 ips_verify_bios_memio(ips_ha_t * ha, char *buffer, uint32_t buffersize,
6527                       uint32_t offset)
6528 {
6529         uint8_t checksum;
6530         int i;
6531
6532         METHOD_TRACE("ips_verify_bios_memio", 1);
6533
6534         /* test 1st byte */
6535         writel(0, ha->mem_ptr + IPS_REG_FLAP);
6536         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6537                 udelay(25);     /* 25 us */
6538
6539         if (readb(ha->mem_ptr + IPS_REG_FLDP) != 0x55)
6540                 return (1);
6541
6542         writel(1, ha->mem_ptr + IPS_REG_FLAP);
6543         if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6544                 udelay(25);     /* 25 us */
6545         if (readb(ha->mem_ptr + IPS_REG_FLDP) != 0xAA)
6546                 return (1);
6547
6548         checksum = 0xff;
6549         for (i = 2; i < buffersize; i++) {
6550
6551                 writel(i + offset, ha->mem_ptr + IPS_REG_FLAP);
6552                 if (ha->pcidev->revision == IPS_REVID_TROMBONE64)
6553                         udelay(25);     /* 25 us */
6554
6555                 checksum =
6556                     (uint8_t) checksum + readb(ha->mem_ptr + IPS_REG_FLDP);
6557         }
6558
6559         if (checksum != 0)
6560                 /* failure */
6561                 return (1);
6562         else
6563                 /* success */
6564                 return (0);
6565 }
6566
6567 /****************************************************************************/
6568 /*                                                                          */
6569 /* Routine Name: ips_abort_init                                             */
6570 /*                                                                          */
6571 /* Routine Description:                                                     */
6572 /*   cleanup routine for a failed adapter initialization                    */
6573 /****************************************************************************/
6574 static int
6575 ips_abort_init(ips_ha_t * ha, int index)
6576 {
6577         ha->active = 0;
6578         ips_free(ha);
6579         ips_ha[index] = NULL;
6580         ips_sh[index] = NULL;
6581         return -1;
6582 }
6583
6584 /****************************************************************************/
6585 /*                                                                          */
6586 /* Routine Name: ips_shift_controllers                                      */
6587 /*                                                                          */
6588 /* Routine Description:                                                     */
6589 /*   helper function for ordering adapters                                  */
6590 /****************************************************************************/
6591 static void
6592 ips_shift_controllers(int lowindex, int highindex)
6593 {
6594         ips_ha_t *ha_sav = ips_ha[highindex];
6595         struct Scsi_Host *sh_sav = ips_sh[highindex];
6596         int i;
6597
6598         for (i = highindex; i > lowindex; i--) {
6599                 ips_ha[i] = ips_ha[i - 1];
6600                 ips_sh[i] = ips_sh[i - 1];
6601                 ips_ha[i]->host_num = i;
6602         }
6603         ha_sav->host_num = lowindex;
6604         ips_ha[lowindex] = ha_sav;
6605         ips_sh[lowindex] = sh_sav;
6606 }
6607
6608 /****************************************************************************/
6609 /*                                                                          */
6610 /* Routine Name: ips_order_controllers                                      */
6611 /*                                                                          */
6612 /* Routine Description:                                                     */
6613 /*   place controllers is the "proper" boot order                           */
6614 /****************************************************************************/
6615 static void
6616 ips_order_controllers(void)
6617 {
6618         int i, j, tmp, position = 0;
6619         IPS_NVRAM_P5 *nvram;
6620         if (!ips_ha[0])
6621                 return;
6622         nvram = ips_ha[0]->nvram;
6623
6624         if (nvram->adapter_order[0]) {
6625                 for (i = 1; i <= nvram->adapter_order[0]; i++) {
6626                         for (j = position; j < ips_num_controllers; j++) {
6627                                 switch (ips_ha[j]->ad_type) {
6628                                 case IPS_ADTYPE_SERVERAID6M:
6629                                 case IPS_ADTYPE_SERVERAID7M:
6630                                         if (nvram->adapter_order[i] == 'M') {
6631                                                 ips_shift_controllers(position,
6632                                                                       j);
6633                                                 position++;
6634                                         }
6635                                         break;
6636                                 case IPS_ADTYPE_SERVERAID4L:
6637                                 case IPS_ADTYPE_SERVERAID4M:
6638                                 case IPS_ADTYPE_SERVERAID4MX:
6639                                 case IPS_ADTYPE_SERVERAID4LX:
6640                                         if (nvram->adapter_order[i] == 'N') {
6641                                                 ips_shift_controllers(position,
6642                                                                       j);
6643                                                 position++;
6644                                         }
6645                                         break;
6646                                 case IPS_ADTYPE_SERVERAID6I:
6647                                 case IPS_ADTYPE_SERVERAID5I2:
6648                                 case IPS_ADTYPE_SERVERAID5I1:
6649                                 case IPS_ADTYPE_SERVERAID7k:
6650                                         if (nvram->adapter_order[i] == 'S') {
6651                                                 ips_shift_controllers(position,
6652                                                                       j);
6653                                                 position++;
6654                                         }
6655                                         break;
6656                                 case IPS_ADTYPE_SERVERAID:
6657                                 case IPS_ADTYPE_SERVERAID2:
6658                                 case IPS_ADTYPE_NAVAJO:
6659                                 case IPS_ADTYPE_KIOWA:
6660                                 case IPS_ADTYPE_SERVERAID3L:
6661                                 case IPS_ADTYPE_SERVERAID3:
6662                                 case IPS_ADTYPE_SERVERAID4H:
6663                                         if (nvram->adapter_order[i] == 'A') {
6664                                                 ips_shift_controllers(position,
6665                                                                       j);
6666                                                 position++;
6667                                         }
6668                                         break;
6669                                 default:
6670                                         break;
6671                                 }
6672                         }
6673                 }
6674                 /* if adapter_order[0], then ordering is complete */
6675                 return;
6676         }
6677         /* old bios, use older ordering */
6678         tmp = 0;
6679         for (i = position; i < ips_num_controllers; i++) {
6680                 if (ips_ha[i]->ad_type == IPS_ADTYPE_SERVERAID5I2 ||
6681                     ips_ha[i]->ad_type == IPS_ADTYPE_SERVERAID5I1) {
6682                         ips_shift_controllers(position, i);
6683                         position++;
6684                         tmp = 1;
6685                 }
6686         }
6687         /* if there were no 5I cards, then don't do any extra ordering */
6688         if (!tmp)
6689                 return;
6690         for (i = position; i < ips_num_controllers; i++) {
6691                 if (ips_ha[i]->ad_type == IPS_ADTYPE_SERVERAID4L ||
6692                     ips_ha[i]->ad_type == IPS_ADTYPE_SERVERAID4M ||
6693                     ips_ha[i]->ad_type == IPS_ADTYPE_SERVERAID4LX ||
6694                     ips_ha[i]->ad_type == IPS_ADTYPE_SERVERAID4MX) {
6695                         ips_shift_controllers(position, i);
6696                         position++;
6697                 }
6698         }
6699
6700         return;
6701 }
6702
6703 /****************************************************************************/
6704 /*                                                                          */
6705 /* Routine Name: ips_register_scsi                                          */
6706 /*                                                                          */
6707 /* Routine Description:                                                     */
6708 /*   perform any registration and setup with the scsi layer                 */
6709 /****************************************************************************/
6710 static int
6711 ips_register_scsi(int index)
6712 {
6713         struct Scsi_Host *sh;
6714         ips_ha_t *ha, *oldha = ips_ha[index];
6715         sh = scsi_host_alloc(&ips_driver_template, sizeof (ips_ha_t));
6716         if (!sh) {
6717                 IPS_PRINTK(KERN_WARNING, oldha->pcidev,
6718                            "Unable to register controller with SCSI subsystem\n");
6719                 return -1;
6720         }
6721         ha = IPS_HA(sh);
6722         memcpy(ha, oldha, sizeof (ips_ha_t));
6723         free_irq(oldha->pcidev->irq, oldha);
6724         /* Install the interrupt handler with the new ha */
6725         if (request_irq(ha->pcidev->irq, do_ipsintr, IRQF_SHARED, ips_name, ha)) {
6726                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
6727                            "Unable to install interrupt handler\n");
6728                 goto err_out_sh;
6729         }
6730
6731         kfree(oldha);
6732
6733         /* Store away needed values for later use */
6734         sh->unique_id = (ha->io_addr) ? ha->io_addr : ha->mem_addr;
6735         sh->sg_tablesize = sh->hostt->sg_tablesize;
6736         sh->can_queue = sh->hostt->can_queue;
6737         sh->cmd_per_lun = sh->hostt->cmd_per_lun;
6738         sh->use_clustering = sh->hostt->use_clustering;
6739         sh->max_sectors = 128;
6740
6741         sh->max_id = ha->ntargets;
6742         sh->max_lun = ha->nlun;
6743         sh->max_channel = ha->nbus - 1;
6744         sh->can_queue = ha->max_cmds - 1;
6745
6746         if (scsi_add_host(sh, &ha->pcidev->dev))
6747                 goto err_out;
6748
6749         ips_sh[index] = sh;
6750         ips_ha[index] = ha;
6751
6752         scsi_scan_host(sh);
6753
6754         return 0;
6755
6756 err_out:
6757         free_irq(ha->pcidev->irq, ha);
6758 err_out_sh:
6759         scsi_host_put(sh);
6760         return -1;
6761 }
6762
6763 /*---------------------------------------------------------------------------*/
6764 /*   Routine Name: ips_remove_device                                         */
6765 /*                                                                           */
6766 /*   Routine Description:                                                    */
6767 /*     Remove one Adapter ( Hot Plugging )                                   */
6768 /*---------------------------------------------------------------------------*/
6769 static void
6770 ips_remove_device(struct pci_dev *pci_dev)
6771 {
6772         struct Scsi_Host *sh = pci_get_drvdata(pci_dev);
6773
6774         pci_set_drvdata(pci_dev, NULL);
6775
6776         ips_release(sh);
6777
6778         pci_release_regions(pci_dev);
6779         pci_disable_device(pci_dev);
6780 }
6781
6782 /****************************************************************************/
6783 /*                                                                          */
6784 /* Routine Name: ips_module_init                                            */
6785 /*                                                                          */
6786 /* Routine Description:                                                     */
6787 /*   function called on module load                                         */
6788 /****************************************************************************/
6789 static int __init
6790 ips_module_init(void)
6791 {
6792         if (pci_register_driver(&ips_pci_driver) < 0)
6793                 return -ENODEV;
6794         ips_driver_template.module = THIS_MODULE;
6795         ips_order_controllers();
6796         if (!ips_detect(&ips_driver_template)) {
6797                 pci_unregister_driver(&ips_pci_driver);
6798                 return -ENODEV;
6799         }
6800         register_reboot_notifier(&ips_notifier);
6801         return 0;
6802 }
6803
6804 /****************************************************************************/
6805 /*                                                                          */
6806 /* Routine Name: ips_module_exit                                            */
6807 /*                                                                          */
6808 /* Routine Description:                                                     */
6809 /*   function called on module unload                                       */
6810 /****************************************************************************/
6811 static void __exit
6812 ips_module_exit(void)
6813 {
6814         pci_unregister_driver(&ips_pci_driver);
6815         unregister_reboot_notifier(&ips_notifier);
6816 }
6817
6818 module_init(ips_module_init);
6819 module_exit(ips_module_exit);
6820
6821 /*---------------------------------------------------------------------------*/
6822 /*   Routine Name: ips_insert_device                                         */
6823 /*                                                                           */
6824 /*   Routine Description:                                                    */
6825 /*     Add One Adapter ( Hot Plug )                                          */
6826 /*                                                                           */
6827 /*   Return Value:                                                           */
6828 /*     0 if Successful, else non-zero                                        */
6829 /*---------------------------------------------------------------------------*/
6830 static int
6831 ips_insert_device(struct pci_dev *pci_dev, const struct pci_device_id *ent)
6832 {
6833         int index = -1;
6834         int rc;
6835
6836         METHOD_TRACE("ips_insert_device", 1);
6837         rc = pci_enable_device(pci_dev);
6838         if (rc)
6839                 return rc;
6840
6841         rc = pci_request_regions(pci_dev, "ips");
6842         if (rc)
6843                 goto err_out;
6844
6845         rc = ips_init_phase1(pci_dev, &index);
6846         if (rc == SUCCESS)
6847                 rc = ips_init_phase2(index);
6848
6849         if (ips_hotplug)
6850                 if (ips_register_scsi(index)) {
6851                         ips_free(ips_ha[index]);
6852                         rc = -1;
6853                 }
6854
6855         if (rc == SUCCESS)
6856                 ips_num_controllers++;
6857
6858         ips_next_controller = ips_num_controllers;
6859
6860         if (rc < 0) {
6861                 rc = -ENODEV;
6862                 goto err_out_regions;
6863         }
6864
6865         pci_set_drvdata(pci_dev, ips_sh[index]);
6866         return 0;
6867
6868 err_out_regions:
6869         pci_release_regions(pci_dev);
6870 err_out:
6871         pci_disable_device(pci_dev);
6872         return rc;
6873 }
6874
6875 /*---------------------------------------------------------------------------*/
6876 /*   Routine Name: ips_init_phase1                                           */
6877 /*                                                                           */
6878 /*   Routine Description:                                                    */
6879 /*     Adapter Initialization                                                */
6880 /*                                                                           */
6881 /*   Return Value:                                                           */
6882 /*     0 if Successful, else non-zero                                        */
6883 /*---------------------------------------------------------------------------*/
6884 static int
6885 ips_init_phase1(struct pci_dev *pci_dev, int *indexPtr)
6886 {
6887         ips_ha_t *ha;
6888         uint32_t io_addr;
6889         uint32_t mem_addr;
6890         uint32_t io_len;
6891         uint32_t mem_len;
6892         uint8_t bus;
6893         uint8_t func;
6894         int j;
6895         int index;
6896         dma_addr_t dma_address;
6897         char __iomem *ioremap_ptr;
6898         char __iomem *mem_ptr;
6899         uint32_t IsDead;
6900
6901         METHOD_TRACE("ips_init_phase1", 1);
6902         index = IPS_MAX_ADAPTERS;
6903         for (j = 0; j < IPS_MAX_ADAPTERS; j++) {
6904                 if (ips_ha[j] == NULL) {
6905                         index = j;
6906                         break;
6907                 }
6908         }
6909
6910         if (index >= IPS_MAX_ADAPTERS)
6911                 return -1;
6912
6913         /* stuff that we get in dev */
6914         bus = pci_dev->bus->number;
6915         func = pci_dev->devfn;
6916
6917         /* Init MEM/IO addresses to 0 */
6918         mem_addr = 0;
6919         io_addr = 0;
6920         mem_len = 0;
6921         io_len = 0;
6922
6923         for (j = 0; j < 2; j++) {
6924                 if (!pci_resource_start(pci_dev, j))
6925                         break;
6926
6927                 if (pci_resource_flags(pci_dev, j) & IORESOURCE_IO) {
6928                         io_addr = pci_resource_start(pci_dev, j);
6929                         io_len = pci_resource_len(pci_dev, j);
6930                 } else {
6931                         mem_addr = pci_resource_start(pci_dev, j);
6932                         mem_len = pci_resource_len(pci_dev, j);
6933                 }
6934         }
6935
6936         /* setup memory mapped area (if applicable) */
6937         if (mem_addr) {
6938                 uint32_t base;
6939                 uint32_t offs;
6940
6941                 base = mem_addr & PAGE_MASK;
6942                 offs = mem_addr - base;
6943                 ioremap_ptr = ioremap(base, PAGE_SIZE);
6944                 if (!ioremap_ptr)
6945                         return -1;
6946                 mem_ptr = ioremap_ptr + offs;
6947         } else {
6948                 ioremap_ptr = NULL;
6949                 mem_ptr = NULL;
6950         }
6951
6952         /* found a controller */
6953         ha = kzalloc(sizeof (ips_ha_t), GFP_KERNEL);
6954         if (ha == NULL) {
6955                 IPS_PRINTK(KERN_WARNING, pci_dev,
6956                            "Unable to allocate temporary ha struct\n");
6957                 return -1;
6958         }
6959
6960         ips_sh[index] = NULL;
6961         ips_ha[index] = ha;
6962         ha->active = 1;
6963
6964         /* Store info in HA structure */
6965         ha->io_addr = io_addr;
6966         ha->io_len = io_len;
6967         ha->mem_addr = mem_addr;
6968         ha->mem_len = mem_len;
6969         ha->mem_ptr = mem_ptr;
6970         ha->ioremap_ptr = ioremap_ptr;
6971         ha->host_num = (uint32_t) index;
6972         ha->slot_num = PCI_SLOT(pci_dev->devfn);
6973         ha->pcidev = pci_dev;
6974
6975         /*
6976          * Set the pci_dev's dma_mask.  Not all adapters support 64bit
6977          * addressing so don't enable it if the adapter can't support
6978          * it!  Also, don't use 64bit addressing if dma addresses
6979          * are guaranteed to be < 4G.
6980          */
6981         if (IPS_ENABLE_DMA64 && IPS_HAS_ENH_SGLIST(ha) &&
6982             !pci_set_dma_mask(ha->pcidev, DMA_BIT_MASK(64))) {
6983                 (ha)->flags |= IPS_HA_ENH_SG;
6984         } else {
6985                 if (pci_set_dma_mask(ha->pcidev, DMA_BIT_MASK(32)) != 0) {
6986                         printk(KERN_WARNING "Unable to set DMA Mask\n");
6987                         return ips_abort_init(ha, index);
6988                 }
6989         }
6990         if(ips_cd_boot && !ips_FlashData){
6991                 ips_FlashData = pci_alloc_consistent(pci_dev, PAGE_SIZE << 7,
6992                                                      &ips_flashbusaddr);
6993         }
6994
6995         ha->enq = pci_alloc_consistent(pci_dev, sizeof (IPS_ENQ),
6996                                        &ha->enq_busaddr);
6997         if (!ha->enq) {
6998                 IPS_PRINTK(KERN_WARNING, pci_dev,
6999                            "Unable to allocate host inquiry structure\n");
7000                 return ips_abort_init(ha, index);
7001         }
7002
7003         ha->adapt = pci_alloc_consistent(pci_dev, sizeof (IPS_ADAPTER) +
7004                                          sizeof (IPS_IO_CMD), &dma_address);
7005         if (!ha->adapt) {
7006                 IPS_PRINTK(KERN_WARNING, pci_dev,
7007                            "Unable to allocate host adapt & dummy structures\n");
7008                 return ips_abort_init(ha, index);
7009         }
7010         ha->adapt->hw_status_start = dma_address;
7011         ha->dummy = (void *) (ha->adapt + 1);
7012
7013
7014
7015         ha->logical_drive_info = pci_alloc_consistent(pci_dev, sizeof (IPS_LD_INFO), &dma_address);
7016         if (!ha->logical_drive_info) {
7017                 IPS_PRINTK(KERN_WARNING, pci_dev,
7018                            "Unable to allocate logical drive info structure\n");
7019                 return ips_abort_init(ha, index);
7020         }
7021         ha->logical_drive_info_dma_addr = dma_address;
7022
7023
7024         ha->conf = kmalloc(sizeof (IPS_CONF), GFP_KERNEL);
7025
7026         if (!ha->conf) {
7027                 IPS_PRINTK(KERN_WARNING, pci_dev,
7028                            "Unable to allocate host conf structure\n");
7029                 return ips_abort_init(ha, index);
7030         }
7031
7032         ha->nvram = kmalloc(sizeof (IPS_NVRAM_P5), GFP_KERNEL);
7033
7034         if (!ha->nvram) {
7035                 IPS_PRINTK(KERN_WARNING, pci_dev,
7036                            "Unable to allocate host NVRAM structure\n");
7037                 return ips_abort_init(ha, index);
7038         }
7039
7040         ha->subsys = kmalloc(sizeof (IPS_SUBSYS), GFP_KERNEL);
7041
7042         if (!ha->subsys) {
7043                 IPS_PRINTK(KERN_WARNING, pci_dev,
7044                            "Unable to allocate host subsystem structure\n");
7045                 return ips_abort_init(ha, index);
7046         }
7047
7048         /* the ioctl buffer is now used during adapter initialization, so its
7049          * successful allocation is now required */
7050         if (ips_ioctlsize < PAGE_SIZE)
7051                 ips_ioctlsize = PAGE_SIZE;
7052
7053         ha->ioctl_data = pci_alloc_consistent(pci_dev, ips_ioctlsize,
7054                                               &ha->ioctl_busaddr);
7055         ha->ioctl_len = ips_ioctlsize;
7056         if (!ha->ioctl_data) {
7057                 IPS_PRINTK(KERN_WARNING, pci_dev,
7058                            "Unable to allocate IOCTL data\n");
7059                 return ips_abort_init(ha, index);
7060         }
7061
7062         /*
7063          * Setup Functions
7064          */
7065         ips_setup_funclist(ha);
7066
7067         if ((IPS_IS_MORPHEUS(ha)) || (IPS_IS_MARCO(ha))) {
7068                 /* If Morpheus appears dead, reset it */
7069                 IsDead = readl(ha->mem_ptr + IPS_REG_I960_MSG1);
7070                 if (IsDead == 0xDEADBEEF) {
7071                         ips_reset_morpheus(ha);
7072                 }
7073         }
7074
7075         /*
7076          * Initialize the card if it isn't already
7077          */
7078
7079         if (!(*ha->func.isinit) (ha)) {
7080                 if (!(*ha->func.init) (ha)) {
7081                         /*
7082                          * Initialization failed
7083                          */
7084                         IPS_PRINTK(KERN_WARNING, pci_dev,
7085                                    "Unable to initialize controller\n");
7086                         return ips_abort_init(ha, index);
7087                 }
7088         }
7089
7090         *indexPtr = index;
7091         return SUCCESS;
7092 }
7093
7094 /*---------------------------------------------------------------------------*/
7095 /*   Routine Name: ips_init_phase2                                           */
7096 /*                                                                           */
7097 /*   Routine Description:                                                    */
7098 /*     Adapter Initialization Phase 2                                        */
7099 /*                                                                           */
7100 /*   Return Value:                                                           */
7101 /*     0 if Successful, else non-zero                                        */
7102 /*---------------------------------------------------------------------------*/
7103 static int
7104 ips_init_phase2(int index)
7105 {
7106         ips_ha_t *ha;
7107
7108         ha = ips_ha[index];
7109
7110         METHOD_TRACE("ips_init_phase2", 1);
7111         if (!ha->active) {
7112                 ips_ha[index] = NULL;
7113                 return -1;
7114         }
7115
7116         /* Install the interrupt handler */
7117         if (request_irq(ha->pcidev->irq, do_ipsintr, IRQF_SHARED, ips_name, ha)) {
7118                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
7119                            "Unable to install interrupt handler\n");
7120                 return ips_abort_init(ha, index);
7121         }
7122
7123         /*
7124          * Allocate a temporary SCB for initialization
7125          */
7126         ha->max_cmds = 1;
7127         if (!ips_allocatescbs(ha)) {
7128                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
7129                            "Unable to allocate a CCB\n");
7130                 free_irq(ha->pcidev->irq, ha);
7131                 return ips_abort_init(ha, index);
7132         }
7133
7134         if (!ips_hainit(ha)) {
7135                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
7136                            "Unable to initialize controller\n");
7137                 free_irq(ha->pcidev->irq, ha);
7138                 return ips_abort_init(ha, index);
7139         }
7140         /* Free the temporary SCB */
7141         ips_deallocatescbs(ha, 1);
7142
7143         /* allocate CCBs */
7144         if (!ips_allocatescbs(ha)) {
7145                 IPS_PRINTK(KERN_WARNING, ha->pcidev,
7146                            "Unable to allocate CCBs\n");
7147                 free_irq(ha->pcidev->irq, ha);
7148                 return ips_abort_init(ha, index);
7149         }
7150
7151         return SUCCESS;
7152 }
7153
7154 MODULE_LICENSE("GPL");
7155 MODULE_DESCRIPTION("IBM ServeRAID Adapter Driver " IPS_VER_STRING);
7156 MODULE_VERSION(IPS_VER_STRING);
7157
7158
7159 /*
7160  * Overrides for Emacs so that we almost follow Linus's tabbing style.
7161  * Emacs will notice this stuff at the end of the file and automatically
7162  * adjust the settings for this buffer only.  This must remain at the end
7163  * of the file.
7164  * ---------------------------------------------------------------------------
7165  * Local variables:
7166  * c-indent-level: 2
7167  * c-brace-imaginary-offset: 0
7168  * c-brace-offset: -2
7169  * c-argdecl-indent: 2
7170  * c-label-offset: -2
7171  * c-continued-statement-offset: 2
7172  * c-continued-brace-offset: 0
7173  * indent-tabs-mode: nil
7174  * tab-width: 8
7175  * End:
7176  */