1 // SPDX-License-Identifier: GPL-2.0
3 * Precise Delay Loops for i386
5 * Copyright (C) 1993 Linus Torvalds
7 * Copyright (C) 2008 Jiri Hladky <hladky _dot_ jiri _at_ gmail _dot_ com>
9 * The __delay function must _NOT_ be inlined as its execution time
10 * depends wildly on alignment on many x86 processors. The additional
11 * jump magic is needed to get the timing stable on all the CPU's
12 * we have to worry about.
15 #include <linux/export.h>
16 #include <linux/sched.h>
17 #include <linux/timex.h>
18 #include <linux/preempt.h>
19 #include <linux/delay.h>
21 #include <asm/processor.h>
22 #include <asm/delay.h>
23 #include <asm/timer.h>
24 #include <asm/mwait.h>
30 /* simple loop based delay: */
31 static void delay_loop(unsigned long loops)
46 : /* we don't need output */
51 /* TSC based delay: */
52 static void delay_tsc(unsigned long __loops)
54 u64 bclock, now, loops = __loops;
58 cpu = smp_processor_id();
59 bclock = rdtsc_ordered();
61 now = rdtsc_ordered();
62 if ((now - bclock) >= loops)
65 /* Allow RT tasks to run */
71 * It is possible that we moved to another CPU, and
72 * since TSC's are per-cpu we need to calculate
73 * that. The delay must guarantee that we wait "at
74 * least" the amount of time. Being moved to another
75 * CPU could make the wait longer but we just need to
76 * make sure we waited long enough. Rebalance the
77 * counter for this CPU.
79 if (unlikely(cpu != smp_processor_id())) {
80 loops -= (now - bclock);
81 cpu = smp_processor_id();
82 bclock = rdtsc_ordered();
89 * On some AMD platforms, MWAITX has a configurable 32-bit timer, that
90 * counts with TSC frequency. The input value is the loop of the
91 * counter, it will exit when the timer expires.
93 static void delay_mwaitx(unsigned long __loops)
95 u64 start, end, delay, loops = __loops;
98 * Timer value of 0 causes MWAITX to wait indefinitely, unless there
99 * is a store on the memory monitored by MONITORX.
104 start = rdtsc_ordered();
107 delay = min_t(u64, MWAITX_MAX_LOOPS, loops);
110 * Use cpu_tss_rw as a cacheline-aligned, seldomly
111 * accessed per-cpu variable as the monitor target.
113 __monitorx(raw_cpu_ptr(&cpu_tss_rw), 0, 0);
116 * AMD, like Intel, supports the EAX hint and EAX=0xf
117 * means, do not enter any deep C-state and we use it
118 * here in delay() to minimize wakeup latency.
120 __mwaitx(MWAITX_DISABLE_CSTATES, delay, MWAITX_ECX_TIMER_ENABLE);
122 end = rdtsc_ordered();
124 if (loops <= end - start)
127 loops -= end - start;
134 * Since we calibrate only once at boot, this
135 * function should be set once at boot and not changed
137 static void (*delay_fn)(unsigned long) = delay_loop;
139 void use_tsc_delay(void)
141 if (delay_fn == delay_loop)
142 delay_fn = delay_tsc;
145 void use_mwaitx_delay(void)
147 delay_fn = delay_mwaitx;
150 int read_current_timer(unsigned long *timer_val)
152 if (delay_fn == delay_tsc) {
153 *timer_val = rdtsc();
159 void __delay(unsigned long loops)
163 EXPORT_SYMBOL(__delay);
165 noinline void __const_udelay(unsigned long xloops)
167 unsigned long lpj = this_cpu_read(cpu_info.loops_per_jiffy) ? : loops_per_jiffy;
172 :"=d" (xloops), "=&a" (d0)
173 :"1" (xloops), "0" (lpj * (HZ / 4)));
177 EXPORT_SYMBOL(__const_udelay);
179 void __udelay(unsigned long usecs)
181 __const_udelay(usecs * 0x000010c7); /* 2**32 / 1000000 (rounded up) */
183 EXPORT_SYMBOL(__udelay);
185 void __ndelay(unsigned long nsecs)
187 __const_udelay(nsecs * 0x00005); /* 2**32 / 1000000000 (rounded up) */
189 EXPORT_SYMBOL(__ndelay);