1 /*****************************************************************************/
4 * baycom_epp.c -- baycom epp radio modem driver.
6 * Copyright (C) 1998-2000
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 * Please note that the GPL allows you to use the driver, NOT the radio.
24 * In order to use the radio, you need a license from the communications
25 * authority of your country.
29 * 0.1 xx.xx.1998 Initial version by Matthias Welwarsky (dg2fef)
30 * 0.2 21.04.1998 Massive rework by Thomas Sailer
31 * Integrated FPGA EPP modem configuration routines
32 * 0.3 11.05.1998 Took FPGA config out and moved it into a separate program
33 * 0.4 26.07.1999 Adapted to new lowlevel parport driver interface
34 * 0.5 03.08.1999 adapt to Linus' new __setup/__initcall
35 * removed some pre-2.2 kernel compatibility cruft
36 * 0.6 10.08.1999 Check if parport can do SPP and is safe to access during interrupt contexts
37 * 0.7 12.02.2000 adapted to softnet driver interface
41 /*****************************************************************************/
43 #include <linux/crc-ccitt.h>
44 #include <linux/module.h>
45 #include <linux/kernel.h>
46 #include <linux/init.h>
47 #include <linux/sched.h>
48 #include <linux/string.h>
49 #include <linux/workqueue.h>
51 #include <linux/parport.h>
52 #include <linux/if_arp.h>
53 #include <linux/hdlcdrv.h>
54 #include <linux/baycom.h>
55 #include <linux/jiffies.h>
56 #include <linux/random.h>
58 #include <linux/uaccess.h>
60 /* --------------------------------------------------------------------- */
63 #define BAYCOM_MAGIC 19730510
65 /* --------------------------------------------------------------------- */
67 static const char paranoia_str[] = KERN_ERR
68 "baycom_epp: bad magic number for hdlcdrv_state struct in routine %s\n";
70 static const char bc_drvname[] = "baycom_epp";
71 static const char bc_drvinfo[] = KERN_INFO "baycom_epp: (C) 1998-2000 Thomas Sailer, HB9JNX/AE4WA\n"
72 "baycom_epp: version 0.7\n";
74 /* --------------------------------------------------------------------- */
78 static struct net_device *baycom_device[NR_PORTS];
80 /* --------------------------------------------------------------------- */
82 /* EPP status register */
83 #define EPP_DCDBIT 0x80
84 #define EPP_PTTBIT 0x08
86 #define EPP_NRAEF 0x02
89 #define EPP_NTAEF 0x10
90 #define EPP_NTEF EPP_PTTBIT
92 /* EPP control register */
93 #define EPP_TX_FIFO_ENABLE 0x10
94 #define EPP_RX_FIFO_ENABLE 0x08
95 #define EPP_MODEM_ENABLE 0x20
97 #define EPP_IRQ_ENABLE 0x10
100 #define LPTREG_ECONTROL 0x402
101 #define LPTREG_CONFIGB 0x401
102 #define LPTREG_CONFIGA 0x400
103 #define LPTREG_EPPDATA 0x004
104 #define LPTREG_EPPADDR 0x003
105 #define LPTREG_CONTROL 0x002
106 #define LPTREG_STATUS 0x001
107 #define LPTREG_DATA 0x000
109 /* LPT control register */
110 #define LPTCTRL_PROGRAM 0x04 /* 0 to reprogram */
111 #define LPTCTRL_WRITE 0x01
112 #define LPTCTRL_ADDRSTB 0x08
113 #define LPTCTRL_DATASTB 0x02
114 #define LPTCTRL_INTEN 0x10
116 /* LPT status register */
117 #define LPTSTAT_SHIFT_NINTR 6
118 #define LPTSTAT_WAIT 0x80
119 #define LPTSTAT_NINTR (1<<LPTSTAT_SHIFT_NINTR)
120 #define LPTSTAT_PE 0x20
121 #define LPTSTAT_DONE 0x10
122 #define LPTSTAT_NERROR 0x08
123 #define LPTSTAT_EPPTIMEOUT 0x01
125 /* LPT data register */
126 #define LPTDATA_SHIFT_TDI 0
127 #define LPTDATA_SHIFT_TMS 2
128 #define LPTDATA_TDI (1<<LPTDATA_SHIFT_TDI)
129 #define LPTDATA_TCK 0x02
130 #define LPTDATA_TMS (1<<LPTDATA_SHIFT_TMS)
131 #define LPTDATA_INITBIAS 0x80
134 /* EPP modem config/status bits */
135 #define EPP_DCDBIT 0x80
136 #define EPP_PTTBIT 0x08
137 #define EPP_RXEBIT 0x01
138 #define EPP_RXAEBIT 0x02
139 #define EPP_RXHFULL 0x04
141 #define EPP_NTHF 0x20
142 #define EPP_NTAEF 0x10
143 #define EPP_NTEF EPP_PTTBIT
145 #define EPP_TX_FIFO_ENABLE 0x10
146 #define EPP_RX_FIFO_ENABLE 0x08
147 #define EPP_MODEM_ENABLE 0x20
148 #define EPP_LEDS 0xC0
149 #define EPP_IRQ_ENABLE 0x10
151 /* Xilinx 4k JTAG instructions */
152 #define XC4K_IRLENGTH 3
153 #define XC4K_EXTEST 0
154 #define XC4K_PRELOAD 1
155 #define XC4K_CONFIGURE 5
156 #define XC4K_BYPASS 7
158 #define EPP_CONVENTIONAL 0
160 #define EPP_FPGAEXTSTATUS 2
162 #define TXBUFFER_SIZE ((HDLCDRV_MAXFLEN*6/5)+8)
164 /* ---------------------------------------------------------------------- */
166 * Information that need to be kept for each board.
169 struct baycom_state {
172 struct pardevice *pdev;
173 struct net_device *dev;
174 unsigned int work_running;
175 struct delayed_work run_work;
177 unsigned int bitrate;
184 unsigned int extmodem;
185 unsigned int loopback;
188 struct hdlcdrv_channel_params ch_params;
191 unsigned int bitbuf, bitstream, numbits, state;
192 unsigned char *bufptr;
194 unsigned char buf[TXBUFFER_SIZE];
201 enum { tx_idle = 0, tx_keyup, tx_data, tx_tail } state;
202 unsigned char *bufptr;
204 unsigned char buf[TXBUFFER_SIZE];
207 unsigned int ptt_keyed;
208 struct sk_buff *skb; /* next transmit packet */
212 unsigned long last_jiffies;
214 unsigned last_intcnt;
217 unsigned int mod_cycles;
218 unsigned int demod_cycles;
220 #endif /* BAYCOM_DEBUG */
223 /* --------------------------------------------------------------------- */
227 /* --------------------------------------------------------------------- */
229 #define PARAM_TXDELAY 1
230 #define PARAM_PERSIST 2
231 #define PARAM_SLOTTIME 3
232 #define PARAM_TXTAIL 4
233 #define PARAM_FULLDUP 5
234 #define PARAM_HARDWARE 6
235 #define PARAM_RETURN 255
237 /* --------------------------------------------------------------------- */
239 * the CRC routines are stolen from WAMPES
244 /*---------------------------------------------------------------------------*/
247 static inline void append_crc_ccitt(unsigned char *buffer, int len)
249 unsigned int crc = 0xffff;
252 crc = (crc >> 8) ^ crc_ccitt_table[(crc ^ *buffer++) & 0xff];
255 *buffer++ = crc >> 8;
259 /*---------------------------------------------------------------------------*/
261 static inline int check_crc_ccitt(const unsigned char *buf, int cnt)
263 return (crc_ccitt(0xffff, buf, cnt) & 0xffff) == 0xf0b8;
266 /*---------------------------------------------------------------------------*/
268 static inline int calc_crc_ccitt(const unsigned char *buf, int cnt)
270 return (crc_ccitt(0xffff, buf, cnt) ^ 0xffff) & 0xffff;
273 /* ---------------------------------------------------------------------- */
275 #define tenms_to_flags(bc,tenms) ((tenms * bc->bitrate) / 800)
277 /* --------------------------------------------------------------------- */
279 static inline void baycom_int_freq(struct baycom_state *bc)
282 unsigned long cur_jiffies = jiffies;
284 * measure the interrupt frequency
286 bc->debug_vals.cur_intcnt++;
287 if (time_after_eq(cur_jiffies, bc->debug_vals.last_jiffies + HZ)) {
288 bc->debug_vals.last_jiffies = cur_jiffies;
289 bc->debug_vals.last_intcnt = bc->debug_vals.cur_intcnt;
290 bc->debug_vals.cur_intcnt = 0;
291 bc->debug_vals.last_pllcorr = bc->debug_vals.cur_pllcorr;
292 bc->debug_vals.cur_pllcorr = 0;
294 #endif /* BAYCOM_DEBUG */
297 /* ---------------------------------------------------------------------- */
299 * eppconfig_path should be setable via /proc/sys.
302 static char const eppconfig_path[] = "/usr/sbin/eppfpga";
304 static char *envp[] = { "HOME=/", "TERM=linux", "PATH=/usr/bin:/bin", NULL };
306 /* eppconfig: called during ifconfig up to configure the modem */
307 static int eppconfig(struct baycom_state *bc)
312 (char *)eppconfig_path,
318 /* set up arguments */
319 sprintf(modearg, "%sclk,%smodem,fclk=%d,bps=%d,divider=%d%s,extstat",
320 bc->cfg.intclk ? "int" : "ext",
321 bc->cfg.extmodem ? "ext" : "int", bc->cfg.fclk, bc->cfg.bps,
322 (bc->cfg.fclk + 8 * bc->cfg.bps) / (16 * bc->cfg.bps),
323 bc->cfg.loopback ? ",loopback" : "");
324 sprintf(portarg, "%ld", bc->pdev->port->base);
325 printk(KERN_DEBUG "%s: %s -s -p %s -m %s\n", bc_drvname, eppconfig_path, portarg, modearg);
327 return call_usermodehelper(eppconfig_path, argv, envp, UMH_WAIT_PROC);
330 /* ---------------------------------------------------------------------- */
332 static inline void do_kiss_params(struct baycom_state *bc,
333 unsigned char *data, unsigned long len)
337 #define PKP(a,b) printk(KERN_INFO "baycomm_epp: channel params: " a "\n", b)
338 #else /* KISS_VERBOSE */
340 #endif /* KISS_VERBOSE */
346 bc->ch_params.tx_delay = data[1];
347 PKP("TX delay = %ums", 10 * bc->ch_params.tx_delay);
350 bc->ch_params.ppersist = data[1];
351 PKP("p persistence = %u", bc->ch_params.ppersist);
354 bc->ch_params.slottime = data[1];
355 PKP("slot time = %ums", bc->ch_params.slottime);
358 bc->ch_params.tx_tail = data[1];
359 PKP("TX tail = %ums", bc->ch_params.tx_tail);
362 bc->ch_params.fulldup = !!data[1];
363 PKP("%s duplex", bc->ch_params.fulldup ? "full" : "half");
371 /* --------------------------------------------------------------------- */
373 static void encode_hdlc(struct baycom_state *bc)
376 unsigned char *wp, *bp;
378 unsigned bitstream, notbitstream, bitbuf, numbit, crc;
379 unsigned char crcarr[2];
382 if (bc->hdlctx.bufcnt > 0)
388 pkt_len = skb->len-1; /* strip KISS byte */
391 crc = calc_crc_ccitt(bp, pkt_len);
393 crcarr[1] = crc >> 8;
395 bitstream = bitbuf = numbit = 0;
396 while (pkt_len > -2) {
398 bitstream |= ((unsigned int)*bp) << 8;
399 bitbuf |= ((unsigned int)*bp) << numbit;
400 notbitstream = ~bitstream;
405 for (j = 0; j < 8; j++)
406 if (unlikely(!(notbitstream & (0x1f0 << j)))) {
407 bitstream &= ~(0x100 << j);
408 bitbuf = (bitbuf & (((2 << j) << numbit) - 1)) |
409 ((bitbuf & ~(((2 << j) << numbit) - 1)) << 1);
411 notbitstream = ~bitstream;
414 while (numbit >= 8) {
420 bitbuf |= 0x7e7e << numbit;
422 while (numbit >= 8) {
427 bc->hdlctx.bufptr = bc->hdlctx.buf;
428 bc->hdlctx.bufcnt = wp - bc->hdlctx.buf;
430 bc->dev->stats.tx_packets++;
433 /* ---------------------------------------------------------------------- */
435 static int transmit(struct baycom_state *bc, int cnt, unsigned char stat)
437 struct parport *pp = bc->pdev->port;
438 unsigned char tmp[128];
441 if (bc->hdlctx.state == tx_tail && !(stat & EPP_PTTBIT))
442 bc->hdlctx.state = tx_idle;
443 if (bc->hdlctx.state == tx_idle && bc->hdlctx.calibrate <= 0) {
444 if (bc->hdlctx.bufcnt <= 0)
446 if (bc->hdlctx.bufcnt <= 0)
448 if (!bc->ch_params.fulldup) {
449 if (!(stat & EPP_DCDBIT)) {
450 bc->hdlctx.slotcnt = bc->ch_params.slottime;
453 if ((--bc->hdlctx.slotcnt) > 0)
455 bc->hdlctx.slotcnt = bc->ch_params.slottime;
456 if ((prandom_u32() % 256) > bc->ch_params.ppersist)
460 if (bc->hdlctx.state == tx_idle && bc->hdlctx.bufcnt > 0) {
461 bc->hdlctx.state = tx_keyup;
462 bc->hdlctx.flags = tenms_to_flags(bc, bc->ch_params.tx_delay);
466 switch (bc->hdlctx.state) {
468 i = min_t(int, cnt, bc->hdlctx.flags);
470 bc->hdlctx.flags -= i;
471 if (bc->hdlctx.flags <= 0)
472 bc->hdlctx.state = tx_data;
473 memset(tmp, 0x7e, sizeof(tmp));
475 j = (i > sizeof(tmp)) ? sizeof(tmp) : i;
476 if (j != pp->ops->epp_write_data(pp, tmp, j, 0))
483 if (bc->hdlctx.bufcnt <= 0) {
485 if (bc->hdlctx.bufcnt <= 0) {
486 bc->hdlctx.state = tx_tail;
487 bc->hdlctx.flags = tenms_to_flags(bc, bc->ch_params.tx_tail);
491 i = min_t(int, cnt, bc->hdlctx.bufcnt);
492 bc->hdlctx.bufcnt -= i;
494 if (i != pp->ops->epp_write_data(pp, bc->hdlctx.bufptr, i, 0))
496 bc->hdlctx.bufptr += i;
501 if (bc->hdlctx.bufcnt > 0) {
502 bc->hdlctx.state = tx_data;
505 i = min_t(int, cnt, bc->hdlctx.flags);
508 bc->hdlctx.flags -= i;
509 memset(tmp, 0x7e, sizeof(tmp));
511 j = (i > sizeof(tmp)) ? sizeof(tmp) : i;
512 if (j != pp->ops->epp_write_data(pp, tmp, j, 0))
519 default: /* fall through */
520 if (bc->hdlctx.calibrate <= 0)
522 i = min_t(int, cnt, bc->hdlctx.calibrate);
524 bc->hdlctx.calibrate -= i;
525 memset(tmp, 0, sizeof(tmp));
527 j = (i > sizeof(tmp)) ? sizeof(tmp) : i;
528 if (j != pp->ops->epp_write_data(pp, tmp, j, 0))
538 /* ---------------------------------------------------------------------- */
540 static void do_rxpacket(struct net_device *dev)
542 struct baycom_state *bc = netdev_priv(dev);
547 if (bc->hdlcrx.bufcnt < 4)
549 if (!check_crc_ccitt(bc->hdlcrx.buf, bc->hdlcrx.bufcnt))
551 pktlen = bc->hdlcrx.bufcnt-2+1; /* KISS kludge */
552 if (!(skb = dev_alloc_skb(pktlen))) {
553 printk("%s: memory squeeze, dropping packet\n", dev->name);
554 dev->stats.rx_dropped++;
557 cp = skb_put(skb, pktlen);
558 *cp++ = 0; /* KISS kludge */
559 memcpy(cp, bc->hdlcrx.buf, pktlen - 1);
560 skb->protocol = ax25_type_trans(skb, dev);
562 dev->stats.rx_packets++;
565 static int receive(struct net_device *dev, int cnt)
567 struct baycom_state *bc = netdev_priv(dev);
568 struct parport *pp = bc->pdev->port;
569 unsigned int bitbuf, notbitstream, bitstream, numbits, state;
570 unsigned char tmp[128];
575 numbits = bc->hdlcrx.numbits;
576 state = bc->hdlcrx.state;
577 bitstream = bc->hdlcrx.bitstream;
578 bitbuf = bc->hdlcrx.bitbuf;
580 cnt2 = (cnt > sizeof(tmp)) ? sizeof(tmp) : cnt;
582 if (cnt2 != pp->ops->epp_read_data(pp, tmp, cnt2, 0)) {
587 for (; cnt2 > 0; cnt2--, cp++) {
589 bitstream |= (*cp) << 8;
591 bitbuf |= (*cp) << 8;
593 notbitstream = ~bitstream;
594 for (j = 0; j < 8; j++) {
597 if (unlikely(!(notbitstream & (0x0fc << j)))) {
600 if (!(notbitstream & (0x1fc << j)))
604 else if ((bitstream & (0x1fe << j)) == (0x0fc << j)) {
607 bc->hdlcrx.bufcnt = 0;
608 bc->hdlcrx.bufptr = bc->hdlcrx.buf;
615 else if (unlikely((bitstream & (0x1f8 << j)) == (0xf8 << j))) {
617 bitbuf = (bitbuf & ((~0xff) << j)) | ((bitbuf & ~((~0xff) << j)) << 1);
620 while (state && numbits >= 8) {
621 if (bc->hdlcrx.bufcnt >= TXBUFFER_SIZE) {
624 *(bc->hdlcrx.bufptr)++ = bitbuf >> (16-numbits);
631 bc->hdlcrx.numbits = numbits;
632 bc->hdlcrx.state = state;
633 bc->hdlcrx.bitstream = bitstream;
634 bc->hdlcrx.bitbuf = bitbuf;
638 /* --------------------------------------------------------------------- */
644 if (boot_cpu_has(X86_FEATURE_TSC)) \
645 x = (unsigned int)rdtsc(); \
649 #endif /* __i386__ */
651 static void epp_bh(struct work_struct *work)
653 struct net_device *dev;
654 struct baycom_state *bc;
657 unsigned char tmp[2];
658 unsigned int time1 = 0, time2 = 0, time3 = 0;
661 bc = container_of(work, struct baycom_state, run_work.work);
663 if (!bc->work_running)
668 if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1)
671 bc->debug_vals.last_pllcorr = stat;
673 if (bc->modem == EPP_FPGAEXTSTATUS) {
674 /* get input count */
675 tmp[0] = EPP_TX_FIFO_ENABLE|EPP_RX_FIFO_ENABLE|EPP_MODEM_ENABLE|1;
676 if (pp->ops->epp_write_addr(pp, tmp, 1, 0) != 1)
678 if (pp->ops->epp_read_addr(pp, tmp, 2, 0) != 2)
680 cnt = tmp[0] | (tmp[1] << 8);
682 /* get output count */
683 tmp[0] = EPP_TX_FIFO_ENABLE|EPP_RX_FIFO_ENABLE|EPP_MODEM_ENABLE|2;
684 if (pp->ops->epp_write_addr(pp, tmp, 1, 0) != 1)
686 if (pp->ops->epp_read_addr(pp, tmp, 2, 0) != 2)
688 cnt2 = tmp[0] | (tmp[1] << 8);
689 cnt2 = 16384 - (cnt2 & 0x7fff);
690 /* return to normal */
691 tmp[0] = EPP_TX_FIFO_ENABLE|EPP_RX_FIFO_ENABLE|EPP_MODEM_ENABLE;
692 if (pp->ops->epp_write_addr(pp, tmp, 1, 0) != 1)
694 if (transmit(bc, cnt2, stat))
697 if (receive(dev, cnt))
699 if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1)
704 switch (stat & (EPP_NTAEF|EPP_NTHF)) {
721 if (transmit(bc, cnt, stat))
725 while ((stat & (EPP_NRAEF|EPP_NRHF)) != EPP_NRHF) {
726 switch (stat & (EPP_NRAEF|EPP_NRHF)) {
739 if (receive(dev, cnt))
741 if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1)
745 if (bc->bitrate < 50000)
747 else if (bc->bitrate < 100000)
749 while (cnt > 0 && stat & EPP_NREF) {
753 if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1)
759 bc->debug_vals.mod_cycles = time2 - time1;
760 bc->debug_vals.demod_cycles = time3 - time2;
761 #endif /* BAYCOM_DEBUG */
762 schedule_delayed_work(&bc->run_work, 1);
764 netif_wake_queue(dev);
767 printk(KERN_ERR "%s: EPP timeout!\n", bc_drvname);
770 /* ---------------------------------------------------------------------- */
772 * ===================== network driver interface =========================
775 static int baycom_send_packet(struct sk_buff *skb, struct net_device *dev)
777 struct baycom_state *bc = netdev_priv(dev);
779 if (skb->protocol == htons(ETH_P_IP))
780 return ax25_ip_xmit(skb);
782 if (skb->data[0] != 0) {
783 do_kiss_params(bc, skb->data, skb->len);
791 /* strip KISS byte */
792 if (skb->len >= HDLCDRV_MAXFLEN+1 || skb->len < 3) {
796 netif_stop_queue(dev);
801 /* --------------------------------------------------------------------- */
803 static int baycom_set_mac_address(struct net_device *dev, void *addr)
805 struct sockaddr *sa = (struct sockaddr *)addr;
807 /* addr is an AX.25 shifted ASCII mac address */
808 memcpy(dev->dev_addr, sa->sa_data, dev->addr_len);
812 /* --------------------------------------------------------------------- */
814 static void epp_wakeup(void *handle)
816 struct net_device *dev = (struct net_device *)handle;
817 struct baycom_state *bc = netdev_priv(dev);
819 printk(KERN_DEBUG "baycom_epp: %s: why am I being woken up?\n", dev->name);
820 if (!parport_claim(bc->pdev))
821 printk(KERN_DEBUG "baycom_epp: %s: I'm broken.\n", dev->name);
824 /* --------------------------------------------------------------------- */
827 * Open/initialize the board. This is called (in the current kernel)
828 * sometime after booting when the 'ifconfig' program is run.
830 * This routine should set everything up anew at each open, even
831 * registers that "should" only need to be set once at boot, so that
832 * there is non-reboot way to recover if something goes wrong.
835 static int epp_open(struct net_device *dev)
837 struct baycom_state *bc = netdev_priv(dev);
838 struct parport *pp = parport_find_base(dev->base_addr);
840 unsigned char tmp[128];
842 unsigned long tstart;
843 struct pardev_cb par_cb;
846 printk(KERN_ERR "%s: parport at 0x%lx unknown\n", bc_drvname, dev->base_addr);
851 printk(KERN_ERR "%s: parport at 0x%lx has no irq\n", bc_drvname, pp->base);
852 parport_put_port(pp);
856 if ((~pp->modes) & (PARPORT_MODE_TRISTATE | PARPORT_MODE_PCSPP | PARPORT_MODE_SAFEININT)) {
857 printk(KERN_ERR "%s: parport at 0x%lx cannot be used\n",
858 bc_drvname, pp->base);
859 parport_put_port(pp);
862 memset(&bc->modem, 0, sizeof(bc->modem));
863 memset(&par_cb, 0, sizeof(par_cb));
864 par_cb.wakeup = epp_wakeup;
865 par_cb.private = (void *)dev;
866 par_cb.flags = PARPORT_DEV_EXCL;
867 for (i = 0; i < NR_PORTS; i++)
868 if (baycom_device[i] == dev)
872 pr_err("%s: no device found\n", bc_drvname);
873 parport_put_port(pp);
877 bc->pdev = parport_register_dev_model(pp, dev->name, &par_cb, i);
878 parport_put_port(pp);
880 printk(KERN_ERR "%s: cannot register parport at 0x%lx\n", bc_drvname, pp->base);
883 if (parport_claim(bc->pdev)) {
884 printk(KERN_ERR "%s: parport at 0x%lx busy\n", bc_drvname, pp->base);
885 parport_unregister_device(bc->pdev);
888 dev->irq = /*pp->irq*/ 0;
889 INIT_DELAYED_WORK(&bc->run_work, epp_bh);
890 bc->work_running = 1;
891 bc->modem = EPP_CONVENTIONAL;
893 printk(KERN_INFO "%s: no FPGA detected, assuming conventional EPP modem\n", bc_drvname);
895 bc->modem = /*EPP_FPGA*/ EPP_FPGAEXTSTATUS;
896 parport_write_control(pp, LPTCTRL_PROGRAM); /* prepare EPP mode; we aren't using interrupts */
897 /* reset the modem */
899 tmp[1] = EPP_TX_FIFO_ENABLE|EPP_RX_FIFO_ENABLE|EPP_MODEM_ENABLE;
900 if (pp->ops->epp_write_addr(pp, tmp, 2, 0) != 2)
902 /* autoprobe baud rate */
905 while (time_before(jiffies, tstart + HZ/3)) {
906 if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1)
908 if ((stat & (EPP_NRAEF|EPP_NRHF)) == EPP_NRHF) {
912 if (pp->ops->epp_read_data(pp, tmp, 128, 0) != 128)
914 if (pp->ops->epp_read_data(pp, tmp, 128, 0) != 128)
918 for (j = 0; j < 256; j++) {
919 if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1)
921 if (!(stat & EPP_NREF))
923 if (pp->ops->epp_read_data(pp, tmp, 1, 0) != 1)
927 tstart = jiffies - tstart;
928 bc->bitrate = i * (8 * HZ) / tstart;
930 i = bc->bitrate >> 3;
931 while (j < 7 && i > 150) {
935 printk(KERN_INFO "%s: autoprobed bitrate: %d int divider: %d int rate: %d\n",
936 bc_drvname, bc->bitrate, j, bc->bitrate >> (j+2));
937 tmp[0] = EPP_TX_FIFO_ENABLE|EPP_RX_FIFO_ENABLE|EPP_MODEM_ENABLE/*|j*/;
938 if (pp->ops->epp_write_addr(pp, tmp, 1, 0) != 1)
941 * initialise hdlc variables
943 bc->hdlcrx.state = 0;
944 bc->hdlcrx.numbits = 0;
945 bc->hdlctx.state = tx_idle;
946 bc->hdlctx.bufcnt = 0;
947 bc->hdlctx.slotcnt = bc->ch_params.slottime;
948 bc->hdlctx.calibrate = 0;
949 /* start the bottom half stuff */
950 schedule_delayed_work(&bc->run_work, 1);
951 netif_start_queue(dev);
955 printk(KERN_ERR "%s: epp timeout during bitrate probe\n", bc_drvname);
956 parport_write_control(pp, 0); /* reset the adapter */
957 parport_release(bc->pdev);
958 parport_unregister_device(bc->pdev);
962 /* --------------------------------------------------------------------- */
964 static int epp_close(struct net_device *dev)
966 struct baycom_state *bc = netdev_priv(dev);
967 struct parport *pp = bc->pdev->port;
968 unsigned char tmp[1];
970 bc->work_running = 0;
971 cancel_delayed_work_sync(&bc->run_work);
972 bc->stat = EPP_DCDBIT;
974 pp->ops->epp_write_addr(pp, tmp, 1, 0);
975 parport_write_control(pp, 0); /* reset the adapter */
976 parport_release(bc->pdev);
977 parport_unregister_device(bc->pdev);
979 dev_kfree_skb(bc->skb);
981 printk(KERN_INFO "%s: close epp at iobase 0x%lx irq %u\n",
982 bc_drvname, dev->base_addr, dev->irq);
986 /* --------------------------------------------------------------------- */
988 static int baycom_setmode(struct baycom_state *bc, const char *modestr)
992 if (strstr(modestr,"intclk"))
994 if (strstr(modestr,"extclk"))
996 if (strstr(modestr,"intmodem"))
997 bc->cfg.extmodem = 0;
998 if (strstr(modestr,"extmodem"))
999 bc->cfg.extmodem = 1;
1000 if (strstr(modestr,"noloopback"))
1001 bc->cfg.loopback = 0;
1002 if (strstr(modestr,"loopback"))
1003 bc->cfg.loopback = 1;
1004 if ((cp = strstr(modestr,"fclk="))) {
1005 bc->cfg.fclk = simple_strtoul(cp+5, NULL, 0);
1006 if (bc->cfg.fclk < 1000000)
1007 bc->cfg.fclk = 1000000;
1008 if (bc->cfg.fclk > 25000000)
1009 bc->cfg.fclk = 25000000;
1011 if ((cp = strstr(modestr,"bps="))) {
1012 bc->cfg.bps = simple_strtoul(cp+4, NULL, 0);
1013 if (bc->cfg.bps < 1000)
1015 if (bc->cfg.bps > 1500000)
1016 bc->cfg.bps = 1500000;
1021 /* --------------------------------------------------------------------- */
1023 static int baycom_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
1025 struct baycom_state *bc = netdev_priv(dev);
1026 struct hdlcdrv_ioctl hi;
1028 if (cmd != SIOCDEVPRIVATE)
1029 return -ENOIOCTLCMD;
1031 if (copy_from_user(&hi, ifr->ifr_data, sizeof(hi)))
1035 return -ENOIOCTLCMD;
1037 case HDLCDRVCTL_GETCHANNELPAR:
1038 hi.data.cp.tx_delay = bc->ch_params.tx_delay;
1039 hi.data.cp.tx_tail = bc->ch_params.tx_tail;
1040 hi.data.cp.slottime = bc->ch_params.slottime;
1041 hi.data.cp.ppersist = bc->ch_params.ppersist;
1042 hi.data.cp.fulldup = bc->ch_params.fulldup;
1045 case HDLCDRVCTL_SETCHANNELPAR:
1046 if (!capable(CAP_NET_ADMIN))
1048 bc->ch_params.tx_delay = hi.data.cp.tx_delay;
1049 bc->ch_params.tx_tail = hi.data.cp.tx_tail;
1050 bc->ch_params.slottime = hi.data.cp.slottime;
1051 bc->ch_params.ppersist = hi.data.cp.ppersist;
1052 bc->ch_params.fulldup = hi.data.cp.fulldup;
1053 bc->hdlctx.slotcnt = 1;
1056 case HDLCDRVCTL_GETMODEMPAR:
1057 hi.data.mp.iobase = dev->base_addr;
1058 hi.data.mp.irq = dev->irq;
1059 hi.data.mp.dma = dev->dma;
1060 hi.data.mp.dma2 = 0;
1061 hi.data.mp.seriobase = 0;
1062 hi.data.mp.pariobase = 0;
1063 hi.data.mp.midiiobase = 0;
1066 case HDLCDRVCTL_SETMODEMPAR:
1067 if ((!capable(CAP_SYS_RAWIO)) || netif_running(dev))
1069 dev->base_addr = hi.data.mp.iobase;
1070 dev->irq = /*hi.data.mp.irq*/0;
1071 dev->dma = /*hi.data.mp.dma*/0;
1074 case HDLCDRVCTL_GETSTAT:
1075 hi.data.cs.ptt = !!(bc->stat & EPP_PTTBIT);
1076 hi.data.cs.dcd = !(bc->stat & EPP_DCDBIT);
1077 hi.data.cs.ptt_keyed = bc->ptt_keyed;
1078 hi.data.cs.tx_packets = dev->stats.tx_packets;
1079 hi.data.cs.tx_errors = dev->stats.tx_errors;
1080 hi.data.cs.rx_packets = dev->stats.rx_packets;
1081 hi.data.cs.rx_errors = dev->stats.rx_errors;
1084 case HDLCDRVCTL_OLDGETSTAT:
1085 hi.data.ocs.ptt = !!(bc->stat & EPP_PTTBIT);
1086 hi.data.ocs.dcd = !(bc->stat & EPP_DCDBIT);
1087 hi.data.ocs.ptt_keyed = bc->ptt_keyed;
1090 case HDLCDRVCTL_CALIBRATE:
1091 if (!capable(CAP_SYS_RAWIO))
1093 bc->hdlctx.calibrate = hi.data.calibrate * bc->bitrate / 8;
1096 case HDLCDRVCTL_DRIVERNAME:
1097 strncpy(hi.data.drivername, "baycom_epp", sizeof(hi.data.drivername));
1100 case HDLCDRVCTL_GETMODE:
1101 sprintf(hi.data.modename, "%sclk,%smodem,fclk=%d,bps=%d%s",
1102 bc->cfg.intclk ? "int" : "ext",
1103 bc->cfg.extmodem ? "ext" : "int", bc->cfg.fclk, bc->cfg.bps,
1104 bc->cfg.loopback ? ",loopback" : "");
1107 case HDLCDRVCTL_SETMODE:
1108 if (!capable(CAP_NET_ADMIN) || netif_running(dev))
1110 hi.data.modename[sizeof(hi.data.modename)-1] = '\0';
1111 return baycom_setmode(bc, hi.data.modename);
1113 case HDLCDRVCTL_MODELIST:
1114 strncpy(hi.data.modename, "intclk,extclk,intmodem,extmodem,divider=x",
1115 sizeof(hi.data.modename));
1118 case HDLCDRVCTL_MODEMPARMASK:
1119 return HDLCDRV_PARMASK_IOBASE;
1122 if (copy_to_user(ifr->ifr_data, &hi, sizeof(hi)))
1127 /* --------------------------------------------------------------------- */
1129 static const struct net_device_ops baycom_netdev_ops = {
1130 .ndo_open = epp_open,
1131 .ndo_stop = epp_close,
1132 .ndo_do_ioctl = baycom_ioctl,
1133 .ndo_start_xmit = baycom_send_packet,
1134 .ndo_set_mac_address = baycom_set_mac_address,
1138 * Check for a network adaptor of this type, and return '0' if one exists.
1139 * If dev->base_addr == 0, probe all likely locations.
1140 * If dev->base_addr == 1, always return failure.
1141 * If dev->base_addr == 2, allocate space for the device and return success
1142 * (detachable devices only).
1144 static void baycom_probe(struct net_device *dev)
1146 const struct hdlcdrv_channel_params dflt_ch_params = {
1149 struct baycom_state *bc;
1152 * not a real probe! only initialize data structures
1154 bc = netdev_priv(dev);
1156 * initialize the baycom_state struct
1158 bc->ch_params = dflt_ch_params;
1162 * initialize the device struct
1165 /* Fill in the fields of the device structure */
1168 dev->netdev_ops = &baycom_netdev_ops;
1169 dev->header_ops = &ax25_header_ops;
1171 dev->type = ARPHRD_AX25; /* AF_AX25 device */
1172 dev->hard_header_len = AX25_MAX_HEADER_LEN + AX25_BPQ_HEADER_LEN;
1173 dev->mtu = AX25_DEF_PACLEN; /* eth_mtu is the default */
1174 dev->addr_len = AX25_ADDR_LEN; /* sizeof an ax.25 address */
1175 memcpy(dev->broadcast, &ax25_bcast, AX25_ADDR_LEN);
1176 memcpy(dev->dev_addr, &null_ax25_address, AX25_ADDR_LEN);
1177 dev->tx_queue_len = 16;
1179 /* New style flags */
1183 /* --------------------------------------------------------------------- */
1186 * command line settable parameters
1188 static char *mode[NR_PORTS] = { "", };
1189 static int iobase[NR_PORTS] = { 0x378, };
1191 module_param_array(mode, charp, NULL, 0);
1192 MODULE_PARM_DESC(mode, "baycom operating mode");
1193 module_param_hw_array(iobase, int, ioport, NULL, 0);
1194 MODULE_PARM_DESC(iobase, "baycom io base address");
1197 MODULE_DESCRIPTION("Baycom epp amateur radio modem driver");
1198 MODULE_LICENSE("GPL");
1200 /* --------------------------------------------------------------------- */
1202 static int baycom_epp_par_probe(struct pardevice *par_dev)
1204 struct device_driver *drv = par_dev->dev.driver;
1205 int len = strlen(drv->name);
1207 if (strncmp(par_dev->name, drv->name, len))
1213 static struct parport_driver baycom_epp_par_driver = {
1215 .probe = baycom_epp_par_probe,
1219 static void __init baycom_epp_dev_setup(struct net_device *dev)
1221 struct baycom_state *bc = netdev_priv(dev);
1224 * initialize part of the baycom_state struct
1227 bc->magic = BAYCOM_MAGIC;
1228 bc->cfg.fclk = 19666600;
1231 * initialize part of the device struct
1236 static int __init init_baycomepp(void)
1238 int i, found = 0, ret;
1243 ret = parport_register_driver(&baycom_epp_par_driver);
1248 * register net devices
1250 for (i = 0; i < NR_PORTS; i++) {
1251 struct net_device *dev;
1253 dev = alloc_netdev(sizeof(struct baycom_state), "bce%d",
1254 NET_NAME_UNKNOWN, baycom_epp_dev_setup);
1257 printk(KERN_WARNING "bce%d : out of memory\n", i);
1258 return found ? 0 : -ENOMEM;
1261 sprintf(dev->name, "bce%d", i);
1262 dev->base_addr = iobase[i];
1269 if (register_netdev(dev)) {
1270 printk(KERN_WARNING "%s: cannot register net device %s\n", bc_drvname, dev->name);
1274 if (set_hw && baycom_setmode(netdev_priv(dev), mode[i]))
1276 baycom_device[i] = dev;
1281 parport_unregister_driver(&baycom_epp_par_driver);
1288 static void __exit cleanup_baycomepp(void)
1292 for(i = 0; i < NR_PORTS; i++) {
1293 struct net_device *dev = baycom_device[i];
1296 struct baycom_state *bc = netdev_priv(dev);
1297 if (bc->magic == BAYCOM_MAGIC) {
1298 unregister_netdev(dev);
1301 printk(paranoia_str, "cleanup_module");
1304 parport_unregister_driver(&baycom_epp_par_driver);
1307 module_init(init_baycomepp);
1308 module_exit(cleanup_baycomepp);
1310 /* --------------------------------------------------------------------- */
1315 * format: baycom_epp=io,mode
1316 * mode: fpga config options
1319 static int __init baycom_epp_setup(char *str)
1321 static unsigned __initdata nr_dev = 0;
1324 if (nr_dev >= NR_PORTS)
1326 str = get_options(str, 2, ints);
1330 iobase[nr_dev] = ints[1];
1335 __setup("baycom_epp=", baycom_epp_setup);
1338 /* --------------------------------------------------------------------- */