2 * PWM device driver for ST SoCs.
5 * Copyright (C) 2013-2014 STMicroelectronics (R&D) Limited
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
13 #include <linux/clk.h>
14 #include <linux/math64.h>
15 #include <linux/mfd/syscon.h>
16 #include <linux/module.h>
18 #include <linux/platform_device.h>
19 #include <linux/pwm.h>
20 #include <linux/regmap.h>
21 #include <linux/slab.h>
22 #include <linux/time.h>
24 #define STI_DS_REG(ch) (4 * (ch)) /* Channel's Duty Cycle register */
25 #define STI_PWMCR 0x50 /* Control/Config register */
26 #define STI_INTEN 0x54 /* Interrupt Enable/Disable register */
27 #define PWM_PRESCALE_LOW_MASK 0x0f
28 #define PWM_PRESCALE_HIGH_MASK 0xf0
41 struct sti_pwm_compat_data {
42 const struct reg_field *reg_fields;
43 unsigned int num_chan;
44 unsigned int max_pwm_cnt;
45 unsigned int max_prescale;
51 unsigned long clk_rate;
52 struct regmap *regmap;
53 struct sti_pwm_compat_data *cdata;
54 struct regmap_field *prescale_low;
55 struct regmap_field *prescale_high;
56 struct regmap_field *pwm_en;
57 struct regmap_field *pwm_int_en;
59 struct pwm_device *cur;
60 unsigned int en_count;
61 struct mutex sti_pwm_lock; /* To sync between enable/disable calls */
65 static const struct reg_field sti_pwm_regfields[MAX_REGFIELDS] = {
66 [PWMCLK_PRESCALE_LOW] = REG_FIELD(STI_PWMCR, 0, 3),
67 [PWMCLK_PRESCALE_HIGH] = REG_FIELD(STI_PWMCR, 11, 14),
68 [PWM_EN] = REG_FIELD(STI_PWMCR, 9, 9),
69 [PWM_INT_EN] = REG_FIELD(STI_INTEN, 0, 0),
72 static inline struct sti_pwm_chip *to_sti_pwmchip(struct pwm_chip *chip)
74 return container_of(chip, struct sti_pwm_chip, chip);
78 * Calculate the prescaler value corresponding to the period.
80 static int sti_pwm_get_prescale(struct sti_pwm_chip *pc, unsigned long period,
81 unsigned int *prescale)
83 struct sti_pwm_compat_data *cdata = pc->cdata;
88 * prescale = ((period_ns * clk_rate) / (10^9 * (max_pwm_count + 1)) - 1
90 val = NSEC_PER_SEC / pc->clk_rate;
91 val *= cdata->max_pwm_cnt + 1;
96 ps = period / val - 1;
97 if (ps > cdata->max_prescale)
105 /* Calculate the number of PWM devices configured with a period. */
106 static unsigned int sti_pwm_count_configured(struct pwm_chip *chip)
108 struct pwm_device *pwm;
109 unsigned int ncfg = 0;
112 for (i = 0; i < chip->npwm; i++) {
113 pwm = &chip->pwms[i];
114 if (test_bit(PWMF_REQUESTED, &pwm->flags)) {
115 if (pwm_get_period(pwm))
124 * For STiH4xx PWM IP, the PWM period is fixed to 256 local clock cycles.
125 * The only way to change the period (apart from changing the PWM input clock)
126 * is to change the PWM clock prescaler.
127 * The prescaler is of 8 bits, so 256 prescaler values and hence
128 * 256 possible period values are supported (for a particular clock rate).
129 * The requested period will be applied only if it matches one of these
132 static int sti_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
133 int duty_ns, int period_ns)
135 struct sti_pwm_chip *pc = to_sti_pwmchip(chip);
136 struct sti_pwm_compat_data *cdata = pc->cdata;
137 struct pwm_device *cur = pc->cur;
138 struct device *dev = pc->dev;
139 unsigned int prescale = 0, pwmvalx;
142 bool period_same = false;
144 ncfg = sti_pwm_count_configured(chip);
146 period_same = (period_ns == pwm_get_period(cur));
148 /* Allow configuration changes if one of the
149 * following conditions satisfy.
150 * 1. No channels have been configured.
151 * 2. Only one channel has been configured and the new request
152 * is for the same channel.
153 * 3. Only one channel has been configured and the new request is
154 * for a new channel and period of the new channel is same as
155 * the current configured period.
156 * 4. More than one channels are configured and period of the new
157 * requestis the same as the current period.
160 ((ncfg == 1) && (pwm->hwpwm == cur->hwpwm)) ||
161 ((ncfg == 1) && (pwm->hwpwm != cur->hwpwm) && period_same) ||
162 ((ncfg > 1) && period_same)) {
163 /* Enable clock before writing to PWM registers. */
164 ret = clk_enable(pc->clk);
169 ret = sti_pwm_get_prescale(pc, period_ns, &prescale);
174 regmap_field_write(pc->prescale_low,
175 prescale & PWM_PRESCALE_LOW_MASK);
180 regmap_field_write(pc->prescale_high,
181 (prescale & PWM_PRESCALE_HIGH_MASK) >> 4);
187 * When PWMVal == 0, PWM pulse = 1 local clock cycle.
188 * When PWMVal == max_pwm_count,
189 * PWM pulse = (max_pwm_count + 1) local cycles,
190 * that is continuous pulse: signal never goes low.
192 pwmvalx = cdata->max_pwm_cnt * duty_ns / period_ns;
194 ret = regmap_write(pc->regmap, STI_DS_REG(pwm->hwpwm), pwmvalx);
198 ret = regmap_field_write(pc->pwm_int_en, 0);
202 dev_dbg(dev, "prescale:%u, period:%i, duty:%i, pwmvalx:%u\n",
203 prescale, period_ns, duty_ns, pwmvalx);
209 clk_disable(pc->clk);
213 static int sti_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
215 struct sti_pwm_chip *pc = to_sti_pwmchip(chip);
216 struct device *dev = pc->dev;
220 * Since we have a common enable for all PWM channels,
221 * do not enable if already enabled.
223 mutex_lock(&pc->sti_pwm_lock);
225 ret = clk_enable(pc->clk);
229 ret = regmap_field_write(pc->pwm_en, 1);
231 dev_err(dev, "failed to enable PWM device:%d\n",
238 mutex_unlock(&pc->sti_pwm_lock);
242 static void sti_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
244 struct sti_pwm_chip *pc = to_sti_pwmchip(chip);
246 mutex_lock(&pc->sti_pwm_lock);
247 if (--pc->en_count) {
248 mutex_unlock(&pc->sti_pwm_lock);
251 regmap_field_write(pc->pwm_en, 0);
253 clk_disable(pc->clk);
254 mutex_unlock(&pc->sti_pwm_lock);
257 static const struct pwm_ops sti_pwm_ops = {
258 .config = sti_pwm_config,
259 .enable = sti_pwm_enable,
260 .disable = sti_pwm_disable,
261 .owner = THIS_MODULE,
264 static int sti_pwm_probe_dt(struct sti_pwm_chip *pc)
266 struct device *dev = pc->dev;
267 const struct reg_field *reg_fields;
268 struct device_node *np = dev->of_node;
269 struct sti_pwm_compat_data *cdata = pc->cdata;
272 of_property_read_u32(np, "st,pwm-num-chan", &num_chan);
274 cdata->num_chan = num_chan;
276 reg_fields = cdata->reg_fields;
278 pc->prescale_low = devm_regmap_field_alloc(dev, pc->regmap,
279 reg_fields[PWMCLK_PRESCALE_LOW]);
280 if (IS_ERR(pc->prescale_low))
281 return PTR_ERR(pc->prescale_low);
283 pc->prescale_high = devm_regmap_field_alloc(dev, pc->regmap,
284 reg_fields[PWMCLK_PRESCALE_HIGH]);
285 if (IS_ERR(pc->prescale_high))
286 return PTR_ERR(pc->prescale_high);
288 pc->pwm_en = devm_regmap_field_alloc(dev, pc->regmap,
290 if (IS_ERR(pc->pwm_en))
291 return PTR_ERR(pc->pwm_en);
293 pc->pwm_int_en = devm_regmap_field_alloc(dev, pc->regmap,
294 reg_fields[PWM_INT_EN]);
295 if (IS_ERR(pc->pwm_int_en))
296 return PTR_ERR(pc->pwm_int_en);
301 static const struct regmap_config sti_pwm_regmap_config = {
307 static int sti_pwm_probe(struct platform_device *pdev)
309 struct device *dev = &pdev->dev;
310 struct sti_pwm_compat_data *cdata;
311 struct sti_pwm_chip *pc;
312 struct resource *res;
315 pc = devm_kzalloc(dev, sizeof(*pc), GFP_KERNEL);
319 cdata = devm_kzalloc(dev, sizeof(*cdata), GFP_KERNEL);
323 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
325 pc->mmio = devm_ioremap_resource(dev, res);
326 if (IS_ERR(pc->mmio))
327 return PTR_ERR(pc->mmio);
329 pc->regmap = devm_regmap_init_mmio(dev, pc->mmio,
330 &sti_pwm_regmap_config);
331 if (IS_ERR(pc->regmap))
332 return PTR_ERR(pc->regmap);
335 * Setup PWM data with default values: some values could be replaced
336 * with specific ones provided from Device Tree.
338 cdata->reg_fields = &sti_pwm_regfields[0];
339 cdata->max_prescale = 0xff;
340 cdata->max_pwm_cnt = 255;
346 mutex_init(&pc->sti_pwm_lock);
348 ret = sti_pwm_probe_dt(pc);
352 pc->clk = of_clk_get_by_name(dev->of_node, "pwm");
353 if (IS_ERR(pc->clk)) {
354 dev_err(dev, "failed to get PWM clock\n");
355 return PTR_ERR(pc->clk);
358 pc->clk_rate = clk_get_rate(pc->clk);
360 dev_err(dev, "failed to get clock rate\n");
364 ret = clk_prepare(pc->clk);
366 dev_err(dev, "failed to prepare clock\n");
371 pc->chip.ops = &sti_pwm_ops;
373 pc->chip.npwm = pc->cdata->num_chan;
374 pc->chip.can_sleep = true;
376 ret = pwmchip_add(&pc->chip);
378 clk_unprepare(pc->clk);
382 platform_set_drvdata(pdev, pc);
387 static int sti_pwm_remove(struct platform_device *pdev)
389 struct sti_pwm_chip *pc = platform_get_drvdata(pdev);
392 for (i = 0; i < pc->cdata->num_chan; i++)
393 pwm_disable(&pc->chip.pwms[i]);
395 clk_unprepare(pc->clk);
397 return pwmchip_remove(&pc->chip);
400 static const struct of_device_id sti_pwm_of_match[] = {
401 { .compatible = "st,sti-pwm", },
404 MODULE_DEVICE_TABLE(of, sti_pwm_of_match);
406 static struct platform_driver sti_pwm_driver = {
409 .of_match_table = sti_pwm_of_match,
411 .probe = sti_pwm_probe,
412 .remove = sti_pwm_remove,
414 module_platform_driver(sti_pwm_driver);
417 MODULE_DESCRIPTION("STMicroelectronics ST PWM driver");
418 MODULE_LICENSE("GPL");