2 * Copyright (C) 2001 MandrakeSoft S.A.
7 * http://www.linux-mandrake.com/
8 * http://www.mandrakesoft.com/
10 * This library is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU Lesser General Public
12 * License as published by the Free Software Foundation; either
13 * version 2 of the License, or (at your option) any later version.
15 * This library is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * Lesser General Public License for more details.
20 * You should have received a copy of the GNU Lesser General Public
21 * License along with this library; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
26 * Based on Xen 3.1 code.
29 #include <linux/kvm_host.h>
30 #include <linux/kvm.h>
32 #include <linux/highmem.h>
33 #include <linux/smp.h>
34 #include <linux/hrtimer.h>
36 #include <linux/slab.h>
37 #include <asm/processor.h>
39 #include <asm/current.h>
40 #include <trace/events/kvm.h>
47 #define ioapic_debug(fmt,arg...) printk(KERN_WARNING fmt,##arg)
49 #define ioapic_debug(fmt, arg...)
51 static int ioapic_deliver(struct kvm_ioapic *vioapic, int irq);
53 static unsigned long ioapic_read_indirect(struct kvm_ioapic *ioapic,
57 unsigned long result = 0;
59 switch (ioapic->ioregsel) {
60 case IOAPIC_REG_VERSION:
61 result = ((((IOAPIC_NUM_PINS - 1) & 0xff) << 16)
62 | (IOAPIC_VERSION_ID & 0xff));
65 case IOAPIC_REG_APIC_ID:
66 case IOAPIC_REG_ARB_ID:
67 result = ((ioapic->id & 0xf) << 24);
72 u32 redir_index = (ioapic->ioregsel - 0x10) >> 1;
75 ASSERT(redir_index < IOAPIC_NUM_PINS);
77 redir_content = ioapic->redirtbl[redir_index].bits;
78 result = (ioapic->ioregsel & 0x1) ?
79 (redir_content >> 32) & 0xffffffff :
80 redir_content & 0xffffffff;
88 static int ioapic_service(struct kvm_ioapic *ioapic, unsigned int idx)
90 union kvm_ioapic_redirect_entry *pent;
93 pent = &ioapic->redirtbl[idx];
95 if (!pent->fields.mask) {
96 injected = ioapic_deliver(ioapic, idx);
97 if (injected && pent->fields.trig_mode == IOAPIC_LEVEL_TRIG)
98 pent->fields.remote_irr = 1;
104 static void update_handled_vectors(struct kvm_ioapic *ioapic)
106 DECLARE_BITMAP(handled_vectors, 256);
109 memset(handled_vectors, 0, sizeof(handled_vectors));
110 for (i = 0; i < IOAPIC_NUM_PINS; ++i)
111 __set_bit(ioapic->redirtbl[i].fields.vector, handled_vectors);
112 memcpy(ioapic->handled_vectors, handled_vectors,
113 sizeof(handled_vectors));
117 static void ioapic_write_indirect(struct kvm_ioapic *ioapic, u32 val)
120 bool mask_before, mask_after;
121 union kvm_ioapic_redirect_entry *e;
123 switch (ioapic->ioregsel) {
124 case IOAPIC_REG_VERSION:
125 /* Writes are ignored. */
128 case IOAPIC_REG_APIC_ID:
129 ioapic->id = (val >> 24) & 0xf;
132 case IOAPIC_REG_ARB_ID:
136 index = (ioapic->ioregsel - 0x10) >> 1;
138 ioapic_debug("change redir index %x val %x\n", index, val);
139 if (index >= IOAPIC_NUM_PINS)
141 e = &ioapic->redirtbl[index];
142 mask_before = e->fields.mask;
143 if (ioapic->ioregsel & 1) {
144 e->bits &= 0xffffffff;
145 e->bits |= (u64) val << 32;
147 e->bits &= ~0xffffffffULL;
148 e->bits |= (u32) val;
149 e->fields.remote_irr = 0;
151 update_handled_vectors(ioapic);
152 mask_after = e->fields.mask;
153 if (mask_before != mask_after)
154 kvm_fire_mask_notifiers(ioapic->kvm, index, mask_after);
155 if (e->fields.trig_mode == IOAPIC_LEVEL_TRIG
156 && ioapic->irr & (1 << index))
157 ioapic_service(ioapic, index);
162 static int ioapic_deliver(struct kvm_ioapic *ioapic, int irq)
164 union kvm_ioapic_redirect_entry *entry = &ioapic->redirtbl[irq];
165 struct kvm_lapic_irq irqe;
167 ioapic_debug("dest=%x dest_mode=%x delivery_mode=%x "
168 "vector=%x trig_mode=%x\n",
169 entry->fields.dest, entry->fields.dest_mode,
170 entry->fields.delivery_mode, entry->fields.vector,
171 entry->fields.trig_mode);
173 irqe.dest_id = entry->fields.dest_id;
174 irqe.vector = entry->fields.vector;
175 irqe.dest_mode = entry->fields.dest_mode;
176 irqe.trig_mode = entry->fields.trig_mode;
177 irqe.delivery_mode = entry->fields.delivery_mode << 8;
182 /* Always delivery PIT interrupt to vcpu 0 */
184 irqe.dest_mode = 0; /* Physical mode. */
185 /* need to read apic_id from apic regiest since
186 * it can be rewritten */
187 irqe.dest_id = ioapic->kvm->bsp_vcpu->vcpu_id;
190 return kvm_irq_delivery_to_apic(ioapic->kvm, NULL, &irqe);
193 int kvm_ioapic_set_irq(struct kvm_ioapic *ioapic, int irq, int level)
195 u32 old_irr = ioapic->irr;
197 union kvm_ioapic_redirect_entry entry;
200 mutex_lock(&ioapic->lock);
201 if (irq >= 0 && irq < IOAPIC_NUM_PINS) {
202 entry = ioapic->redirtbl[irq];
203 level ^= entry.fields.polarity;
205 ioapic->irr &= ~mask;
207 int edge = (entry.fields.trig_mode == IOAPIC_EDGE_TRIG);
209 if ((edge && old_irr != ioapic->irr) ||
210 (!edge && !entry.fields.remote_irr))
211 ret = ioapic_service(ioapic, irq);
213 ret = 0; /* report coalesced interrupt */
215 trace_kvm_ioapic_set_irq(entry.bits, irq, ret == 0);
217 mutex_unlock(&ioapic->lock);
222 static void __kvm_ioapic_update_eoi(struct kvm_ioapic *ioapic, int vector,
227 for (i = 0; i < IOAPIC_NUM_PINS; i++) {
228 union kvm_ioapic_redirect_entry *ent = &ioapic->redirtbl[i];
230 if (ent->fields.vector != vector)
234 * We are dropping lock while calling ack notifiers because ack
235 * notifier callbacks for assigned devices call into IOAPIC
236 * recursively. Since remote_irr is cleared only after call
237 * to notifiers if the same vector will be delivered while lock
238 * is dropped it will be put into irr and will be delivered
239 * after ack notifier returns.
241 mutex_unlock(&ioapic->lock);
242 kvm_notify_acked_irq(ioapic->kvm, KVM_IRQCHIP_IOAPIC, i);
243 mutex_lock(&ioapic->lock);
245 if (trigger_mode != IOAPIC_LEVEL_TRIG)
248 ASSERT(ent->fields.trig_mode == IOAPIC_LEVEL_TRIG);
249 ent->fields.remote_irr = 0;
250 if (!ent->fields.mask && (ioapic->irr & (1 << i)))
251 ioapic_service(ioapic, i);
255 void kvm_ioapic_update_eoi(struct kvm *kvm, int vector, int trigger_mode)
257 struct kvm_ioapic *ioapic = kvm->arch.vioapic;
260 if (!test_bit(vector, ioapic->handled_vectors))
262 mutex_lock(&ioapic->lock);
263 __kvm_ioapic_update_eoi(ioapic, vector, trigger_mode);
264 mutex_unlock(&ioapic->lock);
267 static inline struct kvm_ioapic *to_ioapic(struct kvm_io_device *dev)
269 return container_of(dev, struct kvm_ioapic, dev);
272 static inline int ioapic_in_range(struct kvm_ioapic *ioapic, gpa_t addr)
274 return ((addr >= ioapic->base_address &&
275 (addr < ioapic->base_address + IOAPIC_MEM_LENGTH)));
278 static int ioapic_mmio_read(struct kvm_io_device *this, gpa_t addr, int len,
281 struct kvm_ioapic *ioapic = to_ioapic(this);
283 if (!ioapic_in_range(ioapic, addr))
286 ioapic_debug("addr %lx\n", (unsigned long)addr);
287 ASSERT(!(addr & 0xf)); /* check alignment */
290 mutex_lock(&ioapic->lock);
292 case IOAPIC_REG_SELECT:
293 result = ioapic->ioregsel;
296 case IOAPIC_REG_WINDOW:
297 result = ioapic_read_indirect(ioapic, addr, len);
304 mutex_unlock(&ioapic->lock);
308 *(u64 *) val = result;
313 memcpy(val, (char *)&result, len);
316 printk(KERN_WARNING "ioapic: wrong length %d\n", len);
321 static int ioapic_mmio_write(struct kvm_io_device *this, gpa_t addr, int len,
324 struct kvm_ioapic *ioapic = to_ioapic(this);
326 if (!ioapic_in_range(ioapic, addr))
329 ioapic_debug("ioapic_mmio_write addr=%p len=%d val=%p\n",
330 (void*)addr, len, val);
331 ASSERT(!(addr & 0xf)); /* check alignment */
333 if (len == 4 || len == 8)
336 printk(KERN_WARNING "ioapic: Unsupported size %d\n", len);
341 mutex_lock(&ioapic->lock);
343 case IOAPIC_REG_SELECT:
344 ioapic->ioregsel = data;
347 case IOAPIC_REG_WINDOW:
348 ioapic_write_indirect(ioapic, data);
352 __kvm_ioapic_update_eoi(ioapic, data, IOAPIC_LEVEL_TRIG);
359 mutex_unlock(&ioapic->lock);
363 void kvm_ioapic_reset(struct kvm_ioapic *ioapic)
367 for (i = 0; i < IOAPIC_NUM_PINS; i++)
368 ioapic->redirtbl[i].fields.mask = 1;
369 ioapic->base_address = IOAPIC_DEFAULT_BASE_ADDRESS;
370 ioapic->ioregsel = 0;
373 update_handled_vectors(ioapic);
376 static const struct kvm_io_device_ops ioapic_mmio_ops = {
377 .read = ioapic_mmio_read,
378 .write = ioapic_mmio_write,
381 int kvm_ioapic_init(struct kvm *kvm)
383 struct kvm_ioapic *ioapic;
386 ioapic = kzalloc(sizeof(struct kvm_ioapic), GFP_KERNEL);
389 mutex_init(&ioapic->lock);
390 kvm->arch.vioapic = ioapic;
391 kvm_ioapic_reset(ioapic);
392 kvm_iodevice_init(&ioapic->dev, &ioapic_mmio_ops);
394 mutex_lock(&kvm->slots_lock);
395 ret = kvm_io_bus_register_dev(kvm, KVM_MMIO_BUS, &ioapic->dev);
396 mutex_unlock(&kvm->slots_lock);
398 kvm->arch.vioapic = NULL;
405 void kvm_ioapic_destroy(struct kvm *kvm)
407 struct kvm_ioapic *ioapic = kvm->arch.vioapic;
410 kvm_io_bus_unregister_dev(kvm, KVM_MMIO_BUS, &ioapic->dev);
411 kvm->arch.vioapic = NULL;
416 int kvm_get_ioapic(struct kvm *kvm, struct kvm_ioapic_state *state)
418 struct kvm_ioapic *ioapic = ioapic_irqchip(kvm);
422 mutex_lock(&ioapic->lock);
423 memcpy(state, ioapic, sizeof(struct kvm_ioapic_state));
424 mutex_unlock(&ioapic->lock);
428 int kvm_set_ioapic(struct kvm *kvm, struct kvm_ioapic_state *state)
430 struct kvm_ioapic *ioapic = ioapic_irqchip(kvm);
434 mutex_lock(&ioapic->lock);
435 memcpy(ioapic, state, sizeof(struct kvm_ioapic_state));
436 update_handled_vectors(ioapic);
437 mutex_unlock(&ioapic->lock);