drivers/platform/x86/intel/pmt/class.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Intel Platform Monitory Technology Telemetry driver
   4  *
   5  * Copyright (c) 2020, Intel Corporation.
   6  * All Rights Reserved.
   7  *
   8  * Author: "Alexander Duyck" <[email protected]>
   9  */
  10
  11 #include <linux/kernel.h>
  12 #include <linux/io-64-nonatomic-lo-hi.h>
  13 #include <linux/module.h>
  14 #include <linux/mm.h>
  15 #include <linux/pci.h>
  16
  17 #include "../vsec.h"
  18 #include "class.h"
  19
  20 #define PMT_XA_START            0
  21 #define PMT_XA_MAX              INT_MAX
  22 #define PMT_XA_LIMIT            XA_LIMIT(PMT_XA_START, PMT_XA_MAX)
  23 #define GUID_SPR_PUNIT          0x9956f43f
  24
  25 bool intel_pmt_is_early_client_hw(struct device *dev)
  26 {
  27         struct intel_vsec_device *ivdev = dev_to_ivdev(dev);
  28
  29         /*
  30          * Early implementations of PMT on client platforms have some
  31          * differences from the server platforms (which use the Out Of Band
  32          * Management Services Module OOBMSM).
  33          */
  34         return !!(ivdev->info->quirks & VSEC_QUIRK_EARLY_HW);
  35 }
  36 EXPORT_SYMBOL_NS_GPL(intel_pmt_is_early_client_hw, INTEL_PMT);
  37
  38 static inline int
  39 pmt_memcpy64_fromio(void *to, const u64 __iomem *from, size_t count)
  40 {
  41         int i, remain;
  42         u64 *buf = to;
  43
  44         if (!IS_ALIGNED((unsigned long)from, 8))
  45                 return -EFAULT;
  46
  47         for (i = 0; i < count/8; i++)
  48                 buf[i] = readq(&from[i]);
  49
  50         /* Copy any remaining bytes */
  51         remain = count % 8;
  52         if (remain) {
  53                 u64 tmp = readq(&from[i]);
  54
  55                 memcpy(&buf[i], &tmp, remain);
  56         }
  57
  58         return count;
  59 }
  60
  61 /*
  62  * sysfs
  63  */
  64 static ssize_t
  65 intel_pmt_read(struct file *filp, struct kobject *kobj,
  66                struct bin_attribute *attr, char *buf, loff_t off,
  67                size_t count)
  68 {
  69         struct intel_pmt_entry *entry = container_of(attr,
  70                                                      struct intel_pmt_entry,
  71                                                      pmt_bin_attr);
  72
  73         if (off < 0)
  74                 return -EINVAL;
  75
  76         if (off >= entry->size)
  77                 return 0;
  78
  79         if (count > entry->size - off)
  80                 count = entry->size - off;
  81
  82         if (entry->guid == GUID_SPR_PUNIT)
  83                 /* PUNIT on SPR only supports aligned 64-bit read */
  84                 count = pmt_memcpy64_fromio(buf, entry->base + off, count);
  85         else
  86                 memcpy_fromio(buf, entry->base + off, count);
  87
  88         return count;
  89 }
  90
  91 static int
  92 intel_pmt_mmap(struct file *filp, struct kobject *kobj,
  93                 struct bin_attribute *attr, struct vm_area_struct *vma)
  94 {
  95         struct intel_pmt_entry *entry = container_of(attr,
  96                                                      struct intel_pmt_entry,
  97                                                      pmt_bin_attr);
  98         unsigned long vsize = vma->vm_end - vma->vm_start;
  99         struct device *dev = kobj_to_dev(kobj);
 100         unsigned long phys = entry->base_addr;
 101         unsigned long pfn = PFN_DOWN(phys);
 102         unsigned long psize;
 103
 104         if (vma->vm_flags & (VM_WRITE | VM_MAYWRITE))
 105                 return -EROFS;
 106
 107         psize = (PFN_UP(entry->base_addr + entry->size) - pfn) * PAGE_SIZE;
 108         if (vsize > psize) {
 109                 dev_err(dev, "Requested mmap size is too large\n");
 110                 return -EINVAL;
 111         }
 112
 113         vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
 114         if (io_remap_pfn_range(vma, vma->vm_start, pfn,
 115                 vsize, vma->vm_page_prot))
 116                 return -EAGAIN;
 117
 118         return 0;
 119 }
 120
 121 static ssize_t
 122 guid_show(struct device *dev, struct device_attribute *attr, char *buf)
 123 {
 124         struct intel_pmt_entry *entry = dev_get_drvdata(dev);
 125
 126         return sprintf(buf, "0x%x\n", entry->guid);
 127 }
 128 static DEVICE_ATTR_RO(guid);
 129
 130 static ssize_t size_show(struct device *dev, struct device_attribute *attr,
 131                          char *buf)
 132 {
 133         struct intel_pmt_entry *entry = dev_get_drvdata(dev);
 134
 135         return sprintf(buf, "%zu\n", entry->size);
 136 }
 137 static DEVICE_ATTR_RO(size);
 138
 139 static ssize_t
 140 offset_show(struct device *dev, struct device_attribute *attr, char *buf)
 141 {
 142         struct intel_pmt_entry *entry = dev_get_drvdata(dev);
 143
 144         return sprintf(buf, "%lu\n", offset_in_page(entry->base_addr));
 145 }
 146 static DEVICE_ATTR_RO(offset);
 147
 148 static struct attribute *intel_pmt_attrs[] = {
 149         &dev_attr_guid.attr,
 150         &dev_attr_size.attr,
 151         &dev_attr_offset.attr,
 152         NULL
 153 };
 154 ATTRIBUTE_GROUPS(intel_pmt);
 155
 156 static struct class intel_pmt_class = {
 157         .name = "intel_pmt",
 158         .dev_groups = intel_pmt_groups,
 159 };
 160
 161 static int intel_pmt_populate_entry(struct intel_pmt_entry *entry,
 162                                     struct intel_pmt_header *header,
 163                                     struct device *dev,
 164                                     struct resource *disc_res)
 165 {
 166         struct pci_dev *pci_dev = to_pci_dev(dev->parent);
 167         u8 bir;
 168
 169         /*
 170          * The base offset should always be 8 byte aligned.
 171          *
 172          * For non-local access types the lower 3 bits of base offset
 173          * contains the index of the base address register where the
 174          * telemetry can be found.
 175          */
 176         bir = GET_BIR(header->base_offset);
 177
 178         /* Local access and BARID only for now */
 179         switch (header->access_type) {
 180         case ACCESS_LOCAL:
 181                 if (bir) {
 182                         dev_err(dev,
 183                                 "Unsupported BAR index %d for access type %d\n",
 184                                 bir, header->access_type);
 185                         return -EINVAL;
 186                 }
 187                 /*
 188                  * For access_type LOCAL, the base address is as follows:
 189                  * base address = end of discovery region + base offset
 190                  */
 191                 entry->base_addr = disc_res->end + 1 + header->base_offset;
 192
 193                 /*
 194                  * Some hardware use a different calculation for the base address
 195                  * when access_type == ACCESS_LOCAL. On the these systems
 196                  * ACCCESS_LOCAL refers to an address in the same BAR as the
 197                  * header but at a fixed offset. But as the header address was
 198                  * supplied to the driver, we don't know which BAR it was in.
 199                  * So search for the bar whose range includes the header address.
 200                  */
 201                 if (intel_pmt_is_early_client_hw(dev)) {
 202                         int i;
 203
 204                         entry->base_addr = 0;
 205                         for (i = 0; i < 6; i++)
 206                                 if (disc_res->start >= pci_resource_start(pci_dev, i) &&
 207                                    (disc_res->start <= pci_resource_end(pci_dev, i))) {
 208                                         entry->base_addr = pci_resource_start(pci_dev, i) +
 209                                                            header->base_offset;
 210                                         break;
 211                                 }
 212                         if (!entry->base_addr)
 213                                 return -EINVAL;
 214                 }
 215
 216                 break;
 217         case ACCESS_BARID:
 218                 /*
 219                  * If another BAR was specified then the base offset
 220                  * represents the offset within that BAR. SO retrieve the
 221                  * address from the parent PCI device and add offset.
 222                  */
 223                 entry->base_addr = pci_resource_start(pci_dev, bir) +
 224                                    GET_ADDRESS(header->base_offset);
 225                 break;
 226         default:
 227                 dev_err(dev, "Unsupported access type %d\n",
 228                         header->access_type);
 229                 return -EINVAL;
 230         }
 231
 232         entry->guid = header->guid;
 233         entry->size = header->size;
 234
 235         return 0;
 236 }
 237
 238 static int intel_pmt_dev_register(struct intel_pmt_entry *entry,
 239                                   struct intel_pmt_namespace *ns,
 240                                   struct device *parent)
 241 {
 242         struct resource res = {0};
 243         struct device *dev;
 244         int ret;
 245
 246         ret = xa_alloc(ns->xa, &entry->devid, entry, PMT_XA_LIMIT, GFP_KERNEL);
 247         if (ret)
 248                 return ret;
 249
 250         dev = device_create(&intel_pmt_class, parent, MKDEV(0, 0), entry,
 251                             "%s%d", ns->name, entry->devid);
 252
 253         if (IS_ERR(dev)) {
 254                 dev_err(parent, "Could not create %s%d device node\n",
 255                         ns->name, entry->devid);
 256                 ret = PTR_ERR(dev);
 257                 goto fail_dev_create;
 258         }
 259
 260         entry->kobj = &dev->kobj;
 261
 262         if (ns->attr_grp) {
 263                 ret = sysfs_create_group(entry->kobj, ns->attr_grp);
 264                 if (ret)
 265                         goto fail_sysfs;
 266         }
 267
 268         /* if size is 0 assume no data buffer, so no file needed */
 269         if (!entry->size)
 270                 return 0;
 271
 272         res.start = entry->base_addr;
 273         res.end = res.start + entry->size - 1;
 274         res.flags = IORESOURCE_MEM;
 275
 276         entry->base = devm_ioremap_resource(dev, &res);
 277         if (IS_ERR(entry->base)) {
 278                 ret = PTR_ERR(entry->base);
 279                 goto fail_ioremap;
 280         }
 281
 282         sysfs_bin_attr_init(&entry->pmt_bin_attr);
 283         entry->pmt_bin_attr.attr.name = ns->name;
 284         entry->pmt_bin_attr.attr.mode = 0440;
 285         entry->pmt_bin_attr.mmap = intel_pmt_mmap;
 286         entry->pmt_bin_attr.read = intel_pmt_read;
 287         entry->pmt_bin_attr.size = entry->size;
 288
 289         ret = sysfs_create_bin_file(&dev->kobj, &entry->pmt_bin_attr);
 290         if (!ret)
 291                 return 0;
 292
 293 fail_ioremap:
 294         if (ns->attr_grp)
 295                 sysfs_remove_group(entry->kobj, ns->attr_grp);
 296 fail_sysfs:
 297         device_unregister(dev);
 298 fail_dev_create:
 299         xa_erase(ns->xa, entry->devid);
 300
 301         return ret;
 302 }
 303
 304 int intel_pmt_dev_create(struct intel_pmt_entry *entry, struct intel_pmt_namespace *ns,
 305                          struct intel_vsec_device *intel_vsec_dev, int idx)
 306 {
 307         struct device *dev = &intel_vsec_dev->auxdev.dev;
 308         struct intel_pmt_header header;
 309         struct resource *disc_res;
 310         int ret;
 311
 312         disc_res = &intel_vsec_dev->resource[idx];
 313
 314         entry->disc_table = devm_ioremap_resource(dev, disc_res);
 315         if (IS_ERR(entry->disc_table))
 316                 return PTR_ERR(entry->disc_table);
 317
 318         ret = ns->pmt_header_decode(entry, &header, dev);
 319         if (ret)
 320                 return ret;
 321
 322         ret = intel_pmt_populate_entry(entry, &header, dev, disc_res);
 323         if (ret)
 324                 return ret;
 325
 326         return intel_pmt_dev_register(entry, ns, dev);
 327
 328 }
 329 EXPORT_SYMBOL_NS_GPL(intel_pmt_dev_create, INTEL_PMT);
 330
 331 void intel_pmt_dev_destroy(struct intel_pmt_entry *entry,
 332                            struct intel_pmt_namespace *ns)
 333 {
 334         struct device *dev = kobj_to_dev(entry->kobj);
 335
 336         if (entry->size)
 337                 sysfs_remove_bin_file(entry->kobj, &entry->pmt_bin_attr);
 338
 339         if (ns->attr_grp)
 340                 sysfs_remove_group(entry->kobj, ns->attr_grp);
 341
 342         device_unregister(dev);
 343         xa_erase(ns->xa, entry->devid);
 344 }
 345 EXPORT_SYMBOL_NS_GPL(intel_pmt_dev_destroy, INTEL_PMT);
 346
 347 static int __init pmt_class_init(void)
 348 {
 349         return class_register(&intel_pmt_class);
 350 }
 351
 352 static void __exit pmt_class_exit(void)
 353 {
 354         class_unregister(&intel_pmt_class);
 355 }
 356
 357 module_init(pmt_class_init);
 358 module_exit(pmt_class_exit);
 359
 360 MODULE_AUTHOR("Alexander Duyck <[email protected]>");
 361 MODULE_DESCRIPTION("Intel PMT Class driver");
 362 MODULE_LICENSE("GPL v2");