2 * abstraction of the spi interface of HopeRf rf69 radio module
4 * Copyright (C) 2016 Wolf-Entwicklungen
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
18 /* enable prosa debug info */
20 /* enable print of values on reg access */
22 /* enable print of values on fifo access */
23 #undef DEBUG_FIFO_ACCESS
25 #include <linux/types.h>
26 #include <linux/spi/spi.h>
29 #include "rf69_registers.h"
31 #define F_OSC 32000000 /* in Hz */
32 #define FIFO_SIZE 66 /* in byte */
34 /*-------------------------------------------------------------------------*/
36 static u8 rf69_read_reg(struct spi_device *spi, u8 addr)
40 retval = spi_w8r8(spi, addr);
44 /* should never happen, since we already checked,
45 * that module is connected. Therefore no error
46 * handling, just an optional error message...
48 dev_dbg(&spi->dev, "read 0x%x FAILED\n", addr);
50 dev_dbg(&spi->dev, "read 0x%x from reg 0x%x\n", retval, addr);
56 static int rf69_write_reg(struct spi_device *spi, u8 addr, u8 value)
61 buffer[0] = addr | WRITE_BIT;
64 retval = spi_write(spi, &buffer, 2);
68 /* should never happen, since we already checked,
69 * that module is connected. Therefore no error
70 * handling, just an optional error message...
72 dev_dbg(&spi->dev, "write 0x%x to 0x%x FAILED\n", value, addr);
74 dev_dbg(&spi->dev, "wrote 0x%x to reg 0x%x\n", value, addr);
80 /*-------------------------------------------------------------------------*/
82 static int rf69_set_bit(struct spi_device *spi, u8 reg, u8 mask)
86 tmp = rf69_read_reg(spi, reg);
88 return rf69_write_reg(spi, reg, tmp);
91 static int rf69_clear_bit(struct spi_device *spi, u8 reg, u8 mask)
95 tmp = rf69_read_reg(spi, reg);
97 return rf69_write_reg(spi, reg, tmp);
100 static inline int rf69_read_mod_write(struct spi_device *spi, u8 reg,
105 tmp = rf69_read_reg(spi, reg);
106 tmp = (tmp & ~mask) | value;
107 return rf69_write_reg(spi, reg, tmp);
110 /*-------------------------------------------------------------------------*/
112 int rf69_set_mode(struct spi_device *spi, enum mode mode)
116 return rf69_read_mod_write(spi, REG_OPMODE, MASK_OPMODE_MODE,
117 OPMODE_MODE_TRANSMIT);
119 return rf69_read_mod_write(spi, REG_OPMODE, MASK_OPMODE_MODE,
120 OPMODE_MODE_RECEIVE);
122 return rf69_read_mod_write(spi, REG_OPMODE, MASK_OPMODE_MODE,
123 OPMODE_MODE_SYNTHESIZER);
125 return rf69_read_mod_write(spi, REG_OPMODE, MASK_OPMODE_MODE,
126 OPMODE_MODE_STANDBY);
128 return rf69_read_mod_write(spi, REG_OPMODE, MASK_OPMODE_MODE,
131 dev_dbg(&spi->dev, "set: illegal input param");
135 // we are using packet mode, so this check is not really needed
136 // but waiting for mode ready is necessary when going from sleep because the FIFO may not be immediately available from previous mode
137 //while (_mode == RF69_MODE_SLEEP && (READ_REG(REG_IRQFLAGS1) & RF_IRQFLAGS1_MODEREADY) == 0x00); // Wait for ModeReady
140 int rf69_set_data_mode(struct spi_device *spi, u8 data_mode)
142 return rf69_read_mod_write(spi, REG_DATAMODUL, MASK_DATAMODUL_MODE,
146 int rf69_set_modulation(struct spi_device *spi, enum modulation modulation)
148 switch (modulation) {
150 return rf69_read_mod_write(spi, REG_DATAMODUL,
151 MASK_DATAMODUL_MODULATION_TYPE,
152 DATAMODUL_MODULATION_TYPE_OOK);
154 return rf69_read_mod_write(spi, REG_DATAMODUL,
155 MASK_DATAMODUL_MODULATION_TYPE,
156 DATAMODUL_MODULATION_TYPE_FSK);
158 dev_dbg(&spi->dev, "set: illegal input param");
163 static enum modulation rf69_get_modulation(struct spi_device *spi)
167 modulation_reg = rf69_read_reg(spi, REG_DATAMODUL);
169 switch (modulation_reg & MASK_DATAMODUL_MODULATION_TYPE) {
170 case DATAMODUL_MODULATION_TYPE_OOK:
172 case DATAMODUL_MODULATION_TYPE_FSK:
179 int rf69_set_modulation_shaping(struct spi_device *spi,
180 enum mod_shaping mod_shaping)
182 switch (rf69_get_modulation(spi)) {
184 switch (mod_shaping) {
186 return rf69_read_mod_write(spi, REG_DATAMODUL,
187 MASK_DATAMODUL_MODULATION_SHAPE,
188 DATAMODUL_MODULATION_SHAPE_NONE);
190 return rf69_read_mod_write(spi, REG_DATAMODUL,
191 MASK_DATAMODUL_MODULATION_SHAPE,
192 DATAMODUL_MODULATION_SHAPE_1_0);
194 return rf69_read_mod_write(spi, REG_DATAMODUL,
195 MASK_DATAMODUL_MODULATION_SHAPE,
196 DATAMODUL_MODULATION_SHAPE_0_5);
198 return rf69_read_mod_write(spi, REG_DATAMODUL,
199 MASK_DATAMODUL_MODULATION_SHAPE,
200 DATAMODUL_MODULATION_SHAPE_0_3);
202 dev_dbg(&spi->dev, "set: illegal input param");
206 switch (mod_shaping) {
208 return rf69_read_mod_write(spi, REG_DATAMODUL,
209 MASK_DATAMODUL_MODULATION_SHAPE,
210 DATAMODUL_MODULATION_SHAPE_NONE);
212 return rf69_read_mod_write(spi, REG_DATAMODUL,
213 MASK_DATAMODUL_MODULATION_SHAPE,
214 DATAMODUL_MODULATION_SHAPE_BR);
216 return rf69_read_mod_write(spi, REG_DATAMODUL,
217 MASK_DATAMODUL_MODULATION_SHAPE,
218 DATAMODUL_MODULATION_SHAPE_2BR);
220 dev_dbg(&spi->dev, "set: illegal input param");
224 dev_dbg(&spi->dev, "set: modulation undefined");
229 int rf69_set_bit_rate(struct spi_device *spi, u16 bit_rate)
238 bit_rate_min = F_OSC / 8388608; // 8388608 = 2^23;
239 if (bit_rate < bit_rate_min) {
240 dev_dbg(&spi->dev, "setBitRate: illegal input param");
244 // calculate reg settings
245 bit_rate_reg = (F_OSC / bit_rate);
247 msb = (bit_rate_reg & 0xff00) >> 8;
248 lsb = (bit_rate_reg & 0xff);
251 retval = rf69_write_reg(spi, REG_BITRATE_MSB, msb);
254 retval = rf69_write_reg(spi, REG_BITRATE_LSB, lsb);
261 int rf69_set_deviation(struct spi_device *spi, u32 deviation)
268 u64 factor = 1000000; // to improve precision of calculation
270 // TODO: Dependency to bitrate
271 if (deviation < 600 || deviation > 500000) {
272 dev_dbg(&spi->dev, "set_deviation: illegal input param");
277 f_step = F_OSC * factor;
278 do_div(f_step, 524288); // 524288 = 2^19
280 // calculate register settings
281 f_reg = deviation * factor;
282 do_div(f_reg, f_step);
284 msb = (f_reg & 0xff00) >> 8;
285 lsb = (f_reg & 0xff);
288 if (msb & ~FDEVMASB_MASK) {
289 dev_dbg(&spi->dev, "set_deviation: err in calc of msb");
294 retval = rf69_write_reg(spi, REG_FDEV_MSB, msb);
297 retval = rf69_write_reg(spi, REG_FDEV_LSB, lsb);
304 int rf69_set_frequency(struct spi_device *spi, u32 frequency)
313 u64 factor = 1000000; // to improve precision of calculation
316 f_step = F_OSC * factor;
317 do_div(f_step, 524288); // 524288 = 2^19
320 f_max = div_u64(f_step * 8388608, factor);
321 if (frequency > f_max) {
322 dev_dbg(&spi->dev, "setFrequency: illegal input param");
326 // calculate reg settings
327 f_reg = frequency * factor;
328 do_div(f_reg, f_step);
330 msb = (f_reg & 0xff0000) >> 16;
331 mid = (f_reg & 0xff00) >> 8;
332 lsb = (f_reg & 0xff);
335 retval = rf69_write_reg(spi, REG_FRF_MSB, msb);
338 retval = rf69_write_reg(spi, REG_FRF_MID, mid);
341 retval = rf69_write_reg(spi, REG_FRF_LSB, lsb);
348 int rf69_enable_amplifier(struct spi_device *spi, u8 amplifier_mask)
350 return rf69_set_bit(spi, REG_PALEVEL, amplifier_mask);
353 int rf69_disable_amplifier(struct spi_device *spi, u8 amplifier_mask)
355 return rf69_clear_bit(spi, REG_PALEVEL, amplifier_mask);
358 int rf69_set_output_power_level(struct spi_device *spi, u8 power_level)
360 // TODO: Dependency to PA0,1,2 setting
364 if (power_level > 0x1f) {
365 dev_dbg(&spi->dev, "set: illegal input param");
370 return rf69_read_mod_write(spi, REG_PALEVEL, MASK_PALEVEL_OUTPUT_POWER,
374 int rf69_set_pa_ramp(struct spi_device *spi, enum pa_ramp pa_ramp)
378 return rf69_write_reg(spi, REG_PARAMP, PARAMP_3400);
380 return rf69_write_reg(spi, REG_PARAMP, PARAMP_2000);
382 return rf69_write_reg(spi, REG_PARAMP, PARAMP_1000);
384 return rf69_write_reg(spi, REG_PARAMP, PARAMP_500);
386 return rf69_write_reg(spi, REG_PARAMP, PARAMP_250);
388 return rf69_write_reg(spi, REG_PARAMP, PARAMP_125);
390 return rf69_write_reg(spi, REG_PARAMP, PARAMP_100);
392 return rf69_write_reg(spi, REG_PARAMP, PARAMP_62);
394 return rf69_write_reg(spi, REG_PARAMP, PARAMP_50);
396 return rf69_write_reg(spi, REG_PARAMP, PARAMP_40);
398 return rf69_write_reg(spi, REG_PARAMP, PARAMP_31);
400 return rf69_write_reg(spi, REG_PARAMP, PARAMP_25);
402 return rf69_write_reg(spi, REG_PARAMP, PARAMP_20);
404 return rf69_write_reg(spi, REG_PARAMP, PARAMP_15);
406 return rf69_write_reg(spi, REG_PARAMP, PARAMP_12);
408 return rf69_write_reg(spi, REG_PARAMP, PARAMP_10);
410 dev_dbg(&spi->dev, "set: illegal input param");
415 int rf69_set_antenna_impedance(struct spi_device *spi,
416 enum antenna_impedance antenna_impedance)
418 switch (antenna_impedance) {
420 return rf69_clear_bit(spi, REG_LNA, MASK_LNA_ZIN);
421 case two_hundred_ohm:
422 return rf69_set_bit(spi, REG_LNA, MASK_LNA_ZIN);
424 dev_dbg(&spi->dev, "set: illegal input param");
429 int rf69_set_lna_gain(struct spi_device *spi, enum lna_gain lna_gain)
433 return rf69_read_mod_write(spi, REG_LNA, MASK_LNA_GAIN,
436 return rf69_read_mod_write(spi, REG_LNA, MASK_LNA_GAIN,
439 return rf69_read_mod_write(spi, REG_LNA, MASK_LNA_GAIN,
440 LNA_GAIN_MAX_MINUS_6);
442 return rf69_read_mod_write(spi, REG_LNA, MASK_LNA_GAIN,
443 LNA_GAIN_MAX_MINUS_12);
445 return rf69_read_mod_write(spi, REG_LNA, MASK_LNA_GAIN,
446 LNA_GAIN_MAX_MINUS_24);
448 return rf69_read_mod_write(spi, REG_LNA, MASK_LNA_GAIN,
449 LNA_GAIN_MAX_MINUS_36);
451 return rf69_read_mod_write(spi, REG_LNA, MASK_LNA_GAIN,
452 LNA_GAIN_MAX_MINUS_48);
454 dev_dbg(&spi->dev, "set: illegal input param");
459 static int rf69_set_bandwidth_intern(struct spi_device *spi, u8 reg,
460 enum mantisse mantisse, u8 exponent)
464 // check value for mantisse and exponent
466 dev_dbg(&spi->dev, "set: illegal input param");
470 if ((mantisse != mantisse16) &&
471 (mantisse != mantisse20) &&
472 (mantisse != mantisse24)) {
473 dev_dbg(&spi->dev, "set: illegal input param");
478 bandwidth = rf69_read_reg(spi, reg);
480 // "delete" mantisse and exponent = just keep the DCC setting
481 bandwidth = bandwidth & MASK_BW_DCC_FREQ;
486 bandwidth = bandwidth | BW_MANT_16;
489 bandwidth = bandwidth | BW_MANT_20;
492 bandwidth = bandwidth | BW_MANT_24;
497 bandwidth = bandwidth | exponent;
500 return rf69_write_reg(spi, reg, bandwidth);
503 int rf69_set_bandwidth(struct spi_device *spi, enum mantisse mantisse,
506 return rf69_set_bandwidth_intern(spi, REG_RXBW, mantisse, exponent);
509 int rf69_set_bandwidth_during_afc(struct spi_device *spi,
510 enum mantisse mantisse,
513 return rf69_set_bandwidth_intern(spi, REG_AFCBW, mantisse, exponent);
516 int rf69_set_ook_threshold_dec(struct spi_device *spi,
517 enum threshold_decrement threshold_decrement)
519 switch (threshold_decrement) {
521 return rf69_read_mod_write(spi, REG_OOKPEAK,
522 MASK_OOKPEAK_THRESDEC,
523 OOKPEAK_THRESHDEC_EVERY_8TH);
525 return rf69_read_mod_write(spi, REG_OOKPEAK,
526 MASK_OOKPEAK_THRESDEC,
527 OOKPEAK_THRESHDEC_EVERY_4TH);
529 return rf69_read_mod_write(spi, REG_OOKPEAK,
530 MASK_OOKPEAK_THRESDEC,
531 OOKPEAK_THRESHDEC_EVERY_2ND);
533 return rf69_read_mod_write(spi, REG_OOKPEAK,
534 MASK_OOKPEAK_THRESDEC,
535 OOKPEAK_THRESHDEC_ONCE);
537 return rf69_read_mod_write(spi, REG_OOKPEAK,
538 MASK_OOKPEAK_THRESDEC,
539 OOKPEAK_THRESHDEC_TWICE);
541 return rf69_read_mod_write(spi, REG_OOKPEAK,
542 MASK_OOKPEAK_THRESDEC,
543 OOKPEAK_THRESHDEC_4_TIMES);
545 return rf69_read_mod_write(spi, REG_OOKPEAK,
546 MASK_OOKPEAK_THRESDEC,
547 OOKPEAK_THRESHDEC_8_TIMES);
549 return rf69_read_mod_write(spi, REG_OOKPEAK,
550 MASK_OOKPEAK_THRESDEC,
551 OOKPEAK_THRESHDEC_16_TIMES);
553 dev_dbg(&spi->dev, "set: illegal input param");
558 int rf69_set_dio_mapping(struct spi_device *spi, u8 dio_number, u8 value)
565 switch (dio_number) {
567 mask = MASK_DIO0; shift = SHIFT_DIO0; dio_addr = REG_DIOMAPPING1;
570 mask = MASK_DIO1; shift = SHIFT_DIO1; dio_addr = REG_DIOMAPPING1;
573 mask = MASK_DIO2; shift = SHIFT_DIO2; dio_addr = REG_DIOMAPPING1;
576 mask = MASK_DIO3; shift = SHIFT_DIO3; dio_addr = REG_DIOMAPPING1;
579 mask = MASK_DIO4; shift = SHIFT_DIO4; dio_addr = REG_DIOMAPPING2;
582 mask = MASK_DIO5; shift = SHIFT_DIO5; dio_addr = REG_DIOMAPPING2;
585 dev_dbg(&spi->dev, "set: illegal input param");
590 dio_value = rf69_read_reg(spi, dio_addr);
592 dio_value = dio_value & ~mask;
594 dio_value = dio_value | value << shift;
596 return rf69_write_reg(spi, dio_addr, dio_value);
599 bool rf69_get_flag(struct spi_device *spi, enum flag flag)
602 case mode_switch_completed:
603 return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_MODE_READY);
604 case ready_to_receive:
605 return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_RX_READY);
607 return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_TX_READY);
609 return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_PLL_LOCK);
610 case rssi_exceeded_threshold:
611 return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_RSSI);
613 return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_TIMEOUT);
615 return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_AUTOMODE);
616 case sync_address_match:
617 return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_SYNC_ADDRESS_MATCH);
619 return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_FIFO_FULL);
620 /* case fifo_not_empty:
621 * return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_FIFO_NOT_EMPTY); */
623 return !(rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_FIFO_NOT_EMPTY);
624 case fifo_level_below_threshold:
625 return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_FIFO_LEVEL);
627 return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_FIFO_OVERRUN);
629 return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_PACKET_SENT);
631 return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_PAYLOAD_READY);
633 return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_CRC_OK);
635 return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_LOW_BAT);
636 default: return false;
640 int rf69_set_rssi_threshold(struct spi_device *spi, u8 threshold)
642 /* no value check needed - u8 exactly matches register size */
644 return rf69_write_reg(spi, REG_RSSITHRESH, threshold);
647 int rf69_set_preamble_length(struct spi_device *spi, u16 preamble_length)
652 /* no value check needed - u16 exactly matches register size */
654 /* calculate reg settings */
655 msb = (preamble_length & 0xff00) >> 8;
656 lsb = (preamble_length & 0xff);
658 /* transmit to chip */
659 retval = rf69_write_reg(spi, REG_PREAMBLE_MSB, msb);
662 retval = rf69_write_reg(spi, REG_PREAMBLE_LSB, lsb);
667 int rf69_enable_sync(struct spi_device *spi)
669 return rf69_set_bit(spi, REG_SYNC_CONFIG, MASK_SYNC_CONFIG_SYNC_ON);
672 int rf69_disable_sync(struct spi_device *spi)
674 return rf69_clear_bit(spi, REG_SYNC_CONFIG, MASK_SYNC_CONFIG_SYNC_ON);
677 int rf69_set_fifo_fill_condition(struct spi_device *spi,
678 enum fifo_fill_condition fifo_fill_condition)
680 switch (fifo_fill_condition) {
682 return rf69_set_bit(spi, REG_SYNC_CONFIG,
683 MASK_SYNC_CONFIG_FIFO_FILL_CONDITION);
684 case after_sync_interrupt:
685 return rf69_clear_bit(spi, REG_SYNC_CONFIG,
686 MASK_SYNC_CONFIG_FIFO_FILL_CONDITION);
688 dev_dbg(&spi->dev, "set: illegal input param");
693 int rf69_set_sync_size(struct spi_device *spi, u8 sync_size)
696 if (sync_size > 0x07) {
697 dev_dbg(&spi->dev, "set: illegal input param");
702 return rf69_read_mod_write(spi, REG_SYNC_CONFIG,
703 MASK_SYNC_CONFIG_SYNC_SIZE,
707 int rf69_set_sync_values(struct spi_device *spi, u8 sync_values[8])
711 retval += rf69_write_reg(spi, REG_SYNCVALUE1, sync_values[0]);
712 retval += rf69_write_reg(spi, REG_SYNCVALUE2, sync_values[1]);
713 retval += rf69_write_reg(spi, REG_SYNCVALUE3, sync_values[2]);
714 retval += rf69_write_reg(spi, REG_SYNCVALUE4, sync_values[3]);
715 retval += rf69_write_reg(spi, REG_SYNCVALUE5, sync_values[4]);
716 retval += rf69_write_reg(spi, REG_SYNCVALUE6, sync_values[5]);
717 retval += rf69_write_reg(spi, REG_SYNCVALUE7, sync_values[6]);
718 retval += rf69_write_reg(spi, REG_SYNCVALUE8, sync_values[7]);
723 int rf69_set_packet_format(struct spi_device *spi,
724 enum packet_format packet_format)
726 switch (packet_format) {
727 case packet_length_var:
728 return rf69_set_bit(spi, REG_PACKETCONFIG1,
729 MASK_PACKETCONFIG1_PAKET_FORMAT_VARIABLE);
730 case packet_length_fix:
731 return rf69_clear_bit(spi, REG_PACKETCONFIG1,
732 MASK_PACKETCONFIG1_PAKET_FORMAT_VARIABLE);
734 dev_dbg(&spi->dev, "set: illegal input param");
739 int rf69_enable_crc(struct spi_device *spi)
741 return rf69_set_bit(spi, REG_PACKETCONFIG1, MASK_PACKETCONFIG1_CRC_ON);
744 int rf69_disable_crc(struct spi_device *spi)
746 return rf69_clear_bit(spi, REG_PACKETCONFIG1, MASK_PACKETCONFIG1_CRC_ON);
749 int rf69_set_address_filtering(struct spi_device *spi,
750 enum address_filtering address_filtering)
752 switch (address_filtering) {
754 return rf69_read_mod_write(spi, REG_PACKETCONFIG1,
755 MASK_PACKETCONFIG1_ADDRESSFILTERING,
756 PACKETCONFIG1_ADDRESSFILTERING_OFF);
758 return rf69_read_mod_write(spi, REG_PACKETCONFIG1,
759 MASK_PACKETCONFIG1_ADDRESSFILTERING,
760 PACKETCONFIG1_ADDRESSFILTERING_NODE);
761 case node_or_broadcast_address:
762 return rf69_read_mod_write(spi, REG_PACKETCONFIG1,
763 MASK_PACKETCONFIG1_ADDRESSFILTERING,
764 PACKETCONFIG1_ADDRESSFILTERING_NODEBROADCAST);
766 dev_dbg(&spi->dev, "set: illegal input param");
771 int rf69_set_payload_length(struct spi_device *spi, u8 payload_length)
773 return rf69_write_reg(spi, REG_PAYLOAD_LENGTH, payload_length);
776 int rf69_set_node_address(struct spi_device *spi, u8 node_address)
778 return rf69_write_reg(spi, REG_NODEADRS, node_address);
781 int rf69_set_broadcast_address(struct spi_device *spi, u8 broadcast_address)
783 return rf69_write_reg(spi, REG_BROADCASTADRS, broadcast_address);
786 int rf69_set_tx_start_condition(struct spi_device *spi,
787 enum tx_start_condition tx_start_condition)
789 switch (tx_start_condition) {
791 return rf69_clear_bit(spi, REG_FIFO_THRESH,
792 MASK_FIFO_THRESH_TXSTART);
794 return rf69_set_bit(spi, REG_FIFO_THRESH,
795 MASK_FIFO_THRESH_TXSTART);
797 dev_dbg(&spi->dev, "set: illegal input param");
802 int rf69_set_fifo_threshold(struct spi_device *spi, u8 threshold)
806 /* check input value */
807 if (threshold & 0x80) {
808 dev_dbg(&spi->dev, "set: illegal input param");
813 retval = rf69_read_mod_write(spi, REG_FIFO_THRESH,
814 MASK_FIFO_THRESH_VALUE,
819 /* access the fifo to activate new threshold
820 * retval (mis-) used as buffer here
822 return rf69_read_fifo(spi, (u8 *)&retval, 1);
825 int rf69_set_dagc(struct spi_device *spi, enum dagc dagc)
829 return rf69_write_reg(spi, REG_TESTDAGC, DAGC_NORMAL);
831 return rf69_write_reg(spi, REG_TESTDAGC, DAGC_IMPROVED_LOWBETA0);
832 case improve_for_low_modulation_index:
833 return rf69_write_reg(spi, REG_TESTDAGC, DAGC_IMPROVED_LOWBETA1);
835 dev_dbg(&spi->dev, "set: illegal input param");
840 /*-------------------------------------------------------------------------*/
842 int rf69_read_fifo(struct spi_device *spi, u8 *buffer, unsigned int size)
844 #ifdef DEBUG_FIFO_ACCESS
847 struct spi_transfer transfer;
848 u8 local_buffer[FIFO_SIZE + 1];
851 if (size > FIFO_SIZE) {
853 "read fifo: passed in buffer bigger then internal buffer\n");
857 /* prepare a bidirectional transfer */
858 local_buffer[0] = REG_FIFO;
859 memset(&transfer, 0, sizeof(transfer));
860 transfer.tx_buf = local_buffer;
861 transfer.rx_buf = local_buffer;
862 transfer.len = size + 1;
864 retval = spi_sync_transfer(spi, &transfer, 1);
866 #ifdef DEBUG_FIFO_ACCESS
867 for (i = 0; i < size; i++)
868 dev_dbg(&spi->dev, "%d - 0x%x\n", i, local_buffer[i + 1]);
871 memcpy(buffer, &local_buffer[1], size);
876 int rf69_write_fifo(struct spi_device *spi, u8 *buffer, unsigned int size)
878 #ifdef DEBUG_FIFO_ACCESS
881 char spi_address = REG_FIFO | WRITE_BIT;
882 u8 local_buffer[FIFO_SIZE + 1];
884 if (size > FIFO_SIZE) {
886 "read fifo: passed in buffer bigger then internal buffer\n");
890 local_buffer[0] = spi_address;
891 memcpy(&local_buffer[1], buffer, size);
893 #ifdef DEBUG_FIFO_ACCESS
894 for (i = 0; i < size; i++)
895 dev_dbg(&spi->dev, "0x%x\n", buffer[i]);
898 return spi_write(spi, local_buffer, size + 1);