1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2015 MediaTek Inc.
7 #include <linux/component.h>
8 #include <linux/iommu.h>
9 #include <linux/module.h>
10 #include <linux/of_address.h>
11 #include <linux/of_platform.h>
12 #include <linux/pm_runtime.h>
13 #include <linux/dma-mapping.h>
15 #include <drm/drm_atomic.h>
16 #include <drm/drm_atomic_helper.h>
17 #include <drm/drm_drv.h>
18 #include <drm/drm_fb_helper.h>
19 #include <drm/drm_gem.h>
20 #include <drm/drm_gem_cma_helper.h>
21 #include <drm/drm_of.h>
22 #include <drm/drm_probe_helper.h>
23 #include <drm/drm_vblank.h>
25 #include "mtk_drm_crtc.h"
26 #include "mtk_drm_ddp.h"
27 #include "mtk_drm_ddp.h"
28 #include "mtk_drm_ddp_comp.h"
29 #include "mtk_drm_drv.h"
30 #include "mtk_drm_fb.h"
31 #include "mtk_drm_gem.h"
33 #define DRIVER_NAME "mediatek"
34 #define DRIVER_DESC "Mediatek SoC DRM"
35 #define DRIVER_DATE "20150513"
36 #define DRIVER_MAJOR 1
37 #define DRIVER_MINOR 0
39 static void mtk_atomic_schedule(struct mtk_drm_private *private,
40 struct drm_atomic_state *state)
42 private->commit.state = state;
43 schedule_work(&private->commit.work);
46 static void mtk_atomic_complete(struct mtk_drm_private *private,
47 struct drm_atomic_state *state)
49 struct drm_device *drm = private->drm;
51 drm_atomic_helper_wait_for_fences(drm, state, false);
54 * Mediatek drm supports runtime PM, so plane registers cannot be
55 * written when their crtc is disabled.
57 * The comment for drm_atomic_helper_commit states:
58 * For drivers supporting runtime PM the recommended sequence is
60 * drm_atomic_helper_commit_modeset_disables(dev, state);
61 * drm_atomic_helper_commit_modeset_enables(dev, state);
62 * drm_atomic_helper_commit_planes(dev, state,
63 * DRM_PLANE_COMMIT_ACTIVE_ONLY);
65 * See the kerneldoc entries for these three functions for more details.
67 drm_atomic_helper_commit_modeset_disables(drm, state);
68 drm_atomic_helper_commit_modeset_enables(drm, state);
69 drm_atomic_helper_commit_planes(drm, state,
70 DRM_PLANE_COMMIT_ACTIVE_ONLY);
72 drm_atomic_helper_wait_for_vblanks(drm, state);
74 drm_atomic_helper_cleanup_planes(drm, state);
75 drm_atomic_state_put(state);
78 static void mtk_atomic_work(struct work_struct *work)
80 struct mtk_drm_private *private = container_of(work,
81 struct mtk_drm_private, commit.work);
83 mtk_atomic_complete(private, private->commit.state);
86 static int mtk_atomic_commit(struct drm_device *drm,
87 struct drm_atomic_state *state,
90 struct mtk_drm_private *private = drm->dev_private;
93 ret = drm_atomic_helper_prepare_planes(drm, state);
97 mutex_lock(&private->commit.lock);
98 flush_work(&private->commit.work);
100 ret = drm_atomic_helper_swap_state(state, true);
102 mutex_unlock(&private->commit.lock);
103 drm_atomic_helper_cleanup_planes(drm, state);
107 drm_atomic_state_get(state);
109 mtk_atomic_schedule(private, state);
111 mtk_atomic_complete(private, state);
113 mutex_unlock(&private->commit.lock);
118 static const struct drm_mode_config_funcs mtk_drm_mode_config_funcs = {
119 .fb_create = mtk_drm_mode_fb_create,
120 .atomic_check = drm_atomic_helper_check,
121 .atomic_commit = mtk_atomic_commit,
124 static const enum mtk_ddp_comp_id mt2701_mtk_ddp_main[] = {
127 DDP_COMPONENT_COLOR0,
132 static const enum mtk_ddp_comp_id mt2701_mtk_ddp_ext[] = {
137 static const enum mtk_ddp_comp_id mt2712_mtk_ddp_main[] = {
139 DDP_COMPONENT_COLOR0,
147 static const enum mtk_ddp_comp_id mt2712_mtk_ddp_ext[] = {
149 DDP_COMPONENT_COLOR1,
157 static const enum mtk_ddp_comp_id mt2712_mtk_ddp_third[] = {
163 static const enum mtk_ddp_comp_id mt8173_mtk_ddp_main[] = {
165 DDP_COMPONENT_COLOR0,
174 static const enum mtk_ddp_comp_id mt8173_mtk_ddp_ext[] = {
176 DDP_COMPONENT_COLOR1,
182 static const struct mtk_mmsys_driver_data mt2701_mmsys_driver_data = {
183 .main_path = mt2701_mtk_ddp_main,
184 .main_len = ARRAY_SIZE(mt2701_mtk_ddp_main),
185 .ext_path = mt2701_mtk_ddp_ext,
186 .ext_len = ARRAY_SIZE(mt2701_mtk_ddp_ext),
187 .shadow_register = true,
190 static const struct mtk_mmsys_driver_data mt2712_mmsys_driver_data = {
191 .main_path = mt2712_mtk_ddp_main,
192 .main_len = ARRAY_SIZE(mt2712_mtk_ddp_main),
193 .ext_path = mt2712_mtk_ddp_ext,
194 .ext_len = ARRAY_SIZE(mt2712_mtk_ddp_ext),
195 .third_path = mt2712_mtk_ddp_third,
196 .third_len = ARRAY_SIZE(mt2712_mtk_ddp_third),
199 static const struct mtk_mmsys_driver_data mt8173_mmsys_driver_data = {
200 .main_path = mt8173_mtk_ddp_main,
201 .main_len = ARRAY_SIZE(mt8173_mtk_ddp_main),
202 .ext_path = mt8173_mtk_ddp_ext,
203 .ext_len = ARRAY_SIZE(mt8173_mtk_ddp_ext),
206 static int mtk_drm_kms_init(struct drm_device *drm)
208 struct mtk_drm_private *private = drm->dev_private;
209 struct platform_device *pdev;
210 struct device_node *np;
211 struct device *dma_dev;
214 if (!iommu_present(&platform_bus_type))
215 return -EPROBE_DEFER;
217 pdev = of_find_device_by_node(private->mutex_node);
219 dev_err(drm->dev, "Waiting for disp-mutex device %pOF\n",
220 private->mutex_node);
221 of_node_put(private->mutex_node);
222 return -EPROBE_DEFER;
224 private->mutex_dev = &pdev->dev;
226 drm_mode_config_init(drm);
228 drm->mode_config.min_width = 64;
229 drm->mode_config.min_height = 64;
232 * set max width and height as default value(4096x4096).
233 * this value would be used to check framebuffer size limitation
234 * at drm_mode_addfb().
236 drm->mode_config.max_width = 4096;
237 drm->mode_config.max_height = 4096;
238 drm->mode_config.funcs = &mtk_drm_mode_config_funcs;
240 ret = component_bind_all(drm->dev, drm);
242 goto err_config_cleanup;
245 * We currently support two fixed data streams, each optional,
246 * and each statically assigned to a crtc:
247 * OVL0 -> COLOR0 -> AAL -> OD -> RDMA0 -> UFOE -> DSI0 ...
249 ret = mtk_drm_crtc_create(drm, private->data->main_path,
250 private->data->main_len);
252 goto err_component_unbind;
253 /* ... and OVL1 -> COLOR1 -> GAMMA -> RDMA1 -> DPI0. */
254 ret = mtk_drm_crtc_create(drm, private->data->ext_path,
255 private->data->ext_len);
257 goto err_component_unbind;
259 ret = mtk_drm_crtc_create(drm, private->data->third_path,
260 private->data->third_len);
262 goto err_component_unbind;
264 /* Use OVL device for all DMA memory allocations */
265 np = private->comp_node[private->data->main_path[0]] ?:
266 private->comp_node[private->data->ext_path[0]];
267 pdev = of_find_device_by_node(np);
270 dev_err(drm->dev, "Need at least one OVL device\n");
271 goto err_component_unbind;
274 dma_dev = &pdev->dev;
275 private->dma_dev = dma_dev;
278 * Configure the DMA segment size to make sure we get contiguous IOVA
279 * when importing PRIME buffers.
281 if (!dma_dev->dma_parms) {
282 private->dma_parms_allocated = true;
284 devm_kzalloc(drm->dev, sizeof(*dma_dev->dma_parms),
287 if (!dma_dev->dma_parms) {
289 goto err_component_unbind;
292 ret = dma_set_max_seg_size(dma_dev, (unsigned int)DMA_BIT_MASK(32));
294 dev_err(dma_dev, "Failed to set DMA segment size\n");
295 goto err_unset_dma_parms;
299 * We don't use the drm_irq_install() helpers provided by the DRM
300 * core, so we need to set this manually in order to allow the
301 * DRM_IOCTL_WAIT_VBLANK to operate correctly.
303 drm->irq_enabled = true;
304 ret = drm_vblank_init(drm, MAX_CRTC);
306 goto err_unset_dma_parms;
308 drm_kms_helper_poll_init(drm);
309 drm_mode_config_reset(drm);
314 if (private->dma_parms_allocated)
315 dma_dev->dma_parms = NULL;
316 err_component_unbind:
317 component_unbind_all(drm->dev, drm);
319 drm_mode_config_cleanup(drm);
324 static void mtk_drm_kms_deinit(struct drm_device *drm)
326 struct mtk_drm_private *private = drm->dev_private;
328 drm_kms_helper_poll_fini(drm);
329 drm_atomic_helper_shutdown(drm);
331 if (private->dma_parms_allocated)
332 private->dma_dev->dma_parms = NULL;
334 component_unbind_all(drm->dev, drm);
335 drm_mode_config_cleanup(drm);
338 static const struct file_operations mtk_drm_fops = {
339 .owner = THIS_MODULE,
341 .release = drm_release,
342 .unlocked_ioctl = drm_ioctl,
343 .mmap = mtk_drm_gem_mmap,
346 .compat_ioctl = drm_compat_ioctl,
350 * We need to override this because the device used to import the memory is
351 * not dev->dev, as drm_gem_prime_import() expects.
353 struct drm_gem_object *mtk_drm_gem_prime_import(struct drm_device *dev,
354 struct dma_buf *dma_buf)
356 struct mtk_drm_private *private = dev->dev_private;
358 return drm_gem_prime_import_dev(dev, dma_buf, private->dma_dev);
361 static struct drm_driver mtk_drm_driver = {
362 .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_ATOMIC,
364 .gem_free_object_unlocked = mtk_drm_gem_free_object,
365 .gem_vm_ops = &drm_gem_cma_vm_ops,
366 .dumb_create = mtk_drm_gem_dumb_create,
368 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
369 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
370 .gem_prime_import = mtk_drm_gem_prime_import,
371 .gem_prime_get_sg_table = mtk_gem_prime_get_sg_table,
372 .gem_prime_import_sg_table = mtk_gem_prime_import_sg_table,
373 .gem_prime_mmap = mtk_drm_gem_mmap_buf,
374 .gem_prime_vmap = mtk_drm_gem_prime_vmap,
375 .gem_prime_vunmap = mtk_drm_gem_prime_vunmap,
376 .fops = &mtk_drm_fops,
381 .major = DRIVER_MAJOR,
382 .minor = DRIVER_MINOR,
385 static int compare_of(struct device *dev, void *data)
387 return dev->of_node == data;
390 static int mtk_drm_bind(struct device *dev)
392 struct mtk_drm_private *private = dev_get_drvdata(dev);
393 struct drm_device *drm;
396 drm = drm_dev_alloc(&mtk_drm_driver, dev);
400 drm->dev_private = private;
403 ret = mtk_drm_kms_init(drm);
407 ret = drm_dev_register(drm, 0);
411 ret = drm_fbdev_generic_setup(drm, 32);
413 DRM_ERROR("Failed to initialize fbdev: %d\n", ret);
418 mtk_drm_kms_deinit(drm);
424 static void mtk_drm_unbind(struct device *dev)
426 struct mtk_drm_private *private = dev_get_drvdata(dev);
428 drm_dev_unregister(private->drm);
429 mtk_drm_kms_deinit(private->drm);
430 drm_dev_put(private->drm);
431 private->num_pipes = 0;
435 static const struct component_master_ops mtk_drm_ops = {
436 .bind = mtk_drm_bind,
437 .unbind = mtk_drm_unbind,
440 static const struct of_device_id mtk_ddp_comp_dt_ids[] = {
441 { .compatible = "mediatek,mt2701-disp-ovl",
442 .data = (void *)MTK_DISP_OVL },
443 { .compatible = "mediatek,mt8173-disp-ovl",
444 .data = (void *)MTK_DISP_OVL },
445 { .compatible = "mediatek,mt2701-disp-rdma",
446 .data = (void *)MTK_DISP_RDMA },
447 { .compatible = "mediatek,mt8173-disp-rdma",
448 .data = (void *)MTK_DISP_RDMA },
449 { .compatible = "mediatek,mt8173-disp-wdma",
450 .data = (void *)MTK_DISP_WDMA },
451 { .compatible = "mediatek,mt2701-disp-color",
452 .data = (void *)MTK_DISP_COLOR },
453 { .compatible = "mediatek,mt8173-disp-color",
454 .data = (void *)MTK_DISP_COLOR },
455 { .compatible = "mediatek,mt8173-disp-aal",
456 .data = (void *)MTK_DISP_AAL},
457 { .compatible = "mediatek,mt8173-disp-gamma",
458 .data = (void *)MTK_DISP_GAMMA, },
459 { .compatible = "mediatek,mt8173-disp-ufoe",
460 .data = (void *)MTK_DISP_UFOE },
461 { .compatible = "mediatek,mt2701-dsi",
462 .data = (void *)MTK_DSI },
463 { .compatible = "mediatek,mt8173-dsi",
464 .data = (void *)MTK_DSI },
465 { .compatible = "mediatek,mt2701-dpi",
466 .data = (void *)MTK_DPI },
467 { .compatible = "mediatek,mt8173-dpi",
468 .data = (void *)MTK_DPI },
469 { .compatible = "mediatek,mt2701-disp-mutex",
470 .data = (void *)MTK_DISP_MUTEX },
471 { .compatible = "mediatek,mt2712-disp-mutex",
472 .data = (void *)MTK_DISP_MUTEX },
473 { .compatible = "mediatek,mt8173-disp-mutex",
474 .data = (void *)MTK_DISP_MUTEX },
475 { .compatible = "mediatek,mt2701-disp-pwm",
476 .data = (void *)MTK_DISP_BLS },
477 { .compatible = "mediatek,mt8173-disp-pwm",
478 .data = (void *)MTK_DISP_PWM },
479 { .compatible = "mediatek,mt8173-disp-od",
480 .data = (void *)MTK_DISP_OD },
484 static int mtk_drm_probe(struct platform_device *pdev)
486 struct device *dev = &pdev->dev;
487 struct mtk_drm_private *private;
488 struct resource *mem;
489 struct device_node *node;
490 struct component_match *match = NULL;
494 private = devm_kzalloc(dev, sizeof(*private), GFP_KERNEL);
498 mutex_init(&private->commit.lock);
499 INIT_WORK(&private->commit.work, mtk_atomic_work);
500 private->data = of_device_get_match_data(dev);
502 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
503 private->config_regs = devm_ioremap_resource(dev, mem);
504 if (IS_ERR(private->config_regs)) {
505 ret = PTR_ERR(private->config_regs);
506 dev_err(dev, "Failed to ioremap mmsys-config resource: %d\n",
511 /* Iterate over sibling DISP function blocks */
512 for_each_child_of_node(dev->of_node->parent, node) {
513 const struct of_device_id *of_id;
514 enum mtk_ddp_comp_type comp_type;
517 of_id = of_match_node(mtk_ddp_comp_dt_ids, node);
521 if (!of_device_is_available(node)) {
522 dev_dbg(dev, "Skipping disabled component %pOF\n",
527 comp_type = (enum mtk_ddp_comp_type)of_id->data;
529 if (comp_type == MTK_DISP_MUTEX) {
530 private->mutex_node = of_node_get(node);
534 comp_id = mtk_ddp_comp_get_id(node, comp_type);
536 dev_warn(dev, "Skipping unknown component %pOF\n",
541 private->comp_node[comp_id] = of_node_get(node);
544 * Currently only the COLOR, OVL, RDMA, DSI, and DPI blocks have
545 * separate component platform drivers and initialize their own
546 * DDP component structure. The others are initialized here.
548 if (comp_type == MTK_DISP_COLOR ||
549 comp_type == MTK_DISP_OVL ||
550 comp_type == MTK_DISP_OVL_2L ||
551 comp_type == MTK_DISP_RDMA ||
552 comp_type == MTK_DSI ||
553 comp_type == MTK_DPI) {
554 dev_info(dev, "Adding component match for %pOF\n",
556 drm_of_component_match_add(dev, &match, compare_of,
559 struct mtk_ddp_comp *comp;
561 comp = devm_kzalloc(dev, sizeof(*comp), GFP_KERNEL);
568 ret = mtk_ddp_comp_init(dev, node, comp, comp_id, NULL);
574 private->ddp_comp[comp_id] = comp;
578 if (!private->mutex_node) {
579 dev_err(dev, "Failed to find disp-mutex node\n");
584 pm_runtime_enable(dev);
586 platform_set_drvdata(pdev, private);
588 ret = component_master_add_with_match(dev, &mtk_drm_ops, match);
595 pm_runtime_disable(dev);
597 of_node_put(private->mutex_node);
598 for (i = 0; i < DDP_COMPONENT_ID_MAX; i++)
599 of_node_put(private->comp_node[i]);
603 static int mtk_drm_remove(struct platform_device *pdev)
605 struct mtk_drm_private *private = platform_get_drvdata(pdev);
608 component_master_del(&pdev->dev, &mtk_drm_ops);
609 pm_runtime_disable(&pdev->dev);
610 of_node_put(private->mutex_node);
611 for (i = 0; i < DDP_COMPONENT_ID_MAX; i++)
612 of_node_put(private->comp_node[i]);
617 #ifdef CONFIG_PM_SLEEP
618 static int mtk_drm_sys_suspend(struct device *dev)
620 struct mtk_drm_private *private = dev_get_drvdata(dev);
621 struct drm_device *drm = private->drm;
624 ret = drm_mode_config_helper_suspend(drm);
625 DRM_DEBUG_DRIVER("mtk_drm_sys_suspend\n");
630 static int mtk_drm_sys_resume(struct device *dev)
632 struct mtk_drm_private *private = dev_get_drvdata(dev);
633 struct drm_device *drm = private->drm;
636 ret = drm_mode_config_helper_resume(drm);
637 DRM_DEBUG_DRIVER("mtk_drm_sys_resume\n");
643 static SIMPLE_DEV_PM_OPS(mtk_drm_pm_ops, mtk_drm_sys_suspend,
646 static const struct of_device_id mtk_drm_of_ids[] = {
647 { .compatible = "mediatek,mt2701-mmsys",
648 .data = &mt2701_mmsys_driver_data},
649 { .compatible = "mediatek,mt2712-mmsys",
650 .data = &mt2712_mmsys_driver_data},
651 { .compatible = "mediatek,mt8173-mmsys",
652 .data = &mt8173_mmsys_driver_data},
656 static struct platform_driver mtk_drm_platform_driver = {
657 .probe = mtk_drm_probe,
658 .remove = mtk_drm_remove,
660 .name = "mediatek-drm",
661 .of_match_table = mtk_drm_of_ids,
662 .pm = &mtk_drm_pm_ops,
666 static struct platform_driver * const mtk_drm_drivers[] = {
668 &mtk_disp_color_driver,
669 &mtk_disp_ovl_driver,
670 &mtk_disp_rdma_driver,
672 &mtk_drm_platform_driver,
677 static int __init mtk_drm_init(void)
679 return platform_register_drivers(mtk_drm_drivers,
680 ARRAY_SIZE(mtk_drm_drivers));
683 static void __exit mtk_drm_exit(void)
685 platform_unregister_drivers(mtk_drm_drivers,
686 ARRAY_SIZE(mtk_drm_drivers));
689 module_init(mtk_drm_init);
690 module_exit(mtk_drm_exit);
693 MODULE_DESCRIPTION("Mediatek SoC DRM driver");
694 MODULE_LICENSE("GPL v2");