drivers/gpu/drm/tiny/ili9486.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * DRM driver for Ilitek ILI9486 panels
   4  *
   5  * Copyright 2020 Kamlesh Gurudasani <[email protected]>
   6  */
   7
   8 #include <linux/backlight.h>
   9 #include <linux/delay.h>
  10 #include <linux/gpio/consumer.h>
  11 #include <linux/module.h>
  12 #include <linux/property.h>
  13 #include <linux/spi/spi.h>
  14
  15 #include <video/mipi_display.h>
  16
  17 #include <drm/drm_atomic_helper.h>
  18 #include <drm/drm_drv.h>
  19 #include <drm/drm_fbdev_generic.h>
  20 #include <drm/drm_gem_atomic_helper.h>
  21 #include <drm/drm_gem_dma_helper.h>
  22 #include <drm/drm_managed.h>
  23 #include <drm/drm_mipi_dbi.h>
  24 #include <drm/drm_modeset_helper.h>
  25
  26 #define ILI9486_ITFCTR1         0xb0
  27 #define ILI9486_PWCTRL1         0xc2
  28 #define ILI9486_VMCTRL1         0xc5
  29 #define ILI9486_PGAMCTRL        0xe0
  30 #define ILI9486_NGAMCTRL        0xe1
  31 #define ILI9486_DGAMCTRL        0xe2
  32 #define ILI9486_MADCTL_BGR      BIT(3)
  33 #define ILI9486_MADCTL_MV       BIT(5)
  34 #define ILI9486_MADCTL_MX       BIT(6)
  35 #define ILI9486_MADCTL_MY       BIT(7)
  36
  37 /*
  38  * The PiScreen/waveshare rpi-lcd-35 has a SPI to 16-bit parallel bus converter
  39  * in front of the  display controller. This means that 8-bit values have to be
  40  * transferred as 16-bit.
  41  */
  42 static int waveshare_command(struct mipi_dbi *mipi, u8 *cmd, u8 *par,
  43                              size_t num)
  44 {
  45         struct spi_device *spi = mipi->spi;
  46         unsigned int bpw = 8;
  47         void *data = par;
  48         u32 speed_hz;
  49         int i, ret;
  50         __be16 *buf;
  51
  52         buf = kmalloc(32 * sizeof(u16), GFP_KERNEL);
  53         if (!buf)
  54                 return -ENOMEM;
  55
  56         /*
  57          * The displays are Raspberry Pi HATs and connected to the 8-bit only
  58          * SPI controller, so 16-bit command and parameters need byte swapping
  59          * before being transferred as 8-bit on the big endian SPI bus.
  60          */
  61         buf[0] = cpu_to_be16(*cmd);
  62         gpiod_set_value_cansleep(mipi->dc, 0);
  63         speed_hz = mipi_dbi_spi_cmd_max_speed(spi, 2);
  64         ret = mipi_dbi_spi_transfer(spi, speed_hz, 8, buf, 2);
  65         if (ret || !num)
  66                 goto free;
  67
  68         /* 8-bit configuration data, not 16-bit pixel data */
  69         if (num <= 32) {
  70                 for (i = 0; i < num; i++)
  71                         buf[i] = cpu_to_be16(par[i]);
  72                 num *= 2;
  73                 data = buf;
  74         }
  75
  76         /*
  77          * Check whether pixel data bytes needs to be swapped or not
  78          */
  79         if (*cmd == MIPI_DCS_WRITE_MEMORY_START && !mipi->swap_bytes)
  80                 bpw = 16;
  81
  82         gpiod_set_value_cansleep(mipi->dc, 1);
  83         speed_hz = mipi_dbi_spi_cmd_max_speed(spi, num);
  84         ret = mipi_dbi_spi_transfer(spi, speed_hz, bpw, data, num);
  85  free:
  86         kfree(buf);
  87
  88         return ret;
  89 }
  90
  91 static void waveshare_enable(struct drm_simple_display_pipe *pipe,
  92                              struct drm_crtc_state *crtc_state,
  93                              struct drm_plane_state *plane_state)
  94 {
  95         struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(pipe->crtc.dev);
  96         struct mipi_dbi *dbi = &dbidev->dbi;
  97         u8 addr_mode;
  98         int ret, idx;
  99
 100         if (!drm_dev_enter(pipe->crtc.dev, &idx))
 101                 return;
 102
 103         DRM_DEBUG_KMS("\n");
 104
 105         ret = mipi_dbi_poweron_conditional_reset(dbidev);
 106         if (ret < 0)
 107                 goto out_exit;
 108         if (ret == 1)
 109                 goto out_enable;
 110
 111         mipi_dbi_command(dbi, ILI9486_ITFCTR1);
 112         mipi_dbi_command(dbi, MIPI_DCS_EXIT_SLEEP_MODE);
 113         msleep(250);
 114
 115         mipi_dbi_command(dbi, MIPI_DCS_SET_PIXEL_FORMAT, 0x55);
 116
 117         mipi_dbi_command(dbi, ILI9486_PWCTRL1, 0x44);
 118
 119         mipi_dbi_command(dbi, ILI9486_VMCTRL1, 0x00, 0x00, 0x00, 0x00);
 120
 121         mipi_dbi_command(dbi, ILI9486_PGAMCTRL,
 122                          0x0F, 0x1F, 0x1C, 0x0C, 0x0F, 0x08, 0x48, 0x98,
 123                          0x37, 0x0A, 0x13, 0x04, 0x11, 0x0D, 0x0);
 124         mipi_dbi_command(dbi, ILI9486_NGAMCTRL,
 125                          0x0F, 0x32, 0x2E, 0x0B, 0x0D, 0x05, 0x47, 0x75,
 126                          0x37, 0x06, 0x10, 0x03, 0x24, 0x20, 0x00);
 127         mipi_dbi_command(dbi, ILI9486_DGAMCTRL,
 128                          0x0F, 0x32, 0x2E, 0x0B, 0x0D, 0x05, 0x47, 0x75,
 129                          0x37, 0x06, 0x10, 0x03, 0x24, 0x20, 0x00);
 130
 131         mipi_dbi_command(dbi, MIPI_DCS_SET_DISPLAY_ON);
 132         msleep(100);
 133
 134  out_enable:
 135         switch (dbidev->rotation) {
 136         case 90:
 137                 addr_mode = ILI9486_MADCTL_MY;
 138                 break;
 139         case 180:
 140                 addr_mode = ILI9486_MADCTL_MV;
 141                 break;
 142         case 270:
 143                 addr_mode = ILI9486_MADCTL_MX;
 144                 break;
 145         default:
 146                 addr_mode = ILI9486_MADCTL_MV | ILI9486_MADCTL_MY |
 147                         ILI9486_MADCTL_MX;
 148                 break;
 149         }
 150         addr_mode |= ILI9486_MADCTL_BGR;
 151         mipi_dbi_command(dbi, MIPI_DCS_SET_ADDRESS_MODE, addr_mode);
 152         mipi_dbi_enable_flush(dbidev, crtc_state, plane_state);
 153  out_exit:
 154         drm_dev_exit(idx);
 155 }
 156
 157 static const struct drm_simple_display_pipe_funcs waveshare_pipe_funcs = {
 158         DRM_MIPI_DBI_SIMPLE_DISPLAY_PIPE_FUNCS(waveshare_enable),
 159 };
 160
 161 static const struct drm_display_mode waveshare_mode = {
 162         DRM_SIMPLE_MODE(480, 320, 73, 49),
 163 };
 164
 165 DEFINE_DRM_GEM_DMA_FOPS(ili9486_fops);
 166
 167 static const struct drm_driver ili9486_driver = {
 168         .driver_features        = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC,
 169         .fops                   = &ili9486_fops,
 170         DRM_GEM_DMA_DRIVER_OPS_VMAP,
 171         .debugfs_init           = mipi_dbi_debugfs_init,
 172         .name                   = "ili9486",
 173         .desc                   = "Ilitek ILI9486",
 174         .date                   = "20200118",
 175         .major                  = 1,
 176         .minor                  = 0,
 177 };
 178
 179 static const struct of_device_id ili9486_of_match[] = {
 180         { .compatible = "waveshare,rpi-lcd-35" },
 181         { .compatible = "ozzmaker,piscreen" },
 182         {},
 183 };
 184 MODULE_DEVICE_TABLE(of, ili9486_of_match);
 185
 186 static const struct spi_device_id ili9486_id[] = {
 187         { "ili9486", 0 },
 188         { "rpi-lcd-35", 0 },
 189         { "piscreen", 0 },
 190         { }
 191 };
 192 MODULE_DEVICE_TABLE(spi, ili9486_id);
 193
 194 static int ili9486_probe(struct spi_device *spi)
 195 {
 196         struct device *dev = &spi->dev;
 197         struct mipi_dbi_dev *dbidev;
 198         struct drm_device *drm;
 199         struct mipi_dbi *dbi;
 200         struct gpio_desc *dc;
 201         u32 rotation = 0;
 202         int ret;
 203
 204         dbidev = devm_drm_dev_alloc(dev, &ili9486_driver,
 205                                     struct mipi_dbi_dev, drm);
 206         if (IS_ERR(dbidev))
 207                 return PTR_ERR(dbidev);
 208
 209         dbi = &dbidev->dbi;
 210         drm = &dbidev->drm;
 211
 212         dbi->reset = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
 213         if (IS_ERR(dbi->reset))
 214                 return dev_err_probe(dev, PTR_ERR(dbi->reset), "Failed to get GPIO 'reset'\n");
 215
 216         dc = devm_gpiod_get(dev, "dc", GPIOD_OUT_LOW);
 217         if (IS_ERR(dc))
 218                 return dev_err_probe(dev, PTR_ERR(dc), "Failed to get GPIO 'dc'\n");
 219
 220         dbidev->backlight = devm_of_find_backlight(dev);
 221         if (IS_ERR(dbidev->backlight))
 222                 return PTR_ERR(dbidev->backlight);
 223
 224         device_property_read_u32(dev, "rotation", &rotation);
 225
 226         ret = mipi_dbi_spi_init(spi, dbi, dc);
 227         if (ret)
 228                 return ret;
 229
 230         dbi->command = waveshare_command;
 231         dbi->read_commands = NULL;
 232
 233         ret = mipi_dbi_dev_init(dbidev, &waveshare_pipe_funcs,
 234                                 &waveshare_mode, rotation);
 235         if (ret)
 236                 return ret;
 237
 238         drm_mode_config_reset(drm);
 239
 240         ret = drm_dev_register(drm, 0);
 241         if (ret)
 242                 return ret;
 243
 244         spi_set_drvdata(spi, drm);
 245
 246         drm_fbdev_generic_setup(drm, 0);
 247
 248         return 0;
 249 }
 250
 251 static void ili9486_remove(struct spi_device *spi)
 252 {
 253         struct drm_device *drm = spi_get_drvdata(spi);
 254
 255         drm_dev_unplug(drm);
 256         drm_atomic_helper_shutdown(drm);
 257 }
 258
 259 static void ili9486_shutdown(struct spi_device *spi)
 260 {
 261         drm_atomic_helper_shutdown(spi_get_drvdata(spi));
 262 }
 263
 264 static struct spi_driver ili9486_spi_driver = {
 265         .driver = {
 266                 .name = "ili9486",
 267                 .of_match_table = ili9486_of_match,
 268         },
 269         .id_table = ili9486_id,
 270         .probe = ili9486_probe,
 271         .remove = ili9486_remove,
 272         .shutdown = ili9486_shutdown,
 273 };
 274 module_spi_driver(ili9486_spi_driver);
 275
 276 MODULE_DESCRIPTION("Ilitek ILI9486 DRM driver");
 277 MODULE_AUTHOR("Kamlesh Gurudasani <[email protected]>");
 278 MODULE_LICENSE("GPL");