1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Glue code for the SHA1 Secure Hash Algorithm assembler implementation using
6 * Supplemental SSE3 instructions.
8 * This file is based on sha1_generic.c
10 * Copyright (c) Alan Smithee.
17 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
19 #include <crypto/internal/hash.h>
20 #include <crypto/internal/simd.h>
21 #include <linux/init.h>
22 #include <linux/module.h>
24 #include <linux/types.h>
25 #include <crypto/sha1.h>
26 #include <crypto/sha1_base.h>
29 static int sha1_update(struct shash_desc *desc, const u8 *data,
30 unsigned int len, sha1_block_fn *sha1_xform)
32 struct sha1_state *sctx = shash_desc_ctx(desc);
34 if (!crypto_simd_usable() ||
35 (sctx->count % SHA1_BLOCK_SIZE) + len < SHA1_BLOCK_SIZE)
36 return crypto_sha1_update(desc, data, len);
39 * Make sure struct sha1_state begins directly with the SHA1
40 * 160-bit internal state, as this is what the asm functions expect.
42 BUILD_BUG_ON(offsetof(struct sha1_state, state) != 0);
45 sha1_base_do_update(desc, data, len, sha1_xform);
51 static int sha1_finup(struct shash_desc *desc, const u8 *data,
52 unsigned int len, u8 *out, sha1_block_fn *sha1_xform)
54 if (!crypto_simd_usable())
55 return crypto_sha1_finup(desc, data, len, out);
59 sha1_base_do_update(desc, data, len, sha1_xform);
60 sha1_base_do_finalize(desc, sha1_xform);
63 return sha1_base_finish(desc, out);
66 asmlinkage void sha1_transform_ssse3(struct sha1_state *state,
67 const u8 *data, int blocks);
69 static int sha1_ssse3_update(struct shash_desc *desc, const u8 *data,
72 return sha1_update(desc, data, len, sha1_transform_ssse3);
75 static int sha1_ssse3_finup(struct shash_desc *desc, const u8 *data,
76 unsigned int len, u8 *out)
78 return sha1_finup(desc, data, len, out, sha1_transform_ssse3);
81 /* Add padding and return the message digest. */
82 static int sha1_ssse3_final(struct shash_desc *desc, u8 *out)
84 return sha1_ssse3_finup(desc, NULL, 0, out);
87 static struct shash_alg sha1_ssse3_alg = {
88 .digestsize = SHA1_DIGEST_SIZE,
89 .init = sha1_base_init,
90 .update = sha1_ssse3_update,
91 .final = sha1_ssse3_final,
92 .finup = sha1_ssse3_finup,
93 .descsize = sizeof(struct sha1_state),
96 .cra_driver_name = "sha1-ssse3",
98 .cra_blocksize = SHA1_BLOCK_SIZE,
99 .cra_module = THIS_MODULE,
103 static int register_sha1_ssse3(void)
105 if (boot_cpu_has(X86_FEATURE_SSSE3))
106 return crypto_register_shash(&sha1_ssse3_alg);
110 static void unregister_sha1_ssse3(void)
112 if (boot_cpu_has(X86_FEATURE_SSSE3))
113 crypto_unregister_shash(&sha1_ssse3_alg);
116 asmlinkage void sha1_transform_avx(struct sha1_state *state,
117 const u8 *data, int blocks);
119 static int sha1_avx_update(struct shash_desc *desc, const u8 *data,
122 return sha1_update(desc, data, len, sha1_transform_avx);
125 static int sha1_avx_finup(struct shash_desc *desc, const u8 *data,
126 unsigned int len, u8 *out)
128 return sha1_finup(desc, data, len, out, sha1_transform_avx);
131 static int sha1_avx_final(struct shash_desc *desc, u8 *out)
133 return sha1_avx_finup(desc, NULL, 0, out);
136 static struct shash_alg sha1_avx_alg = {
137 .digestsize = SHA1_DIGEST_SIZE,
138 .init = sha1_base_init,
139 .update = sha1_avx_update,
140 .final = sha1_avx_final,
141 .finup = sha1_avx_finup,
142 .descsize = sizeof(struct sha1_state),
145 .cra_driver_name = "sha1-avx",
147 .cra_blocksize = SHA1_BLOCK_SIZE,
148 .cra_module = THIS_MODULE,
152 static bool avx_usable(void)
154 if (!cpu_has_xfeatures(XFEATURE_MASK_SSE | XFEATURE_MASK_YMM, NULL)) {
155 if (boot_cpu_has(X86_FEATURE_AVX))
156 pr_info("AVX detected but unusable.\n");
163 static int register_sha1_avx(void)
166 return crypto_register_shash(&sha1_avx_alg);
170 static void unregister_sha1_avx(void)
173 crypto_unregister_shash(&sha1_avx_alg);
176 #define SHA1_AVX2_BLOCK_OPTSIZE 4 /* optimal 4*64 bytes of SHA1 blocks */
178 asmlinkage void sha1_transform_avx2(struct sha1_state *state,
179 const u8 *data, int blocks);
181 static bool avx2_usable(void)
183 if (avx_usable() && boot_cpu_has(X86_FEATURE_AVX2)
184 && boot_cpu_has(X86_FEATURE_BMI1)
185 && boot_cpu_has(X86_FEATURE_BMI2))
191 static void sha1_apply_transform_avx2(struct sha1_state *state,
192 const u8 *data, int blocks)
194 /* Select the optimal transform based on data block size */
195 if (blocks >= SHA1_AVX2_BLOCK_OPTSIZE)
196 sha1_transform_avx2(state, data, blocks);
198 sha1_transform_avx(state, data, blocks);
201 static int sha1_avx2_update(struct shash_desc *desc, const u8 *data,
204 return sha1_update(desc, data, len, sha1_apply_transform_avx2);
207 static int sha1_avx2_finup(struct shash_desc *desc, const u8 *data,
208 unsigned int len, u8 *out)
210 return sha1_finup(desc, data, len, out, sha1_apply_transform_avx2);
213 static int sha1_avx2_final(struct shash_desc *desc, u8 *out)
215 return sha1_avx2_finup(desc, NULL, 0, out);
218 static struct shash_alg sha1_avx2_alg = {
219 .digestsize = SHA1_DIGEST_SIZE,
220 .init = sha1_base_init,
221 .update = sha1_avx2_update,
222 .final = sha1_avx2_final,
223 .finup = sha1_avx2_finup,
224 .descsize = sizeof(struct sha1_state),
227 .cra_driver_name = "sha1-avx2",
229 .cra_blocksize = SHA1_BLOCK_SIZE,
230 .cra_module = THIS_MODULE,
234 static int register_sha1_avx2(void)
237 return crypto_register_shash(&sha1_avx2_alg);
241 static void unregister_sha1_avx2(void)
244 crypto_unregister_shash(&sha1_avx2_alg);
247 #ifdef CONFIG_AS_SHA1_NI
248 asmlinkage void sha1_ni_transform(struct sha1_state *digest, const u8 *data,
251 static int sha1_ni_update(struct shash_desc *desc, const u8 *data,
254 return sha1_update(desc, data, len, sha1_ni_transform);
257 static int sha1_ni_finup(struct shash_desc *desc, const u8 *data,
258 unsigned int len, u8 *out)
260 return sha1_finup(desc, data, len, out, sha1_ni_transform);
263 static int sha1_ni_final(struct shash_desc *desc, u8 *out)
265 return sha1_ni_finup(desc, NULL, 0, out);
268 static struct shash_alg sha1_ni_alg = {
269 .digestsize = SHA1_DIGEST_SIZE,
270 .init = sha1_base_init,
271 .update = sha1_ni_update,
272 .final = sha1_ni_final,
273 .finup = sha1_ni_finup,
274 .descsize = sizeof(struct sha1_state),
277 .cra_driver_name = "sha1-ni",
279 .cra_blocksize = SHA1_BLOCK_SIZE,
280 .cra_module = THIS_MODULE,
284 static int register_sha1_ni(void)
286 if (boot_cpu_has(X86_FEATURE_SHA_NI))
287 return crypto_register_shash(&sha1_ni_alg);
291 static void unregister_sha1_ni(void)
293 if (boot_cpu_has(X86_FEATURE_SHA_NI))
294 crypto_unregister_shash(&sha1_ni_alg);
298 static inline int register_sha1_ni(void) { return 0; }
299 static inline void unregister_sha1_ni(void) { }
302 static int __init sha1_ssse3_mod_init(void)
304 if (register_sha1_ssse3())
307 if (register_sha1_avx()) {
308 unregister_sha1_ssse3();
312 if (register_sha1_avx2()) {
313 unregister_sha1_avx();
314 unregister_sha1_ssse3();
318 if (register_sha1_ni()) {
319 unregister_sha1_avx2();
320 unregister_sha1_avx();
321 unregister_sha1_ssse3();
330 static void __exit sha1_ssse3_mod_fini(void)
332 unregister_sha1_ni();
333 unregister_sha1_avx2();
334 unregister_sha1_avx();
335 unregister_sha1_ssse3();
338 module_init(sha1_ssse3_mod_init);
339 module_exit(sha1_ssse3_mod_fini);
341 MODULE_LICENSE("GPL");
342 MODULE_DESCRIPTION("SHA1 Secure Hash Algorithm, Supplemental SSE3 accelerated");
344 MODULE_ALIAS_CRYPTO("sha1");
345 MODULE_ALIAS_CRYPTO("sha1-ssse3");
346 MODULE_ALIAS_CRYPTO("sha1-avx");
347 MODULE_ALIAS_CRYPTO("sha1-avx2");
348 #ifdef CONFIG_AS_SHA1_NI
349 MODULE_ALIAS_CRYPTO("sha1-ni");